T275 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.755000151 |
|
|
Dec 24 02:05:46 PM PST 23 |
Dec 24 02:06:30 PM PST 23 |
49819224774 ps |
T67 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1251393868 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:06:51 PM PST 23 |
147115534995 ps |
T125 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.651717375 |
|
|
Dec 24 02:04:38 PM PST 23 |
Dec 24 02:04:56 PM PST 23 |
2614398399 ps |
T450 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.1035199090 |
|
|
Dec 24 02:05:26 PM PST 23 |
Dec 24 02:05:33 PM PST 23 |
2009693894 ps |
T339 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3552266029 |
|
|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:07:53 PM PST 23 |
143493809383 ps |
T451 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1088337688 |
|
|
Dec 24 02:05:08 PM PST 23 |
Dec 24 02:05:11 PM PST 23 |
2628313853 ps |
T367 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2672358742 |
|
|
Dec 24 02:06:09 PM PST 23 |
Dec 24 02:06:36 PM PST 23 |
50501184366 ps |
T452 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3343284 |
|
|
Dec 24 02:04:05 PM PST 23 |
Dec 24 02:04:14 PM PST 23 |
5886157083 ps |
T453 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1984810787 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:11 PM PST 23 |
2465384298 ps |
T454 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2124307859 |
|
|
Dec 24 02:05:00 PM PST 23 |
Dec 24 02:05:06 PM PST 23 |
2487191745 ps |
T277 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3253483068 |
|
|
Dec 24 02:06:14 PM PST 23 |
Dec 24 02:06:44 PM PST 23 |
31577774004 ps |
T111 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2307797544 |
|
|
Dec 24 02:06:04 PM PST 23 |
Dec 24 02:06:25 PM PST 23 |
26103221594 ps |
T455 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2512832474 |
|
|
Dec 24 02:06:08 PM PST 23 |
Dec 24 02:06:18 PM PST 23 |
3994910192 ps |
T80 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2124714916 |
|
|
Dec 24 02:06:04 PM PST 23 |
Dec 24 02:06:14 PM PST 23 |
8945389459 ps |
T232 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3772654675 |
|
|
Dec 24 02:05:46 PM PST 23 |
Dec 24 02:05:55 PM PST 23 |
6011759318 ps |
T233 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1072234235 |
|
|
Dec 24 02:05:47 PM PST 23 |
Dec 24 02:06:44 PM PST 23 |
72794527817 ps |
T234 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2990633365 |
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|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:04:56 PM PST 23 |
2511064104 ps |
T235 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.414991510 |
|
|
Dec 24 02:04:49 PM PST 23 |
Dec 24 02:05:07 PM PST 23 |
2615300257 ps |
T137 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3629167694 |
|
|
Dec 24 02:06:06 PM PST 23 |
Dec 24 02:06:14 PM PST 23 |
5238235425 ps |
T236 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1442333545 |
|
|
Dec 24 02:05:59 PM PST 23 |
Dec 24 02:06:05 PM PST 23 |
2014938638 ps |
T81 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1030629314 |
|
|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:29:08 PM PST 23 |
1706431019278 ps |
T196 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.4180950162 |
|
|
Dec 24 02:04:47 PM PST 23 |
Dec 24 02:05:00 PM PST 23 |
2144461293 ps |
T197 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3817361960 |
|
|
Dec 24 02:05:46 PM PST 23 |
Dec 24 02:06:01 PM PST 23 |
2613678575 ps |
T456 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.3043687122 |
|
|
Dec 24 02:04:48 PM PST 23 |
Dec 24 02:04:59 PM PST 23 |
2226668630 ps |
T166 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.3774534782 |
|
|
Dec 24 02:05:48 PM PST 23 |
Dec 24 02:06:16 PM PST 23 |
8169903928 ps |
T298 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2560904034 |
|
|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:07:33 PM PST 23 |
123979264789 ps |
T457 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.317466696 |
|
|
Dec 24 02:04:31 PM PST 23 |
Dec 24 02:04:49 PM PST 23 |
2247096017 ps |
T458 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.647615329 |
|
|
Dec 24 02:04:39 PM PST 23 |
Dec 24 02:05:02 PM PST 23 |
3577128236 ps |
T366 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.54719113 |
|
|
Dec 24 02:04:22 PM PST 23 |
Dec 24 02:04:54 PM PST 23 |
51698683909 ps |
T138 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1131529546 |
|
|
Dec 24 02:06:12 PM PST 23 |
Dec 24 02:06:23 PM PST 23 |
10864061842 ps |
T459 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3979638054 |
|
|
Dec 24 02:03:56 PM PST 23 |
Dec 24 02:04:02 PM PST 23 |
3143590920 ps |
T460 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1600328965 |
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|
Dec 24 02:04:56 PM PST 23 |
Dec 24 02:05:09 PM PST 23 |
2511165244 ps |
T461 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2652007698 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:05:52 PM PST 23 |
4292310783 ps |
T462 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2316011754 |
|
|
Dec 24 02:04:16 PM PST 23 |
Dec 24 02:04:36 PM PST 23 |
2719737989 ps |
T463 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2294386387 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:55 PM PST 23 |
2465782085 ps |
T464 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1667016325 |
|
|
Dec 24 02:06:07 PM PST 23 |
Dec 24 02:06:14 PM PST 23 |
2768395593 ps |
T112 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1327060801 |
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|
Dec 24 02:06:09 PM PST 23 |
Dec 24 02:07:08 PM PST 23 |
42179807365 ps |
T126 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3750838772 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:06:48 PM PST 23 |
32330666592 ps |
T299 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1698777022 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:06:33 PM PST 23 |
68768812275 ps |
T288 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1318104820 |
|
|
Dec 24 02:05:16 PM PST 23 |
Dec 24 02:05:48 PM PST 23 |
57045164625 ps |
T465 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.4222090807 |
|
|
Dec 24 02:06:06 PM PST 23 |
Dec 24 02:06:15 PM PST 23 |
2110706003 ps |
T466 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.4230260133 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:49 PM PST 23 |
2242553719 ps |
T139 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2020931586 |
|
|
Dec 24 02:04:37 PM PST 23 |
Dec 24 02:04:52 PM PST 23 |
9863970966 ps |
T384 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3668948819 |
|
|
Dec 24 02:04:36 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
2515860946 ps |
T167 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3713070477 |
|
|
Dec 24 02:04:25 PM PST 23 |
Dec 24 02:04:46 PM PST 23 |
3879547781 ps |
T467 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.3324294 |
|
|
Dec 24 02:05:14 PM PST 23 |
Dec 24 02:05:17 PM PST 23 |
2143693003 ps |
T468 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.92458236 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:54 PM PST 23 |
2620017243 ps |
T469 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.735230045 |
|
|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:40 PM PST 23 |
2182999117 ps |
T470 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3538394608 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:53 PM PST 23 |
2069640637 ps |
T471 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.2637408715 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:05:50 PM PST 23 |
2012825704 ps |
T165 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1176478704 |
|
|
Dec 24 02:04:21 PM PST 23 |
Dec 24 02:04:44 PM PST 23 |
53806103324 ps |
T179 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1117592377 |
|
|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:42 PM PST 23 |
2011099133 ps |
T238 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.2470233865 |
|
|
Dec 24 02:05:29 PM PST 23 |
Dec 24 02:08:33 PM PST 23 |
69246183205 ps |
T239 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2227737648 |
|
|
Dec 24 02:05:47 PM PST 23 |
Dec 24 02:06:23 PM PST 23 |
10348096749 ps |
T240 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.1076236013 |
|
|
Dec 24 02:04:39 PM PST 23 |
Dec 24 02:04:54 PM PST 23 |
2130373320 ps |
T241 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3068671884 |
|
|
Dec 24 02:06:15 PM PST 23 |
Dec 24 02:06:24 PM PST 23 |
2626367215 ps |
T242 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.419863898 |
|
|
Dec 24 02:04:42 PM PST 23 |
Dec 24 02:05:00 PM PST 23 |
2542239419 ps |
T243 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.2632855726 |
|
|
Dec 24 02:04:03 PM PST 23 |
Dec 24 02:04:16 PM PST 23 |
3230883283 ps |
T244 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1688487607 |
|
|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:06:29 PM PST 23 |
57785530705 ps |
T245 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.1540151000 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:15:40 PM PST 23 |
218263970436 ps |
T472 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3979959956 |
|
|
Dec 24 02:04:04 PM PST 23 |
Dec 24 02:04:12 PM PST 23 |
2486776344 ps |
T192 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1554752343 |
|
|
Dec 24 02:04:47 PM PST 23 |
Dec 24 02:06:07 PM PST 23 |
28487062174 ps |
T473 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1867142528 |
|
|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:10 PM PST 23 |
4619064384 ps |
T474 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.936132243 |
|
|
Dec 24 02:04:31 PM PST 23 |
Dec 24 02:04:54 PM PST 23 |
2447462787 ps |
T475 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2573120267 |
|
|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:10 PM PST 23 |
2490496627 ps |
T378 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2702382764 |
|
|
Dec 24 02:05:40 PM PST 23 |
Dec 24 02:10:43 PM PST 23 |
607289147745 ps |
T270 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3788938192 |
|
|
Dec 24 02:06:08 PM PST 23 |
Dec 24 02:07:13 PM PST 23 |
24078249788 ps |
T336 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1334452727 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:11:13 PM PST 23 |
224002676627 ps |
T476 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.549169157 |
|
|
Dec 24 02:05:23 PM PST 23 |
Dec 24 02:05:55 PM PST 23 |
40760446627 ps |
T477 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.640086760 |
|
|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:36 PM PST 23 |
2029431842 ps |
T478 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1672195443 |
|
|
Dec 24 02:05:28 PM PST 23 |
Dec 24 02:05:32 PM PST 23 |
6495249476 ps |
T141 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1356032882 |
|
|
Dec 24 02:04:42 PM PST 23 |
Dec 24 02:05:00 PM PST 23 |
7254073038 ps |
T258 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4267139683 |
|
|
Dec 24 02:06:05 PM PST 23 |
Dec 24 02:06:11 PM PST 23 |
3273972828 ps |
T479 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.1293431165 |
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|
Dec 24 02:06:09 PM PST 23 |
Dec 24 02:06:17 PM PST 23 |
2026051791 ps |
T480 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.208896506 |
|
|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:47 PM PST 23 |
2608682854 ps |
T221 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2538295396 |
|
|
Dec 24 02:04:40 PM PST 23 |
Dec 24 02:04:55 PM PST 23 |
3638507914 ps |
T481 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.4122530787 |
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|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:36 PM PST 23 |
3669723567 ps |
T482 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.3882970864 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:05:45 PM PST 23 |
2150038324 ps |
T483 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.241027438 |
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|
Dec 24 02:04:25 PM PST 23 |
Dec 24 02:04:39 PM PST 23 |
2542362401 ps |
T484 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1700470753 |
|
|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:04:56 PM PST 23 |
2696645326 ps |
T337 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.967710649 |
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|
Dec 24 02:06:04 PM PST 23 |
Dec 24 02:07:33 PM PST 23 |
123872090592 ps |
T485 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2934623263 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:47 PM PST 23 |
3541240901 ps |
T486 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2097284179 |
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Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:49 PM PST 23 |
4450968192 ps |
T487 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2151722952 |
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|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:41 PM PST 23 |
2508389324 ps |
T488 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1550151327 |
|
|
Dec 24 02:05:27 PM PST 23 |
Dec 24 02:05:31 PM PST 23 |
3264111630 ps |
T359 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3898760516 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:06:21 PM PST 23 |
57697689068 ps |
T212 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.756977829 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:07:22 PM PST 23 |
127709255314 ps |
T489 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.1442639000 |
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|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:45 PM PST 23 |
2110538957 ps |
T490 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3480806808 |
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|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:15 PM PST 23 |
3646593238 ps |
T140 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3199210271 |
|
|
Dec 24 02:04:22 PM PST 23 |
Dec 24 02:04:35 PM PST 23 |
10069744210 ps |
T189 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2942701155 |
|
|
Dec 24 02:06:12 PM PST 23 |
Dec 24 02:06:22 PM PST 23 |
2940121937 ps |
T89 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2676544689 |
|
|
Dec 24 02:06:13 PM PST 23 |
Dec 24 02:06:26 PM PST 23 |
2800990959 ps |
T143 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.858609920 |
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|
Dec 24 02:05:40 PM PST 23 |
Dec 24 02:19:54 PM PST 23 |
724835362863 ps |
T144 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2205527423 |
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Dec 24 02:06:15 PM PST 23 |
Dec 24 02:06:24 PM PST 23 |
2526256695 ps |
T145 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.2994865735 |
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Dec 24 02:04:36 PM PST 23 |
Dec 24 02:04:51 PM PST 23 |
2028059812 ps |
T146 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.3371570266 |
|
|
Dec 24 02:04:27 PM PST 23 |
Dec 24 02:04:43 PM PST 23 |
2179902799 ps |
T147 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.2205206540 |
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Dec 24 02:04:29 PM PST 23 |
Dec 24 02:04:55 PM PST 23 |
4118275249 ps |
T148 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1280967866 |
|
|
Dec 24 02:06:06 PM PST 23 |
Dec 24 02:06:33 PM PST 23 |
51396724872 ps |
T113 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3017110182 |
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|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:06:56 PM PST 23 |
81436835225 ps |
T87 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3007305858 |
|
|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:42 PM PST 23 |
5830998762 ps |
T149 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2254020560 |
|
|
Dec 24 02:04:33 PM PST 23 |
Dec 24 02:04:49 PM PST 23 |
2639438623 ps |
T491 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3972823401 |
|
|
Dec 24 02:05:27 PM PST 23 |
Dec 24 02:05:35 PM PST 23 |
2540272654 ps |
T492 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3588007402 |
|
|
Dec 24 02:03:51 PM PST 23 |
Dec 24 02:03:55 PM PST 23 |
2502501813 ps |
T493 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2037136052 |
|
|
Dec 24 02:06:08 PM PST 23 |
Dec 24 02:06:19 PM PST 23 |
3254586957 ps |
T494 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.99821014 |
|
|
Dec 24 02:04:25 PM PST 23 |
Dec 24 02:04:41 PM PST 23 |
3113075274 ps |
T287 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3306144667 |
|
|
Dec 24 02:05:47 PM PST 23 |
Dec 24 02:06:51 PM PST 23 |
88608682479 ps |
T495 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1999880353 |
|
|
Dec 24 02:04:16 PM PST 23 |
Dec 24 02:04:33 PM PST 23 |
2065285575 ps |
T203 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1904669466 |
|
|
Dec 24 02:04:34 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
5863762855 ps |
T78 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2126564543 |
|
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Dec 24 02:04:06 PM PST 23 |
Dec 24 02:06:06 PM PST 23 |
41729145636 ps |
T496 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1768707582 |
|
|
Dec 24 02:04:28 PM PST 23 |
Dec 24 02:04:52 PM PST 23 |
2916625822 ps |
T497 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.364994008 |
|
|
Dec 24 02:04:21 PM PST 23 |
Dec 24 02:04:39 PM PST 23 |
2610219956 ps |
T377 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2325421397 |
|
|
Dec 24 02:04:51 PM PST 23 |
Dec 24 02:05:47 PM PST 23 |
33058826019 ps |
T168 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.4245057227 |
|
|
Dec 24 02:04:38 PM PST 23 |
Dec 24 02:05:03 PM PST 23 |
4492380033 ps |
T114 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1707953708 |
|
|
Dec 24 02:06:12 PM PST 23 |
Dec 24 02:06:49 PM PST 23 |
72895261701 ps |
T381 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2709331842 |
|
|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:44 PM PST 23 |
727190533226 ps |
T498 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3083872429 |
|
|
Dec 24 02:04:22 PM PST 23 |
Dec 24 02:04:42 PM PST 23 |
4136967511 ps |
T86 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.4190763698 |
|
|
Dec 24 02:05:41 PM PST 23 |
Dec 24 02:05:45 PM PST 23 |
4625877982 ps |
T499 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1313612853 |
|
|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:48 PM PST 23 |
2609884835 ps |
T500 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.3028688686 |
|
|
Dec 24 02:05:48 PM PST 23 |
Dec 24 02:05:58 PM PST 23 |
2027723246 ps |
T280 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1843722299 |
|
|
Dec 24 02:05:15 PM PST 23 |
Dec 24 02:07:14 PM PST 23 |
83293794366 ps |
T501 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.435621939 |
|
|
Dec 24 02:04:05 PM PST 23 |
Dec 24 02:04:12 PM PST 23 |
3618337097 ps |
T502 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.219993308 |
|
|
Dec 24 02:05:07 PM PST 23 |
Dec 24 02:05:09 PM PST 23 |
2547400613 ps |
T503 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2058964059 |
|
|
Dec 24 02:06:13 PM PST 23 |
Dec 24 02:06:28 PM PST 23 |
6176944604 ps |
T504 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.2705791833 |
|
|
Dec 24 02:05:41 PM PST 23 |
Dec 24 02:05:46 PM PST 23 |
3138554599 ps |
T505 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3939075391 |
|
|
Dec 24 02:05:15 PM PST 23 |
Dec 24 02:05:22 PM PST 23 |
2617867903 ps |
T506 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.2540273164 |
|
|
Dec 24 02:04:39 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
2212837071 ps |
T507 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.147293608 |
|
|
Dec 24 02:04:53 PM PST 23 |
Dec 24 02:05:09 PM PST 23 |
2511592895 ps |
T508 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.1369198864 |
|
|
Dec 24 02:05:59 PM PST 23 |
Dec 24 02:06:07 PM PST 23 |
2108146956 ps |
T509 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.60554869 |
|
|
Dec 24 02:04:28 PM PST 23 |
Dec 24 02:04:51 PM PST 23 |
3201890371 ps |
T510 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.3081458234 |
|
|
Dec 24 02:04:39 PM PST 23 |
Dec 24 02:04:54 PM PST 23 |
2131407169 ps |
T511 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3926580716 |
|
|
Dec 24 02:05:46 PM PST 23 |
Dec 24 02:05:55 PM PST 23 |
2638354263 ps |
T512 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.764762040 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:05:53 PM PST 23 |
2488547235 ps |
T150 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1865841883 |
|
|
Dec 24 02:05:00 PM PST 23 |
Dec 24 02:05:06 PM PST 23 |
6836216723 ps |
T513 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.4001065478 |
|
|
Dec 24 02:04:34 PM PST 23 |
Dec 24 02:04:50 PM PST 23 |
2627975702 ps |
T514 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.424737637 |
|
|
Dec 24 02:04:30 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
2607594978 ps |
T515 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.453125664 |
|
|
Dec 24 02:05:41 PM PST 23 |
Dec 24 02:05:44 PM PST 23 |
2538759617 ps |
T516 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1270443298 |
|
|
Dec 24 02:04:24 PM PST 23 |
Dec 24 02:04:39 PM PST 23 |
2634485231 ps |
T310 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3995609862 |
|
|
Dec 24 02:04:24 PM PST 23 |
Dec 24 02:06:18 PM PST 23 |
42011227296 ps |
T517 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1466007086 |
|
|
Dec 24 02:05:39 PM PST 23 |
Dec 24 02:05:42 PM PST 23 |
3270333682 ps |
T518 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.3941385390 |
|
|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:06:01 PM PST 23 |
2144360491 ps |
T213 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.2926712401 |
|
|
Dec 24 02:06:07 PM PST 23 |
Dec 24 02:06:21 PM PST 23 |
15793183458 ps |
T361 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.92986267 |
|
|
Dec 24 02:05:57 PM PST 23 |
Dec 24 02:08:36 PM PST 23 |
63993601453 ps |
T352 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.130587630 |
|
|
Dec 24 02:05:54 PM PST 23 |
Dec 24 02:08:28 PM PST 23 |
55140431714 ps |
T519 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2341760037 |
|
|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:06:07 PM PST 23 |
2594315852 ps |
T353 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.633842953 |
|
|
Dec 24 02:04:31 PM PST 23 |
Dec 24 02:07:18 PM PST 23 |
152528014951 ps |
T520 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2738432401 |
|
|
Dec 24 02:04:44 PM PST 23 |
Dec 24 02:04:59 PM PST 23 |
2868494524 ps |
T521 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.490568854 |
|
|
Dec 24 02:04:25 PM PST 23 |
Dec 24 02:04:45 PM PST 23 |
2511719836 ps |
T341 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3089890594 |
|
|
Dec 24 02:06:09 PM PST 23 |
Dec 24 02:06:38 PM PST 23 |
36555496300 ps |
T522 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.976864856 |
|
|
Dec 24 02:06:00 PM PST 23 |
Dec 24 02:06:04 PM PST 23 |
2709191805 ps |
T523 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1157480235 |
|
|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:14 PM PST 23 |
2610491739 ps |
T524 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2948542680 |
|
|
Dec 24 02:05:23 PM PST 23 |
Dec 24 02:05:26 PM PST 23 |
7956842095 ps |
T525 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1579860591 |
|
|
Dec 24 02:05:57 PM PST 23 |
Dec 24 02:06:05 PM PST 23 |
4394625180 ps |
T526 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3338116348 |
|
|
Dec 24 02:06:01 PM PST 23 |
Dec 24 02:06:08 PM PST 23 |
2517616020 ps |
T527 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2459641630 |
|
|
Dec 24 02:06:12 PM PST 23 |
Dec 24 02:06:34 PM PST 23 |
8228038326 ps |
T528 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3728008620 |
|
|
Dec 24 02:04:59 PM PST 23 |
Dec 24 02:05:05 PM PST 23 |
3420316742 ps |
T190 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.640764268 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:06:29 PM PST 23 |
1399931818069 ps |
T180 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3075596592 |
|
|
Dec 24 02:04:21 PM PST 23 |
Dec 24 02:04:35 PM PST 23 |
4100479308 ps |
T183 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3692552472 |
|
|
Dec 24 02:04:04 PM PST 23 |
Dec 24 02:04:12 PM PST 23 |
3171087505 ps |
T184 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1299993816 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:05:56 PM PST 23 |
2223374620 ps |
T185 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3141974329 |
|
|
Dec 24 02:03:47 PM PST 23 |
Dec 24 02:03:53 PM PST 23 |
2247117820 ps |
T186 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1193438686 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:54 PM PST 23 |
2533470052 ps |
T187 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3202732033 |
|
|
Dec 24 02:04:22 PM PST 23 |
Dec 24 02:04:41 PM PST 23 |
297408614729 ps |
T188 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.199946007 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:06:50 PM PST 23 |
118400387211 ps |
T115 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.908559453 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:06:28 PM PST 23 |
202322839387 ps |
T116 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3709367435 |
|
|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:07:33 PM PST 23 |
41024754761 ps |
T529 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.216555768 |
|
|
Dec 24 02:04:16 PM PST 23 |
Dec 24 02:04:39 PM PST 23 |
2614676370 ps |
T530 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1340889023 |
|
|
Dec 24 02:04:27 PM PST 23 |
Dec 24 02:04:43 PM PST 23 |
2051873329 ps |
T531 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.397243277 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:11 PM PST 23 |
2513853746 ps |
T532 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.169582860 |
|
|
Dec 24 02:06:08 PM PST 23 |
Dec 24 02:06:16 PM PST 23 |
2019027239 ps |
T350 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.120320607 |
|
|
Dec 24 02:04:42 PM PST 23 |
Dec 24 02:07:20 PM PST 23 |
57270503963 ps |
T533 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.587791603 |
|
|
Dec 24 02:04:22 PM PST 23 |
Dec 24 02:04:54 PM PST 23 |
29017874519 ps |
T534 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.355366068 |
|
|
Dec 24 02:04:03 PM PST 23 |
Dec 24 02:04:10 PM PST 23 |
2167963922 ps |
T535 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3048087914 |
|
|
Dec 24 02:04:52 PM PST 23 |
Dec 24 02:05:03 PM PST 23 |
2490911939 ps |
T536 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.344826198 |
|
|
Dec 24 02:04:29 PM PST 23 |
Dec 24 02:04:51 PM PST 23 |
2445317588 ps |
T537 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.2771177207 |
|
|
Dec 24 02:05:17 PM PST 23 |
Dec 24 02:05:24 PM PST 23 |
2012161733 ps |
T538 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1220569617 |
|
|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
2616880594 ps |
T539 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.638569329 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:13 PM PST 23 |
2513916932 ps |
T540 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.4138000981 |
|
|
Dec 24 02:06:04 PM PST 23 |
Dec 24 02:06:15 PM PST 23 |
4988674968 ps |
T541 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1057559099 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:07 PM PST 23 |
3473740835 ps |
T342 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1174196823 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:08:49 PM PST 23 |
70628321751 ps |
T210 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4267467601 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:05:48 PM PST 23 |
2397037868 ps |
T542 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.1762720769 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:05:50 PM PST 23 |
2112528202 ps |
T543 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.3210275320 |
|
|
Dec 24 02:04:21 PM PST 23 |
Dec 24 02:04:43 PM PST 23 |
7656219358 ps |
T204 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.1448327841 |
|
|
Dec 24 02:04:03 PM PST 23 |
Dec 24 02:04:14 PM PST 23 |
3827016912 ps |
T172 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.4172244836 |
|
|
Dec 24 02:04:29 PM PST 23 |
Dec 24 02:06:22 PM PST 23 |
152344959393 ps |
T544 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.2768432444 |
|
|
Dec 24 02:03:47 PM PST 23 |
Dec 24 02:03:55 PM PST 23 |
2113809181 ps |
T545 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3724049008 |
|
|
Dec 24 02:04:24 PM PST 23 |
Dec 24 02:04:42 PM PST 23 |
2103128661 ps |
T546 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1537472823 |
|
|
Dec 24 02:06:08 PM PST 23 |
Dec 24 02:06:22 PM PST 23 |
3248565662 ps |
T547 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.285487814 |
|
|
Dec 24 02:06:01 PM PST 23 |
Dec 24 02:06:11 PM PST 23 |
2450565879 ps |
T289 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.3986806186 |
|
|
Dec 24 02:05:57 PM PST 23 |
Dec 24 02:09:44 PM PST 23 |
95272401662 ps |
T548 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.629763657 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:53 PM PST 23 |
2686691235 ps |
T549 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.983167446 |
|
|
Dec 24 02:06:01 PM PST 23 |
Dec 24 02:06:23 PM PST 23 |
27352427165 ps |
T550 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2246800504 |
|
|
Dec 24 02:06:14 PM PST 23 |
Dec 24 02:06:23 PM PST 23 |
2477579627 ps |
T551 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1177577017 |
|
|
Dec 24 02:05:57 PM PST 23 |
Dec 24 02:06:01 PM PST 23 |
2090278267 ps |
T552 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.736887262 |
|
|
Dec 24 02:04:49 PM PST 23 |
Dec 24 02:05:08 PM PST 23 |
2447381388 ps |
T553 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2532309087 |
|
|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:36 PM PST 23 |
2264125052 ps |
T554 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.835513990 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:05:50 PM PST 23 |
2470865862 ps |
T555 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1914236582 |
|
|
Dec 24 02:05:41 PM PST 23 |
Dec 24 02:05:44 PM PST 23 |
2153698087 ps |
T556 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.782815284 |
|
|
Dec 24 02:05:45 PM PST 23 |
Dec 24 02:05:58 PM PST 23 |
2179165566 ps |
T557 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3334883430 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:53 PM PST 23 |
3358700487 ps |
T558 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2740753508 |
|
|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:04:50 PM PST 23 |
2525810399 ps |
T154 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1606114210 |
|
|
Dec 24 02:04:27 PM PST 23 |
Dec 24 02:04:48 PM PST 23 |
3077597499 ps |
T559 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2851666651 |
|
|
Dec 24 02:05:59 PM PST 23 |
Dec 24 02:06:06 PM PST 23 |
2029805873 ps |
T560 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1524025905 |
|
|
Dec 24 02:05:28 PM PST 23 |
Dec 24 02:05:38 PM PST 23 |
3298233138 ps |
T117 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3363824675 |
|
|
Dec 24 02:05:44 PM PST 23 |
Dec 24 02:06:55 PM PST 23 |
104339068905 ps |
T561 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1392963459 |
|
|
Dec 24 02:06:15 PM PST 23 |
Dec 24 02:06:29 PM PST 23 |
2614565001 ps |
T344 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3980824265 |
|
|
Dec 24 02:06:15 PM PST 23 |
Dec 24 02:07:53 PM PST 23 |
34364853899 ps |
T118 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3079648606 |
|
|
Dec 24 02:03:47 PM PST 23 |
Dec 24 02:05:32 PM PST 23 |
42051104606 ps |
T562 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1181306716 |
|
|
Dec 24 02:06:02 PM PST 23 |
Dec 24 02:06:13 PM PST 23 |
2510431162 ps |
T563 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.112839050 |
|
|
Dec 24 02:06:01 PM PST 23 |
Dec 24 02:06:07 PM PST 23 |
2460863802 ps |
T564 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.476955696 |
|
|
Dec 24 02:06:07 PM PST 23 |
Dec 24 02:06:48 PM PST 23 |
27835614083 ps |
T565 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3774662525 |
|
|
Dec 24 02:04:43 PM PST 23 |
Dec 24 02:05:04 PM PST 23 |
5108391769 ps |
T566 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2567502371 |
|
|
Dec 24 02:05:46 PM PST 23 |
Dec 24 02:05:55 PM PST 23 |
2217629346 ps |
T567 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.4047695327 |
|
|
Dec 24 02:05:57 PM PST 23 |
Dec 24 02:06:03 PM PST 23 |
2122396633 ps |
T568 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3746306864 |
|
|
Dec 24 02:06:00 PM PST 23 |
Dec 24 02:06:05 PM PST 23 |
2197448518 ps |
T569 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1558312008 |
|
|
Dec 24 02:04:37 PM PST 23 |
Dec 24 02:04:53 PM PST 23 |
3494935109 ps |
T570 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1390483034 |
|
|
Dec 24 02:06:10 PM PST 23 |
Dec 24 02:06:19 PM PST 23 |
2519699146 ps |
T571 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3793821764 |
|
|
Dec 24 02:05:39 PM PST 23 |
Dec 24 02:05:42 PM PST 23 |
2535548704 ps |
T382 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1248820331 |
|
|
Dec 24 02:06:04 PM PST 23 |
Dec 24 02:07:09 PM PST 23 |
2231168387219 ps |
T572 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2484646331 |
|
|
Dec 24 02:04:23 PM PST 23 |
Dec 24 02:04:35 PM PST 23 |
2067728222 ps |
T573 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.4032443567 |
|
|
Dec 24 02:04:02 PM PST 23 |
Dec 24 02:04:09 PM PST 23 |
2702224151 ps |
T574 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.3727293803 |
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|
Dec 24 02:03:48 PM PST 23 |
Dec 24 02:03:56 PM PST 23 |
2010220868 ps |
T205 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.1912193824 |
|
|
Dec 24 02:05:29 PM PST 23 |
Dec 24 02:08:58 PM PST 23 |
132629014045 ps |
T119 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3228711568 |
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|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:06:19 PM PST 23 |
87963851613 ps |
T575 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2306502680 |
|
|
Dec 24 02:06:10 PM PST 23 |
Dec 24 02:06:25 PM PST 23 |
3044402249 ps |
T576 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.371074228 |
|
|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:13 PM PST 23 |
3872294196 ps |
T265 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1736392722 |
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|
Dec 24 02:06:03 PM PST 23 |
Dec 24 02:06:11 PM PST 23 |
4159644761 ps |
T290 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3071438750 |
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|
Dec 24 02:04:28 PM PST 23 |
Dec 24 02:06:30 PM PST 23 |
85143036666 ps |
T268 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3924139602 |
|
|
Dec 24 02:05:18 PM PST 23 |
Dec 24 02:05:22 PM PST 23 |
2397851679 ps |
T577 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.453674515 |
|
|
Dec 24 02:05:28 PM PST 23 |
Dec 24 02:05:37 PM PST 23 |
3264894211 ps |
T578 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.2171142778 |
|
|
Dec 24 02:04:43 PM PST 23 |
Dec 24 02:04:59 PM PST 23 |
2635982547 ps |
T291 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2615752740 |
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|
Dec 24 02:04:34 PM PST 23 |
Dec 24 02:09:27 PM PST 23 |
103841661451 ps |
T579 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3748976911 |
|
|
Dec 24 02:04:07 PM PST 23 |
Dec 24 02:04:23 PM PST 23 |
2083294163 ps |
T281 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3910431695 |
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|
Dec 24 02:04:34 PM PST 23 |
Dec 24 02:05:52 PM PST 23 |
54260706813 ps |
T580 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2722553018 |
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|
Dec 24 02:04:35 PM PST 23 |
Dec 24 02:04:51 PM PST 23 |
3712813859 ps |
T581 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.4037788199 |
|
|
Dec 24 02:04:17 PM PST 23 |
Dec 24 02:05:15 PM PST 23 |
41259949180 ps |
T358 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3830533630 |
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|
Dec 24 02:05:58 PM PST 23 |
Dec 24 02:07:31 PM PST 23 |
66268498814 ps |
T582 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1138524819 |
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|
Dec 24 02:04:34 PM PST 23 |
Dec 24 02:04:57 PM PST 23 |
3338354547 ps |
T583 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.419481041 |
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|
Dec 24 02:04:17 PM PST 23 |
Dec 24 02:04:39 PM PST 23 |
2874333983 ps |
T584 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1938901961 |
|
|
Dec 24 02:06:10 PM PST 23 |
Dec 24 02:06:19 PM PST 23 |
2030597997 ps |
T585 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3138911392 |
|
|
Dec 24 02:06:07 PM PST 23 |
Dec 24 02:06:19 PM PST 23 |
3588570102 ps |
T586 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.840147578 |
|
|
Dec 24 02:04:05 PM PST 23 |
Dec 24 02:04:09 PM PST 23 |
2544704840 ps |
T587 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.2052876788 |
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|
Dec 24 02:04:28 PM PST 23 |
Dec 24 02:05:07 PM PST 23 |
9123262308 ps |
T588 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3310606697 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:52 PM PST 23 |
2610903720 ps |
T589 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3790141059 |
|
|
Dec 24 02:05:43 PM PST 23 |
Dec 24 02:05:47 PM PST 23 |
2046331444 ps |
T590 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1326415416 |
|
|
Dec 24 02:04:05 PM PST 23 |
Dec 24 02:04:15 PM PST 23 |
2509549505 ps |
T591 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1945815975 |
|
|
Dec 24 02:05:42 PM PST 23 |
Dec 24 02:05:46 PM PST 23 |
2296714267 ps |
T592 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.4106868024 |
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|
Dec 24 02:04:26 PM PST 23 |
Dec 24 02:04:44 PM PST 23 |
2482826083 ps |
T593 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.4211117275 |
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|
Dec 24 02:04:39 PM PST 23 |
Dec 24 02:05:00 PM PST 23 |
2509766725 ps |
T71 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3890651507 |
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|
Dec 24 02:06:01 PM PST 23 |
Dec 24 02:09:16 PM PST 23 |
73751661600 ps |