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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.85 98.96 96.38 100.00 97.44 98.33 99.81 94.03


Total test records in report: 913
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T300 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1057364025 Dec 24 02:05:39 PM PST 23 Dec 24 02:06:25 PM PST 23 35233636972 ps
T340 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2229362751 Dec 24 02:06:06 PM PST 23 Dec 24 02:09:45 PM PST 23 169579131348 ps
T594 /workspace/coverage/default/44.sysrst_ctrl_stress_all.3368454045 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:23 PM PST 23 6601743545 ps
T595 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.842893859 Dec 24 02:06:09 PM PST 23 Dec 24 02:06:23 PM PST 23 3139343849 ps
T596 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1793377250 Dec 24 02:03:51 PM PST 23 Dec 24 02:04:11 PM PST 23 6497711799 ps
T597 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2434343537 Dec 24 02:05:28 PM PST 23 Dec 24 02:05:30 PM PST 23 2028353311 ps
T598 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.650679689 Dec 24 02:03:47 PM PST 23 Dec 24 02:03:57 PM PST 23 2609324190 ps
T599 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3356088578 Dec 24 02:04:43 PM PST 23 Dec 24 02:04:59 PM PST 23 2534697420 ps
T600 /workspace/coverage/default/14.sysrst_ctrl_smoke.2082176887 Dec 24 02:04:38 PM PST 23 Dec 24 02:04:55 PM PST 23 2119491329 ps
T601 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.735934544 Dec 24 02:04:56 PM PST 23 Dec 24 02:05:04 PM PST 23 2046497869 ps
T602 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3029548070 Dec 24 02:04:26 PM PST 23 Dec 24 02:05:50 PM PST 23 28584794857 ps
T83 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.4081689730 Dec 24 02:04:42 PM PST 23 Dec 24 02:05:07 PM PST 23 77542983711 ps
T603 /workspace/coverage/default/9.sysrst_ctrl_alert_test.2890207258 Dec 24 02:04:25 PM PST 23 Dec 24 02:04:44 PM PST 23 2012535484 ps
T604 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3435241756 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:33 PM PST 23 5168910974 ps
T349 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.808351676 Dec 24 02:06:08 PM PST 23 Dec 24 02:06:57 PM PST 23 70811913824 ps
T605 /workspace/coverage/default/15.sysrst_ctrl_smoke.384917468 Dec 24 02:04:33 PM PST 23 Dec 24 02:04:50 PM PST 23 2118161804 ps
T606 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.835496374 Dec 24 02:05:43 PM PST 23 Dec 24 02:05:56 PM PST 23 3394949297 ps
T607 /workspace/coverage/default/36.sysrst_ctrl_alert_test.4132431463 Dec 24 02:05:44 PM PST 23 Dec 24 02:05:51 PM PST 23 2049517263 ps
T345 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2155617227 Dec 24 02:06:03 PM PST 23 Dec 24 02:07:04 PM PST 23 91818095386 ps
T608 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4040888781 Dec 24 02:06:11 PM PST 23 Dec 24 02:06:23 PM PST 23 2121562616 ps
T609 /workspace/coverage/default/41.sysrst_ctrl_alert_test.256949670 Dec 24 02:05:45 PM PST 23 Dec 24 02:05:55 PM PST 23 2015812540 ps
T371 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.368058719 Dec 24 02:05:44 PM PST 23 Dec 24 02:14:48 PM PST 23 196000818410 ps
T610 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3893264779 Dec 24 02:06:09 PM PST 23 Dec 24 02:06:25 PM PST 23 3408117447 ps
T611 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.518262559 Dec 24 02:03:46 PM PST 23 Dec 24 02:03:52 PM PST 23 3364257157 ps
T612 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2608458294 Dec 24 02:05:42 PM PST 23 Dec 24 02:05:51 PM PST 23 2443111583 ps
T613 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2043141717 Dec 24 02:05:42 PM PST 23 Dec 24 02:05:52 PM PST 23 4196049487 ps
T614 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2769621515 Dec 24 02:03:55 PM PST 23 Dec 24 02:04:04 PM PST 23 2514756063 ps
T615 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1371479088 Dec 24 02:05:47 PM PST 23 Dec 24 02:07:49 PM PST 23 45062617639 ps
T616 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3940707792 Dec 24 02:05:48 PM PST 23 Dec 24 02:06:06 PM PST 23 3592057713 ps
T617 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.4282104246 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:10 PM PST 23 3688929786 ps
T618 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2918701357 Dec 24 02:04:48 PM PST 23 Dec 24 02:05:33 PM PST 23 46965258410 ps
T619 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.252446546 Dec 24 02:05:44 PM PST 23 Dec 24 02:06:54 PM PST 23 29372844001 ps
T620 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.4208261743 Dec 24 02:04:28 PM PST 23 Dec 24 02:04:54 PM PST 23 3466846549 ps
T90 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1941917507 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:10 PM PST 23 8404112390 ps
T621 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2520533257 Dec 24 02:04:26 PM PST 23 Dec 24 02:04:44 PM PST 23 2468184845 ps
T622 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1538922857 Dec 24 02:04:39 PM PST 23 Dec 24 02:04:57 PM PST 23 2614942123 ps
T206 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.112292191 Dec 24 02:04:41 PM PST 23 Dec 24 02:07:18 PM PST 23 59818029221 ps
T375 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2180685603 Dec 24 02:04:38 PM PST 23 Dec 24 02:05:17 PM PST 23 37469556377 ps
T623 /workspace/coverage/default/30.sysrst_ctrl_alert_test.556911538 Dec 24 02:05:58 PM PST 23 Dec 24 02:06:06 PM PST 23 2014008181 ps
T624 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.1310370613 Dec 24 02:04:35 PM PST 23 Dec 24 02:04:53 PM PST 23 8954740783 ps
T625 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1483936230 Dec 24 02:04:29 PM PST 23 Dec 24 02:04:48 PM PST 23 2623638721 ps
T338 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3962624867 Dec 24 02:04:29 PM PST 23 Dec 24 02:06:32 PM PST 23 159715424133 ps
T626 /workspace/coverage/default/21.sysrst_ctrl_alert_test.177948345 Dec 24 02:04:48 PM PST 23 Dec 24 02:05:04 PM PST 23 2014756470 ps
T627 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3363618032 Dec 24 02:05:47 PM PST 23 Dec 24 02:07:54 PM PST 23 45684007965 ps
T628 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3018505275 Dec 24 02:06:02 PM PST 23 Dec 24 02:06:09 PM PST 23 8849436860 ps
T629 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.32620479 Dec 24 02:03:46 PM PST 23 Dec 24 02:04:38 PM PST 23 91194499851 ps
T237 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1988085207 Dec 24 02:04:49 PM PST 23 Dec 24 02:05:12 PM PST 23 5424290807 ps
T259 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2815797263 Dec 24 02:04:26 PM PST 23 Dec 24 02:04:43 PM PST 23 3958405349 ps
T260 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1163982302 Dec 24 02:04:35 PM PST 23 Dec 24 02:05:35 PM PST 23 112636396621 ps
T261 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1124873964 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:10 PM PST 23 2148887990 ps
T262 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1274941516 Dec 24 02:05:42 PM PST 23 Dec 24 02:07:43 PM PST 23 45719951020 ps
T263 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2239874451 Dec 24 02:03:46 PM PST 23 Dec 24 02:03:55 PM PST 23 2218918949 ps
T264 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3904052946 Dec 24 02:04:35 PM PST 23 Dec 24 02:05:42 PM PST 23 77461948165 ps
T630 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2319992168 Dec 24 02:06:06 PM PST 23 Dec 24 02:06:13 PM PST 23 2148292099 ps
T84 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1108549399 Dec 24 02:06:01 PM PST 23 Dec 24 02:11:49 PM PST 23 135206857408 ps
T631 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.764116106 Dec 24 02:04:25 PM PST 23 Dec 24 02:04:47 PM PST 23 3523124272 ps
T91 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2730000609 Dec 24 02:04:41 PM PST 23 Dec 24 02:04:55 PM PST 23 15223551308 ps
T271 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.579767463 Dec 24 02:06:07 PM PST 23 Dec 24 02:07:24 PM PST 23 27329443078 ps
T632 /workspace/coverage/default/48.sysrst_ctrl_alert_test.2522222876 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:06 PM PST 23 2031528070 ps
T292 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.925066416 Dec 24 02:05:45 PM PST 23 Dec 24 02:06:43 PM PST 23 109610985440 ps
T282 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.1122753324 Dec 24 02:04:24 PM PST 23 Dec 24 02:05:55 PM PST 23 58463237105 ps
T633 /workspace/coverage/default/28.sysrst_ctrl_alert_test.2460815287 Dec 24 02:06:06 PM PST 23 Dec 24 02:06:11 PM PST 23 2040102018 ps
T88 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2715651938 Dec 24 02:04:36 PM PST 23 Dec 24 02:05:48 PM PST 23 26777374749 ps
T634 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.22777290 Dec 24 02:04:40 PM PST 23 Dec 24 02:04:55 PM PST 23 2535767851 ps
T635 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.1900253369 Dec 24 02:05:45 PM PST 23 Dec 24 02:05:54 PM PST 23 4604710374 ps
T636 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.316568511 Dec 24 02:05:45 PM PST 23 Dec 24 02:06:00 PM PST 23 2609663004 ps
T637 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1009961922 Dec 24 02:06:06 PM PST 23 Dec 24 02:06:16 PM PST 23 2126320204 ps
T638 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2986317592 Dec 24 02:05:45 PM PST 23 Dec 24 02:09:26 PM PST 23 82484444363 ps
T639 /workspace/coverage/default/11.sysrst_ctrl_smoke.2459512508 Dec 24 02:04:29 PM PST 23 Dec 24 02:04:50 PM PST 23 2113568013 ps
T640 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1648087862 Dec 24 02:06:03 PM PST 23 Dec 24 02:06:08 PM PST 23 2068119239 ps
T641 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2583216953 Dec 24 02:06:00 PM PST 23 Dec 24 02:07:22 PM PST 23 78708963398 ps
T355 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.419570408 Dec 24 02:05:58 PM PST 23 Dec 24 02:07:23 PM PST 23 120744702912 ps
T642 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.109475104 Dec 24 02:05:48 PM PST 23 Dec 24 02:06:01 PM PST 23 23436681727 ps
T643 /workspace/coverage/default/2.sysrst_ctrl_smoke.2850977174 Dec 24 02:04:06 PM PST 23 Dec 24 02:04:14 PM PST 23 2116129892 ps
T343 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1838282007 Dec 24 02:05:59 PM PST 23 Dec 24 02:07:35 PM PST 23 197448244271 ps
T151 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2642653495 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:28 PM PST 23 8492742135 ps
T173 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.2304759139 Dec 24 02:05:42 PM PST 23 Dec 24 02:05:54 PM PST 23 4521893254 ps
T644 /workspace/coverage/default/28.sysrst_ctrl_smoke.39142663 Dec 24 02:06:02 PM PST 23 Dec 24 02:06:07 PM PST 23 2194532425 ps
T346 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3970867124 Dec 24 02:05:42 PM PST 23 Dec 24 02:06:19 PM PST 23 317410764177 ps
T645 /workspace/coverage/default/16.sysrst_ctrl_alert_test.3176485632 Dec 24 02:04:35 PM PST 23 Dec 24 02:04:54 PM PST 23 2011117706 ps
T646 /workspace/coverage/default/7.sysrst_ctrl_smoke.3103899495 Dec 24 02:04:27 PM PST 23 Dec 24 02:04:44 PM PST 23 2122172491 ps
T379 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3957397102 Dec 24 02:05:27 PM PST 23 Dec 24 02:09:22 PM PST 23 707241492989 ps
T647 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3499632102 Dec 24 02:04:50 PM PST 23 Dec 24 02:05:07 PM PST 23 2012428920 ps
T648 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.4079302077 Dec 24 02:06:08 PM PST 23 Dec 24 02:07:48 PM PST 23 154415780578 ps
T649 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.149264519 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:26 PM PST 23 2488541903 ps
T650 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.616802439 Dec 24 02:04:43 PM PST 23 Dec 24 02:05:00 PM PST 23 2256222057 ps
T651 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2588448700 Dec 24 02:04:37 PM PST 23 Dec 24 02:05:00 PM PST 23 3480967839 ps
T354 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3648802940 Dec 24 02:04:27 PM PST 23 Dec 24 02:10:00 PM PST 23 128655898745 ps
T374 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3505042327 Dec 24 02:06:08 PM PST 23 Dec 24 02:08:37 PM PST 23 71577861165 ps
T652 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3148985225 Dec 24 02:04:17 PM PST 23 Dec 24 02:04:35 PM PST 23 2271388562 ps
T653 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2126444782 Dec 24 02:05:13 PM PST 23 Dec 24 02:05:46 PM PST 23 24581806829 ps
T654 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2105269766 Dec 24 02:05:56 PM PST 23 Dec 24 02:06:06 PM PST 23 2610231886 ps
T655 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4138582195 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:12 PM PST 23 2608678138 ps
T656 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1437384216 Dec 24 02:06:08 PM PST 23 Dec 24 02:06:16 PM PST 23 3745953175 ps
T657 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3653917290 Dec 24 02:05:58 PM PST 23 Dec 24 02:06:02 PM PST 23 2505027190 ps
T658 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3755851422 Dec 24 02:04:27 PM PST 23 Dec 24 02:04:53 PM PST 23 17719782060 ps
T659 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3849340491 Dec 24 02:06:08 PM PST 23 Dec 24 02:06:22 PM PST 23 3772285327 ps
T660 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3371495132 Dec 24 02:04:23 PM PST 23 Dec 24 02:04:40 PM PST 23 2609206498 ps
T661 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2214239696 Dec 24 02:06:06 PM PST 23 Dec 24 02:07:30 PM PST 23 28739119290 ps
T72 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1203014999 Dec 24 02:04:17 PM PST 23 Dec 24 02:05:34 PM PST 23 141746882619 ps
T662 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2029909550 Dec 24 02:04:21 PM PST 23 Dec 24 02:04:45 PM PST 23 15970628349 ps
T663 /workspace/coverage/default/27.sysrst_ctrl_smoke.981281809 Dec 24 02:05:29 PM PST 23 Dec 24 02:05:32 PM PST 23 2131588500 ps
T283 /workspace/coverage/default/26.sysrst_ctrl_stress_all.2804729766 Dec 24 02:05:43 PM PST 23 Dec 24 02:06:19 PM PST 23 54184983769 ps
T664 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2462242902 Dec 24 02:06:04 PM PST 23 Dec 24 02:06:50 PM PST 23 16425535136 ps
T357 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3857653812 Dec 24 02:05:46 PM PST 23 Dec 24 02:07:56 PM PST 23 91427043652 ps
T665 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3396918411 Dec 24 02:04:28 PM PST 23 Dec 24 02:04:45 PM PST 23 2554251659 ps
T666 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2465578485 Dec 24 02:06:11 PM PST 23 Dec 24 02:07:03 PM PST 23 66594643907 ps
T667 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2274455855 Dec 24 02:06:04 PM PST 23 Dec 24 02:06:14 PM PST 23 2382518859 ps
T668 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1418196683 Dec 24 02:06:01 PM PST 23 Dec 24 02:09:22 PM PST 23 73440142520 ps
T356 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.730954889 Dec 24 02:05:56 PM PST 23 Dec 24 02:07:11 PM PST 23 142004654185 ps
T174 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3971192561 Dec 24 02:05:45 PM PST 23 Dec 24 02:07:42 PM PST 23 81868741502 ps
T155 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2965304669 Dec 24 02:04:27 PM PST 23 Dec 24 02:06:10 PM PST 23 74204839034 ps
T198 /workspace/coverage/default/12.sysrst_ctrl_alert_test.2751922214 Dec 24 02:04:33 PM PST 23 Dec 24 02:04:50 PM PST 23 2019745832 ps
T364 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2383017035 Dec 24 02:04:49 PM PST 23 Dec 24 02:05:51 PM PST 23 39091518705 ps
T669 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1499332653 Dec 24 02:06:06 PM PST 23 Dec 24 02:06:13 PM PST 23 2168759038 ps
T360 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3601888111 Dec 24 02:06:04 PM PST 23 Dec 24 02:09:10 PM PST 23 66538559601 ps
T670 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1161781054 Dec 24 02:03:50 PM PST 23 Dec 24 02:03:55 PM PST 23 2619787125 ps
T671 /workspace/coverage/default/10.sysrst_ctrl_alert_test.3225759382 Dec 24 02:04:29 PM PST 23 Dec 24 02:04:50 PM PST 23 2012008963 ps
T672 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.379535834 Dec 24 02:04:43 PM PST 23 Dec 24 02:05:01 PM PST 23 2513515661 ps
T673 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.562754247 Dec 24 02:06:15 PM PST 23 Dec 24 02:07:32 PM PST 23 134158281751 ps
T674 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1448092980 Dec 24 02:04:38 PM PST 23 Dec 24 02:09:02 PM PST 23 184558950815 ps
T675 /workspace/coverage/default/25.sysrst_ctrl_smoke.2083898327 Dec 24 02:05:24 PM PST 23 Dec 24 02:05:31 PM PST 23 2111657666 ps
T351 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3940217257 Dec 24 02:05:41 PM PST 23 Dec 24 02:07:09 PM PST 23 32528302098 ps
T676 /workspace/coverage/default/40.sysrst_ctrl_smoke.2023453865 Dec 24 02:06:08 PM PST 23 Dec 24 02:06:14 PM PST 23 2127602564 ps
T677 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3994826788 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:20 PM PST 23 2072699501 ps
T678 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.683600597 Dec 24 02:04:38 PM PST 23 Dec 24 02:05:00 PM PST 23 3449069373 ps
T679 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3711456922 Dec 24 02:03:49 PM PST 23 Dec 24 02:03:56 PM PST 23 2012024426 ps
T680 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2314519753 Dec 24 02:04:23 PM PST 23 Dec 24 02:04:38 PM PST 23 3492215101 ps
T681 /workspace/coverage/default/17.sysrst_ctrl_smoke.1480645323 Dec 24 02:04:38 PM PST 23 Dec 24 02:04:53 PM PST 23 2154362594 ps
T682 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.611661192 Dec 24 02:06:08 PM PST 23 Dec 24 02:07:15 PM PST 23 85174428190 ps
T683 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.762039473 Dec 24 02:03:51 PM PST 23 Dec 24 02:03:54 PM PST 23 2491366456 ps
T684 /workspace/coverage/default/22.sysrst_ctrl_smoke.1198646408 Dec 24 02:04:43 PM PST 23 Dec 24 02:05:03 PM PST 23 2112654548 ps
T685 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3995455057 Dec 24 02:04:46 PM PST 23 Dec 24 02:05:00 PM PST 23 2633654864 ps
T686 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.524184528 Dec 24 02:06:08 PM PST 23 Dec 24 02:06:16 PM PST 23 2176315970 ps
T687 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2450013576 Dec 24 02:06:02 PM PST 23 Dec 24 02:06:13 PM PST 23 2512766557 ps
T688 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1969138237 Dec 24 02:05:16 PM PST 23 Dec 24 02:05:21 PM PST 23 3133876729 ps
T689 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3247137114 Dec 24 02:04:57 PM PST 23 Dec 24 02:10:26 PM PST 23 131372869161 ps
T690 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.5019694 Dec 24 02:06:01 PM PST 23 Dec 24 02:06:06 PM PST 23 2174266831 ps
T691 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3501094120 Dec 24 02:04:28 PM PST 23 Dec 24 02:05:58 PM PST 23 52103141766 ps
T692 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1009257222 Dec 24 02:03:52 PM PST 23 Dec 24 02:04:00 PM PST 23 2475670771 ps
T693 /workspace/coverage/default/35.sysrst_ctrl_stress_all.4273835991 Dec 24 02:06:00 PM PST 23 Dec 24 02:06:20 PM PST 23 7124501396 ps
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T746 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3092237958 Dec 24 02:06:07 PM PST 23 Dec 24 02:06:14 PM PST 23 10272519350 ps
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T751 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2801647934 Dec 24 02:05:48 PM PST 23 Dec 24 02:06:02 PM PST 23 2119994398 ps
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T759 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.133746198 Dec 24 02:05:45 PM PST 23 Dec 24 02:06:00 PM PST 23 2610641250 ps
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T762 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1605103752 Dec 24 02:04:25 PM PST 23 Dec 24 02:04:39 PM PST 23 2479500864 ps
T763 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.143985259 Dec 24 02:05:40 PM PST 23 Dec 24 02:05:52 PM PST 23 3646366101 ps
T764 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1268897320 Dec 24 02:06:07 PM PST 23 Dec 24 02:06:13 PM PST 23 2484268653 ps
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T766 /workspace/coverage/default/1.sysrst_ctrl_smoke.477262886 Dec 24 02:04:03 PM PST 23 Dec 24 02:04:10 PM PST 23 2112296324 ps
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T767 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.701328130 Dec 24 02:06:12 PM PST 23 Dec 24 02:06:20 PM PST 23 3475804940 ps
T768 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1315239187 Dec 24 02:04:35 PM PST 23 Dec 24 02:04:50 PM PST 23 2057123512 ps
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