Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.14 98.91 96.33 100.00 97.44 98.29 99.63 89.38


Total tests in report: 912
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
66.70 66.70 72.39 72.39 65.65 65.65 80.18 80.18 97.44 97.44 75.84 75.84 57.40 57.40 17.98 17.98 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3803816167
82.68 15.98 90.87 18.48 82.67 17.02 88.15 7.97 97.44 0.00 90.99 15.14 84.55 27.15 44.11 26.13 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.407245863
86.28 3.60 94.24 3.37 85.84 3.17 92.26 4.10 97.44 0.00 93.18 2.19 89.61 5.06 51.42 7.31 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1848183394
88.28 2.00 94.72 0.49 89.85 4.00 98.18 5.92 97.44 0.00 93.87 0.70 90.36 0.75 53.58 2.16 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.3183865888
90.09 1.81 97.38 2.66 92.18 2.34 98.18 0.00 97.44 0.00 96.41 2.54 95.41 5.06 53.63 0.05 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2512707173
91.21 1.12 97.86 0.49 92.68 0.50 98.18 0.00 97.44 0.00 96.87 0.45 96.35 0.94 59.10 5.47 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.729538221
92.21 1.00 97.90 0.03 92.78 0.10 98.18 0.00 97.44 0.00 96.94 0.07 96.44 0.09 65.77 6.68 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1504324301
92.89 0.69 97.93 0.03 93.13 0.36 98.18 0.00 97.44 0.00 96.94 0.00 96.82 0.37 69.82 4.05 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.485477293
93.40 0.51 97.93 0.00 94.09 0.95 98.63 0.46 97.44 0.00 96.97 0.03 97.10 0.28 71.66 1.84 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.4127102438
93.85 0.45 97.97 0.03 94.16 0.07 98.63 0.00 97.44 0.00 97.01 0.03 97.38 0.28 74.40 2.73 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3128308175
94.21 0.36 98.04 0.07 94.37 0.21 98.86 0.23 97.44 0.00 97.08 0.07 97.38 0.00 76.34 1.95 /workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.2547286691
94.57 0.36 98.07 0.03 94.47 0.10 98.86 0.00 97.44 0.00 97.08 0.00 97.38 0.00 78.71 2.37 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.744490961
94.86 0.29 98.07 0.00 94.56 0.10 98.86 0.00 97.44 0.00 97.08 0.00 97.38 0.00 80.65 1.95 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2449641272
95.10 0.24 98.16 0.09 94.83 0.26 98.86 0.00 97.44 0.00 97.18 0.10 97.66 0.28 81.60 0.95 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.836707800
95.32 0.22 98.18 0.02 95.11 0.29 99.09 0.23 97.44 0.00 97.18 0.00 97.66 0.00 82.60 1.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.932843329
95.49 0.17 98.25 0.07 95.18 0.07 99.09 0.00 97.44 0.00 97.29 0.10 97.66 0.00 83.54 0.95 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1763119120
95.64 0.14 98.30 0.05 95.38 0.19 99.09 0.00 97.44 0.00 97.35 0.07 98.03 0.37 83.86 0.32 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2470856780
95.76 0.13 98.30 0.00 95.38 0.00 99.09 0.00 97.44 0.00 97.35 0.00 98.03 0.00 84.75 0.89 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2102255758
95.89 0.12 98.45 0.16 95.49 0.12 99.09 0.00 97.44 0.00 97.56 0.21 98.41 0.37 84.75 0.00 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1056180029
95.99 0.11 98.49 0.03 95.59 0.10 99.09 0.00 97.44 0.00 97.63 0.07 98.97 0.56 84.75 0.00 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.1036005213
96.09 0.10 98.49 0.00 95.61 0.02 99.54 0.46 97.44 0.00 97.63 0.00 99.06 0.09 84.86 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3090483532
96.18 0.09 98.49 0.00 95.61 0.00 99.54 0.00 97.44 0.00 97.63 0.00 99.06 0.00 85.49 0.63 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.317979698
96.27 0.09 98.49 0.00 95.61 0.00 99.54 0.00 97.44 0.00 97.63 0.00 99.06 0.00 86.12 0.63 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2199130851
96.33 0.06 98.52 0.03 95.71 0.10 99.77 0.23 97.44 0.00 97.70 0.07 99.06 0.00 86.12 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1594857489
96.39 0.06 98.52 0.00 95.71 0.00 99.77 0.00 97.44 0.00 97.70 0.00 99.06 0.00 86.54 0.42 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.1514426279
96.45 0.06 98.56 0.03 95.71 0.00 99.77 0.00 97.44 0.00 97.77 0.07 99.06 0.00 86.86 0.32 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3438784206
96.51 0.05 98.63 0.07 95.76 0.05 99.77 0.00 97.44 0.00 97.84 0.07 99.25 0.19 86.86 0.00 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.3805226004
96.56 0.05 98.63 0.00 95.76 0.00 99.77 0.00 97.44 0.00 97.84 0.00 99.25 0.00 87.22 0.37 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3391249384
96.60 0.04 98.70 0.07 95.78 0.02 99.77 0.00 97.44 0.00 97.95 0.10 99.34 0.09 87.22 0.00 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1441128891
96.64 0.04 98.70 0.00 96.07 0.29 99.77 0.00 97.44 0.00 97.95 0.00 99.34 0.00 87.22 0.00 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.4200645892
96.68 0.04 98.70 0.00 96.11 0.05 100.00 0.23 97.44 0.00 97.95 0.00 99.34 0.00 87.22 0.00 /workspace/coverage/default/0.sysrst_ctrl_alert_test.3931573451
96.72 0.04 98.70 0.00 96.11 0.00 100.00 0.00 97.44 0.00 97.95 0.00 99.34 0.00 87.49 0.26 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3578364598
96.75 0.03 98.70 0.00 96.11 0.00 100.00 0.00 97.44 0.00 97.95 0.00 99.34 0.00 87.70 0.21 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.466839360
96.78 0.03 98.70 0.00 96.16 0.05 100.00 0.00 97.44 0.00 97.95 0.00 99.44 0.09 87.75 0.05 /workspace/coverage/default/11.sysrst_ctrl_stress_all.574096344
96.80 0.03 98.73 0.03 96.19 0.02 100.00 0.00 97.44 0.00 97.98 0.03 99.53 0.09 87.75 0.00 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.245983431
96.83 0.03 98.77 0.03 96.21 0.02 100.00 0.00 97.44 0.00 98.02 0.03 99.63 0.09 87.75 0.00 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.3313404030
96.86 0.03 98.77 0.00 96.23 0.02 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 87.91 0.16 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1909762496
96.88 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.07 0.16 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3547838289
96.90 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.22 0.16 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1032853445
96.92 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.33 0.11 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2983506022
96.93 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.43 0.11 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.593127015
96.95 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.54 0.11 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3512802503
96.96 0.02 98.77 0.00 96.23 0.00 100.00 0.00 97.44 0.00 98.02 0.00 99.63 0.00 88.64 0.11 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2081573863
96.98 0.01 98.78 0.02 96.23 0.00 100.00 0.00 97.44 0.00 98.05 0.03 99.63 0.00 88.70 0.05 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2989613203
96.99 0.01 98.82 0.03 96.23 0.00 100.00 0.00 97.44 0.00 98.12 0.07 99.63 0.00 88.70 0.00 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.2816959872
97.01 0.01 98.85 0.03 96.23 0.00 100.00 0.00 97.44 0.00 98.19 0.07 99.63 0.00 88.70 0.00 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1033810488
97.02 0.01 98.87 0.02 96.26 0.02 100.00 0.00 97.44 0.00 98.22 0.03 99.63 0.00 88.70 0.00 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1116098126
97.02 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 88.75 0.05 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2099717682
97.03 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 88.80 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1945773440
97.04 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 88.85 0.05 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1549612447
97.05 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 88.91 0.05 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3471357374
97.05 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 88.96 0.05 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3122050417
97.06 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.01 0.05 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3585102807
97.07 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.06 0.05 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.313946669
97.08 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.12 0.05 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2464489530
97.08 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.17 0.05 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.232163902
97.09 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.22 0.05 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2091642971
97.10 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.27 0.05 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.591195117
97.11 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.33 0.05 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2119459494
97.11 0.01 98.87 0.00 96.26 0.00 100.00 0.00 97.44 0.00 98.22 0.00 99.63 0.00 89.38 0.05 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3563761157
97.12 0.01 98.89 0.02 96.26 0.00 100.00 0.00 97.44 0.00 98.26 0.03 99.63 0.00 89.38 0.00 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.1314781707
97.13 0.01 98.91 0.02 96.26 0.00 100.00 0.00 97.44 0.00 98.29 0.03 99.63 0.00 89.38 0.00 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4192509989
97.13 0.01 98.91 0.00 96.28 0.02 100.00 0.00 97.44 0.00 98.29 0.00 99.63 0.00 89.38 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1710474705
97.14 0.01 98.91 0.00 96.31 0.02 100.00 0.00 97.44 0.00 98.29 0.00 99.63 0.00 89.38 0.00 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.837742739

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3037977382
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3614446367
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4078902635
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1088592775
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.735865610
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.905141821
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2501139204
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3095172419
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3855922363
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1500238470
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1110617319
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2372678901
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1727628003
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.832057697
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1035882232
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2014556155
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3852052819
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1880777473
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1321230972
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1596109305
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3631070592
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.392832263
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1693953642
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3767531744
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3646498345
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.517771723
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3562330119
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.835426992
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.557962768
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1341175452
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1965496773
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.242155812
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.307849300
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.549444109
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2143869325
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.633701391
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1113807932
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.4115603711
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3250922285
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1502160385
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.589261375
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.4229459902
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1990761773
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.4270533454
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2290054080
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2617782417
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2605540474
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3624894889
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1172090360
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1246619272
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1166695177
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2587821844
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2106359169
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1667024123
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1307646584
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2943993331
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2079051374
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.922877946
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.183577732
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3498375629
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1701924339
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2281619031
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1947869142
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.926460008
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.129405190
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3327014339
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1661156681
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2741157025
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.171524666
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3221689868
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1746041119
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2222885269
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3491399083
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.247466453
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1476673048
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2637866718
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1328449791
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.592065892
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.689563899
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.2520319936
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1424110197
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2227769676
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.520721379
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.821324311
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1482540253
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1409947268
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2720131260
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.856917548
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.4101609069
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.317145728
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.3363777790
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.789201170
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1930357060
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.4181525068
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.67881051
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.1067598018
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.641592134
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.1662487878
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.3498857806
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.763090334
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.1363884144
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.1908650443
/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1451755217
/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.1342996858
/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.1283094842
/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.2641875384
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.3384540260
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2258200703
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.804065558
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2465292778
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.1127671440
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.983061029
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.356347285
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.619483182
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.2302154728
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.655404827
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.2397832723
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.4276304856
/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.2432889115
/workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.924442372
/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.3814136340
/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.4065396727
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.2677675493
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.2101521308
/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.2599598456
/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.4241314152
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1586692229
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.2984772082
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.1290086433
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2918757664
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.1855355236
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.1046029759
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.2941679229
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.1370278797
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.2652193577
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_same_csr_outstanding.4159115138
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.2867918664
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.2758968979
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.3868981787
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.4025052115
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.871285778
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.4101890521
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.3323484100
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.2384151048
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.809992261
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.1956951162
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.3714046145
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.2727276134
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.3636977549
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.57347338
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_mem_rw_with_rand_reset.3983053397
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.2657958804
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.653632475
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.407704090
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4229352882
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.976372161
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2318724055
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3288718683
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3207309811
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3757999709
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.3268697979
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2288122653
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2435017511
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.599768515
/workspace/coverage/default/0.sysrst_ctrl_smoke.3145759083
/workspace/coverage/default/0.sysrst_ctrl_stress_all.1173328542
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.608686981
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2488920423
/workspace/coverage/default/1.sysrst_ctrl_alert_test.890882360
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3317620754
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3642138334
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.575785039
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1511239646
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1040310883
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2610772298
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.3803434352
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.941367544
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2444265167
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2465600077
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1498378913
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1098968385
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2615963258
/workspace/coverage/default/1.sysrst_ctrl_smoke.684822281
/workspace/coverage/default/1.sysrst_ctrl_stress_all.2094408231
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2244499743
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2538313896
/workspace/coverage/default/10.sysrst_ctrl_alert_test.1254033512
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2511540200
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2970409670
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.4027345016
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3524865877
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1566068471
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.544218360
/workspace/coverage/default/10.sysrst_ctrl_smoke.3199515859
/workspace/coverage/default/10.sysrst_ctrl_stress_all.3674392821
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2284253127
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3191031052
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1900217422
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.316882611
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3777286266
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.4266403362
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1943473173
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2448520650
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.4225592508
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3884439899
/workspace/coverage/default/11.sysrst_ctrl_smoke.2928624167
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1654976853
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3010240481
/workspace/coverage/default/12.sysrst_ctrl_alert_test.1969501969
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2818585503
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3048752019
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.566046999
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1794002198
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2663494770
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.1732750961
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3652996782
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3665570717
/workspace/coverage/default/12.sysrst_ctrl_smoke.2641691532
/workspace/coverage/default/12.sysrst_ctrl_stress_all.46038258
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3184408920
/workspace/coverage/default/13.sysrst_ctrl_alert_test.439355164
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2963984872
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1947193489
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.4227700384
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.4018988486
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.274652258
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3812923011
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.428887477
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1117338202
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3109087488
/workspace/coverage/default/13.sysrst_ctrl_smoke.1687615904
/workspace/coverage/default/13.sysrst_ctrl_stress_all.3132966771
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.4290547836
/workspace/coverage/default/14.sysrst_ctrl_alert_test.2631545110
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.4051877262
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.398310645
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2358706685
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2449714019
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3940825917
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1292481291
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2671845021
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3151184180
/workspace/coverage/default/14.sysrst_ctrl_smoke.4223323296
/workspace/coverage/default/14.sysrst_ctrl_stress_all.1146975582
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2791954121
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2525451723
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.630036149
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1676412011
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1454419952
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1254504799
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2661232785
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.4167523812
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.722420777
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1680193478
/workspace/coverage/default/15.sysrst_ctrl_smoke.127771917
/workspace/coverage/default/15.sysrst_ctrl_stress_all.2106655129
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3157640182
/workspace/coverage/default/16.sysrst_ctrl_alert_test.863340831
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3856521283
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3592648362
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1764271710
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2439522393
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2199870338
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.550758573
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.745502482
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2356858306
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3230555185
/workspace/coverage/default/16.sysrst_ctrl_smoke.1948851749
/workspace/coverage/default/16.sysrst_ctrl_stress_all.3230876433
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1874359579
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1256822807
/workspace/coverage/default/17.sysrst_ctrl_alert_test.546853306
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.575055921
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2141793782
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2029004475
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.3794160193
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2730818478
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.373870485
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3279359396
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2488548475
/workspace/coverage/default/17.sysrst_ctrl_smoke.3376932587
/workspace/coverage/default/17.sysrst_ctrl_stress_all.279868105
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2225375047
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3826893114
/workspace/coverage/default/18.sysrst_ctrl_alert_test.3910651344
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2404375638
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.62600549
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.4020924102
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.162332170
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1819091300
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3771956128
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2275610132
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.449578568
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2230782693
/workspace/coverage/default/18.sysrst_ctrl_smoke.2067683453
/workspace/coverage/default/18.sysrst_ctrl_stress_all.927935684
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1322982499
/workspace/coverage/default/19.sysrst_ctrl_alert_test.1832210117
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3652513664
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.4163353744
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1641353463
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.628745481
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3683463635
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1000451205
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1009717764
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.382510272
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1115753159
/workspace/coverage/default/19.sysrst_ctrl_smoke.2556197171
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3758469254
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4026127905
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1738634734
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3534233654
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2919252787
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.131835480
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1567305777
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1774167808
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.3569940065
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.231501926
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1692866705
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3249955266
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.75454594
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.1101625307
/workspace/coverage/default/2.sysrst_ctrl_smoke.2762750096
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3228071144
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.4169331412
/workspace/coverage/default/20.sysrst_ctrl_alert_test.1018798526
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3088192285
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2993525196
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2157616720
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3389616151
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2832731789
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2038057171
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.398342651
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.4239305202
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.2283489868
/workspace/coverage/default/20.sysrst_ctrl_smoke.1010585242
/workspace/coverage/default/20.sysrst_ctrl_stress_all.2034158634
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3605624930
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1221920022
/workspace/coverage/default/21.sysrst_ctrl_alert_test.2637811314
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2218718828
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.685054395
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.740596143
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2910740719
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.4228987809
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4231478145
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1793810263
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1707784740
/workspace/coverage/default/21.sysrst_ctrl_smoke.2124172972
/workspace/coverage/default/21.sysrst_ctrl_stress_all.1816878128
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3303276157
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2085595734
/workspace/coverage/default/22.sysrst_ctrl_alert_test.4132482099
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.385665578
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1484133572
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3784642655
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3076662345
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.4006784210
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.1379581050
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.821941965
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3822003839
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.734935994
/workspace/coverage/default/22.sysrst_ctrl_smoke.2041012069
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1524760811
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.528526869
/workspace/coverage/default/23.sysrst_ctrl_alert_test.834638584
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.12887254
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1726410050
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.816661664
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3582802526
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.4041598743
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.566931931
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3141938687
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3284517563
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.747540024
/workspace/coverage/default/23.sysrst_ctrl_smoke.964578904
/workspace/coverage/default/23.sysrst_ctrl_stress_all.949838909
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3114619074
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3317821006
/workspace/coverage/default/24.sysrst_ctrl_alert_test.4033335625
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.780337817
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3630287504
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3504351590
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.698219054
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3843033194
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1661812863
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3017762438
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1918876887
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1466933310
/workspace/coverage/default/24.sysrst_ctrl_smoke.1364000411
/workspace/coverage/default/24.sysrst_ctrl_stress_all.3342301940
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1682674484
/workspace/coverage/default/25.sysrst_ctrl_alert_test.4032292904
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3858403005
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2430467482
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1381055185
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.3850082778
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3825597391
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2435773382
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1790901458
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2626970324
/workspace/coverage/default/25.sysrst_ctrl_smoke.1058705325
/workspace/coverage/default/25.sysrst_ctrl_stress_all.1881083750
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.587518169
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1610360577
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2943270748
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.2144512232
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1337853000
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1215125522
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2541698850
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.3400333494
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1217074683
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3001769113
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2708558220
/workspace/coverage/default/26.sysrst_ctrl_smoke.1334172024
/workspace/coverage/default/26.sysrst_ctrl_stress_all.3675083374
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2531993977
/workspace/coverage/default/27.sysrst_ctrl_alert_test.3860701990
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1424535847
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3753262433
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.468841010
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.430267681
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.2695075859
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2050081016
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.1226320520
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.402788334
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3415301689
/workspace/coverage/default/27.sysrst_ctrl_smoke.1115679605
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2635586227
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2831877590
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2758307120
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1550941078
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2759491681
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1504670309
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.318371800
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2490779001
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.207320499
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3204604174
/workspace/coverage/default/28.sysrst_ctrl_smoke.3914383729
/workspace/coverage/default/28.sysrst_ctrl_stress_all.1822332889
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3533426605
/workspace/coverage/default/29.sysrst_ctrl_alert_test.3341514646
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3255728232
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1667097368
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1404146701
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.1413143348
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1569225278
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.310140345
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2208885923
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3214789619
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.990222731
/workspace/coverage/default/29.sysrst_ctrl_smoke.3833044650
/workspace/coverage/default/29.sysrst_ctrl_stress_all.538111496
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.4031826184
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1502596161
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2247997374
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.763734251
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.356986323
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.185282195
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.317870591
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3071942974
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2614909823
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.494524247
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.856663392
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3533618779
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1626185463
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.3039988261
/workspace/coverage/default/3.sysrst_ctrl_smoke.210371986
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1167960151
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4114917092
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.274081115
/workspace/coverage/default/30.sysrst_ctrl_alert_test.2986858458
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.4290252678
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.967688697
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.4022603426
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1224167598
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3314622395
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1613812041
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1237930520
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2062173199
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.670158342
/workspace/coverage/default/30.sysrst_ctrl_smoke.2886959874
/workspace/coverage/default/30.sysrst_ctrl_stress_all.1091391695
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.441147062
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1766632213
/workspace/coverage/default/31.sysrst_ctrl_alert_test.1884281238
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1079769880
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.4031234602
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.4274056096
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.2266994782
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3143975599
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3388190716
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3192337192
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2747537289
/workspace/coverage/default/31.sysrst_ctrl_smoke.3382792777
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2354548195
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2711055910
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1937782120
/workspace/coverage/default/32.sysrst_ctrl_alert_test.1101684705
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2601386282
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2284335882
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1010593071
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2573335942
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.838651343
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.4201179713
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.492615096
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.902382624
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.986834114
/workspace/coverage/default/32.sysrst_ctrl_smoke.2042935724
/workspace/coverage/default/32.sysrst_ctrl_stress_all.2585011705
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.82548328
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.4010092513
/workspace/coverage/default/33.sysrst_ctrl_alert_test.2000553724
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2702499017
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3626452054
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.238770069
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1900489733
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3745292
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1994554973
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2506057783
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1114413434
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1796662887
/workspace/coverage/default/33.sysrst_ctrl_smoke.1135228011
/workspace/coverage/default/33.sysrst_ctrl_stress_all.794152615
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1034594861
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1251940378
/workspace/coverage/default/34.sysrst_ctrl_alert_test.1986882795
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.859848772
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.3128089865
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4075896496
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2784759016
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.4286457032
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2277378064
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.367013878
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1726336361
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.520209066
/workspace/coverage/default/34.sysrst_ctrl_smoke.4183790259
/workspace/coverage/default/34.sysrst_ctrl_stress_all.630377435
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3619565556
/workspace/coverage/default/35.sysrst_ctrl_alert_test.470094985
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2814178582
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2337388220
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1665059806
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.4172542636
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1648945443
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.4054065356
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.706021626
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2607120409
/workspace/coverage/default/35.sysrst_ctrl_smoke.3007488575
/workspace/coverage/default/35.sysrst_ctrl_stress_all.2868375038
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.229922163
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.279112977
/workspace/coverage/default/36.sysrst_ctrl_alert_test.4141550125
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3921685160
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2978124688
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3616735842
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3112449413
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.851923084
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3596767612
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.593001350
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2773188480
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1635822557
/workspace/coverage/default/36.sysrst_ctrl_smoke.1780511711
/workspace/coverage/default/36.sysrst_ctrl_stress_all.439526882
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1413474879
/workspace/coverage/default/37.sysrst_ctrl_alert_test.572202284
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2049542974
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.436621949
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3532631949
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3589208721
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3111307244
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2793171805
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2763724841
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.116727693
/workspace/coverage/default/37.sysrst_ctrl_smoke.2381395840
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1484430201
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2824656078
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1306904015
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2856466582
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.366301701
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3328062570
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1972121594
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.4266218084
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.937543548
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3666593083
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1385468580
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.167500796
/workspace/coverage/default/38.sysrst_ctrl_smoke.1749557731
/workspace/coverage/default/38.sysrst_ctrl_stress_all.491724257
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2963954551
/workspace/coverage/default/39.sysrst_ctrl_alert_test.1871465577
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3411046609
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3037917554
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1790732641
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3712356704
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1468947471
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.687320277
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.4079590330
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.4100784168
/workspace/coverage/default/39.sysrst_ctrl_smoke.2398224731
/workspace/coverage/default/39.sysrst_ctrl_stress_all.151861683
/workspace/coverage/default/4.sysrst_ctrl_alert_test.1754344574
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1301596710
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2001130454
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3182911450
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.248190029
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.115216441
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.94949394
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.766491002
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2919887884
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.346312019
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.72404684
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3610904313
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3338971490
/workspace/coverage/default/4.sysrst_ctrl_smoke.585942975
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1867860458
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2128778504
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3852757774
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2510830611
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3991969598
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1310980927
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2238093841
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.399721288
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3253660686
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2338839132
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3739608051
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3574267762
/workspace/coverage/default/40.sysrst_ctrl_smoke.2535028625
/workspace/coverage/default/40.sysrst_ctrl_stress_all.4238394802
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.633607512
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3593951911
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1992975415
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2532957657
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2678136054
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1821220049
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2110496986
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1691002393
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3135018471
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2923648296
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3860571990
/workspace/coverage/default/41.sysrst_ctrl_smoke.1873269899
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2614928226
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1015028497
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2892003313
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1378671213
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1615364179
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3432537842
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.750065552
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2834885840
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.905200740
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1487914321
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3430478788
/workspace/coverage/default/42.sysrst_ctrl_smoke.2752178875
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4166486630
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3721412861
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2446196864
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2225156358
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2909951868
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1219764895
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.32088417
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1032722878
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3479924738
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1302234731
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1360493982
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2960504581
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3588018288
/workspace/coverage/default/43.sysrst_ctrl_smoke.429458721
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3471581873
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.600953013
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3589082232
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2932049987
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3835961321
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3696007952
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2395511242
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.935093610
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1684914010
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.538356067
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2529042244
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.771809155
/workspace/coverage/default/44.sysrst_ctrl_smoke.1784065883
/workspace/coverage/default/44.sysrst_ctrl_stress_all.830186860
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2149272220
/workspace/coverage/default/45.sysrst_ctrl_alert_test.591447661
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2741791942
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2015789097
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3583913556
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4187539997
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3337321671
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.18504488
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1118514305
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4059635463
/workspace/coverage/default/45.sysrst_ctrl_smoke.478394344
/workspace/coverage/default/45.sysrst_ctrl_stress_all.928996443
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4023294437
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2659427421
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3426882449
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1880468840
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3498203121
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4152872358
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1511377831
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1224839580
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.18721443
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1132992776
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2855949128
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1274567385
/workspace/coverage/default/46.sysrst_ctrl_smoke.3854848348
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1184586643
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1607365596
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3592516397
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.629390408
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1087579220
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.750879956
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3880999810
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.787045330
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1497397562
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.533119229
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.904916805
/workspace/coverage/default/47.sysrst_ctrl_smoke.493175642
/workspace/coverage/default/47.sysrst_ctrl_stress_all.119746692
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.385575104
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2060233580
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2898270950
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3317637180
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2095042864
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.221597047
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2869480349
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2572036123
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1194827882
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.4179751909
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1309720820
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1338356839
/workspace/coverage/default/48.sysrst_ctrl_smoke.3620922661
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1787178028
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3459727765
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1277388496
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1957086122
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3762896736
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4056641544
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1830397819
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3601082520
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.813685019
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4028343098
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3698845410
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1727136115
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1984429492
/workspace/coverage/default/49.sysrst_ctrl_smoke.993274905
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.967494329
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.309532100
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1540799593
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3728120190
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.657374468
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.255457082
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2381121897
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2117567577
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.480394603
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1282116316
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2738769628
/workspace/coverage/default/5.sysrst_ctrl_smoke.3760245375
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2240002839
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1194633952
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3878990953
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1036339656
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1838247063
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4290166657
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4142970490
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1441685556
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2948170168
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2009370439
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3256739104
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2946974035
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4181079668
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3438710060
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1315475017
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2451993238
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3268998951
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1257243953
/workspace/coverage/default/6.sysrst_ctrl_smoke.1914622518
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2608769229
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3406416843
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1765294312
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2372642823
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.909863689
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1161923622
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1049170327
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2188729098
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.599299057
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3926200043
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.101953597
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1278069297
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3491648250
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2720508535
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1531691043
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1548520298
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2660048109
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2851468029
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.627676247
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3109829724
/workspace/coverage/default/7.sysrst_ctrl_smoke.3773594767
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2606101566
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1932806868
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2762637059
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3358112728
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1939125284
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.708887210
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1950066390
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2675426810
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2321178666
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3452368710
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2493566299
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.744849972
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2624401282
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1447961022
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.17942090
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2249514471
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3995169621
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3668810496
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2785248191
/workspace/coverage/default/8.sysrst_ctrl_smoke.110920039
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3066724444
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1728200409
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3064305380
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4124337290
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2609004421
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1744769024
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2488421324
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2187200292
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3963950662
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.232873909
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2643862443
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.737973725
/workspace/coverage/default/9.sysrst_ctrl_alert_test.634923709
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3515771629
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3973452073
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3178204915
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2476033010
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3406905063
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3721903220
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.144559331
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2944151786
/workspace/coverage/default/9.sysrst_ctrl_smoke.2154687161
/workspace/coverage/default/9.sysrst_ctrl_stress_all.52038986
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1536772699
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1731028379
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3782732750
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.423095146
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.257429613
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2210018342
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.136829402



Total test records in report: 912
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3803816167 Dec 27 12:53:34 PM PST 23 Dec 27 12:54:33 PM PST 23 22258694689 ps
T6 /workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.2547286691 Dec 27 12:53:46 PM PST 23 Dec 27 12:53:57 PM PST 23 2013940628 ps
T7 /workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.520721379 Dec 27 12:53:42 PM PST 23 Dec 27 12:53:54 PM PST 23 2012022689 ps
T2 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.589261375 Dec 27 12:53:18 PM PST 23 Dec 27 12:53:55 PM PST 23 10822837041 ps
T3 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1727628003 Dec 27 12:52:56 PM PST 23 Dec 27 12:52:59 PM PST 23 2058390949 ps
T4 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2258200703 Dec 27 12:53:03 PM PST 23 Dec 27 12:53:09 PM PST 23 3486621535 ps
T8 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1701924339 Dec 27 12:53:35 PM PST 23 Dec 27 12:54:37 PM PST 23 22194921354 ps
T23 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.2302154728 Dec 27 12:53:05 PM PST 23 Dec 27 12:53:10 PM PST 23 2136867109 ps
T24 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3631070592 Dec 27 12:53:14 PM PST 23 Dec 27 12:53:18 PM PST 23 2106313981 ps
T25 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.3714046145 Dec 27 12:53:08 PM PST 23 Dec 27 12:53:10 PM PST 23 2032518887 ps
T35 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.4127102438 Dec 27 12:52:55 PM PST 23 Dec 27 12:53:00 PM PST 23 2240192465 ps
T5 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2143869325 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:28 PM PST 23 5498483069 ps
T9 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.3183865888 Dec 27 12:53:05 PM PST 23 Dec 27 12:53:11 PM PST 23 5052918839 ps
T264 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1502160385 Dec 27 12:53:18 PM PST 23 Dec 27 12:53:23 PM PST 23 2017125312 ps
T281 /workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.2397832723 Dec 27 12:53:48 PM PST 23 Dec 27 12:53:55 PM PST 23 2021257295 ps
T10 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2014556155 Dec 27 12:52:55 PM PST 23 Dec 27 12:53:51 PM PST 23 42472642820 ps
T11 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1088592775 Dec 27 12:52:50 PM PST 23 Dec 27 12:52:54 PM PST 23 2079338799 ps
T335 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.356347285 Dec 27 12:53:05 PM PST 23 Dec 27 12:53:09 PM PST 23 2014814204 ps
T258 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1746041119 Dec 27 12:53:41 PM PST 23 Dec 27 12:53:52 PM PST 23 2122454159 ps
T51 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2465292778 Dec 27 12:53:04 PM PST 23 Dec 27 12:53:11 PM PST 23 4013652746 ps
T12 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2106359169 Dec 27 12:53:34 PM PST 23 Dec 27 12:54:17 PM PST 23 10060111498 ps
T303 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1476673048 Dec 27 12:52:53 PM PST 23 Dec 27 12:53:02 PM PST 23 6036960724 ps
T334 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.832057697 Dec 27 12:52:54 PM PST 23 Dec 27 12:53:00 PM PST 23 2012211284 ps
T283 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.932843329 Dec 27 12:52:51 PM PST 23 Dec 27 12:54:21 PM PST 23 76674108487 ps
T274 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.804065558 Dec 27 12:53:05 PM PST 23 Dec 27 12:53:20 PM PST 23 39097039147 ps
T259 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.2520319936 Dec 27 12:52:57 PM PST 23 Dec 27 12:53:02 PM PST 23 2038143729 ps
T348 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.1290086433 Dec 27 12:53:06 PM PST 23 Dec 27 12:53:09 PM PST 23 2036129409 ps
T260 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.2867918664 Dec 27 12:53:10 PM PST 23 Dec 27 12:53:17 PM PST 23 2063756505 ps
T32 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2741157025 Dec 27 12:53:41 PM PST 23 Dec 27 12:53:50 PM PST 23 2091361738 ps
T280 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1930357060 Dec 27 12:53:02 PM PST 23 Dec 27 12:53:08 PM PST 23 4047304985 ps
T273 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2637866718 Dec 27 12:52:55 PM PST 23 Dec 27 12:52:58 PM PST 23 2174087336 ps
T33 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3095172419 Dec 27 12:52:56 PM PST 23 Dec 27 12:53:28 PM PST 23 42963931137 ps
T34 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1424110197 Dec 27 12:52:55 PM PST 23 Dec 27 12:53:05 PM PST 23 45240155502 ps
T349 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1409947268 Dec 27 12:53:34 PM PST 23 Dec 27 12:53:41 PM PST 23 2011174672 ps
T350 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3562330119 Dec 27 12:53:22 PM PST 23 Dec 27 12:53:29 PM PST 23 2036560627 ps
T346 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.4270533454 Dec 27 12:53:23 PM PST 23 Dec 27 12:53:27 PM PST 23 2070310327 ps
T275 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.619483182 Dec 27 12:53:03 PM PST 23 Dec 27 12:53:13 PM PST 23 4812172770 ps
T336 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2617782417 Dec 27 12:53:21 PM PST 23 Dec 27 12:53:28 PM PST 23 2011172530 ps
T351 /workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2720131260 Dec 27 12:53:34 PM PST 23 Dec 27 12:53:36 PM PST 23 2065730127 ps
T302 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.983061029 Dec 27 12:53:04 PM PST 23 Dec 27 12:53:07 PM PST 23 2053873584 ps
T352 /workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1451755217 Dec 27 12:53:42 PM PST 23 Dec 27 12:53:49 PM PST 23 2033759143 ps
T282 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2099717682 Dec 27 12:53:18 PM PST 23 Dec 27 12:53:36 PM PST 23 22257288288 ps
T284 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.1956951162 Dec 27 12:53:14 PM PST 23 Dec 27 12:53:21 PM PST 23 2050244635 ps
T353 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.549444109 Dec 27 12:53:18 PM PST 23 Dec 27 12:53:21 PM PST 23 2034795933 ps
T354 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.183577732 Dec 27 12:53:36 PM PST 23 Dec 27 12:53:44 PM PST 23 8627727345 ps
T355 /workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.1283094842 Dec 27 12:53:51 PM PST 23 Dec 27 12:53:58 PM PST 23 2010784764 ps
T276 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1246619272 Dec 27 12:53:41 PM PST 23 Dec 27 12:53:50 PM PST 23 2195272344 ps
T356 /workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.2599598456 Dec 27 12:53:41 PM PST 23 Dec 27 12:53:53 PM PST 23 2013009260 ps
T262 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.3323484100 Dec 27 12:53:09 PM PST 23 Dec 27 12:53:14 PM PST 23 2074640453 ps
T263 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2501139204 Dec 27 12:52:47 PM PST 23 Dec 27 12:52:51 PM PST 23 2136859139 ps
T357 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1594857489 Dec 27 12:53:19 PM PST 23 Dec 27 12:53:23 PM PST 23 4879932876 ps
T261 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.633701391 Dec 27 12:53:22 PM PST 23 Dec 27 12:53:27 PM PST 23 2743433715 ps
T358 /workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.4065396727 Dec 27 12:53:43 PM PST 23 Dec 27 12:53:54 PM PST 23 2011206116 ps
T347 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.809992261 Dec 27 12:53:15 PM PST 23 Dec 27 12:53:19 PM PST 23 2064167725 ps
T359 /workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.317145728 Dec 27 12:53:36 PM PST 23 Dec 27 12:53:39 PM PST 23 2030795230 ps
T360 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.517771723 Dec 27 12:53:16 PM PST 23 Dec 27 12:53:20 PM PST 23 2299733330 ps
T361 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.3636977549 Dec 27 12:53:09 PM PST 23 Dec 27 12:53:14 PM PST 23 2201335026 ps
T362 /workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1482540253 Dec 27 12:53:42 PM PST 23 Dec 27 12:53:49 PM PST 23 2059728925 ps
T277 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3498375629 Dec 27 12:53:49 PM PST 23 Dec 27 12:53:56 PM PST 23 2531078348 ps
T278 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2281619031 Dec 27 12:53:41 PM PST 23 Dec 27 12:53:53 PM PST 23 2064674613 ps
T363 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.4200645892 Dec 27 12:53:14 PM PST 23 Dec 27 12:53:19 PM PST 23 2418516131 ps
T364 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.407704090 Dec 27 12:53:16 PM PST 23 Dec 27 12:53:35 PM PST 23 8300257696 ps
T365 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.1067598018 Dec 27 12:52:56 PM PST 23 Dec 27 12:53:00 PM PST 23 2164705065 ps
T366 /workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.4276304856 Dec 27 12:53:36 PM PST 23 Dec 27 12:53:39 PM PST 23 2036675998 ps
T279 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.641592134 Dec 27 12:53:03 PM PST 23 Dec 27 12:55:02 PM PST 23 42482081544 ps
T285 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1166695177 Dec 27 12:53:21 PM PST 23 Dec 27 12:53:26 PM PST 23 2068913585 ps
T293 /workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.924442372 Dec 27 12:53:39 PM PST 23 Dec 27 12:53:42 PM PST 23 2039138944 ps
T294 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.67881051 Dec 27 12:53:03 PM PST 23 Dec 27 12:53:09 PM PST 23 2010875756 ps
T295 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4229352882 Dec 27 12:53:13 PM PST 23 Dec 27 12:54:12 PM PST 23 42604923861 ps
T296 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.2758968979 Dec 27 12:53:09 PM PST 23 Dec 27 12:53:25 PM PST 23 44174928499 ps
T297 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.4229459902 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:24 PM PST 23 2051516589 ps
T298 /workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.821324311 Dec 27 12:53:35 PM PST 23 Dec 27 12:53:40 PM PST 23 2022871433 ps
T299 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2943993331 Dec 27 12:53:42 PM PST 23 Dec 27 12:53:51 PM PST 23 2039544947 ps
T300 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.242155812 Dec 27 12:53:22 PM PST 23 Dec 27 12:53:25 PM PST 23 2049700550 ps
T367 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1710474705 Dec 27 12:53:23 PM PST 23 Dec 27 12:53:27 PM PST 23 2136888651 ps
T368 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1341175452 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:42 PM PST 23 9220626500 ps
T369 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.653632475 Dec 27 12:53:13 PM PST 23 Dec 27 12:53:16 PM PST 23 2041969148 ps
T370 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3250922285 Dec 27 12:53:20 PM PST 23 Dec 27 12:53:27 PM PST 23 2030709132 ps
T371 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.2652193577 Dec 27 12:53:09 PM PST 23 Dec 27 12:53:12 PM PST 23 2033826020 ps
T372 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.2941679229 Dec 27 12:53:10 PM PST 23 Dec 27 12:53:18 PM PST 23 2072793941 ps
T373 /workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.2677675493 Dec 27 12:53:35 PM PST 23 Dec 27 12:53:41 PM PST 23 2011067322 ps
T286 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.2984772082 Dec 27 12:53:07 PM PST 23 Dec 27 12:53:14 PM PST 23 2034481897 ps
T374 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3327014339 Dec 27 12:53:37 PM PST 23 Dec 27 12:53:43 PM PST 23 2224473949 ps
T287 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.1036005213 Dec 27 12:53:05 PM PST 23 Dec 27 12:53:12 PM PST 23 2056541734 ps
T375 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.926460008 Dec 27 12:53:40 PM PST 23 Dec 27 12:53:48 PM PST 23 2034730695 ps
T376 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1172090360 Dec 27 12:53:22 PM PST 23 Dec 27 12:55:12 PM PST 23 42423424140 ps
T288 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.307849300 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:23 PM PST 23 2035687769 ps
T377 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2587821844 Dec 27 12:53:24 PM PST 23 Dec 27 12:53:31 PM PST 23 2015767377 ps
T378 /workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.2101521308 Dec 27 12:53:34 PM PST 23 Dec 27 12:53:36 PM PST 23 2049062005 ps
T379 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.1127671440 Dec 27 12:53:06 PM PST 23 Dec 27 12:53:13 PM PST 23 2098652949 ps
T380 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.871285778 Dec 27 12:53:11 PM PST 23 Dec 27 12:53:15 PM PST 23 2024184144 ps
T381 /workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.4241314152 Dec 27 12:53:51 PM PST 23 Dec 27 12:53:55 PM PST 23 2035920902 ps
T289 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.3363777790 Dec 27 12:53:03 PM PST 23 Dec 27 12:53:09 PM PST 23 2362571975 ps
T382 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_mem_rw_with_rand_reset.3983053397 Dec 27 12:53:15 PM PST 23 Dec 27 12:53:19 PM PST 23 2072244618 ps
T383 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2372678901 Dec 27 12:52:54 PM PST 23 Dec 27 12:52:57 PM PST 23 2080354142 ps
T384 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.735865610 Dec 27 12:52:54 PM PST 23 Dec 27 12:53:00 PM PST 23 2014396639 ps
T385 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2918757664 Dec 27 12:53:09 PM PST 23 Dec 27 12:53:21 PM PST 23 9999431258 ps
T290 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.835426992 Dec 27 12:53:22 PM PST 23 Dec 27 12:53:28 PM PST 23 2057029353 ps
T386 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1113807932 Dec 27 12:53:22 PM PST 23 Dec 27 12:54:27 PM PST 23 22200582428 ps
T387 /workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.1363884144 Dec 27 12:53:36 PM PST 23 Dec 27 12:53:43 PM PST 23 2008224004 ps
T388 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3624894889 Dec 27 12:53:24 PM PST 23 Dec 27 12:53:29 PM PST 23 2282237192 ps
T389 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1693953642 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:20 PM PST 23 2122751346 ps
T390 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3646498345 Dec 27 12:53:23 PM PST 23 Dec 27 12:53:26 PM PST 23 2033796635 ps
T63 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3221689868 Dec 27 12:53:34 PM PST 23 Dec 27 12:53:56 PM PST 23 7987662208 ps
T291 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3767531744 Dec 27 12:53:17 PM PST 23 Dec 27 12:53:21 PM PST 23 2051729156 ps
T391 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.689563899 Dec 27 12:52:56 PM PST 23 Dec 27 12:53:21 PM PST 23 10692318432 ps
T292 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1328449791 Dec 27 12:52:56 PM PST 23 Dec 27 12:53:00 PM PST 23 2033481936 ps
T301 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1947869142 Dec 27 12:53:42 PM PST 23 Dec 27 12:53:51 PM PST 23 2088802891 ps
T392 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.1046029759 Dec 27 12:53:05 PM PST 23 Dec 27 12:54:02 PM PST 23 22195822812 ps
T393 /workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.4101609069 Dec 27 12:53:47 PM PST 23 Dec 27 12:53:55 PM PST 23 2028579511 ps
T394 /workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2227769676 Dec 27 12:53:35 PM PST 23 Dec 27 12:53:38 PM PST 23 2024077340 ps
T395 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1596109305 Dec 27 12:53:13 PM PST 23 Dec 27 12:53:30 PM PST 23 6141684733 ps
T36 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.593127015 Dec 27 01:28:17 PM PST 23 Dec 27 01:28:27 PM PST 23 3710343445 ps
T13 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.575785039 Dec 27 01:26:53 PM PST 23 Dec 27 01:26:56 PM PST 23 2494577477 ps
T14 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3878990953 Dec 27 01:27:54 PM PST 23 Dec 27 01:32:18 PM PST 23 975176444170 ps
T26 /workspace/coverage/default/13.sysrst_ctrl_smoke.1687615904 Dec 27 01:28:04 PM PST 23 Dec 27 01:28:12 PM PST 23 2108243223 ps
T15 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.729538221 Dec 27 01:28:00 PM PST 23 Dec 27 01:29:58 PM PST 23 179722077840 ps
T16 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.407245863 Dec 27 01:27:57 PM PST 23 Dec 27 01:36:22 PM PST 23 1308629922193 ps
T27 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.740596143 Dec 27 01:28:18 PM PST 23 Dec 27 01:28:26 PM PST 23 28171087581 ps
T28 /workspace/coverage/default/46.sysrst_ctrl_smoke.3854848348 Dec 27 01:29:31 PM PST 23 Dec 27 01:29:37 PM PST 23 2190792012 ps
T29 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1378671213 Dec 27 01:29:48 PM PST 23 Dec 27 01:29:54 PM PST 23 3577428606 ps
T30 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1738634734 Dec 27 01:28:00 PM PST 23 Dec 27 01:28:08 PM PST 23 2014478774 ps
T31 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.346312019 Dec 27 01:27:54 PM PST 23 Dec 27 01:28:02 PM PST 23 2446931098 ps
T54 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.4018988486 Dec 27 01:27:56 PM PST 23 Dec 27 01:28:02 PM PST 23 3634488704 ps
T17 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.3589208721 Dec 27 01:29:00 PM PST 23 Dec 27 01:29:03 PM PST 23 2849127241 ps
T55 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.780337817 Dec 27 01:28:20 PM PST 23 Dec 27 01:35:45 PM PST 23 175580308079 ps
T18 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.2381121897 Dec 27 01:28:27 PM PST 23 Dec 27 01:28:30 PM PST 23 3474449917 ps
T62 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1692866705 Dec 27 01:26:57 PM PST 23 Dec 27 01:27:00 PM PST 23 2516395198 ps
T19 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2372642823 Dec 27 01:29:27 PM PST 23 Dec 27 01:32:26 PM PST 23 64029677938 ps
T78 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.976372161 Dec 27 01:26:58 PM PST 23 Dec 27 01:32:22 PM PST 23 178806000731 ps
T103 /workspace/coverage/default/17.sysrst_ctrl_alert_test.546853306 Dec 27 01:28:02 PM PST 23 Dec 27 01:28:04 PM PST 23 2164213928 ps
T104 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.430267681 Dec 27 01:28:37 PM PST 23 Dec 27 01:28:40 PM PST 23 3814167339 ps
T20 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1848183394 Dec 27 01:29:55 PM PST 23 Dec 27 01:31:28 PM PST 23 71435155827 ps
T105 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1167960151 Dec 27 01:27:26 PM PST 23 Dec 27 01:27:44 PM PST 23 8726280472 ps
T106 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3515771629 Dec 27 01:27:33 PM PST 23 Dec 27 01:27:44 PM PST 23 3871988523 ps
T107 /workspace/coverage/default/0.sysrst_ctrl_alert_test.3931573451 Dec 27 01:26:54 PM PST 23 Dec 27 01:26:57 PM PST 23 2034784937 ps
T108 /workspace/coverage/default/2.sysrst_ctrl_smoke.2762750096 Dec 27 01:26:56 PM PST 23 Dec 27 01:26:59 PM PST 23 2137833104 ps
T109 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3253660686 Dec 27 01:29:46 PM PST 23 Dec 27 01:29:54 PM PST 23 2612415305 ps
T110 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.747540024 Dec 27 01:28:07 PM PST 23 Dec 27 01:28:15 PM PST 23 2509801664 ps
T235 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.538356067 Dec 27 01:29:20 PM PST 23 Dec 27 01:29:29 PM PST 23 2468660111 ps
T236 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.428887477 Dec 27 01:28:14 PM PST 23 Dec 27 01:28:22 PM PST 23 2457355947 ps
T237 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1691002393 Dec 27 01:29:56 PM PST 23 Dec 27 01:30:01 PM PST 23 2626961199 ps
T21 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3048752019 Dec 27 01:27:50 PM PST 23 Dec 27 01:28:36 PM PST 23 59975845784 ps
T248 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1381055185 Dec 27 01:28:02 PM PST 23 Dec 27 01:28:12 PM PST 23 3625728825 ps
T249 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1793810263 Dec 27 01:28:50 PM PST 23 Dec 27 01:28:57 PM PST 23 2041134187 ps
T250 /workspace/coverage/default/38.sysrst_ctrl_alert_test.2856466582 Dec 27 01:29:13 PM PST 23 Dec 27 01:29:16 PM PST 23 2037457720 ps
T22 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.967688697 Dec 27 01:29:07 PM PST 23 Dec 27 01:35:32 PM PST 23 152545081263 ps
T52 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.4056641544 Dec 27 01:29:26 PM PST 23 Dec 27 01:30:07 PM PST 23 57282208362 ps
T98 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3337321671 Dec 27 01:29:29 PM PST 23 Dec 27 01:29:32 PM PST 23 2640513708 ps
T38 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.837742739 Dec 27 01:29:49 PM PST 23 Dec 27 01:33:26 PM PST 23 83034909727 ps
T53 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.744490961 Dec 27 01:27:54 PM PST 23 Dec 27 01:29:40 PM PST 23 89662401236 ps
T39 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2144512232 Dec 27 01:28:46 PM PST 23 Dec 27 01:30:24 PM PST 23 95427208048 ps
T50 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2188729098 Dec 27 01:30:09 PM PST 23 Dec 27 01:30:55 PM PST 23 32072672245 ps
T66 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.317979698 Dec 27 01:29:46 PM PST 23 Dec 27 01:30:40 PM PST 23 77706207136 ps
T241 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1385468580 Dec 27 01:29:23 PM PST 23 Dec 27 01:29:30 PM PST 23 2205784242 ps
T242 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2062173199 Dec 27 01:29:05 PM PST 23 Dec 27 01:29:09 PM PST 23 2233065656 ps
T243 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3574267762 Dec 27 01:29:34 PM PST 23 Dec 27 01:29:39 PM PST 23 2520216631 ps
T244 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.4290547836 Dec 27 01:28:01 PM PST 23 Dec 27 01:28:10 PM PST 23 7557203864 ps
T79 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1511239646 Dec 27 01:26:44 PM PST 23 Dec 27 01:26:46 PM PST 23 2360998802 ps
T80 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2741791942 Dec 27 01:29:32 PM PST 23 Dec 27 01:29:38 PM PST 23 3219027575 ps
T396 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2284253127 Dec 27 01:27:52 PM PST 23 Dec 27 01:27:56 PM PST 23 2021137698 ps
T397 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.4167523812 Dec 27 01:28:14 PM PST 23 Dec 27 01:28:22 PM PST 23 2457454770 ps
T40 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.274652258 Dec 27 01:27:51 PM PST 23 Dec 27 01:27:55 PM PST 23 3460176369 ps
T67 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.398310645 Dec 27 01:27:58 PM PST 23 Dec 27 01:34:23 PM PST 23 151921809862 ps
T49 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2449641272 Dec 27 01:30:16 PM PST 23 Dec 27 01:31:54 PM PST 23 84730434523 ps
T81 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3471581873 Dec 27 01:29:14 PM PST 23 Dec 27 01:29:43 PM PST 23 80275522998 ps
T84 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1790732641 Dec 27 01:29:50 PM PST 23 Dec 27 01:30:00 PM PST 23 3285673778 ps
T160 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2094408231 Dec 27 01:26:51 PM PST 23 Dec 27 01:26:56 PM PST 23 6323974591 ps
T161 /workspace/coverage/default/47.sysrst_ctrl_alert_test.1607365596 Dec 27 01:29:29 PM PST 23 Dec 27 01:29:36 PM PST 23 2009722679 ps
T102 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2624401282 Dec 27 01:28:44 PM PST 23 Dec 27 01:29:08 PM PST 23 34325930804 ps
T162 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2791954121 Dec 27 01:27:45 PM PST 23 Dec 27 01:27:48 PM PST 23 4948087543 ps
T163 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.356986323 Dec 27 01:27:49 PM PST 23 Dec 27 01:27:58 PM PST 23 2416201712 ps
T398 /workspace/coverage/default/23.sysrst_ctrl_smoke.964578904 Dec 27 01:28:51 PM PST 23 Dec 27 01:28:58 PM PST 23 2113249079 ps
T82 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2963984872 Dec 27 01:28:22 PM PST 23 Dec 27 01:28:28 PM PST 23 3284072279 ps
T399 /workspace/coverage/default/38.sysrst_ctrl_smoke.1749557731 Dec 27 01:29:08 PM PST 23 Dec 27 01:29:12 PM PST 23 2133968244 ps
T37 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3406416843 Dec 27 01:28:18 PM PST 23 Dec 27 01:28:21 PM PST 23 7146329814 ps
T400 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1726336361 Dec 27 01:28:48 PM PST 23 Dec 27 01:28:51 PM PST 23 2216981151 ps
T83 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3391249384 Dec 27 01:28:07 PM PST 23 Dec 27 01:30:29 PM PST 23 313059955746 ps
T45 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.836707800 Dec 27 01:28:17 PM PST 23 Dec 27 01:29:30 PM PST 23 124954160228 ps
T99 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.698219054 Dec 27 01:28:26 PM PST 23 Dec 27 01:28:29 PM PST 23 2919413449 ps
T77 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3534233654 Dec 27 01:27:09 PM PST 23 Dec 27 01:27:20 PM PST 23 3632332303 ps
T100 /workspace/coverage/default/23.sysrst_ctrl_stress_all.949838909 Dec 27 01:28:14 PM PST 23 Dec 27 01:28:41 PM PST 23 10862151795 ps
T101 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2277378064 Dec 27 01:28:24 PM PST 23 Dec 27 01:28:32 PM PST 23 2614640058 ps
T118 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.231501926 Dec 27 01:27:01 PM PST 23 Dec 27 01:27:06 PM PST 23 2749499773 ps
T119 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2948170168 Dec 27 01:28:26 PM PST 23 Dec 27 01:28:32 PM PST 23 2012017029 ps
T46 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.750065552 Dec 27 01:29:06 PM PST 23 Dec 27 01:29:13 PM PST 23 2411636605 ps
T120 /workspace/coverage/default/43.sysrst_ctrl_smoke.429458721 Dec 27 01:29:36 PM PST 23 Dec 27 01:29:41 PM PST 23 2127411063 ps
T121 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2661232785 Dec 27 01:27:57 PM PST 23 Dec 27 01:28:00 PM PST 23 2638884252 ps
T204 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2337388220 Dec 27 01:28:49 PM PST 23 Dec 27 01:30:12 PM PST 23 59094266138 ps
T43 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.4172542636 Dec 27 01:29:06 PM PST 23 Dec 27 01:29:08 PM PST 23 3229296571 ps
T42 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2225375047 Dec 27 01:28:04 PM PST 23 Dec 27 01:29:29 PM PST 23 64251344196 ps
T44 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.851923084 Dec 27 01:29:09 PM PST 23 Dec 27 01:29:15 PM PST 23 2898607366 ps
T401 /workspace/coverage/default/0.sysrst_ctrl_smoke.3145759083 Dec 27 01:26:48 PM PST 23 Dec 27 01:26:54 PM PST 23 2113468786 ps
T230 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2102255758 Dec 27 01:29:52 PM PST 23 Dec 27 01:31:47 PM PST 23 162638083875 ps
T402 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3317620754 Dec 27 01:26:47 PM PST 23 Dec 27 01:26:57 PM PST 23 3332220185 ps
T233 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2464489530 Dec 27 01:30:11 PM PST 23 Dec 27 01:33:03 PM PST 23 66616606561 ps
T403 /workspace/coverage/default/16.sysrst_ctrl_smoke.1948851749 Dec 27 01:28:21 PM PST 23 Dec 27 01:28:25 PM PST 23 2118469337 ps
T41 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.813685019 Dec 27 01:29:19 PM PST 23 Dec 27 01:29:27 PM PST 23 4061456319 ps
T154 /workspace/coverage/default/42.sysrst_ctrl_smoke.2752178875 Dec 27 01:30:06 PM PST 23 Dec 27 01:30:12 PM PST 23 2201006516 ps
T155 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.4163353744 Dec 27 01:28:00 PM PST 23 Dec 27 01:28:56 PM PST 23 81419313711 ps
T85 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1087579220 Dec 27 01:29:32 PM PST 23 Dec 27 01:30:45 PM PST 23 27831030894 ps
T156 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2834885840 Dec 27 01:30:03 PM PST 23 Dec 27 01:30:07 PM PST 23 2628786014 ps
T157 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2444265167 Dec 27 01:26:51 PM PST 23 Dec 27 01:26:54 PM PST 23 2638364049 ps
T158 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2626970324 Dec 27 01:28:42 PM PST 23 Dec 27 01:28:50 PM PST 23 2511626021 ps
T71 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3585102807 Dec 27 01:27:57 PM PST 23 Dec 27 01:28:28 PM PST 23 42995056553 ps
T130 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1569225278 Dec 27 01:28:42 PM PST 23 Dec 27 01:28:52 PM PST 23 4692279413 ps
T56 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.309532100 Dec 27 01:29:19 PM PST 23 Dec 27 01:29:22 PM PST 23 5506450253 ps
T86 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.4031234602 Dec 27 01:28:36 PM PST 23 Dec 27 01:29:48 PM PST 23 59463239811 ps
T223 /workspace/coverage/default/42.sysrst_ctrl_alert_test.2892003313 Dec 27 01:29:14 PM PST 23 Dec 27 01:29:16 PM PST 23 2033239765 ps
T224 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3141938687 Dec 27 01:28:38 PM PST 23 Dec 27 01:28:44 PM PST 23 2461238739 ps
T70 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.575055921 Dec 27 01:27:51 PM PST 23 Dec 27 01:27:55 PM PST 23 3782267050 ps
T225 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2506057783 Dec 27 01:29:02 PM PST 23 Dec 27 01:29:07 PM PST 23 2446634315 ps
T345 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3884439899 Dec 27 01:27:18 PM PST 23 Dec 27 01:27:21 PM PST 23 2677166578 ps
T47 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2512707173 Dec 27 01:26:45 PM PST 23 Dec 27 01:26:52 PM PST 23 39710829089 ps
T404 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2117567577 Dec 27 01:26:56 PM PST 23 Dec 27 01:27:02 PM PST 23 2622791473 ps
T405 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3491648250 Dec 27 01:27:11 PM PST 23 Dec 27 01:27:21 PM PST 23 3234477637 ps
T189 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3683463635 Dec 27 01:28:06 PM PST 23 Dec 27 01:28:14 PM PST 23 2901426509 ps
T406 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1531691043 Dec 27 01:27:22 PM PST 23 Dec 27 01:27:28 PM PST 23 3844925916 ps
T407 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3826893114 Dec 27 01:28:19 PM PST 23 Dec 27 01:28:21 PM PST 23 2872106562 ps
T57 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3533426605 Dec 27 01:28:10 PM PST 23 Dec 27 01:28:33 PM PST 23 1675892658265 ps
T74 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1504324301 Dec 27 01:27:53 PM PST 23 Dec 27 01:29:41 PM PST 23 45519890676 ps
T205 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.4225592508 Dec 27 01:27:26 PM PST 23 Dec 27 01:27:33 PM PST 23 2237036372 ps
T48 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3850082778 Dec 27 01:28:28 PM PST 23 Dec 27 01:28:37 PM PST 23 3827488927 ps
T206 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2081573863 Dec 27 01:29:32 PM PST 23 Dec 27 01:30:34 PM PST 23 82308229414 ps
T408 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1994554973 Dec 27 01:28:50 PM PST 23 Dec 27 01:28:54 PM PST 23 2635001814 ps
T409 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.905200740 Dec 27 01:29:22 PM PST 23 Dec 27 01:29:24 PM PST 23 2526605326 ps
T410 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.627676247 Dec 27 01:27:31 PM PST 23 Dec 27 01:27:39 PM PST 23 2161557498 ps
T338 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1413474879 Dec 27 01:29:13 PM PST 23 Dec 27 01:31:04 PM PST 23 42009420523 ps
T341 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.1413143348 Dec 27 01:28:44 PM PST 23 Dec 27 01:58:08 PM PST 23 672792180247 ps
T411 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2531993977 Dec 27 01:28:30 PM PST 23 Dec 27 01:28:37 PM PST 23 3104485613 ps
T87 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3328062570 Dec 27 01:30:09 PM PST 23 Dec 27 01:31:08 PM PST 23 27333244608 ps
T412 /workspace/coverage/default/13.sysrst_ctrl_alert_test.439355164 Dec 27 01:27:21 PM PST 23 Dec 27 01:27:29 PM PST 23 2013450685 ps
T413 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2208885923 Dec 27 01:28:46 PM PST 23 Dec 27 01:28:50 PM PST 23 2452061378 ps
T414 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3652513664 Dec 27 01:28:02 PM PST 23 Dec 27 01:28:05 PM PST 23 3530519401 ps
T415 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.367013878 Dec 27 01:29:00 PM PST 23 Dec 27 01:29:08 PM PST 23 2468112722 ps
T416 /workspace/coverage/default/48.sysrst_ctrl_smoke.3620922661 Dec 27 01:29:46 PM PST 23 Dec 27 01:29:53 PM PST 23 2110194781 ps
T417 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1194827882 Dec 27 01:29:24 PM PST 23 Dec 27 01:29:33 PM PST 23 2608638557 ps
T418 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2529042244 Dec 27 01:29:17 PM PST 23 Dec 27 01:29:20 PM PST 23 2226380795 ps
T344 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1338356839 Dec 27 01:29:29 PM PST 23 Dec 27 01:29:34 PM PST 23 2520638490 ps
T419 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.12887254 Dec 27 01:28:12 PM PST 23 Dec 27 01:30:54 PM PST 23 262461846235 ps
T246 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1219764895 Dec 27 01:29:11 PM PST 23 Dec 27 01:31:49 PM PST 23 63063805737 ps
T420 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2238093841 Dec 27 01:29:36 PM PST 23 Dec 27 01:29:50 PM PST 23 3885806987 ps
T247 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1676412011 Dec 27 01:28:17 PM PST 23 Dec 27 01:32:55 PM PST 23 104705229044 ps
T58 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1536772699 Dec 27 01:27:55 PM PST 23 Dec 27 01:28:01 PM PST 23 6540156776 ps
T421 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3268998951 Dec 27 01:28:26 PM PST 23 Dec 27 01:28:29 PM PST 23 2212324298 ps
T422 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2490779001 Dec 27 01:28:35 PM PST 23 Dec 27 01:28:48 PM PST 23 2455401093 ps
T423 /workspace/coverage/default/45.sysrst_ctrl_stress_all.928996443 Dec 27 01:30:07 PM PST 23 Dec 27 01:30:36 PM PST 23 9769301106 ps
T424 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3771956128 Dec 27 01:28:13 PM PST 23 Dec 27 01:28:16 PM PST 23 2624504036 ps
T159 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.485477293 Dec 27 01:27:47 PM PST 23 Dec 27 01:29:10 PM PST 23 97078423663 ps
T88 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3973452073 Dec 27 01:27:30 PM PST 23 Dec 27 01:29:55 PM PST 23 103673163201 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%