Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.54	98.85	96.33	100.00	96.79	98.22	99.53	93.02

Total tests in report: 908

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
59.36	59.36	63.69	63.69	61.03	61.03	57.06	57.06	96.79	96.79	69.34	69.34	56.18	56.18	11.45	11.45	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.2970330358
70.54	11.17	79.34	15.65	73.66	12.63	65.26	8.20	96.79	0.00	81.73	12.39	76.31	20.13	20.67	9.21	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1291534050
77.81	7.28	87.15	7.81	81.72	8.06	86.33	21.07	96.79	0.00	87.99	6.27	79.03	2.72	25.68	5.02	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2454612538
85.09	7.27	92.55	5.40	87.15	5.44	88.15	1.82	96.79	0.00	92.13	4.14	90.73	11.70	48.09	22.41	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2349152697
88.30	3.21	94.62	2.07	89.39	2.24	88.15	0.00	96.79	0.00	93.80	1.67	95.88	5.15	59.43	11.34	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1577412619
90.81	2.52	95.80	1.18	90.23	0.83	97.04	8.88	96.79	0.00	94.36	0.56	95.88	0.00	65.59	6.16	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.109312536
92.25	1.43	96.35	0.56	90.97	0.74	97.04	0.00	96.79	0.00	94.99	0.63	96.91	1.03	72.68	7.09	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3034721074
93.13	0.88	96.53	0.17	91.04	0.07	97.04	0.00	96.79	0.00	95.23	0.24	97.19	0.28	78.08	5.40	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.4192516628
93.97	0.84	97.01	0.49	92.85	1.81	99.09	2.05	96.79	0.00	95.86	0.63	97.38	0.19	78.79	0.71	/workspace/coverage/default/14.sysrst_ctrl_stress_all.3888121380
94.55	0.58	97.31	0.30	93.18	0.33	99.09	0.00	96.79	0.00	96.14	0.28	97.85	0.47	81.46	2.67	/workspace/coverage/default/15.sysrst_ctrl_stress_all.735711375
94.96	0.41	97.38	0.07	93.40	0.21	99.32	0.23	96.79	0.00	96.21	0.07	97.85	0.00	83.75	2.29	/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.3193587048
95.28	0.32	97.66	0.28	94.16	0.76	99.32	0.00	96.79	0.00	96.76	0.56	97.94	0.09	84.30	0.55	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.4018408106
95.54	0.26	98.19	0.54	94.76	0.60	99.32	0.00	96.79	0.00	97.39	0.63	98.03	0.09	84.30	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1427864591
95.72	0.18	98.19	0.00	94.76	0.00	99.32	0.00	96.79	0.00	97.39	0.00	98.03	0.00	85.55	1.25	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.521258535
95.88	0.16	98.19	0.00	94.76	0.00	99.32	0.00	96.79	0.00	97.39	0.00	98.03	0.00	86.70	1.15	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1312564665
96.01	0.13	98.19	0.00	94.78	0.02	100.00	0.68	96.79	0.00	97.39	0.00	98.13	0.09	86.80	0.11	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.4092581846
96.13	0.12	98.25	0.05	94.80	0.02	100.00	0.00	96.79	0.00	97.46	0.07	98.22	0.09	87.40	0.60	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1249738228
96.25	0.12	98.32	0.07	94.92	0.12	100.00	0.00	96.79	0.00	97.53	0.07	98.41	0.19	87.79	0.38	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.806055755
96.36	0.10	98.35	0.03	94.95	0.02	100.00	0.00	96.79	0.00	97.56	0.03	98.50	0.09	88.33	0.55	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.1455264065
96.44	0.09	98.39	0.03	94.97	0.02	100.00	0.00	96.79	0.00	97.63	0.07	98.50	0.00	88.82	0.49	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2442720674
96.53	0.09	98.39	0.00	95.57	0.60	100.00	0.00	96.79	0.00	97.63	0.00	98.50	0.00	88.82	0.00	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.4067630403
96.61	0.08	98.45	0.07	95.66	0.10	100.00	0.00	96.79	0.00	97.70	0.07	98.69	0.19	88.99	0.16	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2020383465
96.69	0.08	98.56	0.10	95.73	0.07	100.00	0.00	96.79	0.00	97.81	0.10	98.97	0.28	88.99	0.00	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2386491059
96.76	0.06	98.56	0.00	95.73	0.00	100.00	0.00	96.79	0.00	97.81	0.00	98.97	0.00	89.42	0.44	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.649187389
96.82	0.06	98.56	0.00	95.95	0.21	100.00	0.00	96.79	0.00	97.81	0.00	98.97	0.00	89.64	0.22	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2008610296
96.87	0.05	98.63	0.07	96.00	0.05	100.00	0.00	96.79	0.00	97.88	0.07	99.16	0.19	89.64	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3515608747
96.92	0.05	98.63	0.00	96.00	0.00	100.00	0.00	96.79	0.00	97.88	0.00	99.16	0.00	89.97	0.33	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3253715890
96.96	0.05	98.63	0.00	96.00	0.00	100.00	0.00	96.79	0.00	97.88	0.00	99.16	0.00	90.29	0.33	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3102744940
97.01	0.04	98.68	0.05	96.04	0.05	100.00	0.00	96.79	0.00	97.98	0.10	99.25	0.09	90.29	0.00	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.943816846
97.05	0.04	98.73	0.05	96.07	0.02	100.00	0.00	96.79	0.00	98.05	0.07	99.34	0.09	90.35	0.05	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3669840723
97.09	0.04	98.73	0.00	96.07	0.00	100.00	0.00	96.79	0.00	98.05	0.00	99.34	0.00	90.62	0.27	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4110500044
97.13	0.04	98.73	0.00	96.07	0.00	100.00	0.00	96.79	0.00	98.05	0.00	99.34	0.00	90.89	0.27	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.34960784
97.16	0.03	98.73	0.00	96.07	0.00	100.00	0.00	96.79	0.00	98.05	0.00	99.34	0.00	91.11	0.22	/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.439585613
97.19	0.03	98.73	0.00	96.07	0.00	100.00	0.00	96.79	0.00	98.05	0.00	99.34	0.00	91.33	0.22	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1901815592
97.22	0.03	98.73	0.00	96.07	0.00	100.00	0.00	96.79	0.00	98.05	0.00	99.34	0.00	91.55	0.22	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.581874394
97.25	0.03	98.77	0.03	96.09	0.02	100.00	0.00	96.79	0.00	98.09	0.03	99.44	0.09	91.55	0.00	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2883411289
97.27	0.03	98.80	0.03	96.11	0.02	100.00	0.00	96.79	0.00	98.12	0.03	99.53	0.09	91.55	0.00	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1978263056
97.30	0.02	98.80	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	91.71	0.16	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3962429447
97.32	0.02	98.80	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	91.88	0.16	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.98066669
97.34	0.02	98.80	0.00	96.23	0.12	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	91.88	0.00	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1636253225
97.35	0.02	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	91.98	0.11	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3526805746
97.37	0.02	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.09	0.11	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3133484053
97.38	0.02	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.20	0.11	/workspace/coverage/default/30.sysrst_ctrl_stress_all.2892449754
97.40	0.02	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.31	0.11	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1911861465
97.41	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.37	0.05	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2923566557
97.41	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.42	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.956237144
97.42	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.48	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3087885427
97.43	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.53	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.3730281606
97.44	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.58	0.05	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.785390935
97.45	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.64	0.05	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1131886592
97.45	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.69	0.05	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.235594158
97.46	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.75	0.05	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1545986108
97.47	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.80	0.05	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1270289185
97.48	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.86	0.05	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.365155688
97.48	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.91	0.05	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.994600422
97.49	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	92.97	0.05	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1534448340
97.50	0.01	98.80	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.12	0.00	99.53	0.00	93.02	0.05	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3416941541
97.51	0.01	98.82	0.02	96.23	0.00	100.00	0.00	96.79	0.00	98.16	0.03	99.53	0.00	93.02	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1760912437
97.52	0.01	98.84	0.02	96.23	0.00	100.00	0.00	96.79	0.00	98.19	0.03	99.53	0.00	93.02	0.00	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.708537879
97.52	0.01	98.85	0.02	96.23	0.00	100.00	0.00	96.79	0.00	98.22	0.03	99.53	0.00	93.02	0.00	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.257378820
97.53	0.01	98.85	0.00	96.28	0.05	100.00	0.00	96.79	0.00	98.22	0.00	99.53	0.00	93.02	0.00	/workspace/coverage/default/0.sysrst_ctrl_alert_test.1083878340
97.53	0.01	98.85	0.00	96.31	0.02	100.00	0.00	96.79	0.00	98.22	0.00	99.53	0.00	93.02	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1329196341

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2296894507
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1315826987
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1045304191
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2355537124
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3090776492
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2518100956
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2390709127
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3642663418
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1506729756
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2493478159
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2243228189
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2262919766
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.344816122
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1377901695
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1431997035
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.636697898
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1136689090
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3294738071
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.4264053122
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.632771457
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2209107996
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.190460492
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3519821287
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1729539242
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.4212682395
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2409048197
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1419501875
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2431380727
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4081971048
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3931566192
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3331335697
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2770095673
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.416920263
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.5587668
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.919081334
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1247133007
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3754088365
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.819712575
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1014180950
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2750455622
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2777293807
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3320215155
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1005897013
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3251886220
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.815509487
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3224192857
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1018165447
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.4036611162
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1607331553
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2070273242
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3466545681
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1591933790
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4209857311
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.660687165
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.635212971
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1230837641
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4172473703
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4192971233
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3099406234
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.859087175
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3469137897
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2856383686
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1498544483
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.179003991
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.3648899073
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2672298745
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2472260463
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1504818600
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3445508060
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3314569807
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3244753242
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.239258357
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3511858045
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1078520103
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2372751935
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.128546168
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.568360549
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.7499696
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1578035592
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1329585376
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3043916855
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.861638354
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.874818771
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.1445295862
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2375683442
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3536308443
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1306083835
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3720488873
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.345113823
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1679340849
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1305830451
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.2654172523
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.2370118426
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.4294312916
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.523867939
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.986402679
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.2236842096
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1422777001
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.2581022328
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.2168666941
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.777180728
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.2488121166
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.2974410188
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.317646650
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.730406564
/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1443876989
/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.2678795050
/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.1781330831
/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.3959077999
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.505200780
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.3579025977
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.1973318134
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.794194839
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.1049678228
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.1840386666
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.137518186
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.1849160418
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.4073773068
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.214591941
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.2510297916
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.1695524331
/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.2936983938
/workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.1013034544
/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.4090195908
/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.852738637
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.1880342668
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.1365312433
/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.1647821400
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1998064247
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.3894560947
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.241107666
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2977110397
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.2077855895
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.231495341
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.2033641608
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.1543420177
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.3591117081
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_same_csr_outstanding.720280088
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.2940628050
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.3542810281
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.232524302
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.2111775956
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.1913717927
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.1065533148
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.356674481
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.3978194630
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.3784809491
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.918596702
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.1705852069
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.125067074
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.2696681538
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_mem_rw_with_rand_reset.1166683641
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.3783736763
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.3863347099
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.3431326166
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.228480579
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2229797657
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1162635963
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1399204019
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4057181872
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3360384618
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.975374711
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4095492739
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.500898976
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2778594642
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.363069565
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.302203398
/workspace/coverage/default/0.sysrst_ctrl_smoke.351442261
/workspace/coverage/default/0.sysrst_ctrl_stress_all.3420540770
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3025862480
/workspace/coverage/default/1.sysrst_ctrl_alert_test.3854443747
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2190046746
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.1219915786
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3766494991
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.335485509
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.338502533
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.648762629
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.697162256
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.426320099
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3736575597
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1618965103
/workspace/coverage/default/1.sysrst_ctrl_smoke.2544358329
/workspace/coverage/default/1.sysrst_ctrl_stress_all.511237201
/workspace/coverage/default/10.sysrst_ctrl_alert_test.2490454591
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1751018980
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.792282994
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.618488020
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3237160462
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.981907805
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1893979680
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.4131782415
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2842040512
/workspace/coverage/default/10.sysrst_ctrl_smoke.66204393
/workspace/coverage/default/10.sysrst_ctrl_stress_all.3463238674
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.958696660
/workspace/coverage/default/11.sysrst_ctrl_alert_test.567732612
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2602846722
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.3314014056
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1069058488
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2486981960
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.4257947648
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.274514904
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.392445460
/workspace/coverage/default/11.sysrst_ctrl_smoke.3420158609
/workspace/coverage/default/11.sysrst_ctrl_stress_all.3535477118
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1582509334
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.849829057
/workspace/coverage/default/12.sysrst_ctrl_alert_test.1018601184
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2402508677
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.3876924090
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3414852700
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.39168432
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1105496452
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.247320347
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3988745293
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1357584134
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.372679166
/workspace/coverage/default/12.sysrst_ctrl_smoke.1570240228
/workspace/coverage/default/12.sysrst_ctrl_stress_all.1234980285
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1951323692
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2534504586
/workspace/coverage/default/13.sysrst_ctrl_alert_test.2344338870
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.464032086
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.881629403
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2152311604
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4235971040
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1224608474
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2015784783
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.792052760
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4266015174
/workspace/coverage/default/13.sysrst_ctrl_smoke.190978340
/workspace/coverage/default/13.sysrst_ctrl_stress_all.1276326879
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2917000626
/workspace/coverage/default/14.sysrst_ctrl_alert_test.3886142280
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2884700543
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.4229409380
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.81326757
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.4247708134
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.639439947
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.745069715
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3527880923
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2212806873
/workspace/coverage/default/14.sysrst_ctrl_smoke.2390850106
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.579006145
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2335136762
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2050702751
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3633272958
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1948594507
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1416780647
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1217030810
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.908329574
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2850852748
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2742876979
/workspace/coverage/default/15.sysrst_ctrl_smoke.3955078077
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2772339324
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.635272915
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3966122895
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.758497660
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1815635790
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3214680765
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3637414102
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.905872376
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.405028356
/workspace/coverage/default/16.sysrst_ctrl_smoke.512614419
/workspace/coverage/default/16.sysrst_ctrl_stress_all.1894801203
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2949877869
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1960376449
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1696842593
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.587285530
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2909572235
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3599421911
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3579220112
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.4021093150
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3154041951
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2898616535
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3660158016
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3813577489
/workspace/coverage/default/17.sysrst_ctrl_smoke.4284889794
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1584248128
/workspace/coverage/default/18.sysrst_ctrl_alert_test.834971561
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3897810013
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1436452029
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3912419475
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.780475941
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.4128427153
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2692369375
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2054777120
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3144987374
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.845894264
/workspace/coverage/default/18.sysrst_ctrl_smoke.1798582666
/workspace/coverage/default/18.sysrst_ctrl_stress_all.740704769
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1303985792
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.221033346
/workspace/coverage/default/19.sysrst_ctrl_alert_test.511091147
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3059194685
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.958338847
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1293478909
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1023219788
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3423101198
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.698747439
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3659241733
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3471514889
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.347823384
/workspace/coverage/default/19.sysrst_ctrl_smoke.2110290702
/workspace/coverage/default/19.sysrst_ctrl_stress_all.1323362828
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1529650583
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3774891546
/workspace/coverage/default/2.sysrst_ctrl_alert_test.102345089
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3266821437
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.1825126174
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3452513483
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3775991690
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.401698242
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2421914082
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.459511065
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1732030744
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2439534170
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3193426925
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.4075159054
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.2883192827
/workspace/coverage/default/2.sysrst_ctrl_smoke.4175016384
/workspace/coverage/default/2.sysrst_ctrl_stress_all.576036144
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2495291982
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3360078845
/workspace/coverage/default/20.sysrst_ctrl_alert_test.2000142808
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1596064915
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2484354820
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1750559346
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2982347018
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.371997096
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2825101965
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.498898169
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.553333167
/workspace/coverage/default/20.sysrst_ctrl_smoke.1257396268
/workspace/coverage/default/20.sysrst_ctrl_stress_all.3352876606
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3709847956
/workspace/coverage/default/21.sysrst_ctrl_alert_test.2512833711
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1236197752
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.1413075795
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.916905440
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.293507504
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.1742167017
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1611268877
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3999883062
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2543697528
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3566735990
/workspace/coverage/default/21.sysrst_ctrl_smoke.3719257087
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3261402669
/workspace/coverage/default/22.sysrst_ctrl_alert_test.135503940
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1979406110
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3985746216
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.889338185
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.660177902
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2509801353
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3676382350
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2186468378
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.176966428
/workspace/coverage/default/22.sysrst_ctrl_smoke.1158872562
/workspace/coverage/default/22.sysrst_ctrl_stress_all.1343555100
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.185620486
/workspace/coverage/default/23.sysrst_ctrl_alert_test.541503395
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.4282627540
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3699293539
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.94619381
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1462922231
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.21252104
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2145582958
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1577951250
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3511704681
/workspace/coverage/default/23.sysrst_ctrl_smoke.4119658794
/workspace/coverage/default/23.sysrst_ctrl_stress_all.3683829237
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1338236188
/workspace/coverage/default/24.sysrst_ctrl_alert_test.3068557939
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.172367596
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1241832632
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1483098899
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3847295493
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2329899784
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2714513490
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1003022090
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2401408699
/workspace/coverage/default/24.sysrst_ctrl_smoke.1039724083
/workspace/coverage/default/24.sysrst_ctrl_stress_all.3367006071
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.777536510
/workspace/coverage/default/25.sysrst_ctrl_alert_test.2638657737
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3076971885
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1486432227
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.885793566
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.416035323
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1788726149
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1741798851
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.667581
/workspace/coverage/default/25.sysrst_ctrl_smoke.609756739
/workspace/coverage/default/25.sysrst_ctrl_stress_all.3892654419
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.201899076
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3618695694
/workspace/coverage/default/26.sysrst_ctrl_alert_test.2514600929
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1114777444
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.1739332627
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2999347678
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2525328838
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.1539364460
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1548702096
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4221370916
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.524377105
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.724678225
/workspace/coverage/default/26.sysrst_ctrl_smoke.426759672
/workspace/coverage/default/26.sysrst_ctrl_stress_all.2383173471
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.175270106
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.591104232
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1450222177
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3628669329
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2864579461
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3415528568
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3875102622
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.569813222
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3706750704
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.923900313
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3222077321
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2540127059
/workspace/coverage/default/27.sysrst_ctrl_smoke.2449339393
/workspace/coverage/default/27.sysrst_ctrl_stress_all.1550137630
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.4242104340
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1351050930
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2773452267
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1551534110
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1777792350
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3462784033
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.753994201
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3104733469
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1006542257
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.97758245
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.101020050
/workspace/coverage/default/28.sysrst_ctrl_smoke.428528365
/workspace/coverage/default/28.sysrst_ctrl_stress_all.614268877
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2937906649
/workspace/coverage/default/29.sysrst_ctrl_alert_test.3412570165
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1456914071
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1362114499
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2550004601
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3600592723
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3292921057
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.4036494458
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2149737070
/workspace/coverage/default/29.sysrst_ctrl_smoke.3181754892
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1201765201
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2436485695
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.777955154
/workspace/coverage/default/3.sysrst_ctrl_alert_test.2329227986
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.4079742404
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1288634383
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3262011271
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2537975233
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.4049892384
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3743269187
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1573393159
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1375403418
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.4007534698
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.512008226
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2788626345
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2367751260
/workspace/coverage/default/3.sysrst_ctrl_smoke.2771069363
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1418519162
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.3269215408
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3448379807
/workspace/coverage/default/30.sysrst_ctrl_alert_test.2020450511
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3575161224
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.4021943663
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1461526874
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1458920506
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2788363622
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1495609122
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.566479624
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.4288744323
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3639969791
/workspace/coverage/default/30.sysrst_ctrl_smoke.1181571754
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1579105611
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2472552814
/workspace/coverage/default/31.sysrst_ctrl_alert_test.2157398274
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.4293315484
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.51293841
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.75532598
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.562500731
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3968372050
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2756552545
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1306228242
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2331656671
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.609003280
/workspace/coverage/default/31.sysrst_ctrl_smoke.95069261
/workspace/coverage/default/31.sysrst_ctrl_stress_all.1572988286
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3368097326
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3744956079
/workspace/coverage/default/32.sysrst_ctrl_alert_test.3153873552
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.210871348
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1181126813
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3105458751
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.791184455
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1173562257
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.225102388
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3798902978
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.35482655
/workspace/coverage/default/32.sysrst_ctrl_smoke.1885665999
/workspace/coverage/default/32.sysrst_ctrl_stress_all.3873337150
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.925346785
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2836742641
/workspace/coverage/default/33.sysrst_ctrl_alert_test.3879365581
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3516792299
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3997466926
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.712988391
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2245899621
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3912134116
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1995054697
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1970754352
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1566300141
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1905037191
/workspace/coverage/default/33.sysrst_ctrl_smoke.4056973235
/workspace/coverage/default/33.sysrst_ctrl_stress_all.791284604
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2840608875
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3184481731
/workspace/coverage/default/34.sysrst_ctrl_alert_test.75861802
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1547497958
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.3217628824
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1286189870
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.425487666
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2317135679
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3776570426
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3928139426
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2762726649
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.1652784543
/workspace/coverage/default/34.sysrst_ctrl_smoke.2896332169
/workspace/coverage/default/34.sysrst_ctrl_stress_all.3861482264
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1940970643
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1033939413
/workspace/coverage/default/35.sysrst_ctrl_alert_test.1418346029
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1352166828
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2481937010
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.92183713
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.170103721
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.4261722182
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.557912053
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1853547642
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.2356575644
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3238278435
/workspace/coverage/default/35.sysrst_ctrl_smoke.3987465349
/workspace/coverage/default/35.sysrst_ctrl_stress_all.586517479
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1694978740
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3899693131
/workspace/coverage/default/36.sysrst_ctrl_alert_test.2114464819
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1771791790
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1129675789
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.367333484
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.86867218
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3696176295
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2626758140
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.4085476092
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2076972679
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.665731898
/workspace/coverage/default/36.sysrst_ctrl_smoke.426376595
/workspace/coverage/default/36.sysrst_ctrl_stress_all.1556932553
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2822689760
/workspace/coverage/default/37.sysrst_ctrl_alert_test.2903007073
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.238171120
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.514395710
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1795745418
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2374670006
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.179921052
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3872658906
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1071449028
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3175600338
/workspace/coverage/default/37.sysrst_ctrl_smoke.2237259352
/workspace/coverage/default/37.sysrst_ctrl_stress_all.3138299136
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.4271365678
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2575091358
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3391312625
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1494309636
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2190432975
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3203706372
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3222226387
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2985656361
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.985306019
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2964977938
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.4265778345
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2308084768
/workspace/coverage/default/38.sysrst_ctrl_smoke.2655050241
/workspace/coverage/default/38.sysrst_ctrl_stress_all.4177017823
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1165640029
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1215468732
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2945186325
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.1745101983
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2182004026
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2166456282
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.448678193
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.2664974270
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2040242466
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1150114572
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3263535987
/workspace/coverage/default/39.sysrst_ctrl_smoke.3012888216
/workspace/coverage/default/39.sysrst_ctrl_stress_all.3198489018
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1007770340
/workspace/coverage/default/4.sysrst_ctrl_alert_test.3143211860
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1846444630
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.738380993
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2559557248
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3892184991
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1102181081
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3408023374
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3882571243
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1651554404
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1816791969
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.303515690
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1984813359
/workspace/coverage/default/4.sysrst_ctrl_smoke.2119325464
/workspace/coverage/default/4.sysrst_ctrl_stress_all.829322213
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.127342701
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3769510837
/workspace/coverage/default/40.sysrst_ctrl_alert_test.443385062
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1786292333
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3333009983
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4183863484
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3548266378
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.125159704
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1503429520
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2042478743
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3390125484
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1319321007
/workspace/coverage/default/40.sysrst_ctrl_smoke.3606220120
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2915565396
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3661983283
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2659790494
/workspace/coverage/default/41.sysrst_ctrl_alert_test.877399050
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3316650994
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1615512437
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3362286396
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3295607322
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2590066458
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4001831109
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4251810580
/workspace/coverage/default/41.sysrst_ctrl_smoke.1454501578
/workspace/coverage/default/41.sysrst_ctrl_stress_all.4198129828
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1793229711
/workspace/coverage/default/42.sysrst_ctrl_alert_test.293614018
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.653898781
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1535185235
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2136206381
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3664649627
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3162414664
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3340752117
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2811089115
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1835254624
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.401494794
/workspace/coverage/default/42.sysrst_ctrl_smoke.1848615215
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1639941117
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.884505750
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3339209466
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.653549602
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3078170557
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3833929692
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2559895308
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3013030295
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4045604444
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1492446279
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1188409883
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4075492822
/workspace/coverage/default/43.sysrst_ctrl_smoke.941274460
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2343136911
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1494350239
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1532676183
/workspace/coverage/default/44.sysrst_ctrl_alert_test.4293757906
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.258075909
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1186455351
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3653634697
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1366984793
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.736269171
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.161308164
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1136257754
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1163644471
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.128142787
/workspace/coverage/default/44.sysrst_ctrl_smoke.3006490737
/workspace/coverage/default/44.sysrst_ctrl_stress_all.789054516
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1047163312
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4025012527
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2881004697
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1735202327
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3700585487
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4174208413
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.38261922
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3732954520
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.172191278
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3644600527
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2141378148
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2699773600
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3109405021
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.377170006
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1032636111
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2603928579
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3124155561
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3198172491
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.134819627
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4280950635
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1829490512
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4201258735
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.662313836
/workspace/coverage/default/46.sysrst_ctrl_smoke.3970853972
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3436203031
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3366422567
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3064169901
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1781843806
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3570181845
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.207659582
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1882477980
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4049415119
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1544009550
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4011468339
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.865145771
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3018979100
/workspace/coverage/default/47.sysrst_ctrl_smoke.1453715827
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1603510359
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.552379205
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3185936299
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3821574400
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1830349836
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.442202784
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2343694612
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1939846478
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2248804977
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3601780190
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2550612694
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.440581842
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.399070144
/workspace/coverage/default/48.sysrst_ctrl_smoke.3177430835
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3532795864
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.710872598
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1897129968
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3410779608
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.852533307
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4085341548
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.754609474
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3781541231
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3565373203
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.4216351091
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3868374007
/workspace/coverage/default/49.sysrst_ctrl_smoke.4142825109
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1072186831
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2985675172
/workspace/coverage/default/5.sysrst_ctrl_alert_test.707496771
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.534308681
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2164650387
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2822382409
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2735041055
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3975074769
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1766130164
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3347731535
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4139729951
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3362000825
/workspace/coverage/default/5.sysrst_ctrl_smoke.1676091066
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3193402164
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4055765193
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1351130209
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.577156499
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1250120290
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2306508725
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2207042534
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3194251005
/workspace/coverage/default/6.sysrst_ctrl_alert_test.372999043
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.927271863
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2943460260
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3897204339
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1974255135
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1948010103
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3986927949
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.580394647
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3078741639
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3915706079
/workspace/coverage/default/6.sysrst_ctrl_smoke.3808836274
/workspace/coverage/default/6.sysrst_ctrl_stress_all.287902125
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3983485012
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3274175283
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.54988479
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.842291139
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.123267171
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2525880452
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3209476176
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.307752349
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2576812033
/workspace/coverage/default/7.sysrst_ctrl_alert_test.988701849
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.427464481
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2358371605
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2008466501
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1712191975
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2229019622
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2971523464
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4245116331
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.927640659
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.4157103612
/workspace/coverage/default/7.sysrst_ctrl_smoke.2364000805
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2224756518
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1221119905
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3816339261
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2391828795
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3897144555
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4117468681
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1433590847
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3343108057
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2449268639
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2983271207
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2853183395
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1005923194
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.229446809
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.494791680
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.949487322
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3365190779
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.579869606
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2246071310
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3165308422
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.89260898
/workspace/coverage/default/8.sysrst_ctrl_smoke.1916666042
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1647291859
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1955706073
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2901397082
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2917402320
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2975301723
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1728777995
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3669287613
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1891422382
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1280090543
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2912218768
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3651692653
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3208791842
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2193965815
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1888649558
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2654841923
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1058855124
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2703195872
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.227232552
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2824850131
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1616139012
/workspace/coverage/default/9.sysrst_ctrl_smoke.2517240579
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2217401408
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1524673682
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3080695469
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1762278988
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3594379041
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1074739008
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2816597406
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1232288939
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2882377177

Total test records in report: 908

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T6	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.2970330358	Dec 31 12:44:23 PM PST 23	Dec 31 12:45:18 PM PST 23	24248896067 ps
T1	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2454612538	Dec 31 12:44:56 PM PST 23	Dec 31 12:45:01 PM PST 23	2124616240 ps
T7	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1014180950	Dec 31 12:44:29 PM PST 23	Dec 31 12:44:40 PM PST 23	2012681690 ps
T2	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1998064247	Dec 31 12:44:42 PM PST 23	Dec 31 12:44:47 PM PST 23	2125303674 ps
T23	/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1306083835	Dec 31 12:44:59 PM PST 23	Dec 31 12:45:08 PM PST 23	2017781896 ps
T24	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.2077855895	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:37 PM PST 23	2025845035 ps
T25	/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.1695524331	Dec 31 12:44:27 PM PST 23	Dec 31 12:44:34 PM PST 23	2042359499 ps
T26	/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.3193587048	Dec 31 12:44:38 PM PST 23	Dec 31 12:44:47 PM PST 23	2023560329 ps
T27	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2777293807	Dec 31 12:44:45 PM PST 23	Dec 31 12:44:53 PM PST 23	2250328234 ps
T28	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.2581022328	Dec 31 12:44:47 PM PST 23	Dec 31 12:44:58 PM PST 23	2041804995 ps
T29	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3466545681	Dec 31 12:44:44 PM PST 23	Dec 31 12:44:51 PM PST 23	2024871211 ps
T294	/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.4090195908	Dec 31 12:44:25 PM PST 23	Dec 31 12:44:30 PM PST 23	2027830921 ps
T52	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.635212971	Dec 31 12:44:23 PM PST 23	Dec 31 12:44:32 PM PST 23	2060113028 ps
T3	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.4018408106	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:38 PM PST 23	10820198838 ps
T277	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1504818600	Dec 31 12:44:40 PM PST 23	Dec 31 12:44:52 PM PST 23	2033594816 ps
T307	/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.2510297916	Dec 31 12:44:44 PM PST 23	Dec 31 12:44:54 PM PST 23	2012327904 ps
T8	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1578035592	Dec 31 12:44:10 PM PST 23	Dec 31 12:44:24 PM PST 23	2025125235 ps
T293	/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1305830451	Dec 31 12:44:32 PM PST 23	Dec 31 12:44:43 PM PST 23	2014212981 ps
T4	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1230837641	Dec 31 12:44:35 PM PST 23	Dec 31 12:44:43 PM PST 23	2108856810 ps
T9	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.2696681538	Dec 31 12:44:36 PM PST 23	Dec 31 12:45:40 PM PST 23	22192278431 ps
T5	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1422777001	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:42 PM PST 23	10263095715 ps
T278	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.4073773068	Dec 31 12:44:17 PM PST 23	Dec 31 12:44:25 PM PST 23	2603444805 ps
T308	/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.439585613	Dec 31 12:44:38 PM PST 23	Dec 31 12:44:49 PM PST 23	2015555124 ps
T53	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.128546168	Dec 31 12:44:34 PM PST 23	Dec 31 12:45:00 PM PST 23	5279245849 ps
T279	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.861638354	Dec 31 12:44:29 PM PST 23	Dec 31 12:44:37 PM PST 23	2332549313 ps
T10	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.109312536	Dec 31 12:44:12 PM PST 23	Dec 31 12:46:04 PM PST 23	42421603786 ps
T11	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3931566192	Dec 31 12:44:52 PM PST 23	Dec 31 12:45:06 PM PST 23	43169267298 ps
T295	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.1049678228	Dec 31 12:44:45 PM PST 23	Dec 31 12:44:52 PM PST 23	2030221553 ps
T280	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1636253225	Dec 31 12:44:40 PM PST 23	Dec 31 12:44:49 PM PST 23	2490896015 ps
T12	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2977110397	Dec 31 12:44:49 PM PST 23	Dec 31 12:45:00 PM PST 23	8707969835 ps
T281	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.4036611162	Dec 31 12:44:43 PM PST 23	Dec 31 12:45:45 PM PST 23	22210826853 ps
T276	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.4067630403	Dec 31 12:44:41 PM PST 23	Dec 31 12:44:48 PM PST 23	2466471766 ps
T364	/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.1445295862	Dec 31 12:44:36 PM PST 23	Dec 31 12:44:43 PM PST 23	2044375637 ps
T290	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3642663418	Dec 31 12:44:17 PM PST 23	Dec 31 12:44:27 PM PST 23	2086385579 ps
T365	/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.2678795050	Dec 31 12:44:38 PM PST 23	Dec 31 12:44:46 PM PST 23	2041913613 ps
T366	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1136689090	Dec 31 12:44:23 PM PST 23	Dec 31 12:44:33 PM PST 23	2021330978 ps
T367	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4172473703	Dec 31 12:44:48 PM PST 23	Dec 31 12:44:53 PM PST 23	2051373813 ps
T34	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4192971233	Dec 31 12:44:32 PM PST 23	Dec 31 12:44:44 PM PST 23	8814375885 ps
T35	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.1065533148	Dec 31 12:44:29 PM PST 23	Dec 31 12:44:38 PM PST 23	8619768983 ps
T36	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2472260463	Dec 31 12:44:23 PM PST 23	Dec 31 12:44:34 PM PST 23	4345349633 ps
T309	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1045304191	Dec 31 12:44:36 PM PST 23	Dec 31 12:44:59 PM PST 23	6049281100 ps
T288	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1078520103	Dec 31 12:44:15 PM PST 23	Dec 31 12:45:15 PM PST 23	42594116429 ps
T289	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.2168666941	Dec 31 12:44:46 PM PST 23	Dec 31 12:45:47 PM PST 23	22249373868 ps
T296	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.3894560947	Dec 31 12:45:10 PM PST 23	Dec 31 12:45:17 PM PST 23	2031713609 ps
T368	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.239258357	Dec 31 12:44:35 PM PST 23	Dec 31 12:44:48 PM PST 23	2009686809 ps
T37	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2409048197	Dec 31 12:44:38 PM PST 23	Dec 31 12:44:46 PM PST 23	2078629632 ps
T369	/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.1647821400	Dec 31 12:44:53 PM PST 23	Dec 31 12:44:58 PM PST 23	2042810098 ps
T370	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.190460492	Dec 31 12:44:34 PM PST 23	Dec 31 12:44:46 PM PST 23	8192668439 ps
T371	/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.2974410188	Dec 31 12:44:30 PM PST 23	Dec 31 12:44:37 PM PST 23	2140066278 ps
T372	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1329585376	Dec 31 12:44:24 PM PST 23	Dec 31 12:44:31 PM PST 23	2021524949 ps
T373	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.819712575	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:35 PM PST 23	2034079031 ps
T374	/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1443876989	Dec 31 12:44:41 PM PST 23	Dec 31 12:44:47 PM PST 23	2035117841 ps
T375	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2390709127	Dec 31 12:44:54 PM PST 23	Dec 31 12:45:19 PM PST 23	8349935808 ps
T292	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.4212682395	Dec 31 12:44:36 PM PST 23	Dec 31 12:44:48 PM PST 23	2056680360 ps
T376	/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1679340849	Dec 31 12:44:28 PM PST 23	Dec 31 12:44:39 PM PST 23	2010772955 ps
T297	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2243228189	Dec 31 12:44:20 PM PST 23	Dec 31 12:45:55 PM PST 23	76507724229 ps
T291	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1607331553	Dec 31 12:44:49 PM PST 23	Dec 31 12:44:54 PM PST 23	2238147875 ps
T377	/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.1365312433	Dec 31 12:44:35 PM PST 23	Dec 31 12:44:47 PM PST 23	2014908280 ps
T378	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2672298745	Dec 31 12:44:21 PM PST 23	Dec 31 12:44:28 PM PST 23	2026043289 ps
T379	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.3431326166	Dec 31 12:44:21 PM PST 23	Dec 31 12:44:52 PM PST 23	10382429237 ps
T380	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4081971048	Dec 31 12:44:33 PM PST 23	Dec 31 12:44:42 PM PST 23	2495022525 ps
T381	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.3542810281	Dec 31 12:44:45 PM PST 23	Dec 31 12:45:15 PM PST 23	42624204159 ps
T382	/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.345113823	Dec 31 12:44:32 PM PST 23	Dec 31 12:44:49 PM PST 23	2012611215 ps
T298	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2296894507	Dec 31 12:44:53 PM PST 23	Dec 31 12:45:01 PM PST 23	2753164192 ps
T383	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.918596702	Dec 31 12:44:22 PM PST 23	Dec 31 12:44:28 PM PST 23	2113556703 ps
T71	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4110500044	Dec 31 12:44:48 PM PST 23	Dec 31 12:45:23 PM PST 23	42762538288 ps
T384	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.919081334	Dec 31 12:44:36 PM PST 23	Dec 31 12:44:43 PM PST 23	2150191536 ps
T385	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1315826987	Dec 31 12:44:25 PM PST 23	Dec 31 12:47:36 PM PST 23	75995497944 ps
T386	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3469137897	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:39 PM PST 23	2044171268 ps
T387	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.2236842096	Dec 31 12:44:35 PM PST 23	Dec 31 12:44:46 PM PST 23	2013003165 ps
T388	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.137518186	Dec 31 12:44:25 PM PST 23	Dec 31 12:44:31 PM PST 23	2028419146 ps
T389	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4209857311	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:39 PM PST 23	2120554714 ps
T390	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1431997035	Dec 31 12:44:57 PM PST 23	Dec 31 12:45:06 PM PST 23	2016331163 ps
T391	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1591933790	Dec 31 12:44:23 PM PST 23	Dec 31 12:44:35 PM PST 23	10788702674 ps
T299	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2262919766	Dec 31 12:44:12 PM PST 23	Dec 31 12:44:36 PM PST 23	6023931015 ps
T392	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.1913717927	Dec 31 12:44:23 PM PST 23	Dec 31 12:44:32 PM PST 23	2016436393 ps
T393	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.4294312916	Dec 31 12:44:25 PM PST 23	Dec 31 12:44:31 PM PST 23	4033273107 ps
T394	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.1705852069	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:31 PM PST 23	2036463639 ps
T395	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.344816122	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:39 PM PST 23	2091384990 ps
T396	/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.505200780	Dec 31 12:44:47 PM PST 23	Dec 31 12:44:53 PM PST 23	2037609896 ps
T397	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2355537124	Dec 31 12:44:27 PM PST 23	Dec 31 12:44:35 PM PST 23	2099429166 ps
T398	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.1840386666	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:32 PM PST 23	2079756134 ps
T399	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3445508060	Dec 31 12:44:25 PM PST 23	Dec 31 12:45:29 PM PST 23	42593951888 ps
T300	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2070273242	Dec 31 12:44:39 PM PST 23	Dec 31 12:44:56 PM PST 23	2066133912 ps
T400	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.4264053122	Dec 31 12:44:34 PM PST 23	Dec 31 12:44:41 PM PST 23	2153643992 ps
T401	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1018165447	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:43 PM PST 23	2053147650 ps
T402	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.231495341	Dec 31 12:44:36 PM PST 23	Dec 31 12:46:31 PM PST 23	42474313605 ps
T301	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.3579025977	Dec 31 12:44:35 PM PST 23	Dec 31 12:44:46 PM PST 23	2704312364 ps
T403	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.874818771	Dec 31 12:44:46 PM PST 23	Dec 31 12:44:57 PM PST 23	23492213469 ps
T302	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.986402679	Dec 31 12:44:21 PM PST 23	Dec 31 12:44:30 PM PST 23	2036274385 ps
T404	/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.3959077999	Dec 31 12:44:31 PM PST 23	Dec 31 12:44:42 PM PST 23	2011279829 ps
T405	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.228480579	Dec 31 12:44:17 PM PST 23	Dec 31 12:44:27 PM PST 23	2030036641 ps
T406	/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.730406564	Dec 31 12:44:29 PM PST 23	Dec 31 12:44:37 PM PST 23	2025107341 ps
T407	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3519821287	Dec 31 12:44:28 PM PST 23	Dec 31 12:44:39 PM PST 23	2070905443 ps
T408	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2518100956	Dec 31 12:44:18 PM PST 23	Dec 31 12:44:24 PM PST 23	2047509112 ps
T409	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.2111775956	Dec 31 12:44:22 PM PST 23	Dec 31 12:44:27 PM PST 23	2110091414 ps
T410	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3099406234	Dec 31 12:45:06 PM PST 23	Dec 31 12:45:10 PM PST 23	2213910889 ps
T411	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1005897013	Dec 31 12:44:43 PM PST 23	Dec 31 12:44:56 PM PST 23	2056374222 ps
T412	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.3863347099	Dec 31 12:44:20 PM PST 23	Dec 31 12:44:25 PM PST 23	2029841745 ps
T413	/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2375683442	Dec 31 12:44:59 PM PST 23	Dec 31 12:45:04 PM PST 23	2041044178 ps
T414	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.3784809491	Dec 31 12:45:04 PM PST 23	Dec 31 12:45:13 PM PST 23	2080302479 ps
T415	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.179003991	Dec 31 12:44:28 PM PST 23	Dec 31 12:44:36 PM PST 23	2088934942 ps
T416	/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.2654172523	Dec 31 12:44:17 PM PST 23	Dec 31 12:44:22 PM PST 23	2128304271 ps
T417	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3244753242	Dec 31 12:44:26 PM PST 23	Dec 31 12:44:31 PM PST 23	2106452357 ps
T418	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.7499696	Dec 31 12:44:27 PM PST 23	Dec 31 12:44:38 PM PST 23	2090346092 ps
T419	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.3978194630	Dec 31 12:44:37 PM PST 23	Dec 31 12:46:31 PM PST 23	42447074868 ps
T420	/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.1781330831	Dec 31 12:44:37 PM PST 23	Dec 31 12:44:49 PM PST 23	2013441091 ps
T421	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.232524302	Dec 31 12:44:55 PM PST 23	Dec 31 12:45:03 PM PST 23	2039600784 ps
T38	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2692369375	Dec 31 12:56:17 PM PST 23	Dec 31 12:56:31 PM PST 23	2616440382 ps
T13	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.514395710	Dec 31 12:56:18 PM PST 23	Dec 31 01:01:45 PM PST 23	128466349697 ps
T14	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3162414664	Dec 31 12:56:42 PM PST 23	Dec 31 12:57:03 PM PST 23	4605640596 ps
T15	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.925346785	Dec 31 12:56:25 PM PST 23	Dec 31 12:57:38 PM PST 23	51183865145 ps
T16	/workspace/coverage/default/14.sysrst_ctrl_stress_all.3888121380	Dec 31 12:55:53 PM PST 23	Dec 31 12:56:13 PM PST 23	11502410775 ps
T17	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1291534050	Dec 31 12:56:39 PM PST 23	Dec 31 12:57:54 PM PST 23	122006656571 ps
T30	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1366984793	Dec 31 12:56:12 PM PST 23	Dec 31 12:56:30 PM PST 23	4312994547 ps
T31	/workspace/coverage/default/41.sysrst_ctrl_alert_test.877399050	Dec 31 12:56:22 PM PST 23	Dec 31 12:56:33 PM PST 23	2025978428 ps
T32	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1547497958	Dec 31 12:56:06 PM PST 23	Dec 31 12:56:18 PM PST 23	3247148497 ps
T33	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1495609122	Dec 31 12:56:27 PM PST 23	Dec 31 12:56:40 PM PST 23	2628241146 ps
T18	/workspace/coverage/default/49.sysrst_ctrl_stress_all.1072186831	Dec 31 12:56:25 PM PST 23	Dec 31 12:56:48 PM PST 23	12198296608 ps
T58	/workspace/coverage/default/40.sysrst_ctrl_smoke.3606220120	Dec 31 12:56:40 PM PST 23	Dec 31 12:57:01 PM PST 23	2109581244 ps
T97	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3078741639	Dec 31 12:56:36 PM PST 23	Dec 31 12:56:49 PM PST 23	2063201936 ps
T19	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1351130209	Dec 31 12:56:10 PM PST 23	Dec 31 12:56:20 PM PST 23	6615405032 ps
T59	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3292921057	Dec 31 12:55:52 PM PST 23	Dec 31 12:56:01 PM PST 23	2473381797 ps
T60	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3781541231	Dec 31 12:56:35 PM PST 23	Dec 31 12:57:03 PM PST 23	2611960961 ps
T61	/workspace/coverage/default/48.sysrst_ctrl_smoke.3177430835	Dec 31 12:56:17 PM PST 23	Dec 31 12:56:33 PM PST 23	2108691808 ps
T62	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.975374711	Dec 31 12:55:26 PM PST 23	Dec 31 12:55:33 PM PST 23	2916215235 ps
T49	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.75532598	Dec 31 12:56:17 PM PST 23	Dec 31 12:57:09 PM PST 23	67916444933 ps
T63	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2401408699	Dec 31 12:55:55 PM PST 23	Dec 31 12:55:59 PM PST 23	2533238299 ps
T70	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2590066458	Dec 31 12:56:47 PM PST 23	Dec 31 12:57:05 PM PST 23	2472451920 ps
T356	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1584248128	Dec 31 12:56:12 PM PST 23	Dec 31 12:56:24 PM PST 23	6495474140 ps
T310	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.653898781	Dec 31 12:56:26 PM PST 23	Dec 31 12:56:39 PM PST 23	3335074305 ps
T82	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1351050930	Dec 31 12:56:17 PM PST 23	Dec 31 12:56:30 PM PST 23	3280968391 ps
T50	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1436452029	Dec 31 12:56:18 PM PST 23	Dec 31 12:56:59 PM PST 23	107556432694 ps
T20	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4235971040	Dec 31 12:55:48 PM PST 23	Dec 31 12:56:00 PM PST 23	3111257567 ps
T110	/workspace/coverage/default/29.sysrst_ctrl_smoke.3181754892	Dec 31 12:55:44 PM PST 23	Dec 31 12:55:48 PM PST 23	2130114507 ps
T111	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.4265778345	Dec 31 12:56:40 PM PST 23	Dec 31 12:56:58 PM PST 23	2195302347 ps
T112	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3295607322	Dec 31 12:56:03 PM PST 23	Dec 31 12:56:07 PM PST 23	2648731147 ps
T113	/workspace/coverage/default/23.sysrst_ctrl_smoke.4119658794	Dec 31 12:56:13 PM PST 23	Dec 31 12:56:25 PM PST 23	2108331983 ps
T80	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2020383465	Dec 31 12:56:13 PM PST 23	Dec 31 12:57:01 PM PST 23	66744425524 ps
T21	/workspace/coverage/default/15.sysrst_ctrl_stress_all.735711375	Dec 31 12:55:26 PM PST 23	Dec 31 01:00:39 PM PST 23	130542246338 ps
T22	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2358371605	Dec 31 12:55:59 PM PST 23	Dec 31 12:56:22 PM PST 23	100828139900 ps
T39	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.777955154	Dec 31 12:55:57 PM PST 23	Dec 31 12:56:05 PM PST 23	10052789911 ps
T51	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3594379041	Dec 31 12:56:51 PM PST 23	Dec 31 01:00:15 PM PST 23	143621620580 ps
T64	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3988745293	Dec 31 12:56:17 PM PST 23	Dec 31 12:56:31 PM PST 23	2456100284 ps
T243	/workspace/coverage/default/42.sysrst_ctrl_smoke.1848615215	Dec 31 12:56:12 PM PST 23	Dec 31 12:56:23 PM PST 23	2113512869 ps
T244	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1835254624	Dec 31 12:56:31 PM PST 23	Dec 31 12:56:49 PM PST 23	2209895984 ps
T90	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2999347678	Dec 31 12:56:14 PM PST 23	Dec 31 12:58:55 PM PST 23	59648863175 ps
T245	/workspace/coverage/default/13.sysrst_ctrl_stress_all.1276326879	Dec 31 12:56:22 PM PST 23	Dec 31 12:56:34 PM PST 23	15082338000 ps
T91	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1288634383	Dec 31 12:55:11 PM PST 23	Dec 31 12:57:54 PM PST 23	59487670795 ps
T40	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1793229711	Dec 31 12:56:31 PM PST 23	Dec 31 12:59:20 PM PST 23	1716440231603 ps
T130	/workspace/coverage/default/7.sysrst_ctrl_alert_test.988701849	Dec 31 12:56:04 PM PST 23	Dec 31 12:56:08 PM PST 23	2124890606 ps
T131	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.377170006	Dec 31 12:56:21 PM PST 23	Dec 31 12:56:32 PM PST 23	5568258652 ps
T422	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1795745418	Dec 31 12:56:16 PM PST 23	Dec 31 12:56:31 PM PST 23	2892697885 ps
T282	/workspace/coverage/default/45.sysrst_ctrl_alert_test.2881004697	Dec 31 12:56:18 PM PST 23	Dec 31 12:56:29 PM PST 23	2035535758 ps
T54	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2008610296	Dec 31 12:56:18 PM PST 23	Dec 31 12:57:37 PM PST 23	26613469731 ps
T423	/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4001831109	Dec 31 12:56:33 PM PST 23	Dec 31 12:56:46 PM PST 23	2088508631 ps
T424	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2945186325	Dec 31 12:56:03 PM PST 23	Dec 31 12:56:09 PM PST 23	2015880435 ps
T55	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1762278988	Dec 31 12:56:59 PM PST 23	Dec 31 12:57:42 PM PST 23	76214798461 ps
T425	/workspace/coverage/default/24.sysrst_ctrl_smoke.1039724083	Dec 31 12:56:23 PM PST 23	Dec 31 12:56:33 PM PST 23	2125690806 ps
T426	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3105458751	Dec 31 12:56:26 PM PST 23	Dec 31 12:56:43 PM PST 23	4698751454 ps
T56	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2166456282	Dec 31 12:56:14 PM PST 23	Dec 31 12:57:35 PM PST 23	103694866620 ps
T65	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.4242104340	Dec 31 12:55:59 PM PST 23	Dec 31 12:56:32 PM PST 23	29881683939 ps
T57	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1131886592	Dec 31 12:55:48 PM PST 23	Dec 31 12:58:42 PM PST 23	69940088579 ps
T427	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3565373203	Dec 31 12:56:19 PM PST 23	Dec 31 12:56:31 PM PST 23	2464144560 ps
T42	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3013030295	Dec 31 12:56:42 PM PST 23	Dec 31 12:56:59 PM PST 23	4294095522 ps
T127	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1375403418	Dec 31 12:55:41 PM PST 23	Dec 31 12:55:51 PM PST 23	2608400702 ps
T128	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.94619381	Dec 31 12:55:58 PM PST 23	Dec 31 12:56:06 PM PST 23	3034719220 ps
T66	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2575091358	Dec 31 12:55:55 PM PST 23	Dec 31 12:55:59 PM PST 23	7063964726 ps
T428	/workspace/coverage/default/9.sysrst_ctrl_alert_test.3651692653	Dec 31 12:55:18 PM PST 23	Dec 31 12:55:25 PM PST 23	2034093430 ps
T360	/workspace/coverage/default/22.sysrst_ctrl_stress_all.1343555100	Dec 31 12:56:10 PM PST 23	Dec 31 12:56:36 PM PST 23	6963830124 ps
T41	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1777792350	Dec 31 12:56:31 PM PST 23	Dec 31 12:58:08 PM PST 23	78437870242 ps
T429	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1173562257	Dec 31 12:56:11 PM PST 23	Dec 31 12:56:25 PM PST 23	2609173667 ps
T67	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1955706073	Dec 31 12:56:01 PM PST 23	Dec 31 12:56:45 PM PST 23	35872905361 ps
T45	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.708537879	Dec 31 12:55:59 PM PST 23	Dec 31 12:56:04 PM PST 23	3008323571 ps
T98	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.401494794	Dec 31 12:56:47 PM PST 23	Dec 31 12:57:04 PM PST 23	2555741371 ps
T99	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2141378148	Dec 31 12:56:42 PM PST 23	Dec 31 12:57:05 PM PST 23	2511627704 ps
T48	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2349152697	Dec 31 12:56:37 PM PST 23	Dec 31 12:59:31 PM PST 23	582068180569 ps
T142	/workspace/coverage/default/12.sysrst_ctrl_smoke.1570240228	Dec 31 12:56:23 PM PST 23	Dec 31 12:56:35 PM PST 23	2117336485 ps
T47	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3423101198	Dec 31 12:55:57 PM PST 23	Dec 31 12:56:11 PM PST 23	4942384618 ps
T143	/workspace/coverage/default/41.sysrst_ctrl_smoke.1454501578	Dec 31 12:56:16 PM PST 23	Dec 31 12:56:29 PM PST 23	2133579064 ps
T144	/workspace/coverage/default/38.sysrst_ctrl_smoke.2655050241	Dec 31 12:56:44 PM PST 23	Dec 31 12:57:05 PM PST 23	2115376591 ps
T145	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1853547642	Dec 31 12:56:48 PM PST 23	Dec 31 12:57:11 PM PST 23	2462041971 ps
T146	/workspace/coverage/default/38.sysrst_ctrl_alert_test.3391312625	Dec 31 12:56:15 PM PST 23	Dec 31 12:56:27 PM PST 23	2038000207 ps
T123	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.521258535	Dec 31 12:56:44 PM PST 23	Dec 31 12:58:20 PM PST 23	112180382694 ps
T147	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.553333167	Dec 31 12:56:22 PM PST 23	Dec 31 12:56:38 PM PST 23	2508785908 ps
T124	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2975301723	Dec 31 12:56:28 PM PST 23	Dec 31 12:57:58 PM PST 23	129966219853 ps
T430	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1023219788	Dec 31 12:55:46 PM PST 23	Dec 31 12:55:50 PM PST 23	3494908519 ps
T431	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.780475941	Dec 31 12:55:43 PM PST 23	Dec 31 12:55:47 PM PST 23	2819264391 ps
T274	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.4092581846	Dec 31 12:55:19 PM PST 23	Dec 31 12:56:19 PM PST 23	22012889431 ps
T285	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3637414102	Dec 31 12:55:43 PM PST 23	Dec 31 12:55:48 PM PST 23	2472889644 ps
T286	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3511704681	Dec 31 12:55:59 PM PST 23	Dec 31 12:56:02 PM PST 23	2533608777 ps
T287	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3628669329	Dec 31 12:56:10 PM PST 23	Dec 31 01:07:31 PM PST 23	280660268848 ps
T43	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1105496452	Dec 31 12:55:29 PM PST 23	Dec 31 12:55:37 PM PST 23	3525802528 ps
T100	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3633272958	Dec 31 12:55:56 PM PST 23	Dec 31 12:56:03 PM PST 23	26167430107 ps
T92	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3076971885	Dec 31 12:56:17 PM PST 23	Dec 31 12:56:31 PM PST 23	3310621831 ps
T221	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4183863484	Dec 31 12:56:26 PM PST 23	Dec 31 12:59:24 PM PST 23	65151131364 ps
T93	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1596064915	Dec 31 12:55:48 PM PST 23	Dec 31 12:55:52 PM PST 23	3900469850 ps
T222	/workspace/coverage/default/12.sysrst_ctrl_stress_all.1234980285	Dec 31 12:55:29 PM PST 23	Dec 31 12:57:12 PM PST 23	167548777192 ps
T260	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.792052760	Dec 31 12:55:50 PM PST 23	Dec 31 12:55:54 PM PST 23	2037050461 ps
T68	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3669840723	Dec 31 12:55:27 PM PST 23	Dec 31 12:57:32 PM PST 23	63448442327 ps
T135	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4266015174	Dec 31 12:55:26 PM PST 23	Dec 31 12:55:36 PM PST 23	2514378276 ps
T136	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.994600422	Dec 31 12:56:07 PM PST 23	Dec 31 12:57:33 PM PST 23	54846576422 ps
T251	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.86867218	Dec 31 12:56:12 PM PST 23	Dec 31 12:56:22 PM PST 23	2578451375 ps
T44	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1577412619	Dec 31 12:56:07 PM PST 23	Dec 31 12:59:26 PM PST 23	911272983329 ps
T226	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3222077321	Dec 31 12:56:32 PM PST 23	Dec 31 12:56:49 PM PST 23	2091247164 ps
T227	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1270289185	Dec 31 12:56:31 PM PST 23	Dec 31 12:59:06 PM PST 23	142933975218 ps
T228	/workspace/coverage/default/19.sysrst_ctrl_alert_test.511091147	Dec 31 12:55:58 PM PST 23	Dec 31 12:56:05 PM PST 23	2010687711 ps
T46	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.4261722182	Dec 31 12:56:27 PM PST 23	Dec 31 12:56:39 PM PST 23	3668693299 ps
T432	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3776570426	Dec 31 12:55:52 PM PST 23	Dec 31 12:55:56 PM PST 23	2645142864 ps
T433	/workspace/coverage/default/44.sysrst_ctrl_stress_all.789054516	Dec 31 12:56:16 PM PST 23	Dec 31 12:56:29 PM PST 23	7309672680 ps
T186	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3696176295	Dec 31 12:56:35 PM PST 23	Dec 31 12:56:54 PM PST 23	2742230796 ps
T101	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.235594158	Dec 31 12:56:09 PM PST 23	Dec 31 12:57:16 PM PST 23	24083760870 ps
T94	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1529650583	Dec 31 12:55:44 PM PST 23	Dec 31 12:56:37 PM PST 23	90500007886 ps
T434	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4139729951	Dec 31 12:56:21 PM PST 23	Dec 31 12:56:33 PM PST 23	2018381268 ps
T151	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3912134116	Dec 31 12:56:14 PM PST 23	Dec 31 12:56:26 PM PST 23	4193176768 ps
T435	/workspace/coverage/default/27.sysrst_ctrl_smoke.2449339393	Dec 31 12:56:24 PM PST 23	Dec 31 12:56:40 PM PST 23	2110721140 ps
T436	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.4257947648	Dec 31 12:55:35 PM PST 23	Dec 31 12:55:41 PM PST 23	2479228864 ps
T437	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3222226387	Dec 31 12:56:26 PM PST 23	Dec 31 12:56:38 PM PST 23	2616589835 ps
T95	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3897810013	Dec 31 12:55:44 PM PST 23	Dec 31 12:55:47 PM PST 23	3221546021 ps
T438	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.4007534698	Dec 31 12:55:34 PM PST 23	Dec 31 12:55:44 PM PST 23	2491110345 ps
T439	/workspace/coverage/default/0.sysrst_ctrl_alert_test.1083878340	Dec 31 12:55:19 PM PST 23	Dec 31 12:55:26 PM PST 23	2028358318 ps
T96	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2495291982	Dec 31 12:55:09 PM PST 23	Dec 31 12:55:44 PM PST 23	44443443805 ps
T312	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1535185235	Dec 31 12:56:30 PM PST 23	Dec 31 12:57:46 PM PST 23	117851224214 ps
T440	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.427464481	Dec 31 12:55:40 PM PST 23	Dec 31 12:55:52 PM PST 23	3575394463 ps
T441	/workspace/coverage/default/5.sysrst_ctrl_alert_test.707496771	Dec 31 12:56:30 PM PST 23	Dec 31 12:56:44 PM PST 23	2046276958 ps
T69	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4055765193	Dec 31 12:55:17 PM PST 23	Dec 31 12:55:40 PM PST 23	18728320876 ps
T442	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1162635963	Dec 31 12:55:27 PM PST 23	Dec 31 12:55:35 PM PST 23	2397417419 ps
T361	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.667581	Dec 31 12:56:02 PM PST 23	Dec 31 12:56:10 PM PST 23	2511535868 ps
T125	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1830349836	Dec 31 12:56:22 PM PST 23	Dec 31 12:56:40 PM PST 23	3465754428 ps
T443	/workspace/coverage/default/35.sysrst_ctrl_smoke.3987465349	Dec 31 12:56:13 PM PST 23	Dec 31 12:56:25 PM PST 23	2113147319 ps
T444	/workspace/coverage/default/33.sysrst_ctrl_alert_test.3879365581	Dec 31 12:56:03 PM PST 23	Dec 31 12:56:08 PM PST 23	2049423449 ps
T445	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4221370916	Dec 31 12:56:14 PM PST 23	Dec 31 12:56:26 PM PST 23	2465520005 ps
T129	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.579006145	Dec 31 12:55:41 PM PST 23	Dec 31 12:55:46 PM PST 23	8215841534 ps
T246	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.806055755	Dec 31 12:56:34 PM PST 23	Dec 31 12:58:31 PM PST 23	46498272404 ps
T446	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2525328838	Dec 31 12:56:20 PM PST 23	Dec 31 12:56:39 PM PST 23	3560930555 ps
T447	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4095492739	Dec 31 12:55:40 PM PST 23	Dec 31 12:55:45 PM PST 23	2627480102 ps
T448	/workspace/coverage/default/10.sysrst_ctrl_stress_all.3463238674	Dec 31 12:55:47 PM PST 23	Dec 31 12:55:56 PM PST 23	11115111999 ps
T449	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1616139012	Dec 31 12:56:13 PM PST 23	Dec 31 12:56:25 PM PST 23	2516547347 ps
T450	/workspace/coverage/default/49.sysrst_ctrl_alert_test.1897129968	Dec 31 12:56:27 PM PST 23	Dec 31 12:56:41 PM PST 23	2018681182 ps
T126	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1456914071	Dec 31 12:56:13 PM PST 23	Dec 31 01:00:04 PM PST 23	284772848238 ps
T87	/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.777536510	Dec 31 12:55:58 PM PST 23	Dec 31 12:56:07 PM PST 23	8862854467 ps
T451	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1979406110	Dec 31 12:55:46 PM PST 23	Dec 31 12:55:50 PM PST 23	3741912393 ps
T452	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.4288744323	Dec 31 12:56:03 PM PST 23	Dec 31 12:56:13 PM PST 23	2197029632 ps
T311	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2909572235	Dec 31 12:56:06 PM PST 23	Dec 31 12:57:46 PM PST 23	68563541336 ps
T362	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.665731898	Dec 31 12:56:45 PM PST 23	Dec 31 12:57:02 PM PST 23	2530873103 ps
T247	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3102744940	Dec 31 12:56:26 PM PST 23	Dec 31 01:00:25 PM PST 23	86763825734 ps
T363	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.372679166	Dec 31 12:56:09 PM PST 23	Dec 31 12:56:21 PM PST 23	2531260286 ps
T453	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2985675172	Dec 31 12:56:45 PM PST 23	Dec 31 12:57:08 PM PST 23	11631148914 ps
T454	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.566479624	Dec 31 12:56:20 PM PST 23	Dec 31 12:56:31 PM PST 23	2568006980 ps
T152	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.648762629	Dec 31 12:56:07 PM PST 23	Dec 31 12:56:23 PM PST 23	4061945722 ps