Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.87	99.41	96.40	100.00	98.08	98.78	99.72	92.72

Total tests in report: 914

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
69.57	69.57	86.16	86.16	77.01	77.01	88.15	88.15	31.41	31.41	87.37	87.37	74.34	74.34	42.56	42.56	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2176122640
78.00	8.43	92.79	6.63	86.10	9.09	97.27	9.11	44.23	12.82	92.73	5.36	83.71	9.36	49.18	6.62	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3188007117
83.55	5.55	95.28	2.48	88.34	2.24	97.27	0.00	64.10	19.87	94.71	1.98	92.79	9.08	52.36	3.18	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.986729505
87.27	3.72	97.12	1.84	90.48	2.15	97.27	0.00	82.05	17.95	96.66	1.95	94.57	1.78	52.77	0.41	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.321833583
88.63	1.35	97.19	0.07	90.72	0.24	97.49	0.23	82.69	0.64	96.69	0.03	94.57	0.00	61.03	8.26	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2183855351
89.96	1.33	97.48	0.30	91.10	0.38	97.49	0.00	85.26	2.56	96.94	0.24	95.51	0.94	65.95	4.92	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1428965744
91.18	1.22	97.55	0.07	92.32	1.22	98.18	0.68	85.26	0.00	97.04	0.10	95.60	0.09	72.31	6.36	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1699827154
92.14	0.96	98.14	0.59	92.80	0.48	98.18	0.00	89.10	3.85	97.42	0.38	97.00	1.40	72.31	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1018676505
92.78	0.65	98.14	0.00	92.92	0.12	98.18	0.00	89.10	0.00	97.42	0.00	97.00	0.00	76.72	4.41	/workspace/coverage/default/22.sysrst_ctrl_stress_all.3692659355
93.30	0.52	98.25	0.10	93.01	0.10	98.18	0.00	91.03	1.92	97.53	0.10	97.38	0.37	77.74	1.03	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.778002236
93.79	0.49	98.37	0.12	93.23	0.21	98.18	0.00	91.03	0.00	97.63	0.10	97.38	0.00	80.72	2.97	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.652245654
94.13	0.34	98.49	0.12	93.42	0.19	98.18	0.00	91.03	0.00	97.67	0.03	97.75	0.37	82.41	1.69	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3560586915
94.46	0.32	98.52	0.03	93.44	0.02	98.18	0.00	91.03	0.00	97.70	0.03	97.75	0.00	84.56	2.15	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.4098546110
94.74	0.28	98.52	0.00	93.47	0.02	99.77	1.59	91.03	0.00	97.70	0.00	97.85	0.09	84.82	0.26	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3619097818
95.01	0.28	98.59	0.07	93.80	0.33	99.77	0.00	92.31	1.28	97.77	0.07	98.03	0.19	84.82	0.00	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.600304567
95.29	0.27	98.66	0.07	93.85	0.05	99.77	0.00	93.59	1.28	97.84	0.07	98.22	0.19	85.08	0.26	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1161064873
95.52	0.24	98.73	0.07	93.89	0.05	99.77	0.00	94.87	1.28	97.91	0.07	98.41	0.19	85.08	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3166929972
95.74	0.21	98.77	0.03	93.97	0.07	99.77	0.00	94.87	0.00	97.91	0.00	98.41	0.00	86.46	1.38	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3515255356
95.92	0.18	98.91	0.14	94.61	0.64	99.77	0.00	94.87	0.00	98.19	0.28	98.60	0.19	86.46	0.00	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2067453920
96.07	0.16	98.91	0.00	95.35	0.74	99.77	0.00	94.87	0.00	98.19	0.00	98.60	0.00	86.82	0.36	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2320237528
96.21	0.14	98.91	0.00	95.37	0.02	99.77	0.00	94.87	0.00	98.19	0.00	98.69	0.09	87.69	0.87	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3508076646
96.35	0.14	98.94	0.03	95.40	0.02	99.77	0.00	95.51	0.64	98.22	0.03	98.78	0.09	87.85	0.15	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2276571231
96.49	0.13	99.01	0.07	95.42	0.02	99.77	0.00	96.15	0.64	98.33	0.10	98.88	0.09	87.85	0.00	/workspace/coverage/default/12.sysrst_ctrl_stress_all.185660436
96.61	0.13	99.06	0.05	95.44	0.02	99.77	0.00	96.79	0.64	98.40	0.07	98.97	0.09	87.85	0.00	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3000803139
96.73	0.12	99.10	0.03	95.47	0.02	99.77	0.00	97.44	0.64	98.43	0.03	99.06	0.09	87.85	0.00	/workspace/coverage/default/19.sysrst_ctrl_stress_all.4290427312
96.85	0.12	99.13	0.03	95.49	0.02	99.77	0.00	98.08	0.64	98.47	0.03	99.16	0.09	87.85	0.00	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.868507232
96.96	0.11	99.13	0.00	95.49	0.00	99.77	0.00	98.08	0.00	98.47	0.00	99.72	0.56	88.05	0.21	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.1622932998
97.06	0.10	99.18	0.05	95.49	0.00	99.77	0.00	98.08	0.00	98.47	0.00	99.72	0.00	88.72	0.67	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1692726050
97.13	0.07	99.22	0.03	95.49	0.00	99.77	0.00	98.08	0.00	98.54	0.07	99.72	0.00	89.08	0.36	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.968124988
97.19	0.06	99.22	0.00	95.49	0.00	99.77	0.00	98.08	0.00	98.54	0.00	99.72	0.00	89.49	0.41	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1130470087
97.24	0.06	99.22	0.00	95.49	0.00	99.77	0.00	98.08	0.00	98.54	0.00	99.72	0.00	89.90	0.41	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.709531112
97.30	0.05	99.22	0.00	95.49	0.00	99.77	0.00	98.08	0.00	98.54	0.00	99.72	0.00	90.26	0.36	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1159541734
97.35	0.05	99.22	0.00	95.85	0.36	99.77	0.00	98.08	0.00	98.54	0.00	99.72	0.00	90.26	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3132050359
97.40	0.05	99.27	0.05	95.92	0.07	100.00	0.23	98.08	0.00	98.54	0.00	99.72	0.00	90.26	0.00	/workspace/coverage/default/1.sysrst_ctrl_alert_test.1533575401
97.44	0.05	99.27	0.00	95.95	0.02	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	90.56	0.31	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.4084134639
97.49	0.04	99.27	0.00	95.95	0.00	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	90.87	0.31	/workspace/coverage/default/41.sysrst_ctrl_stress_all.856302799
97.53	0.04	99.29	0.02	95.95	0.00	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	91.13	0.26	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1396198450
97.56	0.03	99.29	0.00	96.18	0.24	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	91.13	0.00	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2341765170
97.59	0.03	99.29	0.00	96.21	0.02	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	91.33	0.21	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1659595997
97.62	0.02	99.31	0.02	96.21	0.00	100.00	0.00	98.08	0.00	98.54	0.00	99.72	0.00	91.49	0.15	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.600347016
97.64	0.02	99.34	0.03	96.21	0.00	100.00	0.00	98.08	0.00	98.61	0.07	99.72	0.00	91.54	0.05	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1670382409
97.66	0.02	99.34	0.00	96.21	0.00	100.00	0.00	98.08	0.00	98.61	0.00	99.72	0.00	91.69	0.15	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.4079927094
97.68	0.01	99.37	0.03	96.21	0.00	100.00	0.00	98.08	0.00	98.68	0.07	99.72	0.00	91.69	0.00	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1007955660
97.69	0.01	99.41	0.03	96.21	0.00	100.00	0.00	98.08	0.00	98.75	0.07	99.72	0.00	91.69	0.00	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.517156255
97.71	0.01	99.41	0.00	96.21	0.00	100.00	0.00	98.08	0.00	98.75	0.00	99.72	0.00	91.79	0.10	/workspace/coverage/default/11.sysrst_ctrl_stress_all.3468707952
97.72	0.01	99.41	0.00	96.21	0.00	100.00	0.00	98.08	0.00	98.75	0.00	99.72	0.00	91.90	0.10	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2860179910
97.74	0.01	99.41	0.00	96.26	0.05	100.00	0.00	98.08	0.00	98.75	0.00	99.72	0.00	91.95	0.05	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3681843700
97.75	0.01	99.41	0.00	96.28	0.02	100.00	0.00	98.08	0.00	98.75	0.00	99.72	0.00	92.00	0.05	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3387843130
97.76	0.01	99.41	0.00	96.30	0.02	100.00	0.00	98.08	0.00	98.78	0.03	99.72	0.00	92.00	0.00	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3265704511
97.76	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.05	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2494700404
97.77	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.10	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.4248683457
97.78	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.15	0.05	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3351649872
97.79	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.21	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2399679248
97.79	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.26	0.05	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2600759237
97.80	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.31	0.05	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1618457732
97.81	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.36	0.05	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1326955252
97.81	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.41	0.05	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3066826200
97.82	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.46	0.05	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2615489756
97.83	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.51	0.05	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3822963285
97.84	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.56	0.05	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.901899741
97.84	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.62	0.05	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.900063745
97.85	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.67	0.05	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.274190081
97.86	0.01	99.41	0.00	96.30	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.72	0.05	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1336000195
97.87	0.01	99.41	0.00	96.35	0.05	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.72	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2185537366
97.87	0.01	99.41	0.00	96.37	0.02	100.00	0.00	98.08	0.00	98.78	0.00	99.72	0.00	92.72	0.00	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2326843234

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.787171428
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1893632602
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2092304917
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.983079987
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.121742905
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1519030039
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.17723294
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2536760760
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1334937982
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3230033177
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3296999809
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1875523707
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.571864234
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1032801806
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2538666416
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.769330399
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.146023602
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.608812477
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2596388288
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.492906225
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.4279804745
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.18297081
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1439422657
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3647643132
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1685482332
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4034754404
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2766071108
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4159263752
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.639380842
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3767104507
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3261167742
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.936285227
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3955794672
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2759081888
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3237654074
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3764667729
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1930554695
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2608758763
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2835642589
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.728340720
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1428377682
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2106341924
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2369021900
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3214546071
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.665306129
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2891726577
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3296207689
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.899335622
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.4053946353
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1315828231
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3595938274
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3425095347
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3929693882
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1370160848
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2124595952
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/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1321705752
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2983913881
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1735550979
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2077223784
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3391948501
/workspace/coverage/default/4.sysrst_ctrl_smoke.2525671291
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3002867149
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3460524451
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2232508295
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1499921203
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.230833396
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1493375427
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2078875293
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.362328590
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.891421235
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.338245972
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3417725350
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.809594298
/workspace/coverage/default/40.sysrst_ctrl_smoke.1611025573
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2599894833
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3576139465
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3588737578
/workspace/coverage/default/41.sysrst_ctrl_alert_test.518570548
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4142204349
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1083104359
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.14643622
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1516101734
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3707604583
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.574487616
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1699311348
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1511102773
/workspace/coverage/default/41.sysrst_ctrl_smoke.3995681084
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3475918920
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2680688294
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3573010983
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2523467813
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1086112066
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3774018195
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4289251652
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3232058434
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3560450871
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2912605888
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2177888628
/workspace/coverage/default/42.sysrst_ctrl_smoke.502936471
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2072277283
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2459678249
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3860192271
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3414609249
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4293167534
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1029295833
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.4223930601
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.628466336
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.5588975
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3905631096
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3398898264
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2185240105
/workspace/coverage/default/43.sysrst_ctrl_smoke.2375164183
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1308655880
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3228802300
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3767209172
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3998689743
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3919000324
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3107370074
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4151228441
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.599124901
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3637606065
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.988730348
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3547174359
/workspace/coverage/default/44.sysrst_ctrl_smoke.4062474078
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4186828976
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2723283971
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.322199088
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1567646574
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.441813439
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1348613526
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3069066962
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3230890434
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.676721582
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1792895699
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.456558810
/workspace/coverage/default/45.sysrst_ctrl_smoke.418961460
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3998479933
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2571672896
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4052804403
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3454827918
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3833718928
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3964711753
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.868730997
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3550298965
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1424460841
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3306675589
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2257609855
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3971363115
/workspace/coverage/default/46.sysrst_ctrl_smoke.978158980
/workspace/coverage/default/46.sysrst_ctrl_stress_all.887945290
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3369696455
/workspace/coverage/default/47.sysrst_ctrl_alert_test.490217396
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3924655217
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.4005260304
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.4238385583
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.812493288
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.906088899
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1241879605
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1519421605
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3502713076
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.918845617
/workspace/coverage/default/47.sysrst_ctrl_smoke.3559687483
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3192215546
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3154951090
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1900369632
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3750775757
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3366248364
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3336684408
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.237626972
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2819477732
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.779198175
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3881669253
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2031011288
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.936800849
/workspace/coverage/default/48.sysrst_ctrl_smoke.701304505
/workspace/coverage/default/48.sysrst_ctrl_stress_all.748865616
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3668287199
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3987720758
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2556360769
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3947599198
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1116481804
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3002256790
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2570037939
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3927570604
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.248590481
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2164995353
/workspace/coverage/default/49.sysrst_ctrl_smoke.2133156754
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1732193835
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3204662024
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1157250305
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.223939331
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2567510245
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2233720349
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1384100634
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.91011794
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3990063038
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3119721557
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.313165450
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.661305137
/workspace/coverage/default/5.sysrst_ctrl_smoke.23885963
/workspace/coverage/default/5.sysrst_ctrl_stress_all.1135366029
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1166762560
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2271693268
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1180543526
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.970724013
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3550617575
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2827465190
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1915311955
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2143998440
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3670060857
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.514919166
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2073012368
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2076946059
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2072381268
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2990956635
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.4099193999
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2384746906
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.577207774
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.968647378
/workspace/coverage/default/6.sysrst_ctrl_smoke.3663008902
/workspace/coverage/default/6.sysrst_ctrl_stress_all.702761457
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1480577569
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1540963874
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3752424181
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2730230354
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.4174206445
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3113800720
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1539893569
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4031736698
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1424398121
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1780480161
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3447611780
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.830871871
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.529354610
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3207400119
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1531354071
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3650597901
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1921398727
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.616907230
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3030200099
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1232884418
/workspace/coverage/default/7.sysrst_ctrl_smoke.222034421
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1384423594
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1453669841
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2753421629
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2926175500
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2146860602
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2901807349
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3840466480
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4097864501
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1389640866
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.732037695
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1906565523
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3447621242
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3194868266
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1258276263
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.289377592
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2120682002
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.48253840
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2567112146
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3856637158
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1483705160
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3443126161
/workspace/coverage/default/8.sysrst_ctrl_smoke.3291380826
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2451344219
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1422697073
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3780810722
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3573939869
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.4260850288
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3113148177
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3898314056
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2649028651
/workspace/coverage/default/9.sysrst_ctrl_alert_test.641872194
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.344635594
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1662757103
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1254341895
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3108734496
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.891710908
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1873970346
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1632867248
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1696717429
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1213112815
/workspace/coverage/default/9.sysrst_ctrl_smoke.1677499541
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1764469968
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2432796452
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1402072594
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2856024207
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2796608816
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2797037321
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3266422997
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2582248066
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1641835383
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1775612328
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1306169627
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2912846545
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2530605303

Total test records in report: 914

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3560586915	Mar 05 01:31:47 PM PST 24	Mar 05 01:33:07 PM PST 24	126122289709 ps
T2	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3183373773	Mar 05 01:31:04 PM PST 24	Mar 05 01:31:10 PM PST 24	2898530792 ps
T3	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.881934018	Mar 05 01:31:09 PM PST 24	Mar 05 01:32:10 PM PST 24	45638845196 ps
T4	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2176122640	Mar 05 01:31:47 PM PST 24	Mar 05 01:40:16 PM PST 24	1351963641271 ps
T22	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3619097818	Mar 05 01:29:03 PM PST 24	Mar 05 01:29:15 PM PST 24	22098436832 ps
T23	/workspace/coverage/default/10.sysrst_ctrl_smoke.754632159	Mar 05 01:29:33 PM PST 24	Mar 05 01:29:37 PM PST 24	2124261138 ps
T5	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3464968074	Mar 05 01:30:18 PM PST 24	Mar 05 01:31:27 PM PST 24	103108917568 ps
T24	/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1641835383	Mar 05 01:31:57 PM PST 24	Mar 05 01:32:41 PM PST 24	93661545550 ps
T25	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4052804403	Mar 05 01:31:32 PM PST 24	Mar 05 01:31:35 PM PST 24	4229774072 ps
T26	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.135799157	Mar 05 01:29:41 PM PST 24	Mar 05 01:30:50 PM PST 24	26332184580 ps
T27	/workspace/coverage/default/19.sysrst_ctrl_alert_test.3458709301	Mar 05 01:30:07 PM PST 24	Mar 05 01:30:08 PM PST 24	2161919876 ps
T6	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1524640430	Mar 05 01:30:53 PM PST 24	Mar 05 01:31:56 PM PST 24	104340883765 ps
T28	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.779873590	Mar 05 01:29:12 PM PST 24	Mar 05 01:29:19 PM PST 24	2347787208 ps
T7	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.739759350	Mar 05 01:30:57 PM PST 24	Mar 05 01:35:31 PM PST 24	105790386294 ps
T8	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3188007117	Mar 05 01:29:37 PM PST 24	Mar 05 01:34:59 PM PST 24	113606328482 ps
T251	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2539667480	Mar 05 01:31:09 PM PST 24	Mar 05 01:31:12 PM PST 24	2038503557 ps
T35	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1638891754	Mar 05 01:29:43 PM PST 24	Mar 05 01:29:46 PM PST 24	2492542333 ps
T9	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3588737578	Mar 05 01:31:17 PM PST 24	Mar 05 01:31:20 PM PST 24	13035293370 ps
T125	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3519589688	Mar 05 01:29:53 PM PST 24	Mar 05 01:29:57 PM PST 24	4296303188 ps
T39	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3265704511	Mar 05 01:31:02 PM PST 24	Mar 05 01:32:31 PM PST 24	35856812681 ps
T10	/workspace/coverage/default/11.sysrst_ctrl_stress_all.3468707952	Mar 05 01:29:39 PM PST 24	Mar 05 01:30:44 PM PST 24	103256397626 ps
T126	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1421665371	Mar 05 01:30:00 PM PST 24	Mar 05 01:30:03 PM PST 24	2118223874 ps
T11	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.1620236443	Mar 05 01:30:54 PM PST 24	Mar 05 01:31:04 PM PST 24	4160597907 ps
T127	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.919374828	Mar 05 01:30:58 PM PST 24	Mar 05 01:31:11 PM PST 24	4559281883 ps
T129	/workspace/coverage/default/42.sysrst_ctrl_alert_test.2680688294	Mar 05 01:31:32 PM PST 24	Mar 05 01:31:35 PM PST 24	2024356130 ps
T130	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.14643622	Mar 05 01:31:21 PM PST 24	Mar 05 01:31:24 PM PST 24	3773970480 ps
T12	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1010884501	Mar 05 01:30:08 PM PST 24	Mar 05 01:31:04 PM PST 24	74691133686 ps
T13	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1775612328	Mar 05 01:31:55 PM PST 24	Mar 05 01:36:55 PM PST 24	121365083968 ps
T14	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2019070890	Mar 05 01:30:12 PM PST 24	Mar 05 01:30:13 PM PST 24	6269016472 ps
T128	/workspace/coverage/default/40.sysrst_ctrl_smoke.1611025573	Mar 05 01:31:18 PM PST 24	Mar 05 01:31:25 PM PST 24	2108408164 ps
T52	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.822542515	Mar 05 01:31:02 PM PST 24	Mar 05 01:31:05 PM PST 24	11134714229 ps
T97	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2698995985	Mar 05 01:31:01 PM PST 24	Mar 05 01:31:30 PM PST 24	141856710286 ps
T82	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2130192845	Mar 05 01:30:31 PM PST 24	Mar 05 01:31:28 PM PST 24	103074645233 ps
T40	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2358229085	Mar 05 01:30:17 PM PST 24	Mar 05 01:30:25 PM PST 24	2609975501 ps
T15	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3550298965	Mar 05 01:31:32 PM PST 24	Mar 05 01:56:31 PM PST 24	1136600921085 ps
T237	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3846574819	Mar 05 01:29:34 PM PST 24	Mar 05 01:29:41 PM PST 24	2063994078 ps
T238	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1840661023	Mar 05 01:29:42 PM PST 24	Mar 05 01:29:44 PM PST 24	2242716628 ps
T124	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.2485029373	Mar 05 01:30:16 PM PST 24	Mar 05 01:35:57 PM PST 24	126754081553 ps
T65	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1109446638	Mar 05 01:30:37 PM PST 24	Mar 05 01:30:41 PM PST 24	2513960266 ps
T239	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.3041273710	Mar 05 01:30:53 PM PST 24	Mar 05 01:31:00 PM PST 24	2142778480 ps
T71	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3107370074	Mar 05 01:31:25 PM PST 24	Mar 05 01:31:42 PM PST 24	24099449725 ps
T72	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.343914588	Mar 05 01:30:45 PM PST 24	Mar 05 01:31:11 PM PST 24	38582172444 ps
T41	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3750775757	Mar 05 01:31:40 PM PST 24	Mar 05 01:31:45 PM PST 24	3174559104 ps
T60	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.1594358801	Mar 05 01:29:36 PM PST 24	Mar 05 01:29:37 PM PST 24	2525370280 ps
T53	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3786404384	Mar 05 01:30:17 PM PST 24	Mar 05 01:30:21 PM PST 24	5086038059 ps
T42	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.448539214	Mar 05 01:28:57 PM PST 24	Mar 05 01:30:05 PM PST 24	54425515375 ps
T66	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2740452209	Mar 05 01:30:55 PM PST 24	Mar 05 01:30:57 PM PST 24	2631654168 ps
T45	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3924655217	Mar 05 01:31:44 PM PST 24	Mar 05 01:31:46 PM PST 24	3308349274 ps
T16	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1516101734	Mar 05 01:31:17 PM PST 24	Mar 05 01:31:18 PM PST 24	3505821913 ps
T46	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.941362677	Mar 05 01:28:55 PM PST 24	Mar 05 01:29:05 PM PST 24	3448154895 ps
T99	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2621740117	Mar 05 01:30:02 PM PST 24	Mar 05 01:30:09 PM PST 24	2113699764 ps
T17	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.868507232	Mar 05 01:31:32 PM PST 24	Mar 05 01:31:34 PM PST 24	2369072288 ps
T67	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1686513933	Mar 05 01:30:09 PM PST 24	Mar 05 01:30:17 PM PST 24	2608509644 ps
T18	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3650597901	Mar 05 01:29:28 PM PST 24	Mar 05 01:29:37 PM PST 24	3104714189 ps
T100	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3391948501	Mar 05 01:29:24 PM PST 24	Mar 05 01:29:34 PM PST 24	22124057472 ps
T58	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3515255356	Mar 05 01:31:47 PM PST 24	Mar 05 01:35:29 PM PST 24	87650851162 ps
T19	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.552407115	Mar 05 01:30:19 PM PST 24	Mar 05 01:30:26 PM PST 24	2367402672 ps
T68	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1207323675	Mar 05 01:29:04 PM PST 24	Mar 05 01:29:11 PM PST 24	2509100248 ps
T77	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.652245654	Mar 05 01:30:44 PM PST 24	Mar 05 01:31:36 PM PST 24	39251621963 ps
T193	/workspace/coverage/default/16.sysrst_ctrl_smoke.2329303246	Mar 05 01:29:59 PM PST 24	Mar 05 01:30:06 PM PST 24	2108923054 ps
T69	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3755605828	Mar 05 01:30:01 PM PST 24	Mar 05 01:30:05 PM PST 24	2536847051 ps
T240	/workspace/coverage/default/48.sysrst_ctrl_smoke.701304505	Mar 05 01:31:46 PM PST 24	Mar 05 01:31:53 PM PST 24	2113851095 ps
T241	/workspace/coverage/default/32.sysrst_ctrl_alert_test.1186987253	Mar 05 01:30:52 PM PST 24	Mar 05 01:30:54 PM PST 24	2035910672 ps
T70	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2020482930	Mar 05 01:30:11 PM PST 24	Mar 05 01:30:19 PM PST 24	2512677143 ps
T372	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1696717429	Mar 05 01:29:28 PM PST 24	Mar 05 01:29:30 PM PST 24	2229208768 ps
T369	/workspace/coverage/default/5.sysrst_ctrl_stress_all.1135366029	Mar 05 01:29:19 PM PST 24	Mar 05 01:29:25 PM PST 24	9830838014 ps
T373	/workspace/coverage/default/29.sysrst_ctrl_stress_all.2335986922	Mar 05 01:30:45 PM PST 24	Mar 05 01:31:10 PM PST 24	10485947942 ps
T47	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.4202158290	Mar 05 01:29:06 PM PST 24	Mar 05 01:29:15 PM PST 24	3391940171 ps
T374	/workspace/coverage/default/41.sysrst_ctrl_alert_test.518570548	Mar 05 01:31:23 PM PST 24	Mar 05 01:31:25 PM PST 24	2036404629 ps
T61	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.338245972	Mar 05 01:31:17 PM PST 24	Mar 05 01:31:20 PM PST 24	2476319578 ps
T331	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.619754280	Mar 05 01:31:04 PM PST 24	Mar 05 01:36:26 PM PST 24	118190554794 ps
T375	/workspace/coverage/default/30.sysrst_ctrl_smoke.417306298	Mar 05 01:30:48 PM PST 24	Mar 05 01:30:50 PM PST 24	2136919919 ps
T62	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2071660811	Mar 05 01:30:19 PM PST 24	Mar 05 01:30:26 PM PST 24	2456194686 ps
T376	/workspace/coverage/default/21.sysrst_ctrl_smoke.4194847040	Mar 05 01:30:22 PM PST 24	Mar 05 01:30:28 PM PST 24	2109605395 ps
T73	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3508076646	Mar 05 01:31:47 PM PST 24	Mar 05 01:39:40 PM PST 24	195412727190 ps
T20	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.91011794	Mar 05 01:29:21 PM PST 24	Mar 05 01:29:27 PM PST 24	2709113249 ps
T301	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2077223784	Mar 05 01:29:12 PM PST 24	Mar 05 01:29:19 PM PST 24	2514174115 ps
T74	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2530605303	Mar 05 01:31:56 PM PST 24	Mar 05 01:34:27 PM PST 24	57708369265 ps
T252	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1389640866	Mar 05 01:31:50 PM PST 24	Mar 05 01:38:19 PM PST 24	146904499534 ps
T48	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.796656637	Mar 05 01:30:53 PM PST 24	Mar 05 01:31:03 PM PST 24	3215616154 ps
T377	/workspace/coverage/default/1.sysrst_ctrl_alert_test.1533575401	Mar 05 01:29:00 PM PST 24	Mar 05 01:29:02 PM PST 24	2042354742 ps
T332	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1563973248	Mar 05 01:29:43 PM PST 24	Mar 05 01:34:56 PM PST 24	123761900699 ps
T253	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1396198450	Mar 05 01:30:43 PM PST 24	Mar 05 01:35:12 PM PST 24	108168930365 ps
T254	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2730230354	Mar 05 01:31:48 PM PST 24	Mar 05 01:34:02 PM PST 24	67223413454 ps
T49	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4142204349	Mar 05 01:31:19 PM PST 24	Mar 05 01:31:22 PM PST 24	3520677520 ps
T50	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2183855351	Mar 05 01:29:38 PM PST 24	Mar 05 01:33:15 PM PST 24	86246190440 ps
T378	/workspace/coverage/default/38.sysrst_ctrl_alert_test.2559558881	Mar 05 01:31:15 PM PST 24	Mar 05 01:31:18 PM PST 24	2036546135 ps
T379	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2083593248	Mar 05 01:30:58 PM PST 24	Mar 05 01:31:00 PM PST 24	2670225396 ps
T380	/workspace/coverage/default/10.sysrst_ctrl_alert_test.263364169	Mar 05 01:29:34 PM PST 24	Mar 05 01:29:36 PM PST 24	2045337988 ps
T255	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1780480161	Mar 05 01:31:47 PM PST 24	Mar 05 01:33:26 PM PST 24	41120101839 ps
T101	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2797037321	Mar 05 01:31:56 PM PST 24	Mar 05 01:34:52 PM PST 24	61834463213 ps
T102	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.600347016	Mar 05 01:31:47 PM PST 24	Mar 05 01:32:56 PM PST 24	101094578266 ps
T54	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1540963874	Mar 05 01:29:18 PM PST 24	Mar 05 01:29:20 PM PST 24	4979942620 ps
T381	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.271584233	Mar 05 01:29:15 PM PST 24	Mar 05 01:29:18 PM PST 24	3509528248 ps
T298	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4092759906	Mar 05 01:31:02 PM PST 24	Mar 05 01:31:16 PM PST 24	5278783943 ps
T382	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1815411370	Mar 05 01:30:11 PM PST 24	Mar 05 01:30:15 PM PST 24	4618004433 ps
T83	/workspace/coverage/default/22.sysrst_ctrl_stress_all.3692659355	Mar 05 01:30:18 PM PST 24	Mar 05 01:31:14 PM PST 24	78340876966 ps
T87	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3004640219	Mar 05 01:30:44 PM PST 24	Mar 05 01:36:42 PM PST 24	146780941508 ps
T262	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1524686446	Mar 05 01:29:11 PM PST 24	Mar 05 01:29:12 PM PST 24	5087075312 ps
T103	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2912846545	Mar 05 01:31:54 PM PST 24	Mar 05 01:32:32 PM PST 24	27087768791 ps
T263	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.407738614	Mar 05 01:29:35 PM PST 24	Mar 05 01:29:43 PM PST 24	2511915493 ps
T21	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2649593897	Mar 05 01:31:10 PM PST 24	Mar 05 01:31:16 PM PST 24	2813314231 ps
T63	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1656205521	Mar 05 01:31:15 PM PST 24	Mar 05 01:31:22 PM PST 24	2454849312 ps
T264	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1326955252	Mar 05 01:31:02 PM PST 24	Mar 05 01:32:46 PM PST 24	42983910967 ps
T44	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2990956635	Mar 05 01:29:21 PM PST 24	Mar 05 01:29:24 PM PST 24	2879894503 ps
T265	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1204015082	Mar 05 01:30:58 PM PST 24	Mar 05 01:40:39 PM PST 24	800033433924 ps
T383	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1241879605	Mar 05 01:31:43 PM PST 24	Mar 05 01:31:48 PM PST 24	2611832343 ps
T256	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2399679248	Mar 05 01:30:19 PM PST 24	Mar 05 01:30:58 PM PST 24	180237643162 ps
T384	/workspace/coverage/default/0.sysrst_ctrl_stress_all.3369924384	Mar 05 01:28:56 PM PST 24	Mar 05 01:29:00 PM PST 24	18989249392 ps
T51	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.525339196	Mar 05 01:30:03 PM PST 24	Mar 05 01:30:15 PM PST 24	3434684988 ps
T370	/workspace/coverage/default/28.sysrst_ctrl_stress_all.2948401834	Mar 05 01:30:48 PM PST 24	Mar 05 01:31:08 PM PST 24	7122274720 ps
T385	/workspace/coverage/default/13.sysrst_ctrl_alert_test.938314045	Mar 05 01:29:51 PM PST 24	Mar 05 01:29:53 PM PST 24	2040851037 ps
T386	/workspace/coverage/default/29.sysrst_ctrl_alert_test.3406973922	Mar 05 01:30:46 PM PST 24	Mar 05 01:30:49 PM PST 24	2020108415 ps
T98	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.223939331	Mar 05 01:29:18 PM PST 24	Mar 05 01:29:22 PM PST 24	4151440109 ps
T249	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1146636976	Mar 05 01:31:15 PM PST 24	Mar 05 01:31:44 PM PST 24	26346010989 ps
T302	/workspace/coverage/default/42.sysrst_ctrl_stress_all.2072277283	Mar 05 01:31:24 PM PST 24	Mar 05 01:38:21 PM PST 24	1299152533066 ps
T371	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3441892288	Mar 05 01:31:12 PM PST 24	Mar 05 01:31:15 PM PST 24	2528122413 ps
T258	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1479136327	Mar 05 01:30:55 PM PST 24	Mar 05 01:31:56 PM PST 24	89561668348 ps
T250	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1644116847	Mar 05 01:29:51 PM PST 24	Mar 05 01:30:36 PM PST 24	66388351981 ps
T387	/workspace/coverage/default/2.sysrst_ctrl_smoke.1264845431	Mar 05 01:29:03 PM PST 24	Mar 05 01:29:05 PM PST 24	2124984324 ps
T29	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.4098546110	Mar 05 01:29:02 PM PST 24	Mar 05 01:31:33 PM PST 24	63887923036 ps
T215	/workspace/coverage/default/39.sysrst_ctrl_alert_test.508773598	Mar 05 01:31:20 PM PST 24	Mar 05 01:31:22 PM PST 24	2026635076 ps
T216	/workspace/coverage/default/14.sysrst_ctrl_stress_all.3305742041	Mar 05 01:29:53 PM PST 24	Mar 05 01:30:01 PM PST 24	11831100390 ps
T217	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2962016637	Mar 05 01:30:34 PM PST 24	Mar 05 01:33:56 PM PST 24	322707829656 ps
T218	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2854166225	Mar 05 01:30:11 PM PST 24	Mar 05 01:30:13 PM PST 24	2638552353 ps
T219	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1384423594	Mar 05 01:29:34 PM PST 24	Mar 05 01:29:51 PM PST 24	12217688300 ps
T220	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1239360896	Mar 05 01:29:13 PM PST 24	Mar 05 01:29:22 PM PST 24	3394162024 ps
T64	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1519421605	Mar 05 01:31:44 PM PST 24	Mar 05 01:31:50 PM PST 24	2463460841 ps
T59	/workspace/coverage/default/44.sysrst_ctrl_stress_all.4186828976	Mar 05 01:31:29 PM PST 24	Mar 05 01:39:50 PM PST 24	2135015992807 ps
T55	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.600304567	Mar 05 01:30:53 PM PST 24	Mar 05 01:30:55 PM PST 24	5747521970 ps
T139	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3806027788	Mar 05 01:29:03 PM PST 24	Mar 05 01:33:17 PM PST 24	99324278039 ps
T140	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1127454797	Mar 05 01:30:09 PM PST 24	Mar 05 01:30:11 PM PST 24	3591787563 ps
T141	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.900063745	Mar 05 01:31:52 PM PST 24	Mar 05 01:32:18 PM PST 24	37283747093 ps
T142	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.780378018	Mar 05 01:31:04 PM PST 24	Mar 05 01:31:12 PM PST 24	2613421003 ps
T143	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1341934813	Mar 05 01:30:15 PM PST 24	Mar 05 01:30:18 PM PST 24	3508367300 ps
T144	/workspace/coverage/default/37.sysrst_ctrl_stress_all.1393629384	Mar 05 01:31:09 PM PST 24	Mar 05 01:31:14 PM PST 24	6768926764 ps
T56	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.321833583	Mar 05 01:29:08 PM PST 24	Mar 05 01:30:14 PM PST 24	32019393722 ps
T145	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1518783464	Mar 05 01:31:04 PM PST 24	Mar 05 01:31:12 PM PST 24	2449690040 ps
T30	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2946775915	Mar 05 01:30:56 PM PST 24	Mar 05 01:31:00 PM PST 24	2931916932 ps
T388	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1445417018	Mar 05 01:30:45 PM PST 24	Mar 05 01:30:47 PM PST 24	2140779029 ps
T31	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.968124988	Mar 05 01:29:51 PM PST 24	Mar 05 01:31:27 PM PST 24	126169523465 ps
T84	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1018676505	Mar 05 01:29:34 PM PST 24	Mar 05 01:29:43 PM PST 24	3095388068 ps
T175	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2565315946	Mar 05 01:30:18 PM PST 24	Mar 05 01:30:27 PM PST 24	3088601302 ps
T176	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1116481804	Mar 05 01:31:43 PM PST 24	Mar 05 01:31:47 PM PST 24	5592908726 ps
T177	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.5588975	Mar 05 01:31:26 PM PST 24	Mar 05 01:31:34 PM PST 24	2611299837 ps
T43	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2432796452	Mar 05 01:29:38 PM PST 24	Mar 05 01:29:51 PM PST 24	30014490458 ps
T178	/workspace/coverage/default/28.sysrst_ctrl_alert_test.1827988324	Mar 05 01:30:42 PM PST 24	Mar 05 01:30:44 PM PST 24	2029426353 ps
T179	/workspace/coverage/default/5.sysrst_ctrl_alert_test.1157250305	Mar 05 01:29:20 PM PST 24	Mar 05 01:29:22 PM PST 24	2033270476 ps
T32	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.986729505	Mar 05 01:30:30 PM PST 24	Mar 05 01:31:53 PM PST 24	1107827994925 ps
T180	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2914282404	Mar 05 01:30:11 PM PST 24	Mar 05 01:33:40 PM PST 24	81490817810 ps
T155	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.225432715	Mar 05 01:30:28 PM PST 24	Mar 05 01:30:32 PM PST 24	5881858922 ps
T273	/workspace/coverage/default/33.sysrst_ctrl_alert_test.3240115703	Mar 05 01:30:52 PM PST 24	Mar 05 01:30:56 PM PST 24	2022220274 ps
T274	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2164995353	Mar 05 01:31:42 PM PST 24	Mar 05 01:31:51 PM PST 24	2514012897 ps
T275	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1950857127	Mar 05 01:30:10 PM PST 24	Mar 05 01:30:12 PM PST 24	2128728806 ps
T276	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2581892540	Mar 05 01:29:52 PM PST 24	Mar 05 01:29:55 PM PST 24	3459678786 ps
T90	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2503179672	Mar 05 01:30:42 PM PST 24	Mar 05 01:30:54 PM PST 24	4931192993 ps
T196	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2120682002	Mar 05 01:29:26 PM PST 24	Mar 05 01:29:32 PM PST 24	3522676734 ps
T197	/workspace/coverage/default/6.sysrst_ctrl_smoke.3663008902	Mar 05 01:29:20 PM PST 24	Mar 05 01:29:22 PM PST 24	2139823206 ps
T198	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.4059404436	Mar 05 01:30:15 PM PST 24	Mar 05 01:32:29 PM PST 24	192689258727 ps
T91	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1670382409	Mar 05 01:29:56 PM PST 24	Mar 05 01:30:25 PM PST 24	60502359149 ps
T199	/workspace/coverage/default/31.sysrst_ctrl_alert_test.2967771491	Mar 05 01:31:01 PM PST 24	Mar 05 01:31:03 PM PST 24	2047226582 ps
T200	/workspace/coverage/default/4.sysrst_ctrl_alert_test.923390617	Mar 05 01:29:24 PM PST 24	Mar 05 01:29:30 PM PST 24	2013026558 ps
T201	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1854294354	Mar 05 01:30:13 PM PST 24	Mar 05 01:30:34 PM PST 24	84475656937 ps
T202	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.988730348	Mar 05 01:31:32 PM PST 24	Mar 05 01:31:34 PM PST 24	2277583095 ps
T203	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1805924610	Mar 05 01:30:18 PM PST 24	Mar 05 01:30:20 PM PST 24	2099949023 ps
T233	/workspace/coverage/default/4.sysrst_ctrl_stress_all.3002867149	Mar 05 01:29:22 PM PST 24	Mar 05 01:29:36 PM PST 24	10323337462 ps
T234	/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.475322694	Mar 05 01:29:11 PM PST 24	Mar 05 01:29:13 PM PST 24	2649529871 ps
T235	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1876775593	Mar 05 01:30:02 PM PST 24	Mar 05 01:30:05 PM PST 24	2548450141 ps
T236	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.230833396	Mar 05 01:31:17 PM PST 24	Mar 05 01:34:26 PM PST 24	74047609036 ps
T389	/workspace/coverage/default/18.sysrst_ctrl_smoke.3853789073	Mar 05 01:30:01 PM PST 24	Mar 05 01:30:08 PM PST 24	2111345044 ps
T390	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3574422821	Mar 05 01:29:04 PM PST 24	Mar 05 01:29:11 PM PST 24	2610243183 ps
T391	/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3029702950	Mar 05 01:31:04 PM PST 24	Mar 05 01:31:11 PM PST 24	2475886976 ps
T334	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1692726050	Mar 05 01:31:36 PM PST 24	Mar 05 01:36:10 PM PST 24	109862618137 ps
T392	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1483705160	Mar 05 01:29:29 PM PST 24	Mar 05 01:29:32 PM PST 24	2211260670 ps
T393	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2673286657	Mar 05 01:29:14 PM PST 24	Mar 05 01:29:16 PM PST 24	2378755935 ps
T394	/workspace/coverage/default/22.sysrst_ctrl_smoke.2695900732	Mar 05 01:30:18 PM PST 24	Mar 05 01:30:24 PM PST 24	2112158006 ps
T33	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3066826200	Mar 05 01:31:01 PM PST 24	Mar 05 01:36:14 PM PST 24	5658235347192 ps
T395	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3415579288	Mar 05 01:28:56 PM PST 24	Mar 05 01:29:04 PM PST 24	2508840631 ps
T396	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1691678365	Mar 05 01:30:56 PM PST 24	Mar 05 01:30:58 PM PST 24	2131652384 ps
T259	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1539893569	Mar 05 01:31:48 PM PST 24	Mar 05 01:32:26 PM PST 24	28086204981 ps
T397	/workspace/coverage/default/8.sysrst_ctrl_alert_test.3447621242	Mar 05 01:29:35 PM PST 24	Mar 05 01:29:41 PM PST 24	2014839068 ps
T398	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1704505608	Mar 05 01:30:10 PM PST 24	Mar 05 01:30:14 PM PST 24	5118484545 ps
T399	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.418692494	Mar 05 01:30:48 PM PST 24	Mar 05 01:30:55 PM PST 24	2514900708 ps
T400	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3113800720	Mar 05 01:31:51 PM PST 24	Mar 05 01:35:22 PM PST 24	85150118113 ps
T156	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.2673447457	Mar 05 01:30:44 PM PST 24	Mar 05 01:30:49 PM PST 24	4004921794 ps
T401	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1630432273	Mar 05 01:30:29 PM PST 24	Mar 05 01:30:38 PM PST 24	3518234180 ps
T402	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.692381928	Mar 05 01:30:45 PM PST 24	Mar 05 01:30:56 PM PST 24	3676831014 ps
T353	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2494700404	Mar 05 01:29:06 PM PST 24	Mar 05 01:31:08 PM PST 24	47759991295 ps
T403	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3774018195	Mar 05 01:31:25 PM PST 24	Mar 05 01:31:31 PM PST 24	2862156645 ps
T404	/workspace/coverage/default/48.sysrst_ctrl_alert_test.1900369632	Mar 05 01:31:44 PM PST 24	Mar 05 01:31:47 PM PST 24	2038726811 ps
T303	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.563836150	Mar 05 01:29:43 PM PST 24	Mar 05 01:29:47 PM PST 24	2523050116 ps
T34	/workspace/coverage/default/3.sysrst_ctrl_stress_all.121443282	Mar 05 01:29:15 PM PST 24	Mar 05 01:29:19 PM PST 24	10600539246 ps
T405	/workspace/coverage/default/8.sysrst_ctrl_smoke.3291380826	Mar 05 01:29:28 PM PST 24	Mar 05 01:29:29 PM PST 24	2141025416 ps
T406	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1632867248	Mar 05 01:29:27 PM PST 24	Mar 05 01:29:31 PM PST 24	2455242026 ps
T407	/workspace/coverage/default/3.sysrst_ctrl_alert_test.190301853	Mar 05 01:29:11 PM PST 24	Mar 05 01:29:17 PM PST 24	2013386896 ps
T408	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.779198175	Mar 05 01:31:44 PM PST 24	Mar 05 01:31:47 PM PST 24	2637907148 ps
T409	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1776735642	Mar 05 01:30:27 PM PST 24	Mar 05 01:30:37 PM PST 24	3409942899 ps
T131	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3369696455	Mar 05 01:31:34 PM PST 24	Mar 05 01:32:23 PM PST 24	24423001669 ps
T132	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1161064873	Mar 05 01:29:35 PM PST 24	Mar 05 01:30:05 PM PST 24	72405673995 ps
T173	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.628466336	Mar 05 01:31:27 PM PST 24	Mar 05 01:31:30 PM PST 24	2814164622 ps
T85	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3166929972	Mar 05 01:30:08 PM PST 24	Mar 05 01:30:13 PM PST 24	4534795328 ps
T158	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3658391601	Mar 05 01:29:42 PM PST 24	Mar 05 01:29:52 PM PST 24	3591114068 ps
T159	/workspace/coverage/default/0.sysrst_ctrl_alert_test.733711583	Mar 05 01:29:05 PM PST 24	Mar 05 01:29:07 PM PST 24	2031210511 ps
T160	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2625403049	Mar 05 01:30:02 PM PST 24	Mar 05 01:31:23 PM PST 24	56139642076 ps
T161	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3643331970	Mar 05 01:30:00 PM PST 24	Mar 05 01:43:25 PM PST 24	316262715829 ps
T162	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1792895699	Mar 05 01:31:25 PM PST 24	Mar 05 01:31:28 PM PST 24	2092455865 ps
T163	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4151228441	Mar 05 01:31:22 PM PST 24	Mar 05 01:31:27 PM PST 24	4661804982 ps
T164	/workspace/coverage/default/44.sysrst_ctrl_alert_test.3998689743	Mar 05 01:31:24 PM PST 24	Mar 05 01:31:30 PM PST 24	2010736179 ps
T165	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3414609249	Mar 05 01:31:24 PM PST 24	Mar 05 01:31:35 PM PST 24	3880922148 ps
T166	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3171319247	Mar 05 01:30:02 PM PST 24	Mar 05 01:32:22 PM PST 24	55069597824 ps
T359	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2523467813	Mar 05 01:31:23 PM PST 24	Mar 05 01:38:47 PM PST 24	171368362975 ps
T248	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3550617575	Mar 05 01:31:51 PM PST 24	Mar 05 01:32:24 PM PST 24	24339631194 ps
T157	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2031319064	Mar 05 01:30:08 PM PST 24	Mar 05 01:33:22 PM PST 24	409763332271 ps
T410	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3306675589	Mar 05 01:31:33 PM PST 24	Mar 05 01:31:41 PM PST 24	2455155933 ps
T354	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2076946059	Mar 05 01:29:20 PM PST 24	Mar 05 01:30:54 PM PST 24	136743653846 ps
T411	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2983913881	Mar 05 01:29:11 PM PST 24	Mar 05 01:29:17 PM PST 24	2463623110 ps
T412	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.456558810	Mar 05 01:31:32 PM PST 24	Mar 05 01:31:35 PM PST 24	2529586074 ps
T413	/workspace/coverage/default/28.sysrst_ctrl_smoke.4202107349	Mar 05 01:30:38 PM PST 24	Mar 05 01:30:45 PM PST 24	2109267934 ps
T414	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3858017203	Mar 05 01:30:39 PM PST 24	Mar 05 01:30:42 PM PST 24	3798389305 ps
T134	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3198686424	Mar 05 01:29:51 PM PST 24	Mar 05 01:30:14 PM PST 24	8442204060 ps
T415	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3116696389	Mar 05 01:30:02 PM PST 24	Mar 05 01:30:30 PM PST 24	38652484593 ps
T349	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2796608816	Mar 05 01:31:55 PM PST 24	Mar 05 01:33:51 PM PST 24	172690091535 ps
T416	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4065481249	Mar 05 01:29:07 PM PST 24	Mar 05 01:29:14 PM PST 24	2498377744 ps
T80	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3132050359	Mar 05 01:28:53 PM PST 24	Mar 05 01:30:49 PM PST 24	44113719591 ps
T417	/workspace/coverage/default/4.sysrst_ctrl_smoke.2525671291	Mar 05 01:29:15 PM PST 24	Mar 05 01:29:21 PM PST 24	2110164215 ps
T342	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.709531112	Mar 05 01:31:46 PM PST 24	Mar 05 01:38:23 PM PST 24	145352433745 ps
T418	/workspace/coverage/default/45.sysrst_ctrl_alert_test.1567646574	Mar 05 01:31:35 PM PST 24	Mar 05 01:31:38 PM PST 24	2015570913 ps
T86	/workspace/coverage/default/26.sysrst_ctrl_stress_all.518335162	Mar 05 01:30:36 PM PST 24	Mar 05 01:30:48 PM PST 24	11377407470 ps
T115	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.299820313	Mar 05 01:30:29 PM PST 24	Mar 05 01:30:32 PM PST 24	2624226557 ps
T116	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1159541734	Mar 05 01:31:34 PM PST 24	Mar 05 01:32:41 PM PST 24	99403296254 ps
T117	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1362756713	Mar 05 01:31:19 PM PST 24	Mar 05 01:32:22 PM PST 24	25832045024 ps
T118	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1449454738	Mar 05 01:29:34 PM PST 24	Mar 05 01:29:42 PM PST 24	2508589058 ps
T119	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2539673311	Mar 05 01:30:01 PM PST 24	Mar 05 01:30:09 PM PST 24	3969607217 ps
T120	/workspace/coverage/default/42.sysrst_ctrl_smoke.502936471	Mar 05 01:31:23 PM PST 24	Mar 05 01:31:25 PM PST 24	2178859914 ps
T121	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1428965744	Mar 05 01:30:00 PM PST 24	Mar 05 01:31:14 PM PST 24	101950085208 ps
T122	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3112160298	Mar 05 01:30:19 PM PST 24	Mar 05 01:30:23 PM PST 24	2620016371 ps
T123	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.318438296	Mar 05 01:29:16 PM PST 24	Mar 05 01:29:18 PM PST 24	2538714686 ps
T419	/workspace/coverage/default/25.sysrst_ctrl_smoke.798511300	Mar 05 01:30:28 PM PST 24	Mar 05 01:30:30 PM PST 24	2139135188 ps
T420	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1595431263	Mar 05 01:30:44 PM PST 24	Mar 05 01:30:45 PM PST 24	5148606945 ps
T297	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1183769639	Mar 05 01:30:45 PM PST 24	Mar 05 01:31:20 PM PST 24	13416675244 ps
T360	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2842016648	Mar 05 01:29:45 PM PST 24	Mar 05 01:31:51 PM PST 24	50439130498 ps
T333	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.4044337401	Mar 05 01:31:16 PM PST 24	Mar 05 01:32:09 PM PST 24	96538458349 ps
T104	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1540732322	Mar 05 01:30:44 PM PST 24	Mar 05 01:31:19 PM PST 24	104602473424 ps
T213	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1764469968	Mar 05 01:29:38 PM PST 24	Mar 05 01:29:47 PM PST 24	13023389046 ps
T421	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1873970346	Mar 05 01:29:26 PM PST 24	Mar 05 01:29:31 PM PST 24	2617924472 ps
T422	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2713235132	Mar 05 01:31:10 PM PST 24	Mar 05 01:31:23 PM PST 24	4853545692 ps
T423	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.673688824	Mar 05 01:29:11 PM PST 24	Mar 05 01:29:14 PM PST 24	3381683166 ps
T424	/workspace/coverage/default/23.sysrst_ctrl_stress_all.2351776318	Mar 05 01:30:27 PM PST 24	Mar 05 01:33:53 PM PST 24	102058056222 ps
T425	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1738318107	Mar 05 01:30:22 PM PST 24	Mar 05 01:30:29 PM PST 24	2465378887 ps
T426	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1574483031	Mar 05 01:29:52 PM PST 24	Mar 05 01:29:56 PM PST 24	2469558730 ps