Assertions
dashboard | hierarchy | modlist | groups | tests | asserts
Assertions by Category
ASSERTPROPERTIESSEQUENCES
Total1058010
Category 01058010

Assertions by Severity
ASSERTPROPERTIESSEQUENCES
Total1058010
Severity 01058010

Summary for Assertions
NUMBERPERCENT
Total Number1058100.00
Uncovered50.47
Success105399.53
Failure00.00
Incomplete40.38
Without Attempts00.00

Summary for Cover Sequences
NUMBERPERCENT
Total Number10100.00
Uncovered00.00
All Matches10100.00
First Matches10100.00
Go previous page
ASSERTIONSCATEGORYSEVERITYATTEMPTSREAL SUCCESSESFAILURESINCOMPLETE
tb.dut.tlul_assert_device.gen_assert_final[91].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[92].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[93].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[94].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[95].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[96].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[97].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[98].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[99].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_assert_final[9].noOutstandingReqsAtEndOfSim_A 0091091000
tb.dut.tlul_assert_device.gen_device.aDataKnown_M 001253150645312327600
tb.dut.tlul_assert_device.gen_device.addrSizeAlignedErr_A 001253150054544500
tb.dut.tlul_assert_device.gen_device.contigMask_M 0012531506451245626000
tb.dut.tlul_assert_device.gen_device.dDataKnown_A 00125315064517422100
tb.dut.tlul_assert_device.gen_device.legalAOpcodeErr_A 001253150054593200
tb.dut.tlul_assert_device.gen_device.legalAParam_M 0012531506451500842200
tb.dut.tlul_assert_device.gen_device.legalDParam_A 00125315064558210400
tb.dut.tlul_assert_device.gen_device.pendingReqPerSrc_M 0012531506451500842200
tb.dut.tlul_assert_device.gen_device.respMustHaveReq_A 00125315064558210400
tb.dut.tlul_assert_device.gen_device.respOpcode_A 00125315064558210400
tb.dut.tlul_assert_device.gen_device.respSzEqReqSz_A 00125315064558210400
tb.dut.tlul_assert_device.gen_device.sizeGTEMaskErr_A 001253150054334900
tb.dut.tlul_assert_device.gen_device.sizeMatchesMaskErr_A 001253150054285100
tb.dut.tlul_assert_device.p_dbw.TlDbw_A 0091091000
tb.dut.u_prim_intr_hw.IntrTKind_A 0074574500
tb.dut.u_prim_sync_reqack.SyncReqAckAckNeedsReq 001190893388105400
tb.dut.u_prim_sync_reqack.SyncReqAckHoldReq 007872393104900
tb.dut.u_reg.en2addrHit 00125315005427324100
tb.dut.u_reg.reAfterRv 00125315005427324100
tb.dut.u_reg.rePulse 00125315005414468600
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.BusySrcReqChk_A 001253150054119857000
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcAckBusyChk_A 001253150054144400
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054144400
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556144400
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556140200
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054144800
tb.dut.u_reg.u_auto_block_out_ctl_cdc.BusySrcReqChk_A 001253150054106939200
tb.dut.u_reg.u_auto_block_out_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcAckBusyChk_A 001253150054128700
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054128700
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556128700
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556124200
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054129100
tb.dut.u_reg.u_chk.PayLoadWidthCheck 0091091000
tb.dut.u_reg.u_com_det_ctl_0_cdc.BusySrcReqChk_A 001253150054174591100
tb.dut.u_reg.u_com_det_ctl_0_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcAckBusyChk_A 001253150054199000
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054199000
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556199000
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556194400
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054199400
tb.dut.u_reg.u_com_det_ctl_1_cdc.BusySrcReqChk_A 001253150054169030600
tb.dut.u_reg.u_com_det_ctl_1_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcAckBusyChk_A 001253150054192700
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054192700
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556192700
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556187900
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054193100
tb.dut.u_reg.u_com_det_ctl_2_cdc.BusySrcReqChk_A 001253150054172012100
tb.dut.u_reg.u_com_det_ctl_2_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcAckBusyChk_A 001253150054195100
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054195100
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556195100
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556190400
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054195500
tb.dut.u_reg.u_com_det_ctl_3_cdc.BusySrcReqChk_A 001253150054169533600
tb.dut.u_reg.u_com_det_ctl_3_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcAckBusyChk_A 001253150054194900
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054194900
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556194900
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556190200
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054195300
tb.dut.u_reg.u_com_out_ctl_0_cdc.BusySrcReqChk_A 001253150054177571500
tb.dut.u_reg.u_com_out_ctl_0_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcAckBusyChk_A 001253150054201700
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054201700
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556201700
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556197500
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054202300
tb.dut.u_reg.u_com_out_ctl_1_cdc.BusySrcReqChk_A 001253150054172540700
tb.dut.u_reg.u_com_out_ctl_1_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcAckBusyChk_A 001253150054196700
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054196700
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556196700
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556192200
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054197000
tb.dut.u_reg.u_com_out_ctl_2_cdc.BusySrcReqChk_A 001253150054171544300
tb.dut.u_reg.u_com_out_ctl_2_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcAckBusyChk_A 001253150054195600
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054195600
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556195600
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556190900
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054196000
tb.dut.u_reg.u_com_out_ctl_3_cdc.BusySrcReqChk_A 001253150054167958000
tb.dut.u_reg.u_com_out_ctl_3_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcAckBusyChk_A 001253150054194700
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054194700
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556194700
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556189900
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054195100
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.BusySrcReqChk_A 001253150054123014500
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcAckBusyChk_A 001253150054140500
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054140500
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556140500
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556136200
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054141100
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.BusySrcReqChk_A 001253150054120341600
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcAckBusyChk_A 001253150054136300
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054136300
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556136300
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556131700
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054136700
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.BusySrcReqChk_A 001253150054119440000
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcAckBusyChk_A 001253150054138500
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054138500
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556138500
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556134100
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054139000
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.BusySrcReqChk_A 001253150054121845000
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcAckBusyChk_A 001253150054138600
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054138600
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556138600
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556133800
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054138900
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.BusySrcReqChk_A 001253150054665624600
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcAckBusyChk_A 001253150054707500
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054707500
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556707500
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556702900
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054707900
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.BusySrcReqChk_A 001253150054663121600
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcAckBusyChk_A 001253150054696200
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054696200
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556696200
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556691400
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054696600
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.BusySrcReqChk_A 001253150054655148500
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcAckBusyChk_A 001253150054691700
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054691700
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556691700
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556686700
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054692200
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.BusySrcReqChk_A 001253150054651909400
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcAckBusyChk_A 001253150054692700
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054692700
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556692700
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556687400
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054693100
tb.dut.u_reg.u_com_sel_ctl_0_cdc.BusySrcReqChk_A 001253150054720517400
tb.dut.u_reg.u_com_sel_ctl_0_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcAckBusyChk_A 001253150054765300
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054765300
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556765300
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556760500
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054765800
tb.dut.u_reg.u_com_sel_ctl_1_cdc.BusySrcReqChk_A 001253150054713025200
tb.dut.u_reg.u_com_sel_ctl_1_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcAckBusyChk_A 001253150054748800
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054748800
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556748800
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556743800
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054749300
tb.dut.u_reg.u_com_sel_ctl_2_cdc.BusySrcReqChk_A 001253150054709692300
tb.dut.u_reg.u_com_sel_ctl_2_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcAckBusyChk_A 001253150054750400
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054750400
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556750400
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556745600
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054750800
tb.dut.u_reg.u_com_sel_ctl_3_cdc.BusySrcReqChk_A 001253150054704038600
tb.dut.u_reg.u_com_sel_ctl_3_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcAckBusyChk_A 001253150054746100
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054746100
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556746100
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556740800
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054746500
tb.dut.u_reg.u_combo_intr_status_cdc.BusySrcReqChk_A 00125315005493036300
tb.dut.u_reg.u_combo_intr_status_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_combo_intr_status_cdc.SrcAckBusyChk_A 001253150054110000
tb.dut.u_reg.u_combo_intr_status_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_combo_intr_status_cdc.u_arb.gen_wr_req.DstUpdateReqCheck_A 0081375566910910
tb.dut.u_reg.u_combo_intr_status_cdc.u_arb.gen_wr_req.HwIdSelCheck_A 00813755670800
tb.dut.u_reg.u_combo_intr_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckAckNeedsReq 001253150054180800
tb.dut.u_reg.u_combo_intr_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckHoldReq 008137556142900
tb.dut.u_reg.u_combo_intr_status_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556105100
tb.dut.u_reg.u_combo_intr_status_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054110400
tb.dut.u_reg.u_ec_rst_ctl_cdc.BusySrcReqChk_A 001253150054183110000
tb.dut.u_reg.u_ec_rst_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcAckBusyChk_A 001253150054210900
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054210900
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556210900
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556206300
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054211600
tb.dut.u_reg.u_key_intr_ctl_cdc.BusySrcReqChk_A 00125315005498827800
tb.dut.u_reg.u_key_intr_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcAckBusyChk_A 001253150054115500
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054115500
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556115500
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556110900
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054116000
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.BusySrcReqChk_A 001253150054186338300
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcAckBusyChk_A 001253150054215500
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054215500
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556215500
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556211300
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054216000
tb.dut.u_reg.u_key_intr_status_cdc.BusySrcReqChk_A 00125315005461422200
tb.dut.u_reg.u_key_intr_status_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_key_intr_status_cdc.SrcAckBusyChk_A 00125315005474800
tb.dut.u_reg.u_key_intr_status_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_key_intr_status_cdc.u_arb.gen_wr_req.DstUpdateReqCheck_A 0081375563100910
tb.dut.u_reg.u_key_intr_status_cdc.u_arb.gen_wr_req.HwIdSelCheck_A 00813755647400
tb.dut.u_reg.u_key_intr_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckAckNeedsReq 001253150054122200
tb.dut.u_reg.u_key_intr_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckHoldReq 00813755667300
tb.dut.u_reg.u_key_intr_status_cdc.u_src_to_dst_req.DstPulseCheck_A 00813755670100
tb.dut.u_reg.u_key_intr_status_cdc.u_src_to_dst_req.SrcPulseCheck_M 00125315005475300
tb.dut.u_reg.u_key_invert_ctl_cdc.BusySrcReqChk_A 001253150054284043300
tb.dut.u_reg.u_key_invert_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcAckBusyChk_A 001253150054322400
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054322400
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556322400
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556317800
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054322800
tb.dut.u_reg.u_pin_allowed_ctl_cdc.BusySrcReqChk_A 001253150054569206200
tb.dut.u_reg.u_pin_allowed_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcAckBusyChk_A 001253150054664700
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054664700
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556664700
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556660100
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054665600
tb.dut.u_reg.u_pin_out_ctl_cdc.BusySrcReqChk_A 001253150054690488600
tb.dut.u_reg.u_pin_out_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcAckBusyChk_A 001253150054787600
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054787600
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556787600
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556782800
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054788500
tb.dut.u_reg.u_pin_out_value_cdc.BusySrcReqChk_A 001253150054565854200
tb.dut.u_reg.u_pin_out_value_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_pin_out_value_cdc.SrcAckBusyChk_A 001253150054656000
tb.dut.u_reg.u_pin_out_value_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054656000
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556656000
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556651800
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054656900
tb.dut.u_reg.u_reg_if.AllowedLatency_A 0091091000
tb.dut.u_reg.u_reg_if.MatchedWidthAssert 0091091000
tb.dut.u_reg.u_reg_if.u_err.dataWidthOnly32_A 0091091000
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.DataWidthCheck_A 0091091000
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.PayLoadWidthCheck 0091091000
tb.dut.u_reg.u_rsp_intg_gen.DataWidthCheck_A 0091091000
tb.dut.u_reg.u_rsp_intg_gen.PayLoadWidthCheck 0091091000
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.BusySrcReqChk_A 00125315005494996100
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcAckBusyChk_A 001253150054114500
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054114500
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556114500
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556110000
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054114900
tb.dut.u_reg.u_ulp_ctl_cdc.BusySrcReqChk_A 00125315005495012500
tb.dut.u_reg.u_ulp_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_ulp_ctl_cdc.SrcAckBusyChk_A 001253150054110200
tb.dut.u_reg.u_ulp_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054110200
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556110200
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556105900
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054110700
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.BusySrcReqChk_A 00125315005492742100
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcAckBusyChk_A 001253150054111200
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054111200
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M 008137556111200
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A 008137556107300
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M 001253150054111700
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.BusySrcReqChk_A 00125315005493756200
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.DstReqKnown_A 008137556726405000
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcAckBusyChk_A 001253150054112900
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcBusyKnown_A 001253150054125130776100
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A 001253150054112900
Go next page
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%