| T617 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.959361419 |
|
|
Mar 28 12:55:16 PM PDT 24 |
Mar 28 12:55:20 PM PDT 24 |
2485075891 ps |
| T297 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1830583308 |
|
|
Mar 28 12:55:15 PM PDT 24 |
Mar 28 12:57:11 PM PDT 24 |
44451840465 ps |
| T618 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3810511357 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
11377160728 ps |
| T619 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1576115259 |
|
|
Mar 28 12:55:53 PM PDT 24 |
Mar 28 12:56:00 PM PDT 24 |
2510635595 ps |
| T620 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1368653953 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:52 PM PDT 24 |
2626674177 ps |
| T621 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3443417290 |
|
|
Mar 28 12:55:00 PM PDT 24 |
Mar 28 12:55:06 PM PDT 24 |
2611990293 ps |
| T622 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.754542778 |
|
|
Mar 28 12:56:38 PM PDT 24 |
Mar 28 12:56:42 PM PDT 24 |
3562920487 ps |
| T623 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3465593688 |
|
|
Mar 28 12:56:16 PM PDT 24 |
Mar 28 12:56:19 PM PDT 24 |
2032032948 ps |
| T624 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.290659761 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:12 PM PDT 24 |
12665024067 ps |
| T625 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.195972867 |
|
|
Mar 28 12:54:47 PM PDT 24 |
Mar 28 12:56:53 PM PDT 24 |
203463402293 ps |
| T626 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1527995077 |
|
|
Mar 28 12:55:19 PM PDT 24 |
Mar 28 12:55:29 PM PDT 24 |
3733822759 ps |
| T627 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1885985359 |
|
|
Mar 28 12:55:04 PM PDT 24 |
Mar 28 12:55:13 PM PDT 24 |
7124724361 ps |
| T628 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2413622932 |
|
|
Mar 28 12:56:43 PM PDT 24 |
Mar 28 12:56:52 PM PDT 24 |
3039695590 ps |
| T629 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.228506529 |
|
|
Mar 28 12:54:48 PM PDT 24 |
Mar 28 12:56:03 PM PDT 24 |
57131452978 ps |
| T630 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3272233424 |
|
|
Mar 28 12:57:04 PM PDT 24 |
Mar 28 12:57:06 PM PDT 24 |
2643988443 ps |
| T631 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2519544609 |
|
|
Mar 28 12:54:50 PM PDT 24 |
Mar 28 12:57:10 PM PDT 24 |
116277492919 ps |
| T632 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.2449441478 |
|
|
Mar 28 12:55:53 PM PDT 24 |
Mar 28 12:55:54 PM PDT 24 |
2040366083 ps |
| T633 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1670807929 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:08 PM PDT 24 |
2625593844 ps |
| T634 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1966447459 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:08 PM PDT 24 |
2036588650 ps |
| T635 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3196997671 |
|
|
Mar 28 12:57:06 PM PDT 24 |
Mar 28 12:57:15 PM PDT 24 |
3193846774 ps |
| T204 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1680696778 |
|
|
Mar 28 12:55:48 PM PDT 24 |
Mar 28 12:56:14 PM PDT 24 |
37156080721 ps |
| T288 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1816477135 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:20 PM PDT 24 |
22485529541 ps |
| T277 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1986823143 |
|
|
Mar 28 12:56:38 PM PDT 24 |
Mar 28 12:58:00 PM PDT 24 |
29917664686 ps |
| T636 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3003863572 |
|
|
Mar 28 12:56:42 PM PDT 24 |
Mar 28 12:56:45 PM PDT 24 |
2028298737 ps |
| T637 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.264421355 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:52 PM PDT 24 |
2459572887 ps |
| T638 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2126409057 |
|
|
Mar 28 12:54:53 PM PDT 24 |
Mar 28 12:54:57 PM PDT 24 |
2463163402 ps |
| T639 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4016314769 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 01:02:26 PM PDT 24 |
172867492245 ps |
| T160 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.700203358 |
|
|
Mar 28 12:55:17 PM PDT 24 |
Mar 28 12:55:22 PM PDT 24 |
5986304483 ps |
| T640 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2039165426 |
|
|
Mar 28 12:55:22 PM PDT 24 |
Mar 28 12:55:37 PM PDT 24 |
57048555771 ps |
| T641 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2044426884 |
|
|
Mar 28 12:56:16 PM PDT 24 |
Mar 28 12:56:20 PM PDT 24 |
2218935969 ps |
| T642 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3187237247 |
|
|
Mar 28 12:56:02 PM PDT 24 |
Mar 28 12:56:05 PM PDT 24 |
2477190337 ps |
| T643 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3489430167 |
|
|
Mar 28 12:56:14 PM PDT 24 |
Mar 28 12:56:22 PM PDT 24 |
2612513208 ps |
| T644 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.676210686 |
|
|
Mar 28 12:56:21 PM PDT 24 |
Mar 28 12:56:23 PM PDT 24 |
4109308861 ps |
| T645 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.329491755 |
|
|
Mar 28 12:56:31 PM PDT 24 |
Mar 28 12:56:34 PM PDT 24 |
2533058774 ps |
| T646 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2820512778 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:07 PM PDT 24 |
8822185728 ps |
| T139 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4091384432 |
|
|
Mar 28 12:56:14 PM PDT 24 |
Mar 28 12:57:12 PM PDT 24 |
46393111636 ps |
| T647 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.397989503 |
|
|
Mar 28 12:55:00 PM PDT 24 |
Mar 28 12:55:03 PM PDT 24 |
2469409222 ps |
| T648 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.812933396 |
|
|
Mar 28 12:55:31 PM PDT 24 |
Mar 28 12:55:38 PM PDT 24 |
2097208044 ps |
| T649 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2673835143 |
|
|
Mar 28 12:56:07 PM PDT 24 |
Mar 28 12:56:16 PM PDT 24 |
3233753683 ps |
| T104 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1121503295 |
|
|
Mar 28 12:55:03 PM PDT 24 |
Mar 28 12:55:42 PM PDT 24 |
27613604641 ps |
| T650 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.3852530522 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
2112444134 ps |
| T651 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.1958041951 |
|
|
Mar 28 12:56:07 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2133512469 ps |
| T652 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.3485111652 |
|
|
Mar 28 12:56:04 PM PDT 24 |
Mar 28 12:56:05 PM PDT 24 |
2025151449 ps |
| T653 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1482386866 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2108711618 ps |
| T367 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.380648537 |
|
|
Mar 28 12:56:26 PM PDT 24 |
Mar 28 12:57:43 PM PDT 24 |
64562458915 ps |
| T654 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.872220887 |
|
|
Mar 28 12:56:08 PM PDT 24 |
Mar 28 12:56:18 PM PDT 24 |
3324811720 ps |
| T655 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.527155719 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:52 PM PDT 24 |
3342240203 ps |
| T656 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3465115797 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:55:55 PM PDT 24 |
4868495236 ps |
| T657 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.2208616247 |
|
|
Mar 28 12:55:09 PM PDT 24 |
Mar 28 12:55:12 PM PDT 24 |
2117281831 ps |
| T366 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1794745221 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:52 PM PDT 24 |
78557320423 ps |
| T658 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3872442140 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:58 PM PDT 24 |
48520281247 ps |
| T659 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.3047477983 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:57 PM PDT 24 |
2011654600 ps |
| T660 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1107874862 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:14 PM PDT 24 |
3459630000 ps |
| T661 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1289780665 |
|
|
Mar 28 12:55:19 PM PDT 24 |
Mar 28 12:55:20 PM PDT 24 |
2567493380 ps |
| T662 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1745666419 |
|
|
Mar 28 12:55:15 PM PDT 24 |
Mar 28 12:55:19 PM PDT 24 |
3178444386 ps |
| T387 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3431894275 |
|
|
Mar 28 12:57:08 PM PDT 24 |
Mar 28 12:59:54 PM PDT 24 |
60263715823 ps |
| T663 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1859188708 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:10 PM PDT 24 |
5713958457 ps |
| T386 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2479282615 |
|
|
Mar 28 12:55:35 PM PDT 24 |
Mar 28 12:57:02 PM PDT 24 |
82449211763 ps |
| T664 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1318672967 |
|
|
Mar 28 12:55:08 PM PDT 24 |
Mar 28 12:55:13 PM PDT 24 |
2515662687 ps |
| T665 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.4274228267 |
|
|
Mar 28 12:56:20 PM PDT 24 |
Mar 28 12:56:21 PM PDT 24 |
2146062933 ps |
| T666 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4164510396 |
|
|
Mar 28 12:55:04 PM PDT 24 |
Mar 28 12:56:59 PM PDT 24 |
48388071421 ps |
| T667 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2703419290 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
3681238613 ps |
| T105 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.3410219313 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:57:27 PM PDT 24 |
217359713631 ps |
| T316 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3712760974 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:10 PM PDT 24 |
8806652763 ps |
| T668 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.4136009614 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
2110694219 ps |
| T148 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3199571374 |
|
|
Mar 28 12:56:14 PM PDT 24 |
Mar 28 12:56:16 PM PDT 24 |
3880764181 ps |
| T152 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1660657709 |
|
|
Mar 28 12:55:08 PM PDT 24 |
Mar 28 12:55:11 PM PDT 24 |
2473020539 ps |
| T153 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3214762983 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:55:53 PM PDT 24 |
2116473812 ps |
| T106 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.781983543 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:57:31 PM PDT 24 |
105057165101 ps |
| T154 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.128116156 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:56:04 PM PDT 24 |
4830783633 ps |
| T155 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.646380202 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:57:23 PM PDT 24 |
38409334048 ps |
| T156 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3136819104 |
|
|
Mar 28 12:56:02 PM PDT 24 |
Mar 28 12:56:05 PM PDT 24 |
2449022931 ps |
| T157 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.1502286124 |
|
|
Mar 28 12:55:34 PM PDT 24 |
Mar 28 12:55:48 PM PDT 24 |
10665043233 ps |
| T158 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1382683980 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:59 PM PDT 24 |
2611979029 ps |
| T140 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.269411554 |
|
|
Mar 28 12:54:52 PM PDT 24 |
Mar 28 12:55:11 PM PDT 24 |
14535197075 ps |
| T669 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3721815291 |
|
|
Mar 28 12:56:11 PM PDT 24 |
Mar 28 12:57:22 PM PDT 24 |
25581690523 ps |
| T670 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.894021255 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:14 PM PDT 24 |
2469933561 ps |
| T671 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3838476839 |
|
|
Mar 28 12:55:12 PM PDT 24 |
Mar 28 12:55:22 PM PDT 24 |
3375393573 ps |
| T373 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3610030979 |
|
|
Mar 28 12:57:03 PM PDT 24 |
Mar 28 01:02:13 PM PDT 24 |
111088624245 ps |
| T672 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.625331443 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:57:43 PM PDT 24 |
39705823917 ps |
| T673 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.1145226306 |
|
|
Mar 28 12:55:17 PM PDT 24 |
Mar 28 12:55:19 PM PDT 24 |
2129393714 ps |
| T223 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3174335634 |
|
|
Mar 28 12:55:10 PM PDT 24 |
Mar 28 12:59:05 PM PDT 24 |
354415947754 ps |
| T674 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3337260209 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:57:12 PM PDT 24 |
2850614681 ps |
| T675 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.341964501 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
5298217968 ps |
| T676 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.857539408 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:54 PM PDT 24 |
3377791714 ps |
| T371 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.4105749992 |
|
|
Mar 28 12:57:12 PM PDT 24 |
Mar 28 01:01:18 PM PDT 24 |
93869671996 ps |
| T677 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.514384568 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:55 PM PDT 24 |
2935750594 ps |
| T678 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1085287184 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:56:19 PM PDT 24 |
85902285404 ps |
| T679 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3704478199 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:12 PM PDT 24 |
3571805390 ps |
| T402 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2594234409 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:58:40 PM PDT 24 |
33811372243 ps |
| T680 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1111770542 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:56:07 PM PDT 24 |
25113163184 ps |
| T370 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1954125708 |
|
|
Mar 28 12:57:08 PM PDT 24 |
Mar 28 12:57:34 PM PDT 24 |
136453959136 ps |
| T161 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1117628903 |
|
|
Mar 28 12:55:16 PM PDT 24 |
Mar 28 12:56:34 PM PDT 24 |
57387287321 ps |
| T234 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.1206069941 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:25 PM PDT 24 |
2129216520 ps |
| T235 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3055558403 |
|
|
Mar 28 12:56:04 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
2275776259 ps |
| T236 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2906483559 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:56 PM PDT 24 |
2510683871 ps |
| T237 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.275611610 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:58:01 PM PDT 24 |
102387130615 ps |
| T238 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.484536339 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:57:23 PM PDT 24 |
24854971081 ps |
| T239 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1852394558 |
|
|
Mar 28 12:56:11 PM PDT 24 |
Mar 28 12:59:25 PM PDT 24 |
643515828813 ps |
| T240 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.674575292 |
|
|
Mar 28 12:55:08 PM PDT 24 |
Mar 28 12:55:45 PM PDT 24 |
53054181360 ps |
| T241 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.754277564 |
|
|
Mar 28 12:56:17 PM PDT 24 |
Mar 28 12:56:50 PM PDT 24 |
45185340742 ps |
| T242 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2030601492 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:13 PM PDT 24 |
3397013107 ps |
| T681 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3500215020 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:55:57 PM PDT 24 |
2527459392 ps |
| T682 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1258558602 |
|
|
Mar 28 12:57:09 PM PDT 24 |
Mar 28 12:58:19 PM PDT 24 |
53440802999 ps |
| T683 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1966386183 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:13 PM PDT 24 |
4472725813 ps |
| T684 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.436414689 |
|
|
Mar 28 12:56:01 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
3040576417 ps |
| T685 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3956954684 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:53 PM PDT 24 |
2109663759 ps |
| T686 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.520297086 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:58:29 PM PDT 24 |
124215289619 ps |
| T687 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.4085739695 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
2037813941 ps |
| T688 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1302280816 |
|
|
Mar 28 12:56:06 PM PDT 24 |
Mar 28 12:56:11 PM PDT 24 |
3852707251 ps |
| T298 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3528814039 |
|
|
Mar 28 12:55:35 PM PDT 24 |
Mar 28 12:57:03 PM PDT 24 |
32191094591 ps |
| T689 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.848866984 |
|
|
Mar 28 12:56:17 PM PDT 24 |
Mar 28 12:57:57 PM PDT 24 |
103952188804 ps |
| T690 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4100908800 |
|
|
Mar 28 12:56:27 PM PDT 24 |
Mar 28 12:56:33 PM PDT 24 |
8544774280 ps |
| T691 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3081807866 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:58:52 PM PDT 24 |
40228665579 ps |
| T692 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1639424205 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:08 PM PDT 24 |
2125155512 ps |
| T693 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3196372368 |
|
|
Mar 28 12:54:52 PM PDT 24 |
Mar 28 12:54:54 PM PDT 24 |
2536456444 ps |
| T403 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2008163019 |
|
|
Mar 28 12:55:07 PM PDT 24 |
Mar 28 12:56:37 PM PDT 24 |
132278889200 ps |
| T181 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.46950000 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:56:28 PM PDT 24 |
96501698402 ps |
| T694 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.955333748 |
|
|
Mar 28 12:55:38 PM PDT 24 |
Mar 28 12:55:44 PM PDT 24 |
2016648521 ps |
| T695 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1175980950 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:57 PM PDT 24 |
2015802449 ps |
| T696 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1467514010 |
|
|
Mar 28 12:55:09 PM PDT 24 |
Mar 28 12:55:11 PM PDT 24 |
2625191496 ps |
| T697 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.356848551 |
|
|
Mar 28 12:56:04 PM PDT 24 |
Mar 28 12:57:06 PM PDT 24 |
95502513630 ps |
| T698 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.2870209561 |
|
|
Mar 28 12:56:05 PM PDT 24 |
Mar 28 12:56:06 PM PDT 24 |
2147899594 ps |
| T699 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1626315378 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:21 PM PDT 24 |
64739026411 ps |
| T700 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1460972599 |
|
|
Mar 28 12:55:02 PM PDT 24 |
Mar 28 12:55:05 PM PDT 24 |
3349470665 ps |
| T701 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.878074514 |
|
|
Mar 28 12:56:38 PM PDT 24 |
Mar 28 12:56:40 PM PDT 24 |
2187726793 ps |
| T702 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.504174045 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:34 PM PDT 24 |
4145987400 ps |
| T703 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2424475525 |
|
|
Mar 28 12:56:39 PM PDT 24 |
Mar 28 12:57:36 PM PDT 24 |
135582495106 ps |
| T704 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3570162891 |
|
|
Mar 28 12:57:05 PM PDT 24 |
Mar 28 12:57:17 PM PDT 24 |
27121955947 ps |
| T705 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1768851120 |
|
|
Mar 28 12:55:53 PM PDT 24 |
Mar 28 01:02:18 PM PDT 24 |
147331903966 ps |
| T706 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2528134069 |
|
|
Mar 28 12:55:42 PM PDT 24 |
Mar 28 12:55:46 PM PDT 24 |
3536549829 ps |
| T707 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2995033636 |
|
|
Mar 28 12:57:06 PM PDT 24 |
Mar 28 12:58:06 PM PDT 24 |
22582889330 ps |
| T708 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3104167731 |
|
|
Mar 28 12:54:47 PM PDT 24 |
Mar 28 12:54:54 PM PDT 24 |
3234179865 ps |
| T709 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.3428013926 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
2038995714 ps |
| T710 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.829775145 |
|
|
Mar 28 12:56:01 PM PDT 24 |
Mar 28 01:00:02 PM PDT 24 |
86513357423 ps |
| T711 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.602806996 |
|
|
Mar 28 12:55:20 PM PDT 24 |
Mar 28 12:59:12 PM PDT 24 |
87885306639 ps |
| T712 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3042175753 |
|
|
Mar 28 12:56:05 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2460498581 ps |
| T713 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1731666433 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:56:00 PM PDT 24 |
3101859734 ps |
| T714 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.4269417817 |
|
|
Mar 28 12:55:17 PM PDT 24 |
Mar 28 12:55:20 PM PDT 24 |
3447093923 ps |
| T715 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3875379773 |
|
|
Mar 28 12:55:56 PM PDT 24 |
Mar 28 12:56:57 PM PDT 24 |
46130126176 ps |
| T716 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3414048721 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:55:52 PM PDT 24 |
2645202760 ps |
| T717 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.4051545473 |
|
|
Mar 28 12:56:13 PM PDT 24 |
Mar 28 12:56:14 PM PDT 24 |
2508199201 ps |
| T718 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.435055203 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
3064900548 ps |
| T719 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.44175234 |
|
|
Mar 28 12:55:29 PM PDT 24 |
Mar 28 12:57:11 PM PDT 24 |
35624679741 ps |
| T720 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3498367021 |
|
|
Mar 28 12:56:37 PM PDT 24 |
Mar 28 12:56:40 PM PDT 24 |
2525101664 ps |
| T721 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.4184783910 |
|
|
Mar 28 12:56:45 PM PDT 24 |
Mar 28 12:56:50 PM PDT 24 |
2735022019 ps |
| T372 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3352050076 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:55:43 PM PDT 24 |
76452120231 ps |
| T722 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2834166101 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:54 PM PDT 24 |
2467894722 ps |
| T723 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.444147407 |
|
|
Mar 28 12:57:08 PM PDT 24 |
Mar 28 12:58:02 PM PDT 24 |
66397324829 ps |
| T724 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.1762618886 |
|
|
Mar 28 12:55:25 PM PDT 24 |
Mar 28 12:55:27 PM PDT 24 |
2029659097 ps |
| T725 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.2816801132 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:56 PM PDT 24 |
9171855828 ps |
| T385 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2273214744 |
|
|
Mar 28 12:57:06 PM PDT 24 |
Mar 28 12:58:26 PM PDT 24 |
129313362376 ps |
| T162 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3041664312 |
|
|
Mar 28 12:56:04 PM PDT 24 |
Mar 28 12:57:25 PM PDT 24 |
32095058396 ps |
| T407 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1180530588 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:57:39 PM PDT 24 |
545292341129 ps |
| T207 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.1977210606 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:56 PM PDT 24 |
2963589036 ps |
| T726 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2076213240 |
|
|
Mar 28 12:56:39 PM PDT 24 |
Mar 28 12:56:42 PM PDT 24 |
2035090064 ps |
| T727 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1956391840 |
|
|
Mar 28 12:55:13 PM PDT 24 |
Mar 28 12:55:17 PM PDT 24 |
3498400870 ps |
| T728 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1828194722 |
|
|
Mar 28 12:55:08 PM PDT 24 |
Mar 28 12:58:56 PM PDT 24 |
91007308151 ps |
| T729 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3320779443 |
|
|
Mar 28 12:56:40 PM PDT 24 |
Mar 28 12:56:44 PM PDT 24 |
2522169708 ps |
| T730 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1343030440 |
|
|
Mar 28 12:55:35 PM PDT 24 |
Mar 28 01:04:35 PM PDT 24 |
213176542749 ps |
| T731 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1888377975 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:57:35 PM PDT 24 |
182481059901 ps |
| T732 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1463414598 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:59 PM PDT 24 |
3474564023 ps |
| T251 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3066089292 |
|
|
Mar 28 12:56:40 PM PDT 24 |
Mar 28 12:59:10 PM PDT 24 |
124931720819 ps |
| T299 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1282745665 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:41 PM PDT 24 |
13876238991 ps |
| T733 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.243119263 |
|
|
Mar 28 12:54:47 PM PDT 24 |
Mar 28 12:54:51 PM PDT 24 |
2214528484 ps |
| T734 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1735273527 |
|
|
Mar 28 12:54:51 PM PDT 24 |
Mar 28 12:54:55 PM PDT 24 |
2392394739 ps |
| T735 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4204375377 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:39 PM PDT 24 |
119688287869 ps |
| T736 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3415031634 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:58 PM PDT 24 |
2611214064 ps |
| T289 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.1870181001 |
|
|
Mar 28 12:54:52 PM PDT 24 |
Mar 28 12:55:52 PM PDT 24 |
22013738479 ps |
| T737 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2492308921 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:58 PM PDT 24 |
2453073249 ps |
| T738 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.290422671 |
|
|
Mar 28 12:56:40 PM PDT 24 |
Mar 28 12:56:43 PM PDT 24 |
2101269401 ps |
| T739 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1500631923 |
|
|
Mar 28 12:55:17 PM PDT 24 |
Mar 28 12:55:25 PM PDT 24 |
2613790360 ps |
| T740 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1479273902 |
|
|
Mar 28 12:55:35 PM PDT 24 |
Mar 28 12:55:37 PM PDT 24 |
2508518375 ps |
| T741 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.331431088 |
|
|
Mar 28 12:56:04 PM PDT 24 |
Mar 28 12:56:08 PM PDT 24 |
2519604768 ps |
| T742 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2728480950 |
|
|
Mar 28 12:56:06 PM PDT 24 |
Mar 28 12:56:14 PM PDT 24 |
3719564449 ps |
| T743 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2857218702 |
|
|
Mar 28 12:56:38 PM PDT 24 |
Mar 28 12:56:41 PM PDT 24 |
2071607034 ps |
| T381 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.137873100 |
|
|
Mar 28 12:56:18 PM PDT 24 |
Mar 28 12:56:42 PM PDT 24 |
32988449608 ps |
| T744 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3394813666 |
|
|
Mar 28 12:54:49 PM PDT 24 |
Mar 28 12:54:56 PM PDT 24 |
2511396075 ps |
| T745 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2499942446 |
|
|
Mar 28 12:55:19 PM PDT 24 |
Mar 28 12:55:23 PM PDT 24 |
5346478669 ps |
| T746 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3268990670 |
|
|
Mar 28 12:55:59 PM PDT 24 |
Mar 28 12:56:07 PM PDT 24 |
3647038472 ps |
| T747 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3759351409 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:10 PM PDT 24 |
3586973925 ps |
| T748 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1677773745 |
|
|
Mar 28 12:56:20 PM PDT 24 |
Mar 28 12:56:23 PM PDT 24 |
5873382766 ps |
| T749 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1470242369 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:30 PM PDT 24 |
3394766040 ps |
| T750 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4067231448 |
|
|
Mar 28 12:54:46 PM PDT 24 |
Mar 28 12:54:53 PM PDT 24 |
4869135266 ps |
| T127 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.4269762361 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:56:42 PM PDT 24 |
260696354167 ps |
| T224 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3116978273 |
|
|
Mar 28 12:56:02 PM PDT 24 |
Mar 28 12:56:05 PM PDT 24 |
3410381644 ps |
| T225 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.2884560439 |
|
|
Mar 28 12:56:20 PM PDT 24 |
Mar 28 12:56:22 PM PDT 24 |
2132240241 ps |
| T226 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.2859856633 |
|
|
Mar 28 12:55:04 PM PDT 24 |
Mar 28 12:55:07 PM PDT 24 |
4037229691 ps |
| T227 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2282462159 |
|
|
Mar 28 12:56:13 PM PDT 24 |
Mar 28 12:56:37 PM PDT 24 |
17608692576 ps |
| T228 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3566029431 |
|
|
Mar 28 12:56:23 PM PDT 24 |
Mar 28 12:56:26 PM PDT 24 |
2633696923 ps |
| T229 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.1506051091 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:38 PM PDT 24 |
52094543668 ps |
| T230 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.1807463699 |
|
|
Mar 28 12:55:54 PM PDT 24 |
Mar 28 12:55:57 PM PDT 24 |
2113710689 ps |
| T231 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.4042357907 |
|
|
Mar 28 12:56:01 PM PDT 24 |
Mar 28 12:56:04 PM PDT 24 |
3159546638 ps |
| T232 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.391637699 |
|
|
Mar 28 12:55:01 PM PDT 24 |
Mar 28 12:55:11 PM PDT 24 |
3373640416 ps |
| T751 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3746259236 |
|
|
Mar 28 12:55:16 PM PDT 24 |
Mar 28 12:55:25 PM PDT 24 |
11485179618 ps |
| T389 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3841709240 |
|
|
Mar 28 12:56:25 PM PDT 24 |
Mar 28 12:56:56 PM PDT 24 |
85663645390 ps |
| T752 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1051700771 |
|
|
Mar 28 12:55:55 PM PDT 24 |
Mar 28 12:56:02 PM PDT 24 |
2511169691 ps |
| T753 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.1673754857 |
|
|
Mar 28 12:56:07 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2127611155 ps |
| T754 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1975979695 |
|
|
Mar 28 12:55:59 PM PDT 24 |
Mar 28 12:56:07 PM PDT 24 |
3132869504 ps |
| T755 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.3350034732 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
7061272261 ps |
| T756 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.237755364 |
|
|
Mar 28 12:56:06 PM PDT 24 |
Mar 28 12:56:12 PM PDT 24 |
2187401686 ps |
| T757 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1124668754 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:58:21 PM PDT 24 |
88807798912 ps |
| T758 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1112171965 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:58 PM PDT 24 |
2010373661 ps |
| T759 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.1486934373 |
|
|
Mar 28 12:55:18 PM PDT 24 |
Mar 28 12:55:19 PM PDT 24 |
2190457752 ps |
| T760 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2632479108 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:53 PM PDT 24 |
2478343686 ps |
| T761 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.433155696 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:51 PM PDT 24 |
2133902663 ps |
| T762 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2762826049 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:55:55 PM PDT 24 |
2477815114 ps |
| T763 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1112444550 |
|
|
Mar 28 12:57:10 PM PDT 24 |
Mar 28 12:58:18 PM PDT 24 |
99495294968 ps |
| T107 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3369439250 |
|
|
Mar 28 12:56:12 PM PDT 24 |
Mar 28 12:57:21 PM PDT 24 |
96036291622 ps |
| T764 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.2801879588 |
|
|
Mar 28 12:55:50 PM PDT 24 |
Mar 28 12:55:52 PM PDT 24 |
9312196987 ps |
| T765 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.300059214 |
|
|
Mar 28 12:56:05 PM PDT 24 |
Mar 28 12:56:08 PM PDT 24 |
2632603705 ps |
| T766 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1060452611 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:55:58 PM PDT 24 |
2610484526 ps |
| T767 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1999121868 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
23615315987 ps |
| T768 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1260245136 |
|
|
Mar 28 12:54:57 PM PDT 24 |
Mar 28 12:55:04 PM PDT 24 |
2013826087 ps |
| T769 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2256398164 |
|
|
Mar 28 12:56:31 PM PDT 24 |
Mar 28 12:56:38 PM PDT 24 |
2171023827 ps |
| T770 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.2100315946 |
|
|
Mar 28 12:55:46 PM PDT 24 |
Mar 28 12:55:48 PM PDT 24 |
6546656476 ps |
| T192 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.122689876 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:56:23 PM PDT 24 |
22374806899 ps |
| T771 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.2005063503 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:09 PM PDT 24 |
2116280989 ps |
| T772 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3801287398 |
|
|
Mar 28 12:56:15 PM PDT 24 |
Mar 28 12:56:24 PM PDT 24 |
2887366257 ps |
| T773 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.228966587 |
|
|
Mar 28 12:55:52 PM PDT 24 |
Mar 28 12:55:54 PM PDT 24 |
2528820655 ps |
| T382 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.796205765 |
|
|
Mar 28 12:57:06 PM PDT 24 |
Mar 28 12:58:08 PM PDT 24 |
88021036860 ps |
| T774 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.2216133961 |
|
|
Mar 28 12:56:03 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2112674765 ps |
| T401 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3296679304 |
|
|
Mar 28 12:57:10 PM PDT 24 |
Mar 28 12:58:07 PM PDT 24 |
85805843157 ps |
| T406 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3351776863 |
|
|
Mar 28 12:56:05 PM PDT 24 |
Mar 28 12:59:31 PM PDT 24 |
446218642162 ps |
| T775 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3612344163 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:08 PM PDT 24 |
2030209561 ps |
| T776 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2228588255 |
|
|
Mar 28 12:56:21 PM PDT 24 |
Mar 28 12:59:08 PM PDT 24 |
67026777911 ps |
| T777 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.3780112493 |
|
|
Mar 28 12:55:09 PM PDT 24 |
Mar 28 12:55:15 PM PDT 24 |
2108056719 ps |
| T778 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4249803884 |
|
|
Mar 28 12:56:08 PM PDT 24 |
Mar 28 12:57:16 PM PDT 24 |
26330265032 ps |
| T779 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2783112825 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:08 PM PDT 24 |
2651305275 ps |
| T780 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2681806278 |
|
|
Mar 28 12:55:10 PM PDT 24 |
Mar 28 12:55:17 PM PDT 24 |
2513265139 ps |
| T781 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.1244685777 |
|
|
Mar 28 12:56:24 PM PDT 24 |
Mar 28 12:56:50 PM PDT 24 |
224472416195 ps |
| T128 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3426176801 |
|
|
Mar 28 12:56:39 PM PDT 24 |
Mar 28 12:56:41 PM PDT 24 |
9169680698 ps |
| T782 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2293924494 |
|
|
Mar 28 12:56:02 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2459227912 ps |
| T783 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2261052117 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:09 PM PDT 24 |
2635153124 ps |
| T784 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.980377196 |
|
|
Mar 28 12:55:53 PM PDT 24 |
Mar 28 12:55:55 PM PDT 24 |
4509910659 ps |
| T785 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.437839300 |
|
|
Mar 28 12:56:12 PM PDT 24 |
Mar 28 12:56:16 PM PDT 24 |
3856326466 ps |
| T786 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.619032048 |
|
|
Mar 28 12:55:51 PM PDT 24 |
Mar 28 12:55:55 PM PDT 24 |
2618302680 ps |
| T787 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2550801596 |
|
|
Mar 28 12:56:38 PM PDT 24 |
Mar 28 12:56:40 PM PDT 24 |
2536427423 ps |
| T788 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2505731681 |
|
|
Mar 28 12:55:28 PM PDT 24 |
Mar 28 12:58:04 PM PDT 24 |
1973196555202 ps |
| T789 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.4261829741 |
|
|
Mar 28 12:56:08 PM PDT 24 |
Mar 28 12:56:09 PM PDT 24 |
2158092160 ps |
| T790 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.477473069 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:59 PM PDT 24 |
3085299857 ps |
| T791 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.4226721623 |
|
|
Mar 28 12:56:07 PM PDT 24 |
Mar 28 12:56:13 PM PDT 24 |
2014539668 ps |
| T792 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3860656303 |
|
|
Mar 28 12:55:05 PM PDT 24 |
Mar 28 12:55:13 PM PDT 24 |
2610884183 ps |
| T793 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.2706411820 |
|
|
Mar 28 12:55:49 PM PDT 24 |
Mar 28 12:55:52 PM PDT 24 |
4663299833 ps |
| T794 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2380287593 |
|
|
Mar 28 12:56:13 PM PDT 24 |
Mar 28 12:56:16 PM PDT 24 |
6173774271 ps |
| T206 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.263773528 |
|
|
Mar 28 12:55:53 PM PDT 24 |
Mar 28 12:57:01 PM PDT 24 |
1262551178073 ps |
| T218 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.3741248854 |
|
|
Mar 28 12:55:47 PM PDT 24 |
Mar 28 12:55:51 PM PDT 24 |
2116411817 ps |
| T219 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2624818628 |
|
|
Mar 28 12:56:46 PM PDT 24 |
Mar 28 12:56:52 PM PDT 24 |
2009593277 ps |
| T220 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2722357832 |
|
|
Mar 28 12:55:06 PM PDT 24 |
Mar 28 12:55:14 PM PDT 24 |
2465112801 ps |
| T221 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1775229144 |
|
|
Mar 28 12:55:07 PM PDT 24 |
Mar 28 12:55:09 PM PDT 24 |
2565585654 ps |