| T244 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.2867573974 |
|
|
Apr 02 01:03:47 PM PDT 24 |
Apr 02 01:07:25 PM PDT 24 |
164671187794 ps |
| T424 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.2664647505 |
|
|
Apr 02 01:03:27 PM PDT 24 |
Apr 02 01:03:33 PM PDT 24 |
2112678254 ps |
| T425 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.59316203 |
|
|
Apr 02 01:02:35 PM PDT 24 |
Apr 02 01:02:37 PM PDT 24 |
2545027240 ps |
| T426 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.1879543059 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
10250934727 ps |
| T427 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3766224949 |
|
|
Apr 02 01:05:50 PM PDT 24 |
Apr 02 01:07:27 PM PDT 24 |
39006092209 ps |
| T428 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1031548849 |
|
|
Apr 02 01:03:17 PM PDT 24 |
Apr 02 01:03:19 PM PDT 24 |
2130669908 ps |
| T429 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1656973425 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:13 PM PDT 24 |
2609548887 ps |
| T245 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.4219063648 |
|
|
Apr 02 01:04:23 PM PDT 24 |
Apr 02 01:04:44 PM PDT 24 |
28664674519 ps |
| T192 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.1345904884 |
|
|
Apr 02 01:03:53 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
11185388396 ps |
| T246 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1583573735 |
|
|
Apr 02 01:03:12 PM PDT 24 |
Apr 02 01:04:33 PM PDT 24 |
30520145152 ps |
| T430 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3023991020 |
|
|
Apr 02 01:05:31 PM PDT 24 |
Apr 02 01:05:34 PM PDT 24 |
2109292010 ps |
| T111 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4036927542 |
|
|
Apr 02 01:05:25 PM PDT 24 |
Apr 02 01:06:49 PM PDT 24 |
60026629343 ps |
| T431 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.1037592525 |
|
|
Apr 02 01:03:40 PM PDT 24 |
Apr 02 01:03:42 PM PDT 24 |
2130674213 ps |
| T432 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2369158785 |
|
|
Apr 02 01:03:17 PM PDT 24 |
Apr 02 01:18:37 PM PDT 24 |
381799920878 ps |
| T433 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2933970644 |
|
|
Apr 02 01:04:30 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
8767464876 ps |
| T112 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1130142078 |
|
|
Apr 02 01:04:06 PM PDT 24 |
Apr 02 01:05:48 PM PDT 24 |
142459134042 ps |
| T342 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2840142106 |
|
|
Apr 02 01:05:49 PM PDT 24 |
Apr 02 01:08:04 PM PDT 24 |
188999267868 ps |
| T434 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4239649215 |
|
|
Apr 02 01:04:10 PM PDT 24 |
Apr 02 01:04:13 PM PDT 24 |
2539047228 ps |
| T435 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.4105741433 |
|
|
Apr 02 01:04:21 PM PDT 24 |
Apr 02 01:04:25 PM PDT 24 |
2120139126 ps |
| T436 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1638397692 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:20 PM PDT 24 |
3532707277 ps |
| T255 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.4002903000 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:09:57 PM PDT 24 |
126243194884 ps |
| T437 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1766435141 |
|
|
Apr 02 01:04:47 PM PDT 24 |
Apr 02 01:05:50 PM PDT 24 |
24332512471 ps |
| T438 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.977019416 |
|
|
Apr 02 01:05:23 PM PDT 24 |
Apr 02 01:05:26 PM PDT 24 |
3597526689 ps |
| T439 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.1818749850 |
|
|
Apr 02 01:04:29 PM PDT 24 |
Apr 02 01:04:32 PM PDT 24 |
2027632749 ps |
| T440 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1184017198 |
|
|
Apr 02 01:05:46 PM PDT 24 |
Apr 02 01:06:59 PM PDT 24 |
26832877598 ps |
| T191 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.74170707 |
|
|
Apr 02 01:04:19 PM PDT 24 |
Apr 02 01:04:37 PM PDT 24 |
203544976256 ps |
| T267 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.263905240 |
|
|
Apr 02 01:03:29 PM PDT 24 |
Apr 02 01:03:47 PM PDT 24 |
30574800577 ps |
| T303 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.355986526 |
|
|
Apr 02 01:05:10 PM PDT 24 |
Apr 02 01:05:29 PM PDT 24 |
86197711141 ps |
| T441 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1517449041 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:57 PM PDT 24 |
2199030067 ps |
| T268 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4202262087 |
|
|
Apr 02 01:05:23 PM PDT 24 |
Apr 02 01:05:47 PM PDT 24 |
45651517422 ps |
| T442 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2975570425 |
|
|
Apr 02 01:02:34 PM PDT 24 |
Apr 02 01:02:49 PM PDT 24 |
4907519651 ps |
| T137 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.398196090 |
|
|
Apr 02 01:04:48 PM PDT 24 |
Apr 02 01:05:13 PM PDT 24 |
21047776207 ps |
| T325 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3540596006 |
|
|
Apr 02 01:05:48 PM PDT 24 |
Apr 02 01:06:20 PM PDT 24 |
85045397888 ps |
| T443 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2393883293 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:32 PM PDT 24 |
2612513993 ps |
| T444 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.4087597391 |
|
|
Apr 02 01:04:38 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
2492399325 ps |
| T445 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2434658823 |
|
|
Apr 02 01:05:23 PM PDT 24 |
Apr 02 01:05:30 PM PDT 24 |
2509467329 ps |
| T446 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3836258771 |
|
|
Apr 02 01:05:41 PM PDT 24 |
Apr 02 01:05:48 PM PDT 24 |
6683849823 ps |
| T223 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3889426778 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:14 PM PDT 24 |
3218981363 ps |
| T447 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3280091326 |
|
|
Apr 02 01:04:14 PM PDT 24 |
Apr 02 01:04:20 PM PDT 24 |
2019004336 ps |
| T448 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3007829650 |
|
|
Apr 02 01:03:06 PM PDT 24 |
Apr 02 01:03:09 PM PDT 24 |
2536864128 ps |
| T449 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.4191368013 |
|
|
Apr 02 01:04:31 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2136488091 ps |
| T450 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1817421729 |
|
|
Apr 02 01:04:29 PM PDT 24 |
Apr 02 01:04:37 PM PDT 24 |
2449333380 ps |
| T315 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1424508401 |
|
|
Apr 02 01:05:15 PM PDT 24 |
Apr 02 01:11:38 PM PDT 24 |
149802653708 ps |
| T451 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2507989408 |
|
|
Apr 02 01:04:25 PM PDT 24 |
Apr 02 01:04:34 PM PDT 24 |
2975393450 ps |
| T328 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2416577346 |
|
|
Apr 02 01:04:46 PM PDT 24 |
Apr 02 01:10:06 PM PDT 24 |
123002501504 ps |
| T452 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2575280867 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:05:22 PM PDT 24 |
3145352823 ps |
| T453 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.3265927518 |
|
|
Apr 02 01:04:38 PM PDT 24 |
Apr 02 01:04:44 PM PDT 24 |
2118860333 ps |
| T329 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2174355601 |
|
|
Apr 02 01:03:14 PM PDT 24 |
Apr 02 01:05:18 PM PDT 24 |
46385920386 ps |
| T454 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.4048528819 |
|
|
Apr 02 01:03:34 PM PDT 24 |
Apr 02 01:03:37 PM PDT 24 |
2115806390 ps |
| T455 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3326994283 |
|
|
Apr 02 01:05:46 PM PDT 24 |
Apr 02 01:06:19 PM PDT 24 |
26837682175 ps |
| T456 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3649397219 |
|
|
Apr 02 01:05:01 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
4584129719 ps |
| T247 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.1289239933 |
|
|
Apr 02 01:02:32 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
89838271145 ps |
| T457 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3630591467 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
2155281752 ps |
| T458 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1095730029 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:24 PM PDT 24 |
2226512066 ps |
| T459 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3894836759 |
|
|
Apr 02 01:02:28 PM PDT 24 |
Apr 02 01:03:17 PM PDT 24 |
260599950958 ps |
| T460 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3228256075 |
|
|
Apr 02 01:03:25 PM PDT 24 |
Apr 02 01:03:27 PM PDT 24 |
3281815158 ps |
| T256 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.1226898963 |
|
|
Apr 02 01:03:28 PM PDT 24 |
Apr 02 01:04:10 PM PDT 24 |
105434379690 ps |
| T461 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2062338084 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
2515543746 ps |
| T462 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4174396239 |
|
|
Apr 02 01:05:43 PM PDT 24 |
Apr 02 01:06:19 PM PDT 24 |
25087697580 ps |
| T463 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1898781650 |
|
|
Apr 02 01:05:32 PM PDT 24 |
Apr 02 01:05:42 PM PDT 24 |
12307310592 ps |
| T464 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.1400700630 |
|
|
Apr 02 01:03:18 PM PDT 24 |
Apr 02 01:03:21 PM PDT 24 |
2114327128 ps |
| T465 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1568104219 |
|
|
Apr 02 01:04:49 PM PDT 24 |
Apr 02 01:08:28 PM PDT 24 |
79767369548 ps |
| T269 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3979680138 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:55 PM PDT 24 |
19212754386 ps |
| T466 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3411597897 |
|
|
Apr 02 01:04:01 PM PDT 24 |
Apr 02 01:04:04 PM PDT 24 |
2633900448 ps |
| T248 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.951328538 |
|
|
Apr 02 01:05:36 PM PDT 24 |
Apr 02 01:05:45 PM PDT 24 |
15052720264 ps |
| T467 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.736443348 |
|
|
Apr 02 01:04:37 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
2614389646 ps |
| T344 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2524946930 |
|
|
Apr 02 01:05:49 PM PDT 24 |
Apr 02 01:06:28 PM PDT 24 |
61364243393 ps |
| T468 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.634047485 |
|
|
Apr 02 01:05:03 PM PDT 24 |
Apr 02 01:05:05 PM PDT 24 |
2458269527 ps |
| T469 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.2168903574 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:02:37 PM PDT 24 |
2009797237 ps |
| T470 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.4235731343 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:28 PM PDT 24 |
2114597097 ps |
| T471 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1541521313 |
|
|
Apr 02 01:05:15 PM PDT 24 |
Apr 02 01:05:17 PM PDT 24 |
2734224764 ps |
| T327 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2178992568 |
|
|
Apr 02 01:04:27 PM PDT 24 |
Apr 02 01:06:45 PM PDT 24 |
206038791263 ps |
| T472 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.685171437 |
|
|
Apr 02 01:04:41 PM PDT 24 |
Apr 02 01:07:33 PM PDT 24 |
129319148576 ps |
| T350 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1874749644 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:04:14 PM PDT 24 |
707469661263 ps |
| T473 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3463750591 |
|
|
Apr 02 01:03:21 PM PDT 24 |
Apr 02 01:03:23 PM PDT 24 |
2648581925 ps |
| T474 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2875332880 |
|
|
Apr 02 01:02:34 PM PDT 24 |
Apr 02 01:02:41 PM PDT 24 |
2424356653 ps |
| T138 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2402919289 |
|
|
Apr 02 01:05:17 PM PDT 24 |
Apr 02 01:07:06 PM PDT 24 |
177460095154 ps |
| T475 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1565853715 |
|
|
Apr 02 01:03:57 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
2514488141 ps |
| T476 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.960067862 |
|
|
Apr 02 01:04:13 PM PDT 24 |
Apr 02 01:04:23 PM PDT 24 |
3562920275 ps |
| T477 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1290179820 |
|
|
Apr 02 01:05:13 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
2025356617 ps |
| T478 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.882207327 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
3441482219 ps |
| T184 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.629256187 |
|
|
Apr 02 01:05:23 PM PDT 24 |
Apr 02 01:05:26 PM PDT 24 |
4685797842 ps |
| T479 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3181574554 |
|
|
Apr 02 01:02:51 PM PDT 24 |
Apr 02 01:02:58 PM PDT 24 |
2377820834 ps |
| T480 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2482173366 |
|
|
Apr 02 01:04:31 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2623751742 ps |
| T481 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.323638550 |
|
|
Apr 02 01:02:38 PM PDT 24 |
Apr 02 01:02:40 PM PDT 24 |
2202527631 ps |
| T482 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1065878469 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:04:48 PM PDT 24 |
3945019538 ps |
| T330 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1641099857 |
|
|
Apr 02 01:05:11 PM PDT 24 |
Apr 02 01:11:27 PM PDT 24 |
144066966275 ps |
| T179 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.101543289 |
|
|
Apr 02 01:02:29 PM PDT 24 |
Apr 02 01:02:40 PM PDT 24 |
4443526768 ps |
| T483 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2525699147 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:28 PM PDT 24 |
4662968257 ps |
| T113 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2553748700 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:48 PM PDT 24 |
80335633838 ps |
| T484 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2639906119 |
|
|
Apr 02 01:04:05 PM PDT 24 |
Apr 02 01:04:07 PM PDT 24 |
2458274460 ps |
| T305 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1726819374 |
|
|
Apr 02 01:03:55 PM PDT 24 |
Apr 02 01:05:07 PM PDT 24 |
92078635391 ps |
| T251 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.854583524 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:07:50 PM PDT 24 |
1652443114448 ps |
| T485 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2084115933 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
7038609882 ps |
| T217 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.329152124 |
|
|
Apr 02 01:05:44 PM PDT 24 |
Apr 02 01:05:49 PM PDT 24 |
3695562046 ps |
| T486 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3779737277 |
|
|
Apr 02 01:05:07 PM PDT 24 |
Apr 02 01:05:09 PM PDT 24 |
2550290609 ps |
| T487 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.875172313 |
|
|
Apr 02 01:03:45 PM PDT 24 |
Apr 02 01:03:48 PM PDT 24 |
2113669194 ps |
| T488 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1914693701 |
|
|
Apr 02 01:04:12 PM PDT 24 |
Apr 02 01:07:09 PM PDT 24 |
139326473019 ps |
| T489 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1060532868 |
|
|
Apr 02 01:03:45 PM PDT 24 |
Apr 02 01:08:21 PM PDT 24 |
119077729550 ps |
| T490 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1384005617 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:05:23 PM PDT 24 |
2749606574 ps |
| T324 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3008368443 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:08:29 PM PDT 24 |
165174378857 ps |
| T491 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3331023008 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:18 PM PDT 24 |
2626434041 ps |
| T492 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2513154935 |
|
|
Apr 02 01:03:04 PM PDT 24 |
Apr 02 01:03:07 PM PDT 24 |
2636823536 ps |
| T493 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1056645517 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:17 PM PDT 24 |
2052957739 ps |
| T494 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1850727137 |
|
|
Apr 02 01:05:32 PM PDT 24 |
Apr 02 01:05:36 PM PDT 24 |
3791326872 ps |
| T495 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.2095041548 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
2046455793 ps |
| T274 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3237059268 |
|
|
Apr 02 01:05:31 PM PDT 24 |
Apr 02 01:06:30 PM PDT 24 |
93465203561 ps |
| T252 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.889507203 |
|
|
Apr 02 01:04:37 PM PDT 24 |
Apr 02 01:05:42 PM PDT 24 |
94566375315 ps |
| T496 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3413884976 |
|
|
Apr 02 01:04:31 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2500471064 ps |
| T270 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1142733688 |
|
|
Apr 02 01:05:27 PM PDT 24 |
Apr 02 01:06:22 PM PDT 24 |
25783298229 ps |
| T497 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1228870245 |
|
|
Apr 02 01:05:14 PM PDT 24 |
Apr 02 01:05:24 PM PDT 24 |
3429310676 ps |
| T165 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2782630760 |
|
|
Apr 02 01:05:29 PM PDT 24 |
Apr 02 01:05:33 PM PDT 24 |
2391584377 ps |
| T169 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.995681847 |
|
|
Apr 02 01:03:59 PM PDT 24 |
Apr 02 01:05:17 PM PDT 24 |
174846495549 ps |
| T170 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3268763802 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:05:06 PM PDT 24 |
43717471316 ps |
| T171 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1948093108 |
|
|
Apr 02 01:02:33 PM PDT 24 |
Apr 02 01:02:41 PM PDT 24 |
2920511972 ps |
| T172 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.4179760622 |
|
|
Apr 02 01:05:14 PM PDT 24 |
Apr 02 01:05:20 PM PDT 24 |
2011859500 ps |
| T173 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.3300715636 |
|
|
Apr 02 01:04:20 PM PDT 24 |
Apr 02 01:04:22 PM PDT 24 |
2031426325 ps |
| T174 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3899427311 |
|
|
Apr 02 01:03:26 PM PDT 24 |
Apr 02 01:03:31 PM PDT 24 |
3245541839 ps |
| T175 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2277461250 |
|
|
Apr 02 01:04:38 PM PDT 24 |
Apr 02 01:09:18 PM PDT 24 |
345099056668 ps |
| T176 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.617156127 |
|
|
Apr 02 01:04:21 PM PDT 24 |
Apr 02 01:04:30 PM PDT 24 |
7616894511 ps |
| T177 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3840305919 |
|
|
Apr 02 01:03:04 PM PDT 24 |
Apr 02 01:04:10 PM PDT 24 |
94750701478 ps |
| T498 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.1842448640 |
|
|
Apr 02 01:02:53 PM PDT 24 |
Apr 02 01:02:55 PM PDT 24 |
2117152790 ps |
| T499 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1530496618 |
|
|
Apr 02 01:04:59 PM PDT 24 |
Apr 02 01:05:03 PM PDT 24 |
2513638347 ps |
| T500 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.640257113 |
|
|
Apr 02 01:03:32 PM PDT 24 |
Apr 02 01:03:44 PM PDT 24 |
43743850619 ps |
| T501 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3775483244 |
|
|
Apr 02 01:04:34 PM PDT 24 |
Apr 02 01:04:38 PM PDT 24 |
2599392366 ps |
| T502 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.685462561 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:05:25 PM PDT 24 |
2110844464 ps |
| T503 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1523431964 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:08 PM PDT 24 |
3015417177 ps |
| T504 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1366438534 |
|
|
Apr 02 01:04:48 PM PDT 24 |
Apr 02 01:04:55 PM PDT 24 |
2608466523 ps |
| T505 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1078070293 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
5865068230 ps |
| T506 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1420150911 |
|
|
Apr 02 01:05:40 PM PDT 24 |
Apr 02 01:05:43 PM PDT 24 |
4411029398 ps |
| T193 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.1512832220 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:53 PM PDT 24 |
14526934025 ps |
| T507 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.3901597824 |
|
|
Apr 02 01:04:27 PM PDT 24 |
Apr 02 01:04:34 PM PDT 24 |
7076919447 ps |
| T508 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1197888645 |
|
|
Apr 02 01:02:37 PM PDT 24 |
Apr 02 01:02:42 PM PDT 24 |
2014439197 ps |
| T509 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3014977320 |
|
|
Apr 02 01:02:34 PM PDT 24 |
Apr 02 01:02:42 PM PDT 24 |
2511174622 ps |
| T114 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2726689477 |
|
|
Apr 02 01:03:13 PM PDT 24 |
Apr 02 01:09:03 PM PDT 24 |
142652854646 ps |
| T510 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.476340272 |
|
|
Apr 02 01:02:50 PM PDT 24 |
Apr 02 01:02:52 PM PDT 24 |
2043207261 ps |
| T511 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1936596860 |
|
|
Apr 02 01:04:46 PM PDT 24 |
Apr 02 01:04:48 PM PDT 24 |
2675248436 ps |
| T512 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.526238007 |
|
|
Apr 02 01:04:36 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
2609805104 ps |
| T236 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3979636434 |
|
|
Apr 02 01:03:59 PM PDT 24 |
Apr 02 01:04:01 PM PDT 24 |
2970329435 ps |
| T115 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.905381171 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:39 PM PDT 24 |
25944896597 ps |
| T513 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3369286470 |
|
|
Apr 02 01:03:22 PM PDT 24 |
Apr 02 01:03:27 PM PDT 24 |
2447560054 ps |
| T514 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3435500366 |
|
|
Apr 02 01:02:53 PM PDT 24 |
Apr 02 01:02:56 PM PDT 24 |
2509723961 ps |
| T515 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.601873803 |
|
|
Apr 02 01:04:42 PM PDT 24 |
Apr 02 01:04:50 PM PDT 24 |
2111574703 ps |
| T516 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1940205952 |
|
|
Apr 02 01:05:48 PM PDT 24 |
Apr 02 01:06:03 PM PDT 24 |
21350272263 ps |
| T517 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1179348595 |
|
|
Apr 02 01:05:45 PM PDT 24 |
Apr 02 01:06:03 PM PDT 24 |
25355334297 ps |
| T518 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.4293621529 |
|
|
Apr 02 01:04:31 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2531968726 ps |
| T211 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3568575839 |
|
|
Apr 02 01:04:05 PM PDT 24 |
Apr 02 01:04:08 PM PDT 24 |
3497082099 ps |
| T519 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1876025430 |
|
|
Apr 02 01:05:30 PM PDT 24 |
Apr 02 01:05:32 PM PDT 24 |
2038091960 ps |
| T302 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.1660677888 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:05:31 PM PDT 24 |
130335382210 ps |
| T314 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1250954466 |
|
|
Apr 02 01:05:45 PM PDT 24 |
Apr 02 01:07:21 PM PDT 24 |
145405176628 ps |
| T224 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.588657317 |
|
|
Apr 02 01:04:11 PM PDT 24 |
Apr 02 01:04:23 PM PDT 24 |
18296596147 ps |
| T520 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.276075314 |
|
|
Apr 02 01:02:49 PM PDT 24 |
Apr 02 01:02:52 PM PDT 24 |
2381744048 ps |
| T521 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.3621416395 |
|
|
Apr 02 01:03:26 PM PDT 24 |
Apr 02 01:03:32 PM PDT 24 |
7167676938 ps |
| T522 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.290872547 |
|
|
Apr 02 01:05:51 PM PDT 24 |
Apr 02 01:06:22 PM PDT 24 |
23838004561 ps |
| T326 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.4099096249 |
|
|
Apr 02 01:04:13 PM PDT 24 |
Apr 02 01:05:58 PM PDT 24 |
76566499056 ps |
| T349 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2988078695 |
|
|
Apr 02 01:04:14 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
467429605626 ps |
| T523 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2939193232 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:28 PM PDT 24 |
3786952126 ps |
| T322 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1999025912 |
|
|
Apr 02 01:05:22 PM PDT 24 |
Apr 02 01:09:51 PM PDT 24 |
96371009260 ps |
| T524 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.637252977 |
|
|
Apr 02 01:02:52 PM PDT 24 |
Apr 02 01:02:56 PM PDT 24 |
3692665605 ps |
| T525 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.4117966045 |
|
|
Apr 02 01:03:02 PM PDT 24 |
Apr 02 01:03:08 PM PDT 24 |
2112150346 ps |
| T526 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1027218058 |
|
|
Apr 02 01:05:36 PM PDT 24 |
Apr 02 01:05:40 PM PDT 24 |
2525386471 ps |
| T80 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.612530089 |
|
|
Apr 02 01:02:53 PM PDT 24 |
Apr 02 01:03:55 PM PDT 24 |
22009848220 ps |
| T527 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2014053215 |
|
|
Apr 02 01:03:57 PM PDT 24 |
Apr 02 01:04:00 PM PDT 24 |
2185530830 ps |
| T528 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.566168829 |
|
|
Apr 02 01:04:52 PM PDT 24 |
Apr 02 01:04:55 PM PDT 24 |
2723409074 ps |
| T529 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.2714168984 |
|
|
Apr 02 01:02:47 PM PDT 24 |
Apr 02 01:02:54 PM PDT 24 |
2112875257 ps |
| T530 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1575413538 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:19 PM PDT 24 |
2628992872 ps |
| T531 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1601009817 |
|
|
Apr 02 01:04:10 PM PDT 24 |
Apr 02 01:04:13 PM PDT 24 |
2666570041 ps |
| T532 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1989505322 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:24 PM PDT 24 |
2059738350 ps |
| T533 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1844362002 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:44 PM PDT 24 |
3730081500 ps |
| T534 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3862170733 |
|
|
Apr 02 01:05:00 PM PDT 24 |
Apr 02 01:05:03 PM PDT 24 |
2621586958 ps |
| T535 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.808458921 |
|
|
Apr 02 01:05:22 PM PDT 24 |
Apr 02 01:07:19 PM PDT 24 |
43115927329 ps |
| T536 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3075995828 |
|
|
Apr 02 01:04:41 PM PDT 24 |
Apr 02 01:04:52 PM PDT 24 |
3576597312 ps |
| T321 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1997628306 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:09:27 PM PDT 24 |
193054970774 ps |
| T537 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1759595253 |
|
|
Apr 02 01:05:11 PM PDT 24 |
Apr 02 01:05:16 PM PDT 24 |
2441570973 ps |
| T538 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.345081695 |
|
|
Apr 02 01:03:27 PM PDT 24 |
Apr 02 01:05:35 PM PDT 24 |
47148926866 ps |
| T156 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2977822842 |
|
|
Apr 02 01:05:25 PM PDT 24 |
Apr 02 01:10:30 PM PDT 24 |
244974596817 ps |
| T301 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.2065676846 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:13:21 PM PDT 24 |
412066243995 ps |
| T539 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.34735350 |
|
|
Apr 02 01:05:22 PM PDT 24 |
Apr 02 01:05:28 PM PDT 24 |
2112034531 ps |
| T348 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.4258860294 |
|
|
Apr 02 01:02:48 PM PDT 24 |
Apr 02 01:05:12 PM PDT 24 |
3130727892701 ps |
| T540 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.80008801 |
|
|
Apr 02 01:05:47 PM PDT 24 |
Apr 02 01:06:05 PM PDT 24 |
38834167325 ps |
| T541 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.179027107 |
|
|
Apr 02 01:02:35 PM PDT 24 |
Apr 02 01:02:37 PM PDT 24 |
2632244857 ps |
| T542 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.485598245 |
|
|
Apr 02 01:05:32 PM PDT 24 |
Apr 02 01:05:35 PM PDT 24 |
2056152762 ps |
| T543 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.319109054 |
|
|
Apr 02 01:04:36 PM PDT 24 |
Apr 02 01:04:42 PM PDT 24 |
2519991434 ps |
| T544 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4020671491 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
2208751752 ps |
| T545 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.638411328 |
|
|
Apr 02 01:05:36 PM PDT 24 |
Apr 02 01:05:38 PM PDT 24 |
2043879858 ps |
| T320 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.987135505 |
|
|
Apr 02 01:05:42 PM PDT 24 |
Apr 02 01:08:09 PM PDT 24 |
105455866785 ps |
| T546 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2042939908 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
2526887555 ps |
| T547 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.979991784 |
|
|
Apr 02 01:04:33 PM PDT 24 |
Apr 02 01:04:39 PM PDT 24 |
2112551997 ps |
| T548 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1780295506 |
|
|
Apr 02 01:05:20 PM PDT 24 |
Apr 02 01:06:29 PM PDT 24 |
54547963013 ps |
| T549 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1209317199 |
|
|
Apr 02 01:03:13 PM PDT 24 |
Apr 02 01:03:14 PM PDT 24 |
2521884226 ps |
| T550 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.649439171 |
|
|
Apr 02 01:02:54 PM PDT 24 |
Apr 02 01:03:04 PM PDT 24 |
17027869220 ps |
| T157 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2724391551 |
|
|
Apr 02 01:02:50 PM PDT 24 |
Apr 02 01:05:11 PM PDT 24 |
213522812593 ps |
| T551 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3630434203 |
|
|
Apr 02 01:03:27 PM PDT 24 |
Apr 02 01:03:29 PM PDT 24 |
2486573957 ps |
| T180 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1667655418 |
|
|
Apr 02 01:03:56 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
105470428294 ps |
| T304 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4017957660 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:14:30 PM PDT 24 |
208698514139 ps |
| T552 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1422868898 |
|
|
Apr 02 01:04:49 PM PDT 24 |
Apr 02 01:04:57 PM PDT 24 |
2465436745 ps |
| T227 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3922256922 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:39 PM PDT 24 |
2397959619 ps |
| T553 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.242270387 |
|
|
Apr 02 01:05:01 PM PDT 24 |
Apr 02 01:05:04 PM PDT 24 |
2480919402 ps |
| T166 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1778590504 |
|
|
Apr 02 01:05:20 PM PDT 24 |
Apr 02 01:05:30 PM PDT 24 |
3730673369 ps |
| T554 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.3558768559 |
|
|
Apr 02 01:04:40 PM PDT 24 |
Apr 02 01:04:42 PM PDT 24 |
2076585537 ps |
| T555 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2044481409 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:11 PM PDT 24 |
2009178071 ps |
| T556 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1244867046 |
|
|
Apr 02 01:03:00 PM PDT 24 |
Apr 02 01:03:03 PM PDT 24 |
3712976141 ps |
| T557 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.130466187 |
|
|
Apr 02 01:02:49 PM PDT 24 |
Apr 02 01:05:41 PM PDT 24 |
116153271784 ps |
| T558 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2207902130 |
|
|
Apr 02 01:04:41 PM PDT 24 |
Apr 02 01:04:46 PM PDT 24 |
4986109859 ps |
| T559 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.856455989 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:20 PM PDT 24 |
3392912125 ps |
| T560 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2752676658 |
|
|
Apr 02 01:03:17 PM PDT 24 |
Apr 02 01:03:20 PM PDT 24 |
2020212435 ps |
| T561 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1195324788 |
|
|
Apr 02 01:02:58 PM PDT 24 |
Apr 02 01:03:04 PM PDT 24 |
2514247011 ps |
| T562 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.2444952398 |
|
|
Apr 02 01:03:43 PM PDT 24 |
Apr 02 01:04:01 PM PDT 24 |
13047387286 ps |
| T139 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3579430743 |
|
|
Apr 02 01:05:11 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
5332663543 ps |
| T563 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1781083564 |
|
|
Apr 02 01:04:34 PM PDT 24 |
Apr 02 01:04:36 PM PDT 24 |
2042101679 ps |
| T564 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.3600180107 |
|
|
Apr 02 01:02:46 PM PDT 24 |
Apr 02 01:02:51 PM PDT 24 |
2011817715 ps |
| T343 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1708621060 |
|
|
Apr 02 01:03:24 PM PDT 24 |
Apr 02 01:03:53 PM PDT 24 |
45570954726 ps |
| T565 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3271065718 |
|
|
Apr 02 01:02:42 PM PDT 24 |
Apr 02 01:02:45 PM PDT 24 |
3146377670 ps |
| T566 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2324261408 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
2517719169 ps |
| T567 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1236445605 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:51 PM PDT 24 |
3670838976 ps |
| T568 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.3369774318 |
|
|
Apr 02 01:04:32 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2029115032 ps |
| T569 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.923831238 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:18 PM PDT 24 |
2635040130 ps |
| T570 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3216270147 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:05:13 PM PDT 24 |
3722576090 ps |
| T571 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.3081837088 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
2113738953 ps |
| T572 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2219106413 |
|
|
Apr 02 01:05:39 PM PDT 24 |
Apr 02 01:08:23 PM PDT 24 |
59811429119 ps |
| T573 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.1267899073 |
|
|
Apr 02 01:03:34 PM PDT 24 |
Apr 02 01:03:36 PM PDT 24 |
2038683872 ps |
| T574 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2629601187 |
|
|
Apr 02 01:03:43 PM PDT 24 |
Apr 02 01:03:45 PM PDT 24 |
2523905708 ps |
| T575 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3262288806 |
|
|
Apr 02 01:05:24 PM PDT 24 |
Apr 02 01:05:27 PM PDT 24 |
2495600056 ps |
| T576 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2309583285 |
|
|
Apr 02 01:03:14 PM PDT 24 |
Apr 02 01:03:19 PM PDT 24 |
3903522799 ps |
| T577 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.976166853 |
|
|
Apr 02 01:04:26 PM PDT 24 |
Apr 02 01:04:34 PM PDT 24 |
3141324856 ps |
| T578 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.959958688 |
|
|
Apr 02 01:04:18 PM PDT 24 |
Apr 02 01:04:27 PM PDT 24 |
3411189404 ps |
| T579 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.4207356569 |
|
|
Apr 02 01:03:31 PM PDT 24 |
Apr 02 01:03:38 PM PDT 24 |
2464902404 ps |
| T580 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3763246096 |
|
|
Apr 02 01:05:27 PM PDT 24 |
Apr 02 01:05:33 PM PDT 24 |
3898145961 ps |
| T581 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2082539166 |
|
|
Apr 02 01:04:22 PM PDT 24 |
Apr 02 01:05:37 PM PDT 24 |
26331339142 ps |
| T582 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2969513298 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:24 PM PDT 24 |
2511996937 ps |
| T583 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3883725678 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:02:33 PM PDT 24 |
2283560404 ps |
| T584 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3522658391 |
|
|
Apr 02 01:03:40 PM PDT 24 |
Apr 02 01:03:46 PM PDT 24 |
2459825680 ps |
| T585 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.425608634 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:02:33 PM PDT 24 |
2962812772 ps |
| T586 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.3706152202 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
2124723840 ps |
| T313 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4164124618 |
|
|
Apr 02 01:05:47 PM PDT 24 |
Apr 02 01:06:57 PM PDT 24 |
101215247783 ps |
| T587 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.2097269939 |
|
|
Apr 02 01:04:14 PM PDT 24 |
Apr 02 01:04:15 PM PDT 24 |
2210479973 ps |
| T588 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.544748470 |
|
|
Apr 02 01:03:31 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
2191575074 ps |
| T589 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2666401489 |
|
|
Apr 02 01:03:25 PM PDT 24 |
Apr 02 01:03:30 PM PDT 24 |
2478847378 ps |
| T590 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.753795398 |
|
|
Apr 02 01:02:36 PM PDT 24 |
Apr 02 01:02:44 PM PDT 24 |
2479490736 ps |
| T591 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2646213210 |
|
|
Apr 02 01:05:39 PM PDT 24 |
Apr 02 01:05:42 PM PDT 24 |
2033325509 ps |
| T81 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2839060900 |
|
|
Apr 02 01:02:36 PM PDT 24 |
Apr 02 01:03:05 PM PDT 24 |
22021616644 ps |
| T592 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3614063653 |
|
|
Apr 02 01:05:07 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
2462120776 ps |
| T593 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.4293872293 |
|
|
Apr 02 01:03:04 PM PDT 24 |
Apr 02 01:03:18 PM PDT 24 |
10385914658 ps |
| T594 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1164024966 |
|
|
Apr 02 01:04:29 PM PDT 24 |
Apr 02 01:04:34 PM PDT 24 |
4256964062 ps |
| T595 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2855171586 |
|
|
Apr 02 01:05:00 PM PDT 24 |
Apr 02 01:06:27 PM PDT 24 |
32168039464 ps |
| T596 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1860195520 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:04:39 PM PDT 24 |
2107652214 ps |
| T597 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2728248411 |
|
|
Apr 02 01:03:47 PM PDT 24 |
Apr 02 01:03:52 PM PDT 24 |
2521921069 ps |
| T598 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1311293685 |
|
|
Apr 02 01:04:13 PM PDT 24 |
Apr 02 01:04:44 PM PDT 24 |
701942448448 ps |
| T599 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.480284715 |
|
|
Apr 02 01:05:37 PM PDT 24 |
Apr 02 01:05:40 PM PDT 24 |
2245883886 ps |
| T600 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.794811285 |
|
|
Apr 02 01:03:18 PM PDT 24 |
Apr 02 01:03:20 PM PDT 24 |
2492524028 ps |