| T601 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3297597050 |
|
|
Apr 02 01:03:31 PM PDT 24 |
Apr 02 01:04:05 PM PDT 24 |
70941078060 ps |
| T602 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3312783837 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:02:38 PM PDT 24 |
2510159715 ps |
| T102 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3596411857 |
|
|
Apr 02 01:05:40 PM PDT 24 |
Apr 02 01:09:43 PM PDT 24 |
1024442080784 ps |
| T228 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.4121714623 |
|
|
Apr 02 01:02:28 PM PDT 24 |
Apr 02 01:02:30 PM PDT 24 |
2132721770 ps |
| T229 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2875683451 |
|
|
Apr 02 01:03:06 PM PDT 24 |
Apr 02 01:03:12 PM PDT 24 |
2156174669 ps |
| T230 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3015288455 |
|
|
Apr 02 01:05:47 PM PDT 24 |
Apr 02 01:06:24 PM PDT 24 |
103521365609 ps |
| T104 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.243329937 |
|
|
Apr 02 01:03:57 PM PDT 24 |
Apr 02 01:04:05 PM PDT 24 |
5811718393 ps |
| T231 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3904202377 |
|
|
Apr 02 01:02:50 PM PDT 24 |
Apr 02 01:02:53 PM PDT 24 |
2537267367 ps |
| T232 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.3500940545 |
|
|
Apr 02 01:03:32 PM PDT 24 |
Apr 02 01:03:34 PM PDT 24 |
2131846206 ps |
| T233 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3290360355 |
|
|
Apr 02 01:04:07 PM PDT 24 |
Apr 02 01:04:10 PM PDT 24 |
2633437542 ps |
| T234 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.117886761 |
|
|
Apr 02 01:04:27 PM PDT 24 |
Apr 02 01:04:31 PM PDT 24 |
2537407875 ps |
| T235 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1001733245 |
|
|
Apr 02 01:04:27 PM PDT 24 |
Apr 02 01:04:35 PM PDT 24 |
2012309291 ps |
| T603 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3992453207 |
|
|
Apr 02 01:03:21 PM PDT 24 |
Apr 02 01:03:25 PM PDT 24 |
3644254091 ps |
| T604 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.648509968 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:24 PM PDT 24 |
3181601961 ps |
| T158 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.598020860 |
|
|
Apr 02 01:03:11 PM PDT 24 |
Apr 02 01:03:23 PM PDT 24 |
4249740323 ps |
| T605 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.755561347 |
|
|
Apr 02 01:04:36 PM PDT 24 |
Apr 02 01:05:10 PM PDT 24 |
42466000675 ps |
| T606 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2337716767 |
|
|
Apr 02 01:04:42 PM PDT 24 |
Apr 02 01:04:46 PM PDT 24 |
6948826624 ps |
| T607 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.996418472 |
|
|
Apr 02 01:02:36 PM PDT 24 |
Apr 02 01:02:39 PM PDT 24 |
2124471918 ps |
| T608 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2051826865 |
|
|
Apr 02 01:04:12 PM PDT 24 |
Apr 02 01:04:16 PM PDT 24 |
2600158495 ps |
| T609 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.752385169 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
2035556653 ps |
| T610 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3329501073 |
|
|
Apr 02 01:05:29 PM PDT 24 |
Apr 02 01:05:49 PM PDT 24 |
7077686178 ps |
| T611 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3734208860 |
|
|
Apr 02 01:04:36 PM PDT 24 |
Apr 02 01:04:41 PM PDT 24 |
2909866200 ps |
| T612 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.627507371 |
|
|
Apr 02 01:05:37 PM PDT 24 |
Apr 02 01:05:41 PM PDT 24 |
2467602822 ps |
| T613 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3804813003 |
|
|
Apr 02 01:03:23 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
3848050667 ps |
| T614 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4274826712 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:05:14 PM PDT 24 |
2807115901 ps |
| T615 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3652467496 |
|
|
Apr 02 01:04:39 PM PDT 24 |
Apr 02 01:04:43 PM PDT 24 |
3471344080 ps |
| T616 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.876308986 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:22 PM PDT 24 |
2508230128 ps |
| T276 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2713107545 |
|
|
Apr 02 01:04:51 PM PDT 24 |
Apr 02 01:05:50 PM PDT 24 |
106983162782 ps |
| T617 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1600800839 |
|
|
Apr 02 01:04:38 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
2114950241 ps |
| T307 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.915477604 |
|
|
Apr 02 01:05:45 PM PDT 24 |
Apr 02 01:07:08 PM PDT 24 |
123097277476 ps |
| T618 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2722147977 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:05:06 PM PDT 24 |
2542290924 ps |
| T619 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3258952395 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:04:24 PM PDT 24 |
39841023048 ps |
| T620 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.824921273 |
|
|
Apr 02 01:03:36 PM PDT 24 |
Apr 02 01:03:42 PM PDT 24 |
2449358420 ps |
| T621 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.46478402 |
|
|
Apr 02 01:02:32 PM PDT 24 |
Apr 02 01:02:39 PM PDT 24 |
2609098795 ps |
| T622 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1048343023 |
|
|
Apr 02 01:04:34 PM PDT 24 |
Apr 02 01:04:37 PM PDT 24 |
6202289858 ps |
| T623 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.783723319 |
|
|
Apr 02 01:02:37 PM PDT 24 |
Apr 02 01:02:39 PM PDT 24 |
2325065727 ps |
| T159 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2994507941 |
|
|
Apr 02 01:03:32 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
3192644138 ps |
| T624 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.568030696 |
|
|
Apr 02 01:02:47 PM PDT 24 |
Apr 02 01:03:55 PM PDT 24 |
24829525697 ps |
| T625 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.3841343521 |
|
|
Apr 02 01:04:00 PM PDT 24 |
Apr 02 01:04:02 PM PDT 24 |
2038861339 ps |
| T277 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2881914668 |
|
|
Apr 02 01:02:48 PM PDT 24 |
Apr 02 01:04:51 PM PDT 24 |
222054377052 ps |
| T626 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.1275702258 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:27 PM PDT 24 |
2137318834 ps |
| T627 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.51238360 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
5049908324 ps |
| T628 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.533761965 |
|
|
Apr 02 01:05:01 PM PDT 24 |
Apr 02 01:05:06 PM PDT 24 |
2618231383 ps |
| T629 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1497389080 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:54 PM PDT 24 |
2148185335 ps |
| T630 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1960960428 |
|
|
Apr 02 01:05:10 PM PDT 24 |
Apr 02 01:05:18 PM PDT 24 |
2627028783 ps |
| T631 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.1251619729 |
|
|
Apr 02 01:03:14 PM PDT 24 |
Apr 02 01:03:21 PM PDT 24 |
2112417509 ps |
| T632 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.78749206 |
|
|
Apr 02 01:03:52 PM PDT 24 |
Apr 02 01:03:59 PM PDT 24 |
2467387387 ps |
| T633 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2583663201 |
|
|
Apr 02 01:05:50 PM PDT 24 |
Apr 02 01:11:21 PM PDT 24 |
125024089240 ps |
| T634 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1368125294 |
|
|
Apr 02 01:04:19 PM PDT 24 |
Apr 02 01:04:20 PM PDT 24 |
5168276433 ps |
| T635 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2922817735 |
|
|
Apr 02 01:05:06 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
3796356576 ps |
| T636 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.611413230 |
|
|
Apr 02 01:02:54 PM PDT 24 |
Apr 02 01:02:58 PM PDT 24 |
2014922394 ps |
| T637 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.3525066661 |
|
|
Apr 02 01:05:01 PM PDT 24 |
Apr 02 01:05:07 PM PDT 24 |
2012116617 ps |
| T638 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1542828735 |
|
|
Apr 02 01:05:15 PM PDT 24 |
Apr 02 01:05:22 PM PDT 24 |
2513564663 ps |
| T639 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2746045421 |
|
|
Apr 02 01:03:25 PM PDT 24 |
Apr 02 01:03:30 PM PDT 24 |
2520969588 ps |
| T640 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.324515489 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:27 PM PDT 24 |
3334001044 ps |
| T641 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1693357489 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:20 PM PDT 24 |
2627570876 ps |
| T642 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2314689767 |
|
|
Apr 02 01:05:29 PM PDT 24 |
Apr 02 01:05:31 PM PDT 24 |
2472697964 ps |
| T643 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.3905604368 |
|
|
Apr 02 01:03:50 PM PDT 24 |
Apr 02 01:03:52 PM PDT 24 |
2120273137 ps |
| T644 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.719687532 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:24 PM PDT 24 |
2459791910 ps |
| T645 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3466949262 |
|
|
Apr 02 01:05:30 PM PDT 24 |
Apr 02 01:07:03 PM PDT 24 |
35602575911 ps |
| T646 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1111904988 |
|
|
Apr 02 01:05:06 PM PDT 24 |
Apr 02 01:05:17 PM PDT 24 |
3641541152 ps |
| T225 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2647213874 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
3302280318 ps |
| T647 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.303690269 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:13 PM PDT 24 |
2512246815 ps |
| T648 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.1763344154 |
|
|
Apr 02 01:02:37 PM PDT 24 |
Apr 02 01:02:43 PM PDT 24 |
2111975504 ps |
| T140 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3759002496 |
|
|
Apr 02 01:02:46 PM PDT 24 |
Apr 02 01:18:03 PM PDT 24 |
3541172973472 ps |
| T649 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3500734867 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:17 PM PDT 24 |
5237006877 ps |
| T650 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2537860703 |
|
|
Apr 02 01:05:43 PM PDT 24 |
Apr 02 01:06:48 PM PDT 24 |
24081254891 ps |
| T651 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.618086857 |
|
|
Apr 02 01:04:59 PM PDT 24 |
Apr 02 01:14:27 PM PDT 24 |
227736913053 ps |
| T652 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1898663187 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:05:21 PM PDT 24 |
43872179536 ps |
| T653 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.2419857426 |
|
|
Apr 02 01:03:36 PM PDT 24 |
Apr 02 01:08:02 PM PDT 24 |
114192761005 ps |
| T654 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4007384681 |
|
|
Apr 02 01:03:02 PM PDT 24 |
Apr 02 01:03:04 PM PDT 24 |
2273211592 ps |
| T655 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1230008518 |
|
|
Apr 02 01:05:32 PM PDT 24 |
Apr 02 01:05:41 PM PDT 24 |
3042294773 ps |
| T656 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3431721254 |
|
|
Apr 02 01:04:13 PM PDT 24 |
Apr 02 01:04:24 PM PDT 24 |
3694948799 ps |
| T657 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3155330321 |
|
|
Apr 02 01:02:49 PM PDT 24 |
Apr 02 01:02:58 PM PDT 24 |
2611145625 ps |
| T658 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2271359347 |
|
|
Apr 02 01:05:24 PM PDT 24 |
Apr 02 01:05:27 PM PDT 24 |
3643721623 ps |
| T659 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.726915748 |
|
|
Apr 02 01:02:38 PM PDT 24 |
Apr 02 01:02:40 PM PDT 24 |
2292183691 ps |
| T660 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1911925809 |
|
|
Apr 02 01:02:47 PM PDT 24 |
Apr 02 01:02:50 PM PDT 24 |
2628454827 ps |
| T661 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.530013677 |
|
|
Apr 02 01:03:55 PM PDT 24 |
Apr 02 01:03:56 PM PDT 24 |
3591571180 ps |
| T127 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.4016972040 |
|
|
Apr 02 01:04:30 PM PDT 24 |
Apr 02 01:06:49 PM PDT 24 |
59633822855 ps |
| T662 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1901767661 |
|
|
Apr 02 01:03:36 PM PDT 24 |
Apr 02 01:03:38 PM PDT 24 |
3309026698 ps |
| T663 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1913809162 |
|
|
Apr 02 01:04:18 PM PDT 24 |
Apr 02 01:04:21 PM PDT 24 |
2019083436 ps |
| T185 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1402870906 |
|
|
Apr 02 01:02:33 PM PDT 24 |
Apr 02 01:03:31 PM PDT 24 |
77522662733 ps |
| T194 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.4194464148 |
|
|
Apr 02 01:03:43 PM PDT 24 |
Apr 02 01:03:49 PM PDT 24 |
3784322064 ps |
| T195 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4226792733 |
|
|
Apr 02 01:05:20 PM PDT 24 |
Apr 02 01:05:22 PM PDT 24 |
2213143407 ps |
| T196 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.1625876564 |
|
|
Apr 02 01:04:38 PM PDT 24 |
Apr 02 01:04:57 PM PDT 24 |
6517158415 ps |
| T197 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3263012607 |
|
|
Apr 02 01:05:15 PM PDT 24 |
Apr 02 01:10:06 PM PDT 24 |
214002219166 ps |
| T198 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.500878815 |
|
|
Apr 02 01:03:04 PM PDT 24 |
Apr 02 01:03:08 PM PDT 24 |
2639159870 ps |
| T199 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2718210264 |
|
|
Apr 02 01:03:47 PM PDT 24 |
Apr 02 01:03:48 PM PDT 24 |
4094539753 ps |
| T200 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2459989972 |
|
|
Apr 02 01:05:25 PM PDT 24 |
Apr 02 01:08:33 PM PDT 24 |
75754319788 ps |
| T201 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3717995144 |
|
|
Apr 02 01:04:26 PM PDT 24 |
Apr 02 01:04:31 PM PDT 24 |
148649640403 ps |
| T202 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2624148581 |
|
|
Apr 02 01:05:25 PM PDT 24 |
Apr 02 01:05:27 PM PDT 24 |
2675884832 ps |
| T664 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2535540015 |
|
|
Apr 02 01:04:24 PM PDT 24 |
Apr 02 01:04:29 PM PDT 24 |
2448668286 ps |
| T55 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2526566762 |
|
|
Apr 02 01:02:34 PM PDT 24 |
Apr 02 01:04:23 PM PDT 24 |
37927207838 ps |
| T665 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.699053485 |
|
|
Apr 02 01:03:25 PM PDT 24 |
Apr 02 01:03:31 PM PDT 24 |
2112517361 ps |
| T666 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4267609333 |
|
|
Apr 02 01:05:00 PM PDT 24 |
Apr 02 01:05:02 PM PDT 24 |
2530727140 ps |
| T667 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.1507198849 |
|
|
Apr 02 01:03:18 PM PDT 24 |
Apr 02 01:06:02 PM PDT 24 |
249356759767 ps |
| T668 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.4226580969 |
|
|
Apr 02 01:04:47 PM PDT 24 |
Apr 02 01:04:53 PM PDT 24 |
3843271364 ps |
| T669 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3633197962 |
|
|
Apr 02 01:05:33 PM PDT 24 |
Apr 02 01:05:37 PM PDT 24 |
2796362809 ps |
| T670 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.780345386 |
|
|
Apr 02 01:04:52 PM PDT 24 |
Apr 02 01:04:56 PM PDT 24 |
2018098506 ps |
| T141 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3138462812 |
|
|
Apr 02 01:03:29 PM PDT 24 |
Apr 02 01:04:09 PM PDT 24 |
63943866834 ps |
| T671 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.3104426944 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:56 PM PDT 24 |
11583314198 ps |
| T672 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.708340538 |
|
|
Apr 02 01:03:18 PM PDT 24 |
Apr 02 01:07:07 PM PDT 24 |
191491930389 ps |
| T673 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.919960265 |
|
|
Apr 02 01:05:10 PM PDT 24 |
Apr 02 01:05:12 PM PDT 24 |
2136342922 ps |
| T674 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3630601765 |
|
|
Apr 02 01:03:17 PM PDT 24 |
Apr 02 01:03:29 PM PDT 24 |
5011742339 ps |
| T675 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3490938 |
|
|
Apr 02 01:05:42 PM PDT 24 |
Apr 02 01:06:35 PM PDT 24 |
73547746457 ps |
| T676 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.20429374 |
|
|
Apr 02 01:05:20 PM PDT 24 |
Apr 02 01:05:22 PM PDT 24 |
2038123031 ps |
| T677 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3557352251 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
147561855346 ps |
| T678 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1838862054 |
|
|
Apr 02 01:02:28 PM PDT 24 |
Apr 02 01:02:30 PM PDT 24 |
2095517192 ps |
| T323 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1796673980 |
|
|
Apr 02 01:05:44 PM PDT 24 |
Apr 02 01:07:20 PM PDT 24 |
102194460510 ps |
| T679 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2537390945 |
|
|
Apr 02 01:04:11 PM PDT 24 |
Apr 02 01:04:18 PM PDT 24 |
2175585080 ps |
| T347 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2522268531 |
|
|
Apr 02 01:04:42 PM PDT 24 |
Apr 02 01:05:29 PM PDT 24 |
15950704127 ps |
| T680 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.627822988 |
|
|
Apr 02 01:02:27 PM PDT 24 |
Apr 02 01:08:58 PM PDT 24 |
144251674074 ps |
| T681 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2664458866 |
|
|
Apr 02 01:04:07 PM PDT 24 |
Apr 02 01:04:09 PM PDT 24 |
2075290095 ps |
| T682 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1743741344 |
|
|
Apr 02 01:04:42 PM PDT 24 |
Apr 02 01:04:46 PM PDT 24 |
2241258925 ps |
| T683 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4194573914 |
|
|
Apr 02 01:05:10 PM PDT 24 |
Apr 02 01:05:14 PM PDT 24 |
2193250817 ps |
| T684 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.412137491 |
|
|
Apr 02 01:02:56 PM PDT 24 |
Apr 02 01:03:05 PM PDT 24 |
3226710348 ps |
| T685 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2275011725 |
|
|
Apr 02 01:05:01 PM PDT 24 |
Apr 02 01:10:19 PM PDT 24 |
164702549523 ps |
| T686 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.627982692 |
|
|
Apr 02 01:05:52 PM PDT 24 |
Apr 02 01:06:14 PM PDT 24 |
38529265208 ps |
| T687 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1165210265 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:02:32 PM PDT 24 |
2109221818 ps |
| T688 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.2092455576 |
|
|
Apr 02 01:03:34 PM PDT 24 |
Apr 02 01:03:40 PM PDT 24 |
2113703025 ps |
| T221 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.2223067391 |
|
|
Apr 02 01:02:36 PM PDT 24 |
Apr 02 01:03:12 PM PDT 24 |
18682477034 ps |
| T689 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2650152120 |
|
|
Apr 02 01:03:41 PM PDT 24 |
Apr 02 01:03:43 PM PDT 24 |
2044400506 ps |
| T690 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.505042464 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:04:43 PM PDT 24 |
3230581960 ps |
| T691 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2135897129 |
|
|
Apr 02 01:03:57 PM PDT 24 |
Apr 02 01:04:25 PM PDT 24 |
36290617993 ps |
| T692 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2213060602 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:03:36 PM PDT 24 |
2542661047 ps |
| T693 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.4114808150 |
|
|
Apr 02 01:04:30 PM PDT 24 |
Apr 02 01:04:32 PM PDT 24 |
3648108771 ps |
| T694 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1906709239 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:14 PM PDT 24 |
3234082586 ps |
| T222 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2091608289 |
|
|
Apr 02 01:05:13 PM PDT 24 |
Apr 02 01:06:55 PM PDT 24 |
525307757500 ps |
| T695 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.241966728 |
|
|
Apr 02 01:04:36 PM PDT 24 |
Apr 02 01:06:50 PM PDT 24 |
51334753825 ps |
| T696 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2938457455 |
|
|
Apr 02 01:03:34 PM PDT 24 |
Apr 02 01:05:34 PM PDT 24 |
176447116950 ps |
| T697 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2732239494 |
|
|
Apr 02 01:03:36 PM PDT 24 |
Apr 02 01:03:37 PM PDT 24 |
2669896589 ps |
| T698 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3866656786 |
|
|
Apr 02 01:04:11 PM PDT 24 |
Apr 02 01:04:13 PM PDT 24 |
4405073529 ps |
| T103 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.801464072 |
|
|
Apr 02 01:05:22 PM PDT 24 |
Apr 02 01:06:20 PM PDT 24 |
99903352007 ps |
| T699 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1688728387 |
|
|
Apr 02 01:03:20 PM PDT 24 |
Apr 02 01:03:28 PM PDT 24 |
2509789893 ps |
| T700 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.374246247 |
|
|
Apr 02 01:05:14 PM PDT 24 |
Apr 02 01:05:19 PM PDT 24 |
2463099556 ps |
| T701 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3253706570 |
|
|
Apr 02 01:03:34 PM PDT 24 |
Apr 02 01:03:42 PM PDT 24 |
2613071165 ps |
| T702 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2700972400 |
|
|
Apr 02 01:02:38 PM PDT 24 |
Apr 02 01:04:14 PM PDT 24 |
59492477700 ps |
| T703 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.558881274 |
|
|
Apr 02 01:03:26 PM PDT 24 |
Apr 02 01:03:33 PM PDT 24 |
7448985844 ps |
| T704 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3068266604 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:03:40 PM PDT 24 |
2617827207 ps |
| T705 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2976793028 |
|
|
Apr 02 01:03:57 PM PDT 24 |
Apr 02 01:04:05 PM PDT 24 |
2450619111 ps |
| T706 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3213204303 |
|
|
Apr 02 01:03:43 PM PDT 24 |
Apr 02 01:04:13 PM PDT 24 |
20595317787 ps |
| T226 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.249983406 |
|
|
Apr 02 01:05:22 PM PDT 24 |
Apr 02 01:05:38 PM PDT 24 |
12841400345 ps |
| T707 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2058361384 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:18 PM PDT 24 |
3238908225 ps |
| T708 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.578824435 |
|
|
Apr 02 01:03:53 PM PDT 24 |
Apr 02 01:03:56 PM PDT 24 |
3086849120 ps |
| T128 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2762935951 |
|
|
Apr 02 01:03:45 PM PDT 24 |
Apr 02 01:03:48 PM PDT 24 |
5668977582 ps |
| T709 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2146735781 |
|
|
Apr 02 01:04:13 PM PDT 24 |
Apr 02 01:09:29 PM PDT 24 |
111017163886 ps |
| T710 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3433219874 |
|
|
Apr 02 01:04:17 PM PDT 24 |
Apr 02 01:04:19 PM PDT 24 |
2251251605 ps |
| T711 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1865320528 |
|
|
Apr 02 01:05:39 PM PDT 24 |
Apr 02 01:06:42 PM PDT 24 |
49916064238 ps |
| T712 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.8406355 |
|
|
Apr 02 01:03:55 PM PDT 24 |
Apr 02 01:04:03 PM PDT 24 |
3824661588 ps |
| T346 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1016431201 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:06:27 PM PDT 24 |
84677393636 ps |
| T713 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.297675739 |
|
|
Apr 02 01:03:18 PM PDT 24 |
Apr 02 01:03:19 PM PDT 24 |
2970029879 ps |
| T714 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1288157294 |
|
|
Apr 02 01:05:12 PM PDT 24 |
Apr 02 01:05:18 PM PDT 24 |
3537434293 ps |
| T142 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.1803361804 |
|
|
Apr 02 01:04:03 PM PDT 24 |
Apr 02 01:07:22 PM PDT 24 |
76035537163 ps |
| T715 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.1042632586 |
|
|
Apr 02 01:04:11 PM PDT 24 |
Apr 02 01:04:14 PM PDT 24 |
2128321575 ps |
| T316 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.558933232 |
|
|
Apr 02 01:05:44 PM PDT 24 |
Apr 02 01:08:20 PM PDT 24 |
55384356454 ps |
| T716 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3788875534 |
|
|
Apr 02 01:05:20 PM PDT 24 |
Apr 02 01:05:29 PM PDT 24 |
3294021355 ps |
| T717 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.2830619130 |
|
|
Apr 02 01:04:51 PM PDT 24 |
Apr 02 01:04:59 PM PDT 24 |
2011171190 ps |
| T718 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3512616332 |
|
|
Apr 02 01:05:31 PM PDT 24 |
Apr 02 01:16:49 PM PDT 24 |
548619151560 ps |
| T719 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3393658424 |
|
|
Apr 02 01:04:09 PM PDT 24 |
Apr 02 01:04:15 PM PDT 24 |
2468260966 ps |
| T720 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3320505703 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
2042433300 ps |
| T721 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1222891868 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:08 PM PDT 24 |
2481920371 ps |
| T722 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.2851083984 |
|
|
Apr 02 01:04:10 PM PDT 24 |
Apr 02 01:04:17 PM PDT 24 |
2010713421 ps |
| T723 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.3401013779 |
|
|
Apr 02 01:04:10 PM PDT 24 |
Apr 02 01:04:37 PM PDT 24 |
13913482816 ps |
| T724 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.33151082 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:09 PM PDT 24 |
3493576084 ps |
| T725 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.649304783 |
|
|
Apr 02 01:03:06 PM PDT 24 |
Apr 02 01:03:08 PM PDT 24 |
2043725115 ps |
| T726 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.498248674 |
|
|
Apr 02 01:05:25 PM PDT 24 |
Apr 02 01:05:28 PM PDT 24 |
2036813493 ps |
| T727 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2426755774 |
|
|
Apr 02 01:02:39 PM PDT 24 |
Apr 02 01:03:01 PM PDT 24 |
332670939179 ps |
| T728 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.4161104389 |
|
|
Apr 02 01:04:20 PM PDT 24 |
Apr 02 01:08:28 PM PDT 24 |
97711454116 ps |
| T729 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2658716603 |
|
|
Apr 02 01:05:14 PM PDT 24 |
Apr 02 01:05:18 PM PDT 24 |
2622097034 ps |
| T730 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1929666093 |
|
|
Apr 02 01:03:33 PM PDT 24 |
Apr 02 01:03:35 PM PDT 24 |
2645839372 ps |
| T731 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.154676131 |
|
|
Apr 02 01:04:12 PM PDT 24 |
Apr 02 01:05:18 PM PDT 24 |
103327222342 ps |
| T133 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3055328018 |
|
|
Apr 02 01:05:14 PM PDT 24 |
Apr 02 01:05:17 PM PDT 24 |
5569429973 ps |
| T732 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3194503531 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:01 PM PDT 24 |
2068585614 ps |
| T733 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1010616363 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:28 PM PDT 24 |
69022695304 ps |
| T734 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1381100419 |
|
|
Apr 02 01:02:58 PM PDT 24 |
Apr 02 01:03:00 PM PDT 24 |
3186871703 ps |
| T257 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2301997309 |
|
|
Apr 02 01:02:31 PM PDT 24 |
Apr 02 01:03:03 PM PDT 24 |
22015449475 ps |
| T735 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2602492926 |
|
|
Apr 02 01:04:43 PM PDT 24 |
Apr 02 01:04:46 PM PDT 24 |
3106168846 ps |
| T736 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3435098189 |
|
|
Apr 02 01:05:36 PM PDT 24 |
Apr 02 01:05:46 PM PDT 24 |
6995909021 ps |
| T737 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3912553600 |
|
|
Apr 02 01:04:39 PM PDT 24 |
Apr 02 01:04:48 PM PDT 24 |
4697456631 ps |
| T738 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.2995884708 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:01 PM PDT 24 |
2121127789 ps |
| T739 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3783942511 |
|
|
Apr 02 01:05:49 PM PDT 24 |
Apr 02 01:07:15 PM PDT 24 |
63837041714 ps |
| T740 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2813801050 |
|
|
Apr 02 01:02:35 PM PDT 24 |
Apr 02 01:02:37 PM PDT 24 |
2061095178 ps |
| T741 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3905643654 |
|
|
Apr 02 01:04:12 PM PDT 24 |
Apr 02 01:04:15 PM PDT 24 |
2632046377 ps |
| T742 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1095610688 |
|
|
Apr 02 01:04:47 PM PDT 24 |
Apr 02 01:04:53 PM PDT 24 |
3645675787 ps |
| T743 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3322298185 |
|
|
Apr 02 01:04:22 PM PDT 24 |
Apr 02 01:04:57 PM PDT 24 |
60102162734 ps |
| T744 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.1264702164 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:24 PM PDT 24 |
2115669647 ps |
| T745 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1369553465 |
|
|
Apr 02 01:03:37 PM PDT 24 |
Apr 02 01:10:40 PM PDT 24 |
163608038528 ps |
| T746 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1799334186 |
|
|
Apr 02 01:05:38 PM PDT 24 |
Apr 02 01:06:47 PM PDT 24 |
25832930740 ps |
| T747 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.2290565650 |
|
|
Apr 02 01:03:21 PM PDT 24 |
Apr 02 01:03:24 PM PDT 24 |
3917715657 ps |
| T748 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1588493026 |
|
|
Apr 02 01:03:40 PM PDT 24 |
Apr 02 01:03:48 PM PDT 24 |
6252989062 ps |
| T84 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.792573466 |
|
|
Apr 02 01:03:05 PM PDT 24 |
Apr 02 01:03:42 PM PDT 24 |
152739824480 ps |
| T749 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3808145552 |
|
|
Apr 02 01:04:59 PM PDT 24 |
Apr 02 01:05:11 PM PDT 24 |
4888034663 ps |
| T750 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2165435423 |
|
|
Apr 02 01:04:08 PM PDT 24 |
Apr 02 01:04:15 PM PDT 24 |
2512465690 ps |
| T751 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.1058287851 |
|
|
Apr 02 01:05:00 PM PDT 24 |
Apr 02 01:05:02 PM PDT 24 |
2126759852 ps |
| T752 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.760788420 |
|
|
Apr 02 01:03:35 PM PDT 24 |
Apr 02 01:03:38 PM PDT 24 |
3336047986 ps |
| T134 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.607396306 |
|
|
Apr 02 01:05:03 PM PDT 24 |
Apr 02 01:05:05 PM PDT 24 |
6754472450 ps |
| T753 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.3337269631 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:05:06 PM PDT 24 |
2044672650 ps |
| T129 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2180341565 |
|
|
Apr 02 01:04:31 PM PDT 24 |
Apr 02 01:05:06 PM PDT 24 |
53863137028 ps |
| T754 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.896273544 |
|
|
Apr 02 01:02:34 PM PDT 24 |
Apr 02 01:02:38 PM PDT 24 |
2402863736 ps |
| T755 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3532158560 |
|
|
Apr 02 01:03:41 PM PDT 24 |
Apr 02 01:03:45 PM PDT 24 |
2618654071 ps |
| T756 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.3245686389 |
|
|
Apr 02 01:04:18 PM PDT 24 |
Apr 02 01:04:29 PM PDT 24 |
4240647094 ps |
| T148 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.710456806 |
|
|
Apr 02 01:05:19 PM PDT 24 |
Apr 02 01:07:30 PM PDT 24 |
45737833180 ps |
| T757 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3185788383 |
|
|
Apr 02 01:05:18 PM PDT 24 |
Apr 02 01:05:26 PM PDT 24 |
9124178615 ps |
| T758 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3873530699 |
|
|
Apr 02 01:05:16 PM PDT 24 |
Apr 02 01:05:23 PM PDT 24 |
2447658069 ps |
| T98 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1516368370 |
|
|
Apr 02 01:05:49 PM PDT 24 |
Apr 02 01:10:32 PM PDT 24 |
108389314739 ps |
| T759 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2323666167 |
|
|
Apr 02 01:02:42 PM PDT 24 |
Apr 02 01:02:46 PM PDT 24 |
5606325554 ps |
| T760 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.120393618 |
|
|
Apr 02 01:05:04 PM PDT 24 |
Apr 02 01:05:07 PM PDT 24 |
2115409077 ps |
| T761 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2999254423 |
|
|
Apr 02 01:03:40 PM PDT 24 |
Apr 02 01:07:39 PM PDT 24 |
83664769042 ps |
| T762 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.697084140 |
|
|
Apr 02 01:04:34 PM PDT 24 |
Apr 02 01:04:36 PM PDT 24 |
2185732480 ps |
| T763 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1517788002 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:08 PM PDT 24 |
2626163001 ps |
| T764 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.2506487015 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:18 PM PDT 24 |
2125078251 ps |
| T765 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3241864934 |
|
|
Apr 02 01:03:28 PM PDT 24 |
Apr 02 01:03:31 PM PDT 24 |
3493192120 ps |
| T258 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.467618120 |
|
|
Apr 02 01:02:53 PM PDT 24 |
Apr 02 01:03:01 PM PDT 24 |
42579046104 ps |
| T766 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1273720926 |
|
|
Apr 02 01:05:41 PM PDT 24 |
Apr 02 01:09:02 PM PDT 24 |
81305720790 ps |
| T275 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2758917135 |
|
|
Apr 02 01:03:51 PM PDT 24 |
Apr 02 01:05:34 PM PDT 24 |
39910074176 ps |
| T767 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1883186550 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:04:44 PM PDT 24 |
3880051565 ps |
| T308 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.4149335197 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:05:09 PM PDT 24 |
88835661555 ps |
| T220 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3325104460 |
|
|
Apr 02 01:04:07 PM PDT 24 |
Apr 02 01:04:13 PM PDT 24 |
4854445101 ps |
| T768 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4187777644 |
|
|
Apr 02 01:05:21 PM PDT 24 |
Apr 02 01:05:25 PM PDT 24 |
2615603075 ps |
| T769 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3502226708 |
|
|
Apr 02 01:04:45 PM PDT 24 |
Apr 02 01:06:36 PM PDT 24 |
42138465593 ps |
| T770 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2908381580 |
|
|
Apr 02 01:03:44 PM PDT 24 |
Apr 02 01:11:45 PM PDT 24 |
2780673144831 ps |
| T771 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1676372938 |
|
|
Apr 02 01:04:39 PM PDT 24 |
Apr 02 01:04:43 PM PDT 24 |
2533142281 ps |
| T772 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.1930809728 |
|
|
Apr 02 01:05:32 PM PDT 24 |
Apr 02 01:05:38 PM PDT 24 |
2115055709 ps |
| T773 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1350489244 |
|
|
Apr 02 01:05:10 PM PDT 24 |
Apr 02 01:05:12 PM PDT 24 |
2141618873 ps |
| T774 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1231325132 |
|
|
Apr 02 01:02:30 PM PDT 24 |
Apr 02 01:02:50 PM PDT 24 |
26359481263 ps |
| T775 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3008519305 |
|
|
Apr 02 01:04:35 PM PDT 24 |
Apr 02 01:04:47 PM PDT 24 |
3627758864 ps |
| T776 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1408362665 |
|
|
Apr 02 01:03:15 PM PDT 24 |
Apr 02 01:03:19 PM PDT 24 |
7263854202 ps |
| T777 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3984894427 |
|
|
Apr 02 01:03:26 PM PDT 24 |
Apr 02 01:03:27 PM PDT 24 |
2536789987 ps |
| T778 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.841476974 |
|
|
Apr 02 01:04:41 PM PDT 24 |
Apr 02 01:06:40 PM PDT 24 |
42127219081 ps |
| T212 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.972240488 |
|
|
Apr 02 01:04:09 PM PDT 24 |
Apr 02 01:06:15 PM PDT 24 |
1964424419656 ps |
| T779 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1093624136 |
|
|
Apr 02 01:03:48 PM PDT 24 |
Apr 02 01:03:50 PM PDT 24 |
2543162901 ps |
| T85 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1399276825 |
|
|
Apr 02 01:02:35 PM PDT 24 |
Apr 02 01:05:10 PM PDT 24 |
993422549789 ps |
| T780 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.420780320 |
|
|
Apr 02 01:05:05 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
3236219112 ps |
| T781 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3382782206 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:56 PM PDT 24 |
8066801417 ps |
| T782 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.912656460 |
|
|
Apr 02 01:03:02 PM PDT 24 |
Apr 02 01:05:44 PM PDT 24 |
130773962083 ps |
| T783 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.47194263 |
|
|
Apr 02 01:03:58 PM PDT 24 |
Apr 02 01:04:04 PM PDT 24 |
2053512251 ps |
| T784 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3748685871 |
|
|
Apr 02 01:03:16 PM PDT 24 |
Apr 02 01:03:17 PM PDT 24 |
3336019683 ps |
| T785 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3546700475 |
|
|
Apr 02 01:04:50 PM PDT 24 |
Apr 02 01:04:57 PM PDT 24 |
2454075576 ps |
| T786 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.2687969587 |
|
|
Apr 02 01:04:49 PM PDT 24 |
Apr 02 01:04:53 PM PDT 24 |
2119910908 ps |
| T345 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2336076480 |
|
|
Apr 02 01:05:39 PM PDT 24 |
Apr 02 01:06:28 PM PDT 24 |
102734377052 ps |
| T787 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1731742249 |
|
|
Apr 02 01:05:51 PM PDT 24 |
Apr 02 01:07:31 PM PDT 24 |
36204383899 ps |
| T317 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2426588998 |
|
|
Apr 02 01:04:33 PM PDT 24 |
Apr 02 01:05:15 PM PDT 24 |
59947107009 ps |
| T788 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.3262260362 |
|
|
Apr 02 01:03:24 PM PDT 24 |
Apr 02 01:03:26 PM PDT 24 |
2023663125 ps |
| T27 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.446952703 |
|
|
Apr 02 12:30:31 PM PDT 24 |
Apr 02 12:30:36 PM PDT 24 |
2165081683 ps |
| T28 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.168402852 |
|
|
Apr 02 12:30:27 PM PDT 24 |
Apr 02 12:30:43 PM PDT 24 |
22468170785 ps |
| T789 |
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3719001060 |
|
|
Apr 02 12:30:34 PM PDT 24 |
Apr 02 12:30:40 PM PDT 24 |
2011729844 ps |
| T790 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3156399612 |
|
|
Apr 02 12:30:37 PM PDT 24 |
Apr 02 12:30:41 PM PDT 24 |
2018202112 ps |
| T29 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1866546914 |
|
|
Apr 02 12:30:29 PM PDT 24 |
Apr 02 12:30:31 PM PDT 24 |
2088368492 ps |
| T791 |
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.714099173 |
|
|
Apr 02 12:30:42 PM PDT 24 |
Apr 02 12:30:44 PM PDT 24 |
2042547207 ps |
| T792 |
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.3675450710 |
|
|
Apr 02 12:30:34 PM PDT 24 |
Apr 02 12:30:42 PM PDT 24 |
2019540956 ps |