T428 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4114934230 |
|
|
Apr 28 12:23:44 PM PDT 24 |
Apr 28 12:23:50 PM PDT 24 |
2750006048 ps |
T429 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.730028673 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:23:28 PM PDT 24 |
9089194637 ps |
T430 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.2733565063 |
|
|
Apr 28 12:22:59 PM PDT 24 |
Apr 28 12:23:10 PM PDT 24 |
2025896963 ps |
T431 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1851715745 |
|
|
Apr 28 12:23:37 PM PDT 24 |
Apr 28 12:23:45 PM PDT 24 |
2512935613 ps |
T432 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.1766996482 |
|
|
Apr 28 12:21:41 PM PDT 24 |
Apr 28 12:21:44 PM PDT 24 |
2134362055 ps |
T147 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.4137744089 |
|
|
Apr 28 12:22:48 PM PDT 24 |
Apr 28 12:23:01 PM PDT 24 |
4411783164 ps |
T82 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3327921363 |
|
|
Apr 28 12:22:21 PM PDT 24 |
Apr 28 12:25:33 PM PDT 24 |
3625385373264 ps |
T151 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1318715504 |
|
|
Apr 28 12:22:03 PM PDT 24 |
Apr 28 12:22:08 PM PDT 24 |
3208413491 ps |
T433 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.2120191762 |
|
|
Apr 28 12:23:29 PM PDT 24 |
Apr 28 12:23:36 PM PDT 24 |
2013257287 ps |
T323 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1058013042 |
|
|
Apr 28 12:23:19 PM PDT 24 |
Apr 28 12:24:30 PM PDT 24 |
110409074872 ps |
T434 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.299436314 |
|
|
Apr 28 12:20:10 PM PDT 24 |
Apr 28 12:20:19 PM PDT 24 |
2610805388 ps |
T322 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.4133158755 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:25:17 PM PDT 24 |
100644592562 ps |
T83 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.648179087 |
|
|
Apr 28 12:22:28 PM PDT 24 |
Apr 28 12:23:26 PM PDT 24 |
96233423800 ps |
T435 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.3755906295 |
|
|
Apr 28 12:23:00 PM PDT 24 |
Apr 28 12:23:45 PM PDT 24 |
29136279233 ps |
T436 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.682497256 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:23:19 PM PDT 24 |
4547481502 ps |
T437 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2243913101 |
|
|
Apr 28 12:22:08 PM PDT 24 |
Apr 28 12:22:15 PM PDT 24 |
2516204177 ps |
T438 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3394536650 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:22:02 PM PDT 24 |
2471329998 ps |
T439 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.4221335033 |
|
|
Apr 28 12:23:05 PM PDT 24 |
Apr 28 12:23:19 PM PDT 24 |
3761535838 ps |
T440 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3461179592 |
|
|
Apr 28 12:23:20 PM PDT 24 |
Apr 28 12:23:25 PM PDT 24 |
2089848166 ps |
T441 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1746722234 |
|
|
Apr 28 12:20:37 PM PDT 24 |
Apr 28 12:20:40 PM PDT 24 |
2211298704 ps |
T212 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1820130421 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:23:10 PM PDT 24 |
2465635075 ps |
T267 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.4001239145 |
|
|
Apr 28 12:21:12 PM PDT 24 |
Apr 28 12:21:21 PM PDT 24 |
3355127290 ps |
T442 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.2224176074 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:21:56 PM PDT 24 |
2136738062 ps |
T443 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2094646888 |
|
|
Apr 28 12:20:22 PM PDT 24 |
Apr 28 12:20:24 PM PDT 24 |
2030653268 ps |
T444 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2433308378 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:22:50 PM PDT 24 |
4159300967 ps |
T99 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1367403253 |
|
|
Apr 28 12:23:23 PM PDT 24 |
Apr 28 12:26:37 PM PDT 24 |
69947223278 ps |
T445 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.3030195998 |
|
|
Apr 28 12:22:40 PM PDT 24 |
Apr 28 12:22:51 PM PDT 24 |
2011901660 ps |
T100 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2656563856 |
|
|
Apr 28 12:20:56 PM PDT 24 |
Apr 28 12:23:42 PM PDT 24 |
122760101850 ps |
T268 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1747915870 |
|
|
Apr 28 12:23:06 PM PDT 24 |
Apr 28 12:25:59 PM PDT 24 |
60485551107 ps |
T291 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2617812227 |
|
|
Apr 28 12:24:22 PM PDT 24 |
Apr 28 12:24:28 PM PDT 24 |
2512190433 ps |
T292 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3781544077 |
|
|
Apr 28 12:22:34 PM PDT 24 |
Apr 28 12:22:43 PM PDT 24 |
2511996679 ps |
T211 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.686974940 |
|
|
Apr 28 12:23:23 PM PDT 24 |
Apr 28 12:23:31 PM PDT 24 |
2751569747 ps |
T293 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3359447491 |
|
|
Apr 28 12:21:50 PM PDT 24 |
Apr 28 12:21:59 PM PDT 24 |
2459675476 ps |
T294 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.2996937089 |
|
|
Apr 28 12:22:58 PM PDT 24 |
Apr 28 12:23:11 PM PDT 24 |
2114207872 ps |
T295 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1098027677 |
|
|
Apr 28 12:23:05 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
2033871720 ps |
T101 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2942232309 |
|
|
Apr 28 12:23:55 PM PDT 24 |
Apr 28 12:25:07 PM PDT 24 |
25330579423 ps |
T296 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3743898086 |
|
|
Apr 28 12:21:57 PM PDT 24 |
Apr 28 12:22:09 PM PDT 24 |
2448496576 ps |
T297 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2620228447 |
|
|
Apr 28 12:22:46 PM PDT 24 |
Apr 28 12:23:02 PM PDT 24 |
2010269535 ps |
T446 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1218212692 |
|
|
Apr 28 12:23:09 PM PDT 24 |
Apr 28 12:23:15 PM PDT 24 |
3520751431 ps |
T361 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2126806572 |
|
|
Apr 28 12:22:34 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
21291540880 ps |
T447 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2602580288 |
|
|
Apr 28 12:23:28 PM PDT 24 |
Apr 28 12:23:36 PM PDT 24 |
2477687958 ps |
T354 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.295948431 |
|
|
Apr 28 12:23:45 PM PDT 24 |
Apr 28 12:31:54 PM PDT 24 |
186470593768 ps |
T152 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1014336485 |
|
|
Apr 28 12:19:57 PM PDT 24 |
Apr 28 12:20:00 PM PDT 24 |
14026389295 ps |
T87 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.1946911866 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:36:04 PM PDT 24 |
324191271733 ps |
T124 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2772187525 |
|
|
Apr 28 12:23:19 PM PDT 24 |
Apr 28 12:23:24 PM PDT 24 |
2516700123 ps |
T125 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.3579578420 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:23:01 PM PDT 24 |
2115212292 ps |
T126 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.4156531895 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
2036247028 ps |
T127 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1393231579 |
|
|
Apr 28 12:23:43 PM PDT 24 |
Apr 28 12:24:51 PM PDT 24 |
94654805126 ps |
T128 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4128080445 |
|
|
Apr 28 12:23:42 PM PDT 24 |
Apr 28 12:24:49 PM PDT 24 |
100510185362 ps |
T129 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3239089317 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
3368674322 ps |
T88 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2831344811 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:23:20 PM PDT 24 |
10900257144 ps |
T130 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3703786174 |
|
|
Apr 28 12:23:58 PM PDT 24 |
Apr 28 12:24:11 PM PDT 24 |
2511903886 ps |
T131 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.450675902 |
|
|
Apr 28 12:18:52 PM PDT 24 |
Apr 28 12:18:55 PM PDT 24 |
2653143168 ps |
T448 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.1008856076 |
|
|
Apr 28 12:22:45 PM PDT 24 |
Apr 28 12:22:57 PM PDT 24 |
3266087509 ps |
T356 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2888440224 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:24:38 PM PDT 24 |
173692082266 ps |
T133 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3664062309 |
|
|
Apr 28 12:22:46 PM PDT 24 |
Apr 28 12:27:52 PM PDT 24 |
2140554041371 ps |
T449 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.925319785 |
|
|
Apr 28 12:22:55 PM PDT 24 |
Apr 28 12:23:12 PM PDT 24 |
2013645297 ps |
T81 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1832249058 |
|
|
Apr 28 12:23:20 PM PDT 24 |
Apr 28 12:23:58 PM PDT 24 |
77398837861 ps |
T450 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.73246543 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
2468401760 ps |
T451 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2970081394 |
|
|
Apr 28 12:22:50 PM PDT 24 |
Apr 28 12:23:08 PM PDT 24 |
2510150283 ps |
T452 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1018013218 |
|
|
Apr 28 12:23:45 PM PDT 24 |
Apr 28 12:23:55 PM PDT 24 |
2610483975 ps |
T453 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1772844565 |
|
|
Apr 28 12:22:39 PM PDT 24 |
Apr 28 12:22:46 PM PDT 24 |
2131944585 ps |
T454 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.765425362 |
|
|
Apr 28 12:22:46 PM PDT 24 |
Apr 28 12:23:01 PM PDT 24 |
2112202708 ps |
T455 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1877344080 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:21:57 PM PDT 24 |
5013054783 ps |
T456 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.370085449 |
|
|
Apr 28 12:22:36 PM PDT 24 |
Apr 28 12:22:42 PM PDT 24 |
3737886776 ps |
T457 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.2046534678 |
|
|
Apr 28 12:21:55 PM PDT 24 |
Apr 28 12:22:10 PM PDT 24 |
10046645503 ps |
T76 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1503760600 |
|
|
Apr 28 12:23:46 PM PDT 24 |
Apr 28 12:27:05 PM PDT 24 |
71591884908 ps |
T458 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.1161994445 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
2020226219 ps |
T459 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.1212316179 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:22:00 PM PDT 24 |
2134316177 ps |
T460 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1783651738 |
|
|
Apr 28 12:23:02 PM PDT 24 |
Apr 28 12:23:19 PM PDT 24 |
3263464981 ps |
T330 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.757006016 |
|
|
Apr 28 12:23:31 PM PDT 24 |
Apr 28 12:24:12 PM PDT 24 |
111691641497 ps |
T461 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.10750003 |
|
|
Apr 28 12:22:50 PM PDT 24 |
Apr 28 12:23:09 PM PDT 24 |
2511898479 ps |
T462 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4157788344 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
2472171666 ps |
T463 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2773965424 |
|
|
Apr 28 12:23:25 PM PDT 24 |
Apr 28 12:23:37 PM PDT 24 |
3537354073 ps |
T464 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.1339052471 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:27:28 PM PDT 24 |
130566927301 ps |
T465 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1836420561 |
|
|
Apr 28 12:19:35 PM PDT 24 |
Apr 28 12:19:43 PM PDT 24 |
2243208632 ps |
T153 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3183252738 |
|
|
Apr 28 12:23:01 PM PDT 24 |
Apr 28 12:23:11 PM PDT 24 |
3097677264 ps |
T466 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1601553012 |
|
|
Apr 28 12:17:58 PM PDT 24 |
Apr 28 12:18:06 PM PDT 24 |
2235778718 ps |
T467 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.665325159 |
|
|
Apr 28 12:22:49 PM PDT 24 |
Apr 28 12:23:06 PM PDT 24 |
2110796044 ps |
T269 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4279922380 |
|
|
Apr 28 12:19:14 PM PDT 24 |
Apr 28 12:19:50 PM PDT 24 |
26438061945 ps |
T228 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.400275580 |
|
|
Apr 28 12:21:53 PM PDT 24 |
Apr 28 12:22:34 PM PDT 24 |
54142018406 ps |
T468 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.981745520 |
|
|
Apr 28 12:23:02 PM PDT 24 |
Apr 28 12:23:11 PM PDT 24 |
2568084770 ps |
T469 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3704144173 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:22:55 PM PDT 24 |
2156940378 ps |
T470 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.657001494 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:23:09 PM PDT 24 |
2614430157 ps |
T327 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1273061734 |
|
|
Apr 28 12:22:50 PM PDT 24 |
Apr 28 12:25:30 PM PDT 24 |
193562508466 ps |
T471 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2005164297 |
|
|
Apr 28 12:23:51 PM PDT 24 |
Apr 28 12:23:58 PM PDT 24 |
2040281825 ps |
T472 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1384013049 |
|
|
Apr 28 12:19:28 PM PDT 24 |
Apr 28 12:20:27 PM PDT 24 |
90749376505 ps |
T473 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.927410652 |
|
|
Apr 28 12:21:33 PM PDT 24 |
Apr 28 12:21:36 PM PDT 24 |
3759105624 ps |
T474 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3045670192 |
|
|
Apr 28 12:22:36 PM PDT 24 |
Apr 28 12:22:43 PM PDT 24 |
2479669494 ps |
T475 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3198955232 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:22:51 PM PDT 24 |
2221217589 ps |
T332 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.411327193 |
|
|
Apr 28 12:23:33 PM PDT 24 |
Apr 28 12:25:19 PM PDT 24 |
43846000371 ps |
T476 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.426319948 |
|
|
Apr 28 12:22:10 PM PDT 24 |
Apr 28 12:22:17 PM PDT 24 |
2255389845 ps |
T343 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1550221789 |
|
|
Apr 28 12:22:04 PM PDT 24 |
Apr 28 12:24:54 PM PDT 24 |
70370927355 ps |
T477 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2510474188 |
|
|
Apr 28 12:22:13 PM PDT 24 |
Apr 28 12:22:18 PM PDT 24 |
2262083382 ps |
T229 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3193790483 |
|
|
Apr 28 12:23:45 PM PDT 24 |
Apr 28 12:24:05 PM PDT 24 |
25106386198 ps |
T478 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.485740668 |
|
|
Apr 28 12:19:43 PM PDT 24 |
Apr 28 12:19:51 PM PDT 24 |
3092246711 ps |
T479 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.46934941 |
|
|
Apr 28 12:21:23 PM PDT 24 |
Apr 28 12:21:26 PM PDT 24 |
2542734920 ps |
T480 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3453231066 |
|
|
Apr 28 12:22:28 PM PDT 24 |
Apr 28 12:22:34 PM PDT 24 |
2458291616 ps |
T177 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.2092295851 |
|
|
Apr 28 12:23:00 PM PDT 24 |
Apr 28 12:23:47 PM PDT 24 |
15222768692 ps |
T89 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1502457220 |
|
|
Apr 28 12:22:39 PM PDT 24 |
Apr 28 12:22:49 PM PDT 24 |
7594454160 ps |
T192 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.226340880 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:24:57 PM PDT 24 |
175679227439 ps |
T178 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1145693666 |
|
|
Apr 28 12:22:35 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
127263227904 ps |
T481 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.151786029 |
|
|
Apr 28 12:20:55 PM PDT 24 |
Apr 28 12:20:57 PM PDT 24 |
2400681416 ps |
T482 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3014960040 |
|
|
Apr 28 12:23:59 PM PDT 24 |
Apr 28 12:24:11 PM PDT 24 |
2241754051 ps |
T483 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3011606269 |
|
|
Apr 28 12:23:24 PM PDT 24 |
Apr 28 12:23:33 PM PDT 24 |
2607349532 ps |
T230 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3576587417 |
|
|
Apr 28 12:23:41 PM PDT 24 |
Apr 28 12:28:54 PM PDT 24 |
121663039555 ps |
T484 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1238159110 |
|
|
Apr 28 12:22:44 PM PDT 24 |
Apr 28 12:22:58 PM PDT 24 |
2052872825 ps |
T485 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.811871999 |
|
|
Apr 28 12:23:22 PM PDT 24 |
Apr 28 12:23:31 PM PDT 24 |
2470842231 ps |
T486 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1755702023 |
|
|
Apr 28 12:22:49 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
2474405580 ps |
T487 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.4042127040 |
|
|
Apr 28 12:22:43 PM PDT 24 |
Apr 28 12:22:53 PM PDT 24 |
2124268440 ps |
T488 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.2260974565 |
|
|
Apr 28 12:23:05 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
2112802329 ps |
T489 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1359291900 |
|
|
Apr 28 12:23:28 PM PDT 24 |
Apr 28 12:23:49 PM PDT 24 |
27609534121 ps |
T490 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1963895457 |
|
|
Apr 28 12:23:03 PM PDT 24 |
Apr 28 12:38:48 PM PDT 24 |
362825373926 ps |
T154 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1599215672 |
|
|
Apr 28 12:22:45 PM PDT 24 |
Apr 28 12:23:00 PM PDT 24 |
44032251821 ps |
T491 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3734602858 |
|
|
Apr 28 12:23:35 PM PDT 24 |
Apr 28 12:23:40 PM PDT 24 |
2216260153 ps |
T492 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.913226934 |
|
|
Apr 28 12:22:37 PM PDT 24 |
Apr 28 12:22:45 PM PDT 24 |
2120615577 ps |
T134 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.409158565 |
|
|
Apr 28 12:21:39 PM PDT 24 |
Apr 28 12:25:28 PM PDT 24 |
93004863359 ps |
T493 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.665744072 |
|
|
Apr 28 12:23:32 PM PDT 24 |
Apr 28 12:24:01 PM PDT 24 |
1699239619092 ps |
T344 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4044618168 |
|
|
Apr 28 12:23:38 PM PDT 24 |
Apr 28 12:28:06 PM PDT 24 |
100292797983 ps |
T494 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.2005960554 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:21:56 PM PDT 24 |
2054317709 ps |
T495 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.2908490828 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:23:04 PM PDT 24 |
7855768800 ps |
T282 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3222078473 |
|
|
Apr 28 12:21:33 PM PDT 24 |
Apr 28 12:26:28 PM PDT 24 |
1098562650041 ps |
T496 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3019595886 |
|
|
Apr 28 12:22:48 PM PDT 24 |
Apr 28 12:23:00 PM PDT 24 |
2726621131 ps |
T497 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.2898510878 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:23:01 PM PDT 24 |
2113932352 ps |
T320 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2968230635 |
|
|
Apr 28 12:22:38 PM PDT 24 |
Apr 28 12:28:48 PM PDT 24 |
129386166311 ps |
T498 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2454415887 |
|
|
Apr 28 12:23:15 PM PDT 24 |
Apr 28 12:23:24 PM PDT 24 |
2611913924 ps |
T499 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.896008835 |
|
|
Apr 28 12:23:44 PM PDT 24 |
Apr 28 12:24:08 PM PDT 24 |
30083018020 ps |
T500 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.545512121 |
|
|
Apr 28 12:21:24 PM PDT 24 |
Apr 28 12:21:31 PM PDT 24 |
3000325479 ps |
T501 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2747592373 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:23:50 PM PDT 24 |
57181540960 ps |
T502 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2296185651 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:23:05 PM PDT 24 |
2505781994 ps |
T135 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.467388461 |
|
|
Apr 28 12:21:45 PM PDT 24 |
Apr 28 12:23:37 PM PDT 24 |
923220889251 ps |
T231 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3545574910 |
|
|
Apr 28 12:23:14 PM PDT 24 |
Apr 28 12:28:41 PM PDT 24 |
120834127439 ps |
T503 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.1854270972 |
|
|
Apr 28 12:23:52 PM PDT 24 |
Apr 28 12:23:58 PM PDT 24 |
2026401220 ps |
T504 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2528401807 |
|
|
Apr 28 12:22:55 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
2557025948 ps |
T339 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.446240914 |
|
|
Apr 28 12:22:44 PM PDT 24 |
Apr 28 12:23:06 PM PDT 24 |
48962492434 ps |
T505 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1889362847 |
|
|
Apr 28 12:23:26 PM PDT 24 |
Apr 28 12:23:34 PM PDT 24 |
2510526225 ps |
T506 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3039572105 |
|
|
Apr 28 12:22:45 PM PDT 24 |
Apr 28 12:22:56 PM PDT 24 |
2200753928 ps |
T507 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.996141278 |
|
|
Apr 28 12:21:07 PM PDT 24 |
Apr 28 12:21:15 PM PDT 24 |
5411595290 ps |
T508 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3899069910 |
|
|
Apr 28 12:20:41 PM PDT 24 |
Apr 28 12:20:48 PM PDT 24 |
3098168547 ps |
T509 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.3199230915 |
|
|
Apr 28 12:23:25 PM PDT 24 |
Apr 28 12:23:28 PM PDT 24 |
2516368894 ps |
T510 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.2502613179 |
|
|
Apr 28 12:22:57 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
2111952231 ps |
T511 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.805064229 |
|
|
Apr 28 12:19:09 PM PDT 24 |
Apr 28 12:19:16 PM PDT 24 |
2511962262 ps |
T512 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3295009572 |
|
|
Apr 28 12:23:52 PM PDT 24 |
Apr 28 12:24:02 PM PDT 24 |
2609878812 ps |
T513 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.739662960 |
|
|
Apr 28 12:21:51 PM PDT 24 |
Apr 28 12:22:02 PM PDT 24 |
2899063608 ps |
T514 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2157223448 |
|
|
Apr 28 12:22:58 PM PDT 24 |
Apr 28 12:23:39 PM PDT 24 |
25584329686 ps |
T223 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2346535972 |
|
|
Apr 28 12:23:05 PM PDT 24 |
Apr 28 12:23:33 PM PDT 24 |
86546167265 ps |
T155 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2210585028 |
|
|
Apr 28 12:23:54 PM PDT 24 |
Apr 28 12:24:08 PM PDT 24 |
4444409280 ps |
T245 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2166685417 |
|
|
Apr 28 12:22:57 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
42610435012 ps |
T515 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1417297243 |
|
|
Apr 28 12:21:42 PM PDT 24 |
Apr 28 12:21:44 PM PDT 24 |
2578677609 ps |
T516 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2875947235 |
|
|
Apr 28 12:22:17 PM PDT 24 |
Apr 28 12:22:22 PM PDT 24 |
3390708250 ps |
T517 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.434596812 |
|
|
Apr 28 12:24:44 PM PDT 24 |
Apr 28 12:29:30 PM PDT 24 |
119020352132 ps |
T518 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.4244644614 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:22:59 PM PDT 24 |
3664878918 ps |
T519 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3979664302 |
|
|
Apr 28 12:23:46 PM PDT 24 |
Apr 28 12:23:55 PM PDT 24 |
9267948443 ps |
T520 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1888511850 |
|
|
Apr 28 12:24:44 PM PDT 24 |
Apr 28 12:25:17 PM PDT 24 |
49859827109 ps |
T521 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.146885738 |
|
|
Apr 28 12:23:36 PM PDT 24 |
Apr 28 12:23:40 PM PDT 24 |
2017804278 ps |
T522 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1350654539 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:22:51 PM PDT 24 |
3610511662 ps |
T523 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3354937171 |
|
|
Apr 28 12:23:21 PM PDT 24 |
Apr 28 12:23:24 PM PDT 24 |
2650231744 ps |
T524 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.367684592 |
|
|
Apr 28 12:21:16 PM PDT 24 |
Apr 28 12:21:24 PM PDT 24 |
2607988577 ps |
T525 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.362681639 |
|
|
Apr 28 12:21:51 PM PDT 24 |
Apr 28 12:21:53 PM PDT 24 |
2265605337 ps |
T85 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3910451154 |
|
|
Apr 28 12:20:45 PM PDT 24 |
Apr 28 12:20:49 PM PDT 24 |
3587098149 ps |
T203 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3953129577 |
|
|
Apr 28 12:22:18 PM PDT 24 |
Apr 28 12:22:21 PM PDT 24 |
2027473422 ps |
T204 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.4163617564 |
|
|
Apr 28 12:22:47 PM PDT 24 |
Apr 28 12:23:22 PM PDT 24 |
87560459327 ps |
T205 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.313228338 |
|
|
Apr 28 12:22:45 PM PDT 24 |
Apr 28 12:24:29 PM PDT 24 |
151661996428 ps |
T206 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.1469597550 |
|
|
Apr 28 12:21:51 PM PDT 24 |
Apr 28 12:21:53 PM PDT 24 |
2194823086 ps |
T207 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.637640917 |
|
|
Apr 28 12:22:39 PM PDT 24 |
Apr 28 12:22:45 PM PDT 24 |
3306272336 ps |
T208 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.595408648 |
|
|
Apr 28 12:21:48 PM PDT 24 |
Apr 28 12:21:54 PM PDT 24 |
2845337255 ps |
T209 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3902103830 |
|
|
Apr 28 12:21:59 PM PDT 24 |
Apr 28 12:22:04 PM PDT 24 |
2627341073 ps |
T210 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4291706891 |
|
|
Apr 28 12:19:41 PM PDT 24 |
Apr 28 12:19:44 PM PDT 24 |
2199971069 ps |
T132 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1536184012 |
|
|
Apr 28 12:23:03 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
4133074424 ps |
T174 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1399040132 |
|
|
Apr 28 12:22:21 PM PDT 24 |
Apr 28 12:27:10 PM PDT 24 |
423275117550 ps |
T526 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.492986588 |
|
|
Apr 28 12:22:55 PM PDT 24 |
Apr 28 12:23:07 PM PDT 24 |
3482363564 ps |
T527 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.4220742961 |
|
|
Apr 28 12:22:44 PM PDT 24 |
Apr 28 12:22:54 PM PDT 24 |
2473245801 ps |
T227 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1729299719 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:27:06 PM PDT 24 |
119629112091 ps |
T346 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3259068708 |
|
|
Apr 28 12:23:55 PM PDT 24 |
Apr 28 12:24:44 PM PDT 24 |
63085090474 ps |
T528 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1243338985 |
|
|
Apr 28 12:23:07 PM PDT 24 |
Apr 28 12:23:16 PM PDT 24 |
2914161632 ps |
T529 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2054616796 |
|
|
Apr 28 12:23:05 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
4121308969 ps |
T530 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.499585541 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:22:08 PM PDT 24 |
3454328431 ps |
T531 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2649436107 |
|
|
Apr 28 12:21:39 PM PDT 24 |
Apr 28 12:21:41 PM PDT 24 |
2210578025 ps |
T532 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3982382793 |
|
|
Apr 28 12:23:40 PM PDT 24 |
Apr 28 12:24:35 PM PDT 24 |
82820637643 ps |
T533 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2909665750 |
|
|
Apr 28 12:23:43 PM PDT 24 |
Apr 28 12:23:54 PM PDT 24 |
3485831797 ps |
T175 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1303892192 |
|
|
Apr 28 12:22:42 PM PDT 24 |
Apr 28 12:23:33 PM PDT 24 |
115055186595 ps |
T534 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.1117387996 |
|
|
Apr 28 12:20:06 PM PDT 24 |
Apr 28 12:20:08 PM PDT 24 |
2166330594 ps |
T535 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.93460768 |
|
|
Apr 28 12:21:08 PM PDT 24 |
Apr 28 12:21:21 PM PDT 24 |
9486726977 ps |
T216 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1012349110 |
|
|
Apr 28 12:24:45 PM PDT 24 |
Apr 28 12:27:22 PM PDT 24 |
111282354990 ps |
T536 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2642884751 |
|
|
Apr 28 12:23:28 PM PDT 24 |
Apr 28 12:23:35 PM PDT 24 |
2613443165 ps |
T537 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1545327990 |
|
|
Apr 28 12:22:38 PM PDT 24 |
Apr 28 12:22:50 PM PDT 24 |
2610800815 ps |
T538 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.309806754 |
|
|
Apr 28 12:23:49 PM PDT 24 |
Apr 28 12:24:15 PM PDT 24 |
42315021268 ps |
T248 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3561426997 |
|
|
Apr 28 12:22:38 PM PDT 24 |
Apr 28 12:29:14 PM PDT 24 |
1138916912083 ps |
T539 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3644392915 |
|
|
Apr 28 12:23:50 PM PDT 24 |
Apr 28 12:24:17 PM PDT 24 |
22085708538 ps |
T179 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2792969018 |
|
|
Apr 28 12:24:06 PM PDT 24 |
Apr 28 12:24:45 PM PDT 24 |
57131814631 ps |
T540 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3164895609 |
|
|
Apr 28 12:23:09 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
6482063381 ps |
T541 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3527203279 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:22:07 PM PDT 24 |
67203881534 ps |
T542 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1168447625 |
|
|
Apr 28 12:21:05 PM PDT 24 |
Apr 28 12:21:09 PM PDT 24 |
4023414808 ps |
T357 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1354193674 |
|
|
Apr 28 12:23:56 PM PDT 24 |
Apr 28 12:24:51 PM PDT 24 |
189726251691 ps |
T543 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.4189996962 |
|
|
Apr 28 12:22:41 PM PDT 24 |
Apr 28 12:22:48 PM PDT 24 |
3107706738 ps |
T544 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.3374578296 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:21:58 PM PDT 24 |
2082720453 ps |
T235 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1157648982 |
|
|
Apr 28 12:22:45 PM PDT 24 |
Apr 28 12:23:17 PM PDT 24 |
75929006916 ps |
T545 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.582995211 |
|
|
Apr 28 12:23:26 PM PDT 24 |
Apr 28 12:23:29 PM PDT 24 |
2496623877 ps |
T546 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2199102285 |
|
|
Apr 28 12:22:54 PM PDT 24 |
Apr 28 12:23:07 PM PDT 24 |
2525044523 ps |
T213 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.2361702128 |
|
|
Apr 28 12:21:53 PM PDT 24 |
Apr 28 12:22:03 PM PDT 24 |
3022205028 ps |
T199 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3171817441 |
|
|
Apr 28 12:23:18 PM PDT 24 |
Apr 28 12:23:30 PM PDT 24 |
4783142638 ps |
T547 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.1899258540 |
|
|
Apr 28 12:21:55 PM PDT 24 |
Apr 28 12:22:06 PM PDT 24 |
2009953548 ps |
T358 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3530756021 |
|
|
Apr 28 12:24:29 PM PDT 24 |
Apr 28 12:28:13 PM PDT 24 |
84082073270 ps |
T548 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.4118337753 |
|
|
Apr 28 12:22:55 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
5855594027 ps |
T549 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3067137610 |
|
|
Apr 28 12:22:38 PM PDT 24 |
Apr 28 12:22:47 PM PDT 24 |
2467711581 ps |
T232 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.828126766 |
|
|
Apr 28 12:21:51 PM PDT 24 |
Apr 28 12:23:29 PM PDT 24 |
35422836818 ps |
T550 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1287531104 |
|
|
Apr 28 12:19:12 PM PDT 24 |
Apr 28 12:19:16 PM PDT 24 |
2530258827 ps |
T551 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.4292671256 |
|
|
Apr 28 12:22:49 PM PDT 24 |
Apr 28 12:23:14 PM PDT 24 |
5363567044 ps |
T552 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.207724933 |
|
|
Apr 28 12:22:23 PM PDT 24 |
Apr 28 12:22:42 PM PDT 24 |
26099679873 ps |
T553 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.1774763218 |
|
|
Apr 28 12:22:03 PM PDT 24 |
Apr 28 12:22:08 PM PDT 24 |
6771053644 ps |
T554 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1723230389 |
|
|
Apr 28 12:23:02 PM PDT 24 |
Apr 28 12:23:15 PM PDT 24 |
2008735948 ps |
T555 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.1333168496 |
|
|
Apr 28 12:21:53 PM PDT 24 |
Apr 28 12:22:01 PM PDT 24 |
2112161073 ps |
T350 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1304114653 |
|
|
Apr 28 12:22:57 PM PDT 24 |
Apr 28 12:24:04 PM PDT 24 |
59765071208 ps |
T556 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1943176810 |
|
|
Apr 28 12:22:09 PM PDT 24 |
Apr 28 12:22:18 PM PDT 24 |
2011175253 ps |
T557 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1423562522 |
|
|
Apr 28 12:23:47 PM PDT 24 |
Apr 28 12:25:24 PM PDT 24 |
33497537187 ps |
T558 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3878322335 |
|
|
Apr 28 12:21:54 PM PDT 24 |
Apr 28 12:22:02 PM PDT 24 |
3797734575 ps |
T559 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.2216435206 |
|
|
Apr 28 12:21:52 PM PDT 24 |
Apr 28 12:21:58 PM PDT 24 |
2115750554 ps |
T560 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.897260086 |
|
|
Apr 28 12:22:17 PM PDT 24 |
Apr 28 12:22:22 PM PDT 24 |
2503446928 ps |
T561 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1462745307 |
|
|
Apr 28 12:19:26 PM PDT 24 |
Apr 28 12:19:33 PM PDT 24 |
4816290055 ps |
T562 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.400238538 |
|
|
Apr 28 12:22:07 PM PDT 24 |
Apr 28 12:22:20 PM PDT 24 |
295894495621 ps |
T341 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2183578825 |
|
|
Apr 28 12:22:58 PM PDT 24 |
Apr 28 12:24:09 PM PDT 24 |
83821909119 ps |
T563 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1582434803 |
|
|
Apr 28 12:24:19 PM PDT 24 |
Apr 28 12:24:23 PM PDT 24 |
2623491022 ps |
T564 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2558191409 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:24:01 PM PDT 24 |
23582404219 ps |
T565 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1959230710 |
|
|
Apr 28 12:22:46 PM PDT 24 |
Apr 28 12:24:11 PM PDT 24 |
118113760672 ps |
T340 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1756510895 |
|
|
Apr 28 12:23:57 PM PDT 24 |
Apr 28 12:27:40 PM PDT 24 |
151386914212 ps |
T566 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1380837083 |
|
|
Apr 28 12:19:17 PM PDT 24 |
Apr 28 12:19:29 PM PDT 24 |
3789235512 ps |
T567 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.3950631646 |
|
|
Apr 28 12:23:58 PM PDT 24 |
Apr 28 12:24:10 PM PDT 24 |
2012412343 ps |
T568 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.408332306 |
|
|
Apr 28 12:21:07 PM PDT 24 |
Apr 28 12:21:15 PM PDT 24 |
2999722556 ps |
T569 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.174429476 |
|
|
Apr 28 12:22:46 PM PDT 24 |
Apr 28 12:22:57 PM PDT 24 |
2088103971 ps |
T570 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2634894737 |
|
|
Apr 28 12:17:10 PM PDT 24 |
Apr 28 12:17:18 PM PDT 24 |
2359049551 ps |
T326 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.2750433818 |
|
|
Apr 28 12:22:49 PM PDT 24 |
Apr 28 12:25:29 PM PDT 24 |
118257269700 ps |
T571 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3960808258 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:23:06 PM PDT 24 |
2507129622 ps |
T572 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.391435730 |
|
|
Apr 28 12:22:44 PM PDT 24 |
Apr 28 12:23:12 PM PDT 24 |
14816982941 ps |
T573 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1082892289 |
|
|
Apr 28 12:22:12 PM PDT 24 |
Apr 28 12:22:18 PM PDT 24 |
2028558200 ps |
T574 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.4009877081 |
|
|
Apr 28 12:22:05 PM PDT 24 |
Apr 28 12:22:09 PM PDT 24 |
3625869873 ps |
T321 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3078362741 |
|
|
Apr 28 12:19:42 PM PDT 24 |
Apr 28 12:26:37 PM PDT 24 |
154359696688 ps |
T575 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.207697313 |
|
|
Apr 28 12:22:21 PM PDT 24 |
Apr 28 12:22:29 PM PDT 24 |
11509868538 ps |
T246 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.4255227874 |
|
|
Apr 28 12:21:55 PM PDT 24 |
Apr 28 12:22:11 PM PDT 24 |
42312625285 ps |
T576 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.4221503902 |
|
|
Apr 28 12:23:16 PM PDT 24 |
Apr 28 12:23:20 PM PDT 24 |
2635069357 ps |
T577 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.3805576480 |
|
|
Apr 28 12:21:10 PM PDT 24 |
Apr 28 12:21:13 PM PDT 24 |
2627009496 ps |
T53 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2464907934 |
|
|
Apr 28 12:20:29 PM PDT 24 |
Apr 28 12:21:17 PM PDT 24 |
37473420011 ps |
T578 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1530810248 |
|
|
Apr 28 12:23:13 PM PDT 24 |
Apr 28 12:23:18 PM PDT 24 |
3420779214 ps |
T579 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2150057798 |
|
|
Apr 28 12:23:53 PM PDT 24 |
Apr 28 12:23:57 PM PDT 24 |
3188645710 ps |
T580 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3731478594 |
|
|
Apr 28 12:22:53 PM PDT 24 |
Apr 28 12:23:06 PM PDT 24 |
2483163273 ps |
T581 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.792212922 |
|
|
Apr 28 12:24:00 PM PDT 24 |
Apr 28 12:24:10 PM PDT 24 |
3595550653 ps |
T582 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2556554822 |
|
|
Apr 28 12:22:49 PM PDT 24 |
Apr 28 12:23:06 PM PDT 24 |
3895264924 ps |
T583 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2073569518 |
|
|
Apr 28 12:22:12 PM PDT 24 |
Apr 28 12:27:45 PM PDT 24 |
127563635564 ps |
T359 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2925104279 |
|
|
Apr 28 12:22:52 PM PDT 24 |
Apr 28 12:23:39 PM PDT 24 |
24339869259 ps |
T584 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1063551275 |
|
|
Apr 28 12:23:42 PM PDT 24 |
Apr 28 12:23:48 PM PDT 24 |
2515728967 ps |
T270 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.587762102 |
|
|
Apr 28 12:22:10 PM PDT 24 |
Apr 28 12:23:13 PM PDT 24 |
24239421163 ps |