Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.35	99.33	96.41	100.00	96.79	98.78	99.52	90.64

Total tests in report: 912

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
58.88	58.88	76.75	76.75	65.72	65.72	91.55	91.55	17.31	17.31	77.63	77.63	68.30	68.30	14.90	14.90	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1854945468
74.51	15.63	90.99	14.24	83.90	18.17	96.80	5.25	44.87	27.56	91.31	13.68	84.59	16.28	29.11	14.21	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2506804792
81.44	6.93	95.24	4.25	88.70	4.80	97.03	0.23	64.10	19.23	95.05	3.73	93.26	8.67	36.69	7.58	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.355539263
84.97	3.53	95.32	0.07	88.80	0.10	97.49	0.46	65.38	1.28	95.12	0.07	93.55	0.29	59.13	22.43	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.16588850
87.08	2.11	96.44	1.12	90.37	1.57	97.49	0.00	76.28	10.90	96.30	1.18	93.55	0.00	59.13	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3319613352
88.86	1.79	97.54	1.10	91.35	0.99	97.49	0.00	82.05	5.77	96.89	0.59	95.28	1.73	61.44	2.32	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2565823428
90.36	1.49	98.13	0.60	92.11	0.76	97.49	0.00	87.82	5.77	97.63	0.74	97.01	1.73	62.31	0.86	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2754132168
91.50	1.14	98.21	0.07	93.25	1.14	98.17	0.68	87.82	0.00	97.74	0.11	97.01	0.00	68.26	5.95	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.785720851
92.38	0.88	98.32	0.11	93.35	0.10	98.17	0.00	90.38	2.56	97.89	0.15	97.21	0.19	71.30	3.04	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4263203194
93.17	0.79	98.53	0.21	93.71	0.35	98.17	0.00	91.67	1.28	98.00	0.11	97.30	0.10	74.80	3.50	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3730239097
93.83	0.66	98.56	0.04	93.73	0.03	98.17	0.00	91.67	0.00	98.00	0.00	97.30	0.00	79.34	4.54	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2671092712
94.26	0.43	98.69	0.13	93.86	0.13	98.17	0.00	93.59	1.92	98.15	0.15	97.69	0.39	79.65	0.32	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2584760893
94.61	0.35	98.69	0.00	94.08	0.23	98.17	0.00	93.59	0.00	98.15	0.00	97.69	0.00	81.88	2.23	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.564321905
94.89	0.28	98.69	0.00	94.11	0.03	99.77	1.60	93.59	0.00	98.15	0.00	97.78	0.10	82.11	0.23	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2882307510
95.14	0.26	98.81	0.11	94.16	0.05	99.77	0.00	94.87	1.28	98.30	0.15	97.98	0.19	82.11	0.00	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1341653202
95.36	0.21	98.84	0.04	94.26	0.10	99.77	0.00	94.87	0.00	98.30	0.00	97.98	0.00	83.47	1.36	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3964438007
95.55	0.19	98.90	0.06	94.31	0.05	99.77	0.00	95.51	0.64	98.37	0.07	98.17	0.19	83.79	0.32	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1869835100
95.71	0.17	98.97	0.07	94.34	0.03	99.77	0.00	96.15	0.64	98.48	0.11	98.27	0.10	84.01	0.23	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2461056295
95.86	0.15	98.97	0.00	95.30	0.96	99.77	0.00	96.15	0.00	98.48	0.00	98.27	0.00	84.11	0.09	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.3707051931
96.01	0.14	99.07	0.09	95.32	0.03	99.77	0.00	96.79	0.64	98.63	0.15	98.36	0.10	84.11	0.00	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.355936601
96.15	0.14	99.10	0.04	95.53	0.20	99.77	0.00	96.79	0.00	98.71	0.07	99.04	0.67	84.11	0.00	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.986788733
96.29	0.14	99.12	0.02	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	85.06	0.95	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2667656266
96.41	0.12	99.12	0.00	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	85.92	0.86	/workspace/coverage/default/33.sysrst_ctrl_stress_all.3531434746
96.51	0.10	99.16	0.04	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	86.56	0.64	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.235698064
96.59	0.09	99.18	0.02	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	87.15	0.59	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.212250028
96.66	0.06	99.20	0.02	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	87.56	0.41	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1943697994
96.71	0.05	99.22	0.02	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	87.92	0.36	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1113231068
96.76	0.05	99.22	0.00	95.53	0.00	99.77	0.00	96.79	0.00	98.71	0.00	99.04	0.00	88.28	0.36	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2539188314
96.81	0.05	99.27	0.06	95.60	0.08	100.00	0.23	96.79	0.00	98.71	0.00	99.04	0.00	88.28	0.00	/workspace/coverage/default/15.sysrst_ctrl_alert_test.3323807867
96.86	0.04	99.27	0.00	95.90	0.30	100.00	0.00	96.79	0.00	98.71	0.00	99.04	0.00	88.28	0.00	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2490102253
96.89	0.04	99.29	0.02	95.96	0.05	100.00	0.00	96.79	0.00	98.71	0.00	99.23	0.19	88.28	0.00	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.500911087
96.93	0.04	99.29	0.00	95.98	0.03	100.00	0.00	96.79	0.00	98.71	0.00	99.33	0.10	88.42	0.14	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1755658385
96.96	0.03	99.29	0.00	95.98	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.33	0.00	88.65	0.23	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1625629889
97.00	0.03	99.29	0.00	95.98	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.33	0.00	88.87	0.23	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3073092250
97.02	0.03	99.31	0.02	96.03	0.05	100.00	0.00	96.79	0.00	98.74	0.04	99.42	0.10	88.87	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1975152392
97.05	0.03	99.31	0.00	96.03	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	89.06	0.18	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2527442765
97.07	0.02	99.31	0.00	96.18	0.15	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	89.06	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1763129761
97.09	0.02	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.10	89.10	0.05	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3378446329
97.11	0.02	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.24	0.14	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2030516133
97.13	0.02	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.37	0.14	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.621660573
97.15	0.02	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.51	0.14	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.4136379599
97.16	0.01	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.60	0.09	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1949260563
97.18	0.01	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.69	0.09	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4213725824
97.19	0.01	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.78	0.09	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.764030565
97.20	0.01	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.87	0.09	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3221948804
97.22	0.01	99.31	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	89.96	0.09	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2744568861
97.23	0.01	99.31	0.00	96.21	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	90.01	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1920548621
97.24	0.01	99.31	0.00	96.23	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	90.05	0.05	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3202299517
97.25	0.01	99.31	0.00	96.26	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	90.10	0.05	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.4030005759
97.25	0.01	99.33	0.02	96.26	0.00	100.00	0.00	96.79	0.00	98.78	0.04	99.52	0.00	90.10	0.00	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.749391702
97.26	0.01	99.33	0.00	96.31	0.05	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.10	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1426048343
97.27	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.15	0.05	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1886116341
97.27	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.19	0.05	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.893905021
97.28	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.24	0.05	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2575476272
97.29	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.28	0.05	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3362277588
97.29	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.33	0.05	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3536789405
97.30	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.37	0.05	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3005138441
97.31	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.42	0.05	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.4062504797
97.31	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.46	0.05	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2732642190
97.32	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.51	0.05	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2042585650
97.33	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.55	0.05	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3785945979
97.33	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.60	0.05	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3978713255
97.34	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.64	0.05	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.89557050
97.34	0.01	99.33	0.00	96.33	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.64	0.00	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1896452681
97.35	0.01	99.33	0.00	96.36	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.64	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2060771177
97.35	0.01	99.33	0.00	96.39	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	90.64	0.00	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2705305639

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2216187097
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.960981878
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3069265867
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.113967692
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2673870176
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.626051653
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1307038361
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.131027264
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2923094383
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3881753663
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4162357306
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1858006720
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1111543386
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2927219914
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2523413839
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1557148202
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.4142922745
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1693094719
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.404699300
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2704227036
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.642206787
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2312070746
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.2920355086
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3367059106
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.907050254
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3670615641
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1620723813
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3885432903
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1505821051
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3807380862
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3984029328
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3389107930
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1458408879
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2520699277
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3677084775
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2337699447
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3281503856
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2456401747
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1577678977
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3130596527
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1516314892
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.222793707
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.4139512164
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.4029997453
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.393190929
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4073313873
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3289401364
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3779903271
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1435433086
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1102880946
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.774955904
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1232885082
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/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2186472332
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3719513174
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1431644737
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4196821192
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.985537727
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3528041146
/workspace/coverage/default/4.sysrst_ctrl_smoke.3984825260
/workspace/coverage/default/4.sysrst_ctrl_stress_all.808153250
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.392727035
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1956516988
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3887502122
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1439101108
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2074918468
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.445396212
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.198189219
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3760391682
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3830094343
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1992238937
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3987660146
/workspace/coverage/default/40.sysrst_ctrl_smoke.783331054
/workspace/coverage/default/40.sysrst_ctrl_stress_all.377291461
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1679420168
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2240738160
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1574159824
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1322268174
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1658652540
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.69631892
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.4000578583
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3217206866
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.911818193
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.195709589
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.587920334
/workspace/coverage/default/41.sysrst_ctrl_smoke.1615724011
/workspace/coverage/default/41.sysrst_ctrl_stress_all.541384860
/workspace/coverage/default/42.sysrst_ctrl_alert_test.582551128
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3059983977
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1165990392
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2510474346
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4230169410
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.905204515
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2171104834
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.479183037
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3816717359
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1069079788
/workspace/coverage/default/42.sysrst_ctrl_smoke.1500961669
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2294148649
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.520183986
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1380635320
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2218958967
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1511583918
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3554073600
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2104044419
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2291957159
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3816881564
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2747193877
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3933409061
/workspace/coverage/default/43.sysrst_ctrl_smoke.4076130683
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2773246823
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.486848961
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1026120458
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3094702334
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1042555256
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1277782849
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3165905674
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1140073236
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4218414154
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.668886142
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.13703516
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.981420579
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.513462132
/workspace/coverage/default/44.sysrst_ctrl_smoke.2797045330
/workspace/coverage/default/44.sysrst_ctrl_stress_all.695926629
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3934747149
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2505979107
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1094641829
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1120040412
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4268627800
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4188716432
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.197735041
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3796669852
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.185437275
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.955973123
/workspace/coverage/default/45.sysrst_ctrl_smoke.3380155268
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1898550775
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3463251607
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.184697019
/workspace/coverage/default/46.sysrst_ctrl_alert_test.169378999
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2226135
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.771570957
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3998907327
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1128707493
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3863431397
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.380927163
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.901859748
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1973137439
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3197581523
/workspace/coverage/default/46.sysrst_ctrl_smoke.1372804940
/workspace/coverage/default/46.sysrst_ctrl_stress_all.164474232
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.962936177
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3005598416
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1226476225
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1533819832
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2856678985
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2417101037
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.633972211
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1868559789
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3337248008
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1602524024
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.510745479
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1532130119
/workspace/coverage/default/47.sysrst_ctrl_smoke.1349123732
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2517041025
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2223173026
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1035571841
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3630284873
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.992457600
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2924179956
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.36617260
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3085535128
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.306100040
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2602028955
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.312338621
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2217560670
/workspace/coverage/default/48.sysrst_ctrl_smoke.2427800650
/workspace/coverage/default/48.sysrst_ctrl_stress_all.676154390
/workspace/coverage/default/49.sysrst_ctrl_alert_test.4076873280
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.4273525392
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.802754846
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2994551242
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.486714727
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4179366188
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1393678230
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.90801137
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.18104125
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4271778465
/workspace/coverage/default/49.sysrst_ctrl_smoke.993740056
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3454962230
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1967325035
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2512298974
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3815921416
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.772665148
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.765082662
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1659996017
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1300727027
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1377425504
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2764500731
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.53644191
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3387731876
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1872876258
/workspace/coverage/default/5.sysrst_ctrl_smoke.4074925790
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3549484894
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2591036807
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3881669002
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2664322348
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2286576654
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4042934022
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1162188185
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1786307650
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3744083306
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3509374435
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3268444366
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3305289763
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2188870375
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.299585509
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3805809960
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.4136474922
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.508479574
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3344536632
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1351317747
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3963156271
/workspace/coverage/default/6.sysrst_ctrl_smoke.1556672429
/workspace/coverage/default/6.sysrst_ctrl_stress_all.153948845
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.402267946
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3185019691
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.4056233485
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2338642791
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.152062459
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.72046915
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.805323745
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3287662541
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3670064020
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3483937586
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1921153919
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4172440104
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4115846488
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2129928178
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2834652008
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.258455486
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.295340757
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1231716864
/workspace/coverage/default/7.sysrst_ctrl_smoke.1167894301
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2554366263
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3979985332
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2692258802
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1233987379
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3785117210
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1472843406
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4055948481
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.4147591458
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1965208118
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2090611433
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1727531172
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1449206719
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2749391036
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.500362104
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3872284817
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1650070178
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2769727848
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2195379964
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2513932488
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3837441773
/workspace/coverage/default/8.sysrst_ctrl_smoke.1180013213
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2709028836
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.955722966
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2353185048
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.784130626
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4139667063
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1194632249
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3508815352
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1621758509
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1276884708
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2896632691
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1541031972
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1818177226
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3632320829
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1989633624
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3811137395
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3395250164
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2265156926
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1556890991
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2013547678
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2642433081
/workspace/coverage/default/9.sysrst_ctrl_smoke.3715442882
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1087529884
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4281768300
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2312614971
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3465190510
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.759474703
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3738698473
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4028019526
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.639548286
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1544049404
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4256809262

Total test records in report: 912

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1854945468	May 23 12:55:38 PM PDT 24	May 23 01:00:05 PM PDT 24	97117142013 ps
T5	/workspace/coverage/default/29.sysrst_ctrl_alert_test.3151922711	May 23 12:56:05 PM PDT 24	May 23 12:56:12 PM PDT 24	2013165065 ps
T1	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.2105631275	May 23 12:55:38 PM PDT 24	May 23 12:55:47 PM PDT 24	2605769112 ps
T13	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1113231068	May 23 12:55:07 PM PDT 24	May 23 12:55:12 PM PDT 24	2235206915 ps
T2	/workspace/coverage/default/36.sysrst_ctrl_stress_all.799016785	May 23 12:56:33 PM PDT 24	May 23 01:03:34 PM PDT 24	153622291554 ps
T14	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.4273525392	May 23 12:57:11 PM PDT 24	May 23 12:57:23 PM PDT 24	3215769647 ps
T3	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2840849898	May 23 12:55:49 PM PDT 24	May 23 12:55:53 PM PDT 24	3855497069 ps
T6	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2267648585	May 23 12:53:49 PM PDT 24	May 23 12:53:54 PM PDT 24	5451181717 ps
T15	/workspace/coverage/default/0.sysrst_ctrl_stress_all.2120787691	May 23 12:53:48 PM PDT 24	May 23 12:54:24 PM PDT 24	12868929508 ps
T16	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2667767843	May 23 12:56:18 PM PDT 24	May 23 12:56:22 PM PDT 24	2976676530 ps
T17	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.152062459	May 23 12:57:13 PM PDT 24	May 23 12:58:26 PM PDT 24	26832248448 ps
T7	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.905204515	May 23 12:56:42 PM PDT 24	May 23 12:56:49 PM PDT 24	2493333592 ps
T22	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.311190783	May 23 12:55:07 PM PDT 24	May 23 12:55:13 PM PDT 24	2478143406 ps
T8	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2591036807	May 23 12:54:14 PM PDT 24	May 23 12:54:23 PM PDT 24	4940864316 ps
T9	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2506804792	May 23 12:55:04 PM PDT 24	May 23 12:57:05 PM PDT 24	800251448498 ps
T23	/workspace/coverage/default/30.sysrst_ctrl_stress_all.1724808114	May 23 12:56:04 PM PDT 24	May 23 12:56:33 PM PDT 24	11239378983 ps
T10	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3730239097	May 23 12:55:04 PM PDT 24	May 23 01:03:56 PM PDT 24	187021351891 ps
T53	/workspace/coverage/default/24.sysrst_ctrl_smoke.2054371608	May 23 12:55:35 PM PDT 24	May 23 12:55:42 PM PDT 24	2111646458 ps
T26	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.500362104	May 23 12:54:39 PM PDT 24	May 23 12:56:00 PM PDT 24	28585101599 ps
T11	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2749391036	May 23 12:54:44 PM PDT 24	May 23 12:55:28 PM PDT 24	63883327811 ps
T12	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2490102253	May 23 12:55:09 PM PDT 24	May 23 12:55:13 PM PDT 24	7353192472 ps
T24	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3852690434	May 23 12:53:57 PM PDT 24	May 23 12:54:06 PM PDT 24	2612270862 ps
T31	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.4155772718	May 23 12:56:17 PM PDT 24	May 23 01:00:45 PM PDT 24	98438501727 ps
T64	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3460719488	May 23 12:56:07 PM PDT 24	May 23 12:56:12 PM PDT 24	2613224770 ps
T30	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.2966757523	May 23 12:54:51 PM PDT 24	May 23 12:55:10 PM PDT 24	37104382634 ps
T60	/workspace/coverage/default/40.sysrst_ctrl_stress_all.377291461	May 23 12:56:44 PM PDT 24	May 23 12:56:57 PM PDT 24	6576381818 ps
T102	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.8424982	May 23 12:56:18 PM PDT 24	May 23 12:56:21 PM PDT 24	2314473921 ps
T103	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1992238937	May 23 12:56:46 PM PDT 24	May 23 12:56:51 PM PDT 24	2084248139 ps
T104	/workspace/coverage/default/5.sysrst_ctrl_smoke.4074925790	May 23 12:54:13 PM PDT 24	May 23 12:54:17 PM PDT 24	2132933982 ps
T44	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3562821985	May 23 12:55:31 PM PDT 24	May 23 12:56:19 PM PDT 24	67883660117 ps
T32	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3964438007	May 23 12:56:43 PM PDT 24	May 23 12:58:27 PM PDT 24	160924121581 ps
T37	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1377425504	May 23 12:54:12 PM PDT 24	May 23 12:54:17 PM PDT 24	4384421795 ps
T71	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.814698154	May 23 12:56:06 PM PDT 24	May 23 12:56:27 PM PDT 24	28102320081 ps
T45	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2565823428	May 23 12:57:20 PM PDT 24	May 23 12:58:17 PM PDT 24	86026572213 ps
T33	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3979985332	May 23 12:57:13 PM PDT 24	May 23 12:58:17 PM PDT 24	119324307045 ps
T25	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3338495074	May 23 12:56:33 PM PDT 24	May 23 12:56:38 PM PDT 24	3493782786 ps
T65	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1768756334	May 23 12:56:04 PM PDT 24	May 23 12:56:07 PM PDT 24	2633080105 ps
T189	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2069176422	May 23 12:55:07 PM PDT 24	May 23 12:55:52 PM PDT 24	33999447267 ps
T72	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3465190510	May 23 12:57:22 PM PDT 24	May 23 12:58:27 PM PDT 24	24078591551 ps
T190	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3844115380	May 23 12:56:33 PM PDT 24	May 23 12:56:39 PM PDT 24	2231370082 ps
T111	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1542636030	May 23 12:56:05 PM PDT 24	May 23 12:57:00 PM PDT 24	133388484856 ps
T250	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.992457600	May 23 12:57:09 PM PDT 24	May 23 12:57:56 PM PDT 24	127133349465 ps
T66	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3760391682	May 23 12:56:42 PM PDT 24	May 23 12:56:46 PM PDT 24	2635006579 ps
T38	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.1925049651	May 23 12:53:58 PM PDT 24	May 23 12:54:02 PM PDT 24	3663000754 ps
T89	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.764030565	May 23 12:56:33 PM PDT 24	May 23 01:01:09 PM PDT 24	100838528192 ps
T34	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3509374435	May 23 12:57:13 PM PDT 24	May 23 01:01:38 PM PDT 24	95817510432 ps
T195	/workspace/coverage/default/40.sysrst_ctrl_alert_test.3887502122	May 23 12:56:46 PM PDT 24	May 23 12:56:50 PM PDT 24	2075203706 ps
T54	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.495423791	May 23 12:55:19 PM PDT 24	May 23 12:55:24 PM PDT 24	3770636726 ps
T55	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2312614971	May 23 12:54:41 PM PDT 24	May 23 12:54:47 PM PDT 24	6224201806 ps
T196	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.567913749	May 23 12:53:47 PM PDT 24	May 23 12:53:51 PM PDT 24	2228370714 ps
T67	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.985537727	May 23 12:53:58 PM PDT 24	May 23 12:54:06 PM PDT 24	2512474195 ps
T56	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.257903316	May 23 12:53:50 PM PDT 24	May 23 12:54:18 PM PDT 24	21723397142 ps
T197	/workspace/coverage/default/33.sysrst_ctrl_smoke.940119054	May 23 12:56:15 PM PDT 24	May 23 12:56:21 PM PDT 24	2114187443 ps
T40	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.2709148859	May 23 12:56:03 PM PDT 24	May 23 12:56:06 PM PDT 24	5237146722 ps
T198	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.212250028	May 23 12:53:58 PM PDT 24	May 23 12:54:53 PM PDT 24	81358987669 ps
T68	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2575476272	May 23 12:54:51 PM PDT 24	May 23 12:54:55 PM PDT 24	2532847582 ps
T46	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1533819832	May 23 12:56:58 PM PDT 24	May 23 12:57:03 PM PDT 24	3619775907 ps
T199	/workspace/coverage/default/23.sysrst_ctrl_smoke.1003299915	May 23 12:55:35 PM PDT 24	May 23 12:55:39 PM PDT 24	2125148550 ps
T90	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.500911087	May 23 12:53:58 PM PDT 24	May 23 12:54:18 PM PDT 24	27598042878 ps
T91	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3738698473	May 23 12:57:22 PM PDT 24	May 23 12:57:57 PM PDT 24	27084122486 ps
T39	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.355539263	May 23 12:55:34 PM PDT 24	May 23 12:57:16 PM PDT 24	77725653309 ps
T158	/workspace/coverage/default/13.sysrst_ctrl_smoke.4265125779	May 23 12:54:53 PM PDT 24	May 23 12:54:57 PM PDT 24	2126507663 ps
T159	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3816717359	May 23 12:56:47 PM PDT 24	May 23 12:56:52 PM PDT 24	2185335670 ps
T57	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1956516988	May 23 12:54:14 PM PDT 24	May 23 12:54:17 PM PDT 24	9233622671 ps
T69	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.4032481912	May 23 12:56:30 PM PDT 24	May 23 12:56:38 PM PDT 24	2513633829 ps
T47	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2671092712	May 23 12:56:44 PM PDT 24	May 23 12:58:00 PM PDT 24	28376234627 ps
T160	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1140073236	May 23 12:56:55 PM PDT 24	May 23 12:57:10 PM PDT 24	4785723570 ps
T161	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1165990392	May 23 12:56:44 PM PDT 24	May 23 12:57:48 PM PDT 24	89758014671 ps
T61	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.3646150212	May 23 12:54:56 PM PDT 24	May 23 12:55:05 PM PDT 24	2491723294 ps
T162	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2094789095	May 23 12:56:32 PM PDT 24	May 23 12:56:40 PM PDT 24	2566968412 ps
T374	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1087996610	May 23 12:55:54 PM PDT 24	May 23 12:56:02 PM PDT 24	2611619750 ps
T375	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2135174816	May 23 12:56:07 PM PDT 24	May 23 12:56:15 PM PDT 24	2185618163 ps
T112	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.3830603138	May 23 12:56:18 PM PDT 24	May 23 01:02:26 PM PDT 24	161379798686 ps
T372	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2583987381	May 23 12:56:05 PM PDT 24	May 23 12:56:09 PM PDT 24	2524087740 ps
T376	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2764500731	May 23 12:54:13 PM PDT 24	May 23 12:54:21 PM PDT 24	2609748079 ps
T377	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.988721777	May 23 12:55:38 PM PDT 24	May 23 12:55:52 PM PDT 24	4584086291 ps
T378	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.179375448	May 23 12:56:17 PM PDT 24	May 23 12:56:20 PM PDT 24	2207093224 ps
T379	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4230169410	May 23 12:56:46 PM PDT 24	May 23 12:56:52 PM PDT 24	3655220198 ps
T62	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3855149108	May 23 12:55:49 PM PDT 24	May 23 12:55:57 PM PDT 24	2466432319 ps
T70	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3395250164	May 23 12:54:41 PM PDT 24	May 23 12:54:50 PM PDT 24	3243232117 ps
T63	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.901859748	May 23 12:57:01 PM PDT 24	May 23 12:57:06 PM PDT 24	2487114090 ps
T79	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3978713255	May 23 12:57:09 PM PDT 24	May 23 12:58:23 PM PDT 24	53263143533 ps
T165	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.725515053	May 23 12:53:58 PM PDT 24	May 23 12:54:02 PM PDT 24	2553688480 ps
T41	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1020297288	May 23 12:56:16 PM PDT 24	May 23 12:56:24 PM PDT 24	4988421586 ps
T191	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3933409061	May 23 12:56:43 PM PDT 24	May 23 12:56:51 PM PDT 24	2516649041 ps
T192	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.235698064	May 23 12:54:53 PM PDT 24	May 23 01:00:56 PM PDT 24	144413006487 ps
T58	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2262889185	May 23 12:56:02 PM PDT 24	May 23 12:56:10 PM PDT 24	5887147049 ps
T164	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.198189219	May 23 12:56:45 PM PDT 24	May 23 12:56:55 PM PDT 24	4886118099 ps
T193	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.389933248	May 23 12:53:58 PM PDT 24	May 23 12:54:13 PM PDT 24	22075070834 ps
T194	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.759474703	May 23 12:57:22 PM PDT 24	May 23 12:59:45 PM PDT 24	65249629623 ps
T166	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1565441542	May 23 12:55:05 PM PDT 24	May 23 12:55:16 PM PDT 24	5582147829 ps
T59	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3221986329	May 23 12:56:04 PM PDT 24	May 23 12:58:06 PM PDT 24	48540655013 ps
T178	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1625629889	May 23 12:55:10 PM PDT 24	May 23 12:55:15 PM PDT 24	2517659378 ps
T179	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1277782849	May 23 12:56:57 PM PDT 24	May 23 12:58:52 PM PDT 24	173932926686 ps
T92	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.784130626	May 23 12:57:20 PM PDT 24	May 23 12:57:50 PM PDT 24	37251772815 ps
T180	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1878606266	May 23 12:54:40 PM PDT 24	May 23 12:54:43 PM PDT 24	2671957299 ps
T181	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2864228571	May 23 12:55:32 PM PDT 24	May 23 12:55:37 PM PDT 24	2470140086 ps
T182	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1393678230	May 23 12:57:18 PM PDT 24	May 23 12:57:20 PM PDT 24	2653935876 ps
T183	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.4211830583	May 23 12:55:48 PM PDT 24	May 23 12:55:50 PM PDT 24	2121968238 ps
T184	/workspace/coverage/default/15.sysrst_ctrl_smoke.3420470377	May 23 12:55:10 PM PDT 24	May 23 12:55:15 PM PDT 24	2116231334 ps
T287	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1131675867	May 23 12:55:33 PM PDT 24	May 23 12:56:08 PM PDT 24	12128657708 ps
T380	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1402126621	May 23 12:55:04 PM PDT 24	May 23 12:55:12 PM PDT 24	7660535900 ps
T48	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1533253702	May 23 12:56:24 PM PDT 24	May 23 12:58:31 PM PDT 24	52303540354 ps
T381	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1351317747	May 23 12:54:28 PM PDT 24	May 23 12:54:33 PM PDT 24	2199507536 ps
T382	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3583126999	May 23 12:54:53 PM PDT 24	May 23 12:54:59 PM PDT 24	2616772159 ps
T245	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2667656266	May 23 12:54:26 PM PDT 24	May 23 12:58:06 PM PDT 24	166738037571 ps
T167	/workspace/coverage/default/8.sysrst_ctrl_stress_all.2709028836	May 23 12:54:41 PM PDT 24	May 23 12:54:51 PM PDT 24	10871637054 ps
T383	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3805809960	May 23 12:54:28 PM PDT 24	May 23 12:54:34 PM PDT 24	4994968159 ps
T384	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.53644191	May 23 12:54:11 PM PDT 24	May 23 12:54:15 PM PDT 24	2489142650 ps
T292	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.1112807298	May 23 12:54:39 PM PDT 24	May 23 12:56:05 PM PDT 24	150901251617 ps
T49	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3221948804	May 23 12:54:28 PM PDT 24	May 23 12:57:15 PM PDT 24	59395871872 ps
T246	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.223465322	May 23 12:53:33 PM PDT 24	May 23 12:53:38 PM PDT 24	2351047571 ps
T288	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.268052385	May 23 12:55:36 PM PDT 24	May 23 12:56:44 PM PDT 24	24700414459 ps
T294	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3598865267	May 23 12:56:05 PM PDT 24	May 23 12:56:11 PM PDT 24	2451621143 ps
T247	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3835370335	May 23 12:55:34 PM PDT 24	May 23 01:00:55 PM PDT 24	118902567994 ps
T50	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1474686385	May 23 12:56:03 PM PDT 24	May 23 12:56:09 PM PDT 24	3460305130 ps
T113	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2873091872	May 23 12:56:05 PM PDT 24	May 23 12:56:45 PM PDT 24	61764759463 ps
T51	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3097686244	May 23 12:54:56 PM PDT 24	May 23 12:55:02 PM PDT 24	3466116173 ps
T52	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.612998150	May 23 12:55:04 PM PDT 24	May 23 12:55:08 PM PDT 24	3139821432 ps
T114	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2559314393	May 23 12:55:20 PM PDT 24	May 23 12:56:42 PM PDT 24	71022271259 ps
T279	/workspace/coverage/default/9.sysrst_ctrl_alert_test.1818177226	May 23 12:54:39 PM PDT 24	May 23 12:54:43 PM PDT 24	2034961851 ps
T306	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1056230494	May 23 12:55:36 PM PDT 24	May 23 12:55:40 PM PDT 24	2457674215 ps
T385	/workspace/coverage/default/42.sysrst_ctrl_smoke.1500961669	May 23 12:56:44 PM PDT 24	May 23 12:56:53 PM PDT 24	2113369410 ps
T328	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.564321905	May 23 12:55:36 PM PDT 24	May 23 12:57:30 PM PDT 24	157722408240 ps
T168	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1975152392	May 23 12:54:53 PM PDT 24	May 23 12:55:40 PM PDT 24	1107793740601 ps
T297	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2611790649	May 23 12:54:52 PM PDT 24	May 23 12:54:57 PM PDT 24	2515452052 ps
T386	/workspace/coverage/default/29.sysrst_ctrl_smoke.529422991	May 23 12:56:07 PM PDT 24	May 23 12:56:15 PM PDT 24	2108605263 ps
T387	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1799846626	May 23 12:55:34 PM PDT 24	May 23 12:55:38 PM PDT 24	2624327062 ps
T388	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2054753484	May 23 12:55:21 PM PDT 24	May 23 12:55:30 PM PDT 24	2613611816 ps
T87	/workspace/coverage/default/25.sysrst_ctrl_stress_all.1262083443	May 23 12:55:50 PM PDT 24	May 23 12:56:28 PM PDT 24	14876959582 ps
T93	/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.639548286	May 23 12:57:21 PM PDT 24	May 23 12:58:33 PM PDT 24	25831992891 ps
T389	/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2509009797	May 23 12:56:31 PM PDT 24	May 23 12:56:33 PM PDT 24	2833405098 ps
T373	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3143424370	May 23 12:56:32 PM PDT 24	May 23 12:56:36 PM PDT 24	2530011061 ps
T390	/workspace/coverage/default/34.sysrst_ctrl_stress_all.748630418	May 23 12:56:24 PM PDT 24	May 23 12:56:43 PM PDT 24	7066036080 ps
T243	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.2489565330	May 23 12:55:34 PM PDT 24	May 23 12:56:24 PM PDT 24	37602077307 ps
T219	/workspace/coverage/default/6.sysrst_ctrl_stress_all.153948845	May 23 12:54:24 PM PDT 24	May 23 12:54:33 PM PDT 24	8583915432 ps
T88	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3628783325	May 23 12:53:58 PM PDT 24	May 23 01:03:29 PM PDT 24	214515569268 ps
T115	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2365530512	May 23 12:56:03 PM PDT 24	May 23 12:56:11 PM PDT 24	6235954572 ps
T391	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2602028955	May 23 12:57:13 PM PDT 24	May 23 12:57:17 PM PDT 24	2492213793 ps
T392	/workspace/coverage/default/24.sysrst_ctrl_alert_test.2704898450	May 23 12:55:34 PM PDT 24	May 23 12:55:41 PM PDT 24	2014312468 ps
T393	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.554939650	May 23 12:55:04 PM PDT 24	May 23 12:55:09 PM PDT 24	3763106646 ps
T394	/workspace/coverage/default/3.sysrst_ctrl_smoke.4173928871	May 23 12:54:01 PM PDT 24	May 23 12:54:05 PM PDT 24	2136678383 ps
T187	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2171782993	May 23 12:56:19 PM PDT 24	May 23 12:56:23 PM PDT 24	3208659153 ps
T35	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.402267946	May 23 12:54:28 PM PDT 24	May 23 12:54:55 PM PDT 24	66529587722 ps
T242	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.693404781	May 23 12:56:08 PM PDT 24	May 23 12:57:03 PM PDT 24	74382820138 ps
T82	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3492925228	May 23 12:56:19 PM PDT 24	May 23 12:58:08 PM PDT 24	796729177923 ps
T36	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2584531782	May 23 12:53:59 PM PDT 24	May 23 12:54:53 PM PDT 24	75342568550 ps
T42	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1869835100	May 23 12:53:48 PM PDT 24	May 23 12:56:21 PM PDT 24	622772270453 ps
T136	/workspace/coverage/default/21.sysrst_ctrl_smoke.3618790855	May 23 12:55:36 PM PDT 24	May 23 12:55:41 PM PDT 24	2115945585 ps
T137	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3881669002	May 23 12:57:18 PM PDT 24	May 23 01:00:15 PM PDT 24	61940441712 ps
T138	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.127960369	May 23 12:56:21 PM PDT 24	May 23 12:57:49 PM PDT 24	113946816647 ps
T139	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.632110801	May 23 12:56:05 PM PDT 24	May 23 12:56:13 PM PDT 24	2609601376 ps
T140	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3305289763	May 23 12:54:26 PM PDT 24	May 23 12:54:32 PM PDT 24	3445457380 ps
T141	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.183775823	May 23 12:56:18 PM PDT 24	May 23 12:56:27 PM PDT 24	2453015366 ps
T142	/workspace/coverage/default/43.sysrst_ctrl_stress_all.2773246823	May 23 12:56:58 PM PDT 24	May 23 12:57:23 PM PDT 24	10776489166 ps
T211	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3739969094	May 23 12:55:06 PM PDT 24	May 23 12:55:10 PM PDT 24	2676328804 ps
T230	/workspace/coverage/default/41.sysrst_ctrl_alert_test.2240738160	May 23 12:56:45 PM PDT 24	May 23 12:56:50 PM PDT 24	2045248880 ps
T395	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1395229670	May 23 12:55:50 PM PDT 24	May 23 12:55:52 PM PDT 24	2697797181 ps
T396	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1272852059	May 23 12:54:39 PM PDT 24	May 23 12:54:42 PM PDT 24	2111455903 ps
T397	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.668886142	May 23 12:56:58 PM PDT 24	May 23 12:57:02 PM PDT 24	2622488693 ps
T370	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3240656181	May 23 12:54:54 PM PDT 24	May 23 12:56:53 PM PDT 24	1332063300262 ps
T212	/workspace/coverage/default/46.sysrst_ctrl_stress_all.164474232	May 23 12:56:56 PM PDT 24	May 23 12:57:08 PM PDT 24	14390095245 ps
T301	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.520183986	May 23 12:56:44 PM PDT 24	May 23 12:56:55 PM PDT 24	11288310239 ps
T398	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.566833779	May 23 12:55:18 PM PDT 24	May 23 12:55:24 PM PDT 24	2617254745 ps
T399	/workspace/coverage/default/31.sysrst_ctrl_smoke.4033041851	May 23 12:56:08 PM PDT 24	May 23 12:56:16 PM PDT 24	2110697015 ps
T298	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1231716864	May 23 12:54:27 PM PDT 24	May 23 12:54:38 PM PDT 24	2511277125 ps
T400	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.781322673	May 23 12:55:48 PM PDT 24	May 23 12:55:51 PM PDT 24	2193164500 ps
T299	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.513462132	May 23 12:56:55 PM PDT 24	May 23 12:57:00 PM PDT 24	2514239447 ps
T84	/workspace/coverage/default/23.sysrst_ctrl_stress_all.4199308306	May 23 12:55:33 PM PDT 24	May 23 12:55:52 PM PDT 24	14484579868 ps
T124	/workspace/coverage/default/49.sysrst_ctrl_smoke.993740056	May 23 12:57:10 PM PDT 24	May 23 12:57:15 PM PDT 24	2122797744 ps
T125	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3458472298	May 23 12:56:06 PM PDT 24	May 23 12:56:15 PM PDT 24	2509083003 ps
T126	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4213725824	May 23 12:56:07 PM PDT 24	May 23 12:59:27 PM PDT 24	131429380890 ps
T127	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2642433081	May 23 12:54:40 PM PDT 24	May 23 12:54:49 PM PDT 24	2509367703 ps
T128	/workspace/coverage/default/34.sysrst_ctrl_smoke.1258362759	May 23 12:56:19 PM PDT 24	May 23 12:56:22 PM PDT 24	2141848488 ps
T129	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.256613671	May 23 12:56:31 PM PDT 24	May 23 01:05:24 PM PDT 24	208192231413 ps
T130	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2513932488	May 23 12:54:28 PM PDT 24	May 23 12:54:38 PM PDT 24	2051653810 ps
T131	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1314174535	May 23 12:56:16 PM PDT 24	May 23 12:56:19 PM PDT 24	2639298402 ps
T132	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3411055773	May 23 12:56:30 PM PDT 24	May 23 12:56:36 PM PDT 24	6985215696 ps
T251	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1695814605	May 23 12:53:50 PM PDT 24	May 23 12:54:53 PM PDT 24	51164735734 ps
T261	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1943697994	May 23 12:53:48 PM PDT 24	May 23 12:54:24 PM PDT 24	130132487660 ps
T262	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3217206866	May 23 12:56:44 PM PDT 24	May 23 12:56:52 PM PDT 24	2618225098 ps
T172	/workspace/coverage/default/33.sysrst_ctrl_stress_all.3531434746	May 23 12:56:21 PM PDT 24	May 23 12:58:27 PM PDT 24	225053006370 ps
T244	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3508815352	May 23 12:57:21 PM PDT 24	May 23 12:57:50 PM PDT 24	40112215221 ps
T253	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2692258802	May 23 12:57:16 PM PDT 24	May 23 01:00:25 PM PDT 24	68080315553 ps
T263	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2283566671	May 23 12:56:03 PM PDT 24	May 23 12:56:05 PM PDT 24	2291755779 ps
T264	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.4289077145	May 23 12:53:59 PM PDT 24	May 23 12:56:40 PM PDT 24	129287506167 ps
T254	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2994551242	May 23 12:57:13 PM PDT 24	May 23 12:57:51 PM PDT 24	27588974459 ps
T173	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2104044419	May 23 12:56:55 PM PDT 24	May 23 12:57:09 PM PDT 24	4003825663 ps
T401	/workspace/coverage/default/4.sysrst_ctrl_alert_test.2639751233	May 23 12:54:14 PM PDT 24	May 23 12:54:18 PM PDT 24	2041634249 ps
T300	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1689272332	May 23 12:56:24 PM PDT 24	May 23 12:56:27 PM PDT 24	2546286699 ps
T402	/workspace/coverage/default/2.sysrst_ctrl_alert_test.2881561104	May 23 12:54:00 PM PDT 24	May 23 12:54:08 PM PDT 24	2010703872 ps
T403	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.12705123	May 23 12:55:20 PM PDT 24	May 23 12:55:23 PM PDT 24	2577381614 ps
T404	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2635726813	May 23 12:55:52 PM PDT 24	May 23 12:55:58 PM PDT 24	2520810417 ps
T289	/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.4259231748	May 23 12:54:52 PM PDT 24	May 23 12:54:57 PM PDT 24	3355007109 ps
T252	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2998024274	May 23 12:55:04 PM PDT 24	May 23 12:58:44 PM PDT 24	84186416902 ps
T405	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3358674009	May 23 12:56:04 PM PDT 24	May 23 12:56:07 PM PDT 24	5001893024 ps
T406	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3943130997	May 23 12:55:49 PM PDT 24	May 23 12:55:52 PM PDT 24	3225815880 ps
T407	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3322233141	May 23 12:55:21 PM PDT 24	May 23 12:55:29 PM PDT 24	2453915450 ps
T408	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.574312091	May 23 12:56:30 PM PDT 24	May 23 12:56:38 PM PDT 24	2433500264 ps
T330	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2669022002	May 23 12:53:51 PM PDT 24	May 23 12:55:05 PM PDT 24	28565959672 ps
T409	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.508479574	May 23 12:54:29 PM PDT 24	May 23 12:54:40 PM PDT 24	2608059425 ps
T410	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1491433883	May 23 12:54:56 PM PDT 24	May 23 12:55:05 PM PDT 24	4418202052 ps
T411	/workspace/coverage/default/48.sysrst_ctrl_smoke.2427800650	May 23 12:57:12 PM PDT 24	May 23 12:57:20 PM PDT 24	2110537882 ps
T357	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.299585509	May 23 12:54:27 PM PDT 24	May 23 12:54:44 PM PDT 24	44043502566 ps
T368	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1276884708	May 23 12:57:21 PM PDT 24	May 23 12:58:09 PM PDT 24	80251767099 ps
T295	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2198818142	May 23 12:53:51 PM PDT 24	May 23 12:53:54 PM PDT 24	2493188539 ps
T218	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.3461574615	May 23 12:55:19 PM PDT 24	May 23 12:55:23 PM PDT 24	4100256673 ps
T296	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2375726865	May 23 12:56:07 PM PDT 24	May 23 12:56:16 PM PDT 24	2463062313 ps
T412	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2584414933	May 23 12:53:58 PM PDT 24	May 23 12:54:03 PM PDT 24	3232969589 ps
T77	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4263203194	May 23 12:55:51 PM PDT 24	May 23 12:58:24 PM PDT 24	814468969711 ps
T105	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1018552219	May 23 12:55:21 PM PDT 24	May 23 12:55:25 PM PDT 24	2236811851 ps
T106	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.18104125	May 23 12:57:12 PM PDT 24	May 23 12:57:18 PM PDT 24	2151732959 ps
T78	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.749391702	May 23 12:56:18 PM PDT 24	May 23 12:56:23 PM PDT 24	3079959528 ps
T107	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.3658501681	May 23 12:55:10 PM PDT 24	May 23 01:00:19 PM PDT 24	111967945717 ps
T75	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4256809262	May 23 12:57:23 PM PDT 24	May 23 01:00:22 PM PDT 24	70766635733 ps
T108	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.955933004	May 23 12:54:41 PM PDT 24	May 23 12:54:50 PM PDT 24	2467114307 ps
T109	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2882307510	May 23 12:53:51 PM PDT 24	May 23 12:54:16 PM PDT 24	42189738518 ps
T110	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4268627800	May 23 12:56:57 PM PDT 24	May 23 12:57:01 PM PDT 24	2872857710 ps
T43	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2754132168	May 23 12:57:10 PM PDT 24	May 23 12:58:32 PM PDT 24	64915785629 ps
T169	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.1252028727	May 23 12:55:35 PM PDT 24	May 23 12:55:45 PM PDT 24	4801564286 ps
T170	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.546021055	May 23 12:54:53 PM PDT 24	May 23 12:57:27 PM PDT 24	58870729538 ps
T171	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4230641508	May 23 12:53:58 PM PDT 24	May 23 12:54:05 PM PDT 24	2551004282 ps
T413	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1544049404	May 23 12:57:23 PM PDT 24	May 23 12:57:54 PM PDT 24	26590259324 ps
T94	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1599898517	May 23 12:55:05 PM PDT 24	May 23 01:00:39 PM PDT 24	1273866084838 ps
T414	/workspace/coverage/default/38.sysrst_ctrl_smoke.1349013867	May 23 12:56:29 PM PDT 24	May 23 12:56:32 PM PDT 24	2145417161 ps
T343	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2924179956	May 23 12:57:16 PM PDT 24	May 23 01:05:52 PM PDT 24	202145563676 ps
T415	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3060764236	May 23 12:56:19 PM PDT 24	May 23 12:56:25 PM PDT 24	2616767255 ps
T95	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.4060103883	May 23 12:55:18 PM PDT 24	May 23 12:56:22 PM PDT 24	94188891771 ps
T416	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1031353273	May 23 12:55:34 PM PDT 24	May 23 12:55:43 PM PDT 24	2466451393 ps
T290	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3066326630	May 23 12:55:21 PM PDT 24	May 23 12:55:27 PM PDT 24	3237648185 ps
T417	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.868712229	May 23 12:56:31 PM PDT 24	May 23 12:56:35 PM PDT 24	2459437569 ps
T418	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.367665028	May 23 12:56:18 PM PDT 24	May 23 12:57:00 PM PDT 24	29347598390 ps
T419	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2474834558	May 23 12:55:37 PM PDT 24	May 23 01:03:21 PM PDT 24	942912799791 ps
T420	/workspace/coverage/default/43.sysrst_ctrl_smoke.4076130683	May 23 12:56:46 PM PDT 24	May 23 12:56:55 PM PDT 24	2110953582 ps
T96	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2539188314	May 23 12:55:49 PM PDT 24	May 23 12:56:55 PM PDT 24	106052557610 ps
T421	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3796669852	May 23 12:56:55 PM PDT 24	May 23 12:56:59 PM PDT 24	2477359041 ps
T146	/workspace/coverage/default/17.sysrst_ctrl_stress_all.67767533	May 23 12:55:19 PM PDT 24	May 23 12:55:53 PM PDT 24	12043925141 ps
T223	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2554366263	May 23 12:54:29 PM PDT 24	May 23 12:54:41 PM PDT 24	11423326923 ps
T147	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.4000578583	May 23 12:56:46 PM PDT 24	May 23 12:56:52 PM PDT 24	5577155159 ps
T224	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2035065691	May 23 12:54:53 PM PDT 24	May 23 12:54:57 PM PDT 24	2469138680 ps
T225	/workspace/coverage/default/5.sysrst_ctrl_stress_all.3549484894	May 23 12:54:25 PM PDT 24	May 23 12:55:08 PM PDT 24	14378182777 ps
T226	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1539624738	May 23 12:55:07 PM PDT 24	May 23 12:55:12 PM PDT 24	2458922273 ps
T227	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2488796523	May 23 12:56:30 PM PDT 24	May 23 01:00:54 PM PDT 24	211071176173 ps
T228	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2090611433	May 23 12:57:21 PM PDT 24	May 23 12:57:38 PM PDT 24	26608043617 ps
T188	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2702014853	May 23 12:55:06 PM PDT 24	May 23 12:55:09 PM PDT 24	2643825954 ps
T229	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.196401408	May 23 12:55:36 PM PDT 24	May 23 01:01:31 PM PDT 24	132984340055 ps
T347	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.146611409	May 23 12:55:49 PM PDT 24	May 23 12:56:37 PM PDT 24	100853100321 ps
T422	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3279335264	May 23 12:55:05 PM PDT 24	May 23 12:55:14 PM PDT 24	2610272772 ps
T423	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.4070331087	May 23 12:55:51 PM PDT 24	May 23 12:55:56 PM PDT 24	3903660544 ps
T424	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1650070178	May 23 12:54:39 PM PDT 24	May 23 12:54:46 PM PDT 24	2840843985 ps