Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.67 99.48 96.51 100.00 99.36 98.93 99.90 89.49


Total tests in report: 903
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
60.02 60.02 78.43 78.43 67.62 67.62 92.35 92.35 17.31 17.31 79.26 79.26 68.02 68.02 17.15 17.15 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3058572011
75.84 15.82 88.60 10.17 80.81 13.20 94.18 1.83 50.64 33.33 89.17 9.91 81.89 13.87 45.59 28.44 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.838022203
82.56 6.72 92.83 4.24 85.87 5.06 95.78 1.60 76.92 26.28 92.83 3.66 87.76 5.88 45.94 0.35 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.860958454
86.53 3.97 97.11 4.27 91.25 5.38 96.92 1.14 84.62 7.69 96.82 3.99 91.43 3.66 47.57 1.64 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2870590294
89.07 2.54 97.59 0.49 92.09 0.83 96.92 0.00 87.18 2.56 97.15 0.33 95.86 4.43 56.69 9.12 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2280966561
90.37 1.30 97.59 0.00 92.09 0.00 96.92 0.00 87.18 0.00 97.15 0.00 95.86 0.00 65.81 9.12 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.475522174
91.63 1.26 97.67 0.07 93.48 1.39 97.60 0.68 87.18 0.00 97.26 0.11 95.95 0.10 72.25 6.44 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.4109526734
92.79 1.16 98.32 0.65 94.29 0.81 97.83 0.23 91.67 4.49 97.74 0.48 97.40 1.45 72.30 0.05 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.115305040
93.52 0.73 98.47 0.15 94.67 0.38 97.83 0.00 91.67 0.00 97.82 0.07 97.69 0.29 76.51 4.21 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2340314535
93.91 0.38 98.54 0.07 94.67 0.00 97.83 0.00 91.67 0.00 97.86 0.04 97.69 0.00 79.09 2.58 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2201560140
94.21 0.30 98.68 0.13 94.82 0.15 97.83 0.00 92.95 1.28 98.04 0.18 98.07 0.39 79.09 0.00 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2700197445
94.49 0.28 98.77 0.09 94.84 0.03 97.83 0.00 93.59 0.64 98.19 0.15 98.17 0.10 80.03 0.94 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.942635722
94.73 0.24 98.84 0.07 94.89 0.05 97.83 0.00 94.87 1.28 98.26 0.07 98.36 0.19 80.03 0.00 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.2914818875
94.96 0.24 98.90 0.06 94.97 0.08 99.20 1.37 94.87 0.00 98.26 0.00 98.36 0.00 80.18 0.15 /workspace/coverage/default/12.sysrst_ctrl_alert_test.4123380317
95.19 0.23 98.90 0.00 94.97 0.00 99.20 0.00 94.87 0.00 98.26 0.00 98.36 0.00 81.76 1.59 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.831919666
95.39 0.20 98.96 0.06 95.02 0.05 99.20 0.00 95.51 0.64 98.34 0.07 98.46 0.10 82.26 0.50 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.276836141
95.57 0.18 98.96 0.00 95.02 0.00 99.20 0.00 95.51 0.00 98.34 0.00 98.46 0.00 83.50 1.24 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.822181766
95.71 0.14 98.99 0.04 95.05 0.03 99.20 0.00 96.15 0.64 98.37 0.04 98.55 0.10 83.65 0.15 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2351262985
95.85 0.14 99.01 0.02 95.05 0.00 99.20 0.00 96.15 0.00 98.37 0.00 98.55 0.00 84.59 0.94 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1084190377
95.97 0.13 99.05 0.04 95.07 0.03 99.20 0.00 96.79 0.64 98.41 0.04 98.65 0.10 84.64 0.05 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1293337827
96.10 0.13 99.09 0.04 95.10 0.03 99.20 0.00 97.44 0.64 98.45 0.04 98.75 0.10 84.69 0.05 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1115228200
96.23 0.12 99.09 0.00 95.20 0.10 99.20 0.00 97.44 0.00 98.45 0.00 99.42 0.67 84.79 0.10 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3650025667
96.34 0.12 99.12 0.04 95.22 0.03 99.20 0.00 98.08 0.64 98.48 0.04 99.52 0.10 84.79 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2349792262
96.46 0.12 99.16 0.04 95.25 0.03 99.20 0.00 98.72 0.64 98.52 0.04 99.61 0.10 84.79 0.00 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3219395466
96.58 0.12 99.20 0.04 95.27 0.03 99.20 0.00 99.36 0.64 98.56 0.04 99.71 0.10 84.79 0.00 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.689925858
96.70 0.11 99.22 0.02 95.30 0.03 99.20 0.00 99.36 0.00 98.56 0.00 99.71 0.00 85.53 0.74 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3242339399
96.81 0.11 99.22 0.00 95.98 0.68 99.20 0.00 99.36 0.00 98.56 0.00 99.71 0.00 85.63 0.10 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.1092322889
96.91 0.10 99.29 0.07 95.98 0.00 99.32 0.11 99.36 0.00 98.56 0.00 99.71 0.00 86.12 0.50 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2315370976
97.00 0.10 99.29 0.00 96.01 0.03 99.77 0.46 99.36 0.00 98.56 0.00 99.81 0.10 86.22 0.10 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.686654788
97.07 0.07 99.29 0.00 96.01 0.00 99.77 0.00 99.36 0.00 98.56 0.00 99.81 0.00 86.72 0.50 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.405585197
97.14 0.07 99.31 0.02 96.03 0.03 100.00 0.23 99.36 0.00 98.56 0.00 99.81 0.00 86.92 0.20 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3821745573
97.19 0.05 99.35 0.04 96.18 0.15 100.00 0.00 99.36 0.00 98.63 0.07 99.90 0.10 86.92 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3583760071
97.23 0.04 99.35 0.00 96.23 0.05 100.00 0.00 99.36 0.00 98.63 0.00 99.90 0.00 87.17 0.25 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2490930080
97.28 0.04 99.35 0.00 96.23 0.00 100.00 0.00 99.36 0.00 98.63 0.00 99.90 0.00 87.46 0.30 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.2491596873
97.31 0.04 99.35 0.00 96.23 0.00 100.00 0.00 99.36 0.00 98.63 0.00 99.90 0.00 87.71 0.25 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.129979823
97.34 0.03 99.35 0.00 96.23 0.00 100.00 0.00 99.36 0.00 98.63 0.00 99.90 0.00 87.91 0.20 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.325568858
97.36 0.02 99.37 0.02 96.23 0.00 100.00 0.00 99.36 0.00 98.67 0.04 99.90 0.00 88.01 0.10 /workspace/coverage/default/42.sysrst_ctrl_stress_all.4283080771
97.38 0.02 99.37 0.00 96.39 0.15 100.00 0.00 99.36 0.00 98.67 0.00 99.90 0.00 88.01 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1323492968
97.41 0.02 99.37 0.00 96.39 0.00 100.00 0.00 99.36 0.00 98.67 0.00 99.90 0.00 88.16 0.15 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.270864084
97.43 0.02 99.37 0.00 96.39 0.00 100.00 0.00 99.36 0.00 98.67 0.00 99.90 0.00 88.31 0.15 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.764270918
97.44 0.02 99.40 0.04 96.39 0.00 100.00 0.00 99.36 0.00 98.74 0.07 99.90 0.00 88.31 0.00 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1739417265
97.46 0.01 99.40 0.00 96.44 0.05 100.00 0.00 99.36 0.00 98.74 0.00 99.90 0.00 88.35 0.05 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3431860423
97.47 0.01 99.40 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.74 0.00 99.90 0.00 88.45 0.10 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2676796574
97.49 0.01 99.40 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.74 0.00 99.90 0.00 88.55 0.10 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3602010316
97.50 0.01 99.40 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.74 0.00 99.90 0.00 88.65 0.10 /workspace/coverage/default/10.sysrst_ctrl_stress_all.2374729744
97.51 0.01 99.40 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.74 0.00 99.90 0.00 88.75 0.10 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1728819774
97.52 0.01 99.42 0.02 96.44 0.00 100.00 0.00 99.36 0.00 98.78 0.04 99.90 0.00 88.75 0.00 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.3885035879
97.53 0.01 99.44 0.02 96.44 0.00 100.00 0.00 99.36 0.00 98.82 0.04 99.90 0.00 88.75 0.00 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2973325028
97.54 0.01 99.46 0.02 96.44 0.00 100.00 0.00 99.36 0.00 98.85 0.04 99.90 0.00 88.75 0.00 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.2050300980
97.55 0.01 99.48 0.02 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.04 99.90 0.00 88.75 0.00 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.499356550
97.55 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 88.80 0.05 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.587811189
97.56 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 88.85 0.05 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3761158119
97.57 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 88.90 0.05 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.2948699197
97.57 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 88.95 0.05 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2687091927
97.58 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.00 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2286727824
97.59 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.05 0.05 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1409894618
97.60 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.10 0.05 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2249199019
97.60 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.15 0.05 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1914500237
97.61 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.20 0.05 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.527378739
97.62 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.25 0.05 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.342796115
97.62 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.30 0.05 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2731697342
97.63 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.35 0.05 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1445002592
97.64 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.40 0.05 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2773577153
97.64 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.44 0.05 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2949614135
97.65 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.89 0.00 99.90 0.00 89.49 0.05 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1458991888
97.66 0.01 99.48 0.00 96.44 0.00 100.00 0.00 99.36 0.00 98.93 0.04 99.90 0.00 89.49 0.00 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1259074116
97.66 0.01 99.48 0.00 96.46 0.03 100.00 0.00 99.36 0.00 98.93 0.00 99.90 0.00 89.49 0.00 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4066610604
97.66 0.01 99.48 0.00 96.49 0.03 100.00 0.00 99.36 0.00 98.93 0.00 99.90 0.00 89.49 0.00 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.704463095


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3324961289
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1247275495
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3695883828
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3521312645
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4253389766
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.651624719
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1242340590
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1541826161
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2552734922
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.669991078
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2542510676
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2136805380
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3881893408
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.973719803
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2950820551
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1891309200
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1258050915
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2095195134
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.178330722
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3082654021
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.166010499
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1639867339
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.776535726
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.377801994
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.946092141
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1821886278
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2962586652
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1480456333
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2986107940
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2119451535
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3753532635
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3841798764
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.4210846272
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1512030765
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.974852336
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1755793131
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.495760713
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.258316216
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2417898837
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1710570035
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3021220912
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.4009259969
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.93485771
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2870233812
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3001637984
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4214402181
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1853105937
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3579683369
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4270838576
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1896779155
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2926783232
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2584620342
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3349254594
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.244188340
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1099261146
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2859909399
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2233256493
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2390739618
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1908916025
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3776149520
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.360325876
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.903321091
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1304287078
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.610558427
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2014576079
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.4034634
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3326011570
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1245993602
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.577462774
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.312503237
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3127588022
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2446000724
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.4017288927
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.4179669369
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1664857310
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1129148141
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2268617866
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2272408089
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2371886945
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.744748047
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.787210555
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/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3645555662
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4225374569
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1083286484
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2732446946
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2353051894
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1080551944
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3113608708
/workspace/coverage/default/42.sysrst_ctrl_smoke.2808113636
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.96864488
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1366254784
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2459394269
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.102015600
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1454774484
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1180748902
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4096061347
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1277932261
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3353258949
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3160399351
/workspace/coverage/default/43.sysrst_ctrl_smoke.2340952695
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2279316605
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2621281100
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2815112497
/workspace/coverage/default/44.sysrst_ctrl_alert_test.50641662
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2156041070
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2220727135
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3871168619
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.843815092
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.976526694
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2104885809
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1274663579
/workspace/coverage/default/44.sysrst_ctrl_smoke.3348968412
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3213723711
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.66544780
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1334497505
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3778887379
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3421117213
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3303923732
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3615853668
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3547762805
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2112119930
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1081814742
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2940950079
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2471597061
/workspace/coverage/default/45.sysrst_ctrl_smoke.1364735077
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3821936225
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1124680405
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1448717321
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3775524413
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2454001169
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2866328571
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2632033283
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.4175644942
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3210543945
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1179333971
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.410546636
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.95722930
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1468065415
/workspace/coverage/default/46.sysrst_ctrl_smoke.3368164820
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1198054669
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2155955757
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2908071253
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2378901730
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2271362913
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1246157542
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3447928446
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3895005288
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2591605995
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3809417419
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.803072243
/workspace/coverage/default/47.sysrst_ctrl_smoke.3335114415
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1578314748
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1643624675
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1532061618
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1104533074
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2001013743
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.151174100
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1350364497
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2018992366
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4206406603
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.4103307276
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.640163601
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.277985390
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2107015148
/workspace/coverage/default/48.sysrst_ctrl_smoke.2555615973
/workspace/coverage/default/48.sysrst_ctrl_stress_all.948911338
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3715937688
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2433003057
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1471024474
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3308859048
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.252452163
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3751551638
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.765269250
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4245025512
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3242375281
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.273660721
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1004453055
/workspace/coverage/default/49.sysrst_ctrl_smoke.2783766978
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2617907642
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3835761970
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2124554160
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.117454908
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2822027557
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.90762032
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.910081533
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3164786851
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4212804291
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.447351635
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.575996442
/workspace/coverage/default/5.sysrst_ctrl_smoke.2950953617
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2933911009
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4143591305
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2293877941
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3761866718
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3034657191
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.606863038
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1760041471
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3657880146
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.700924391
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2347589988
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3474910759
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3157818011
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.488761475
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3258554394
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1794724193
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1322947265
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3933559375
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.61599389
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1065012112
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.887556905
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4087414603
/workspace/coverage/default/6.sysrst_ctrl_smoke.405439016
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2021580037
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4043545904
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.95957107
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1645883758
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4135272315
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1524155696
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3532007335
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2090417176
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.267055523
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1834613423
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3417449652
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.789307881
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.8554312
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2996428730
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.617293406
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3871590495
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3497821252
/workspace/coverage/default/7.sysrst_ctrl_smoke.3423445490
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3134319866
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4180168073
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2213440417
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1591091020
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3079236627
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2912765044
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.383683850
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1762166526
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3120553713
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1615110055
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1366811441
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2794335063
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2393480733
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2652786760
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3609092679
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.223713688
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2511793032
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2888504669
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3908228784
/workspace/coverage/default/8.sysrst_ctrl_smoke.3926070396
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2617367200
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1246455551
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2219103967
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1142228971
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1359147989
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1862847647
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.390018047
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1439635400
/workspace/coverage/default/9.sysrst_ctrl_alert_test.31710899
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3955536253
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3022918651
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.127124947
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1388207616
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3216584977
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2201367344
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1514153130
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2627991336
/workspace/coverage/default/9.sysrst_ctrl_smoke.3138463328
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1157126313
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2511332
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4095820826
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4205868691
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3531931681
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1851416424
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2826669870
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2574973882
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2422054740
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.380248735
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1402796749




Total test records in report: 903
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T5 /workspace/coverage/default/16.sysrst_ctrl_smoke.3659936988 Jul 04 05:33:16 PM PDT 24 Jul 04 05:33:22 PM PDT 24 2111801177 ps
T1 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3625921237 Jul 04 05:33:08 PM PDT 24 Jul 04 05:33:12 PM PDT 24 6551746878 ps
T6 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2904738352 Jul 04 05:32:59 PM PDT 24 Jul 04 05:33:04 PM PDT 24 3248418526 ps
T2 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3058572011 Jul 04 05:34:51 PM PDT 24 Jul 04 05:35:15 PM PDT 24 81091633205 ps
T13 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2001013743 Jul 04 05:34:43 PM PDT 24 Jul 04 05:34:49 PM PDT 24 3678659748 ps
T14 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1624631085 Jul 04 05:33:29 PM PDT 24 Jul 04 05:33:32 PM PDT 24 2150372186 ps
T15 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.951114527 Jul 04 05:34:03 PM PDT 24 Jul 04 05:34:11 PM PDT 24 2609519882 ps
T16 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.843815092 Jul 04 05:34:26 PM PDT 24 Jul 04 05:34:27 PM PDT 24 2698628037 ps
T17 /workspace/coverage/default/4.sysrst_ctrl_stress_all.1131539774 Jul 04 05:32:59 PM PDT 24 Jul 04 05:33:02 PM PDT 24 7854888089 ps
T18 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.159414664 Jul 04 05:33:39 PM PDT 24 Jul 04 05:33:41 PM PDT 24 2789514910 ps
T19 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.860958454 Jul 04 05:32:50 PM PDT 24 Jul 04 05:33:00 PM PDT 24 31725922643 ps
T24 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3242375281 Jul 04 05:34:41 PM PDT 24 Jul 04 05:34:45 PM PDT 24 2465012212 ps
T47 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3821745573 Jul 04 05:32:42 PM PDT 24 Jul 04 05:32:44 PM PDT 24 2532400799 ps
T29 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1259074116 Jul 04 05:32:53 PM PDT 24 Jul 04 05:32:55 PM PDT 24 3765409345 ps
T48 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3628503178 Jul 04 05:33:13 PM PDT 24 Jul 04 05:33:14 PM PDT 24 2271877586 ps
T3 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2315370976 Jul 04 05:34:22 PM PDT 24 Jul 04 05:35:30 PM PDT 24 97834136456 ps
T4 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1083286484 Jul 04 05:34:28 PM PDT 24 Jul 04 05:34:31 PM PDT 24 2500730312 ps
T49 /workspace/coverage/default/14.sysrst_ctrl_smoke.3596995617 Jul 04 05:33:04 PM PDT 24 Jul 04 05:33:06 PM PDT 24 2126522301 ps
T50 /workspace/coverage/default/38.sysrst_ctrl_smoke.343038696 Jul 04 05:34:21 PM PDT 24 Jul 04 05:34:27 PM PDT 24 2109069004 ps
T26 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.2292436025 Jul 04 05:34:02 PM PDT 24 Jul 04 05:37:39 PM PDT 24 91955772759 ps
T51 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2341495997 Jul 04 05:33:28 PM PDT 24 Jul 04 05:33:36 PM PDT 24 2610810459 ps
T62 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1364296580 Jul 04 05:34:24 PM PDT 24 Jul 04 05:34:27 PM PDT 24 2629558485 ps
T55 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3751551638 Jul 04 05:34:41 PM PDT 24 Jul 04 05:34:45 PM PDT 24 2499591966 ps
T56 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2806726946 Jul 04 05:34:01 PM PDT 24 Jul 04 05:34:04 PM PDT 24 4923742019 ps
T7 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3242339399 Jul 04 05:32:44 PM PDT 24 Jul 04 05:33:20 PM PDT 24 104042099242 ps
T113 /workspace/coverage/default/45.sysrst_ctrl_alert_test.1334497505 Jul 04 05:34:36 PM PDT 24 Jul 04 05:34:38 PM PDT 24 2045515425 ps
T8 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3040348840 Jul 04 05:32:57 PM PDT 24 Jul 04 05:33:06 PM PDT 24 7877343734 ps
T114 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2104885809 Jul 04 05:34:26 PM PDT 24 Jul 04 05:34:28 PM PDT 24 2146388064 ps
T63 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2471597061 Jul 04 05:34:25 PM PDT 24 Jul 04 05:34:33 PM PDT 24 2509076869 ps
T9 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2870590294 Jul 04 05:32:39 PM PDT 24 Jul 04 05:33:13 PM PDT 24 162965559892 ps
T39 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.916418359 Jul 04 05:32:46 PM PDT 24 Jul 04 05:33:05 PM PDT 24 27098162633 ps
T25 /workspace/coverage/default/8.sysrst_ctrl_stress_all.2617367200 Jul 04 05:33:00 PM PDT 24 Jul 04 05:33:02 PM PDT 24 7365768119 ps
T40 /workspace/coverage/default/17.sysrst_ctrl_stress_all.981844632 Jul 04 05:33:15 PM PDT 24 Jul 04 05:33:25 PM PDT 24 13074539645 ps
T10 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.838022203 Jul 04 05:34:28 PM PDT 24 Jul 04 05:35:48 PM PDT 24 116400263795 ps
T59 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2511793032 Jul 04 05:32:50 PM PDT 24 Jul 04 05:32:59 PM PDT 24 2469927854 ps
T11 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.838122102 Jul 04 05:34:17 PM PDT 24 Jul 04 05:34:19 PM PDT 24 2934836675 ps
T38 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2840334459 Jul 04 05:33:25 PM PDT 24 Jul 04 05:33:32 PM PDT 24 37295878098 ps
T60 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3367931808 Jul 04 05:33:22 PM PDT 24 Jul 04 05:33:24 PM PDT 24 2467679840 ps
T41 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2422054740 Jul 04 05:35:04 PM PDT 24 Jul 04 05:36:09 PM PDT 24 24327669170 ps
T42 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.488761475 Jul 04 05:32:54 PM PDT 24 Jul 04 05:33:05 PM PDT 24 3649989228 ps
T153 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3895005288 Jul 04 05:34:37 PM PDT 24 Jul 04 05:34:40 PM PDT 24 2632069292 ps
T43 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1359147989 Jul 04 05:35:00 PM PDT 24 Jul 04 05:35:34 PM PDT 24 24589511873 ps
T12 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.247207700 Jul 04 05:34:07 PM PDT 24 Jul 04 05:34:34 PM PDT 24 40384665348 ps
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T170 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2348872255 Jul 04 05:33:41 PM PDT 24 Jul 04 05:33:45 PM PDT 24 2620255323 ps
T171 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3809417419 Jul 04 05:34:34 PM PDT 24 Jul 04 05:34:41 PM PDT 24 2172201401 ps
T172 /workspace/coverage/default/49.sysrst_ctrl_smoke.2783766978 Jul 04 05:34:42 PM PDT 24 Jul 04 05:34:48 PM PDT 24 2112856197 ps
T173 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1468065415 Jul 04 05:34:40 PM PDT 24 Jul 04 05:34:42 PM PDT 24 2535591506 ps
T30 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3622886835 Jul 04 05:33:39 PM PDT 24 Jul 04 05:34:15 PM PDT 24 58266598888 ps
T61 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3142656155 Jul 04 05:32:42 PM PDT 24 Jul 04 05:32:49 PM PDT 24 2458410224 ps
T174 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1274663579 Jul 04 05:34:33 PM PDT 24 Jul 04 05:34:41 PM PDT 24 2513142439 ps
T175 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1366811441 Jul 04 05:32:52 PM PDT 24 Jul 04 05:32:54 PM PDT 24 2039730658 ps
T80 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2533853673 Jul 04 05:32:58 PM PDT 24 Jul 04 05:33:05 PM PDT 24 2194737454 ps
T44 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2621281100 Jul 04 05:34:32 PM PDT 24 Jul 04 05:35:10 PM PDT 24 61440722853 ps
T45 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3022918651 Jul 04 05:32:59 PM PDT 24 Jul 04 05:33:35 PM PDT 24 26339324211 ps
T378 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2353051894 Jul 04 05:34:23 PM PDT 24 Jul 04 05:34:25 PM PDT 24 2541556421 ps
T278 /workspace/coverage/default/12.sysrst_ctrl_alert_test.4123380317 Jul 04 05:32:52 PM PDT 24 Jul 04 05:32:54 PM PDT 24 2037563110 ps
T53 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.744410160 Jul 04 05:34:01 PM PDT 24 Jul 04 05:41:04 PM PDT 24 172059705810 ps
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T54 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.46968406 Jul 04 05:33:50 PM PDT 24 Jul 04 05:35:29 PM PDT 24 44693108532 ps
T379 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.90762032 Jul 04 05:32:42 PM PDT 24 Jul 04 05:32:46 PM PDT 24 3706038389 ps
T377 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3113608708 Jul 04 05:34:28 PM PDT 24 Jul 04 05:34:31 PM PDT 24 2524754875 ps
T31 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2201560140 Jul 04 05:34:21 PM PDT 24 Jul 04 05:34:55 PM PDT 24 119178494631 ps
T259 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3994458097 Jul 04 05:33:14 PM PDT 24 Jul 04 05:33:17 PM PDT 24 2490513551 ps
T260 /workspace/coverage/default/13.sysrst_ctrl_smoke.3328210572 Jul 04 05:33:00 PM PDT 24 Jul 04 05:33:07 PM PDT 24 2110218896 ps
T261 /workspace/coverage/default/35.sysrst_ctrl_alert_test.709828787 Jul 04 05:34:14 PM PDT 24 Jul 04 05:34:20 PM PDT 24 2012453409 ps
T57 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.244873283 Jul 04 05:32:46 PM PDT 24 Jul 04 05:32:50 PM PDT 24 7379223422 ps
T109 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1557528944 Jul 04 05:33:51 PM PDT 24 Jul 04 05:34:01 PM PDT 24 3389239869 ps
T262 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3988956767 Jul 04 05:33:52 PM PDT 24 Jul 04 05:34:01 PM PDT 24 2820974097 ps
T263 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1294310052 Jul 04 05:32:55 PM PDT 24 Jul 04 05:33:03 PM PDT 24 11253078824 ps
T58 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3442283315 Jul 04 05:33:29 PM PDT 24 Jul 04 05:33:31 PM PDT 24 3608360121 ps
T264 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2163600187 Jul 04 05:34:27 PM PDT 24 Jul 04 05:34:29 PM PDT 24 2652809047 ps
T302 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3327417352 Jul 04 05:34:07 PM PDT 24 Jul 04 05:34:15 PM PDT 24 2511094256 ps
T380 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2594826800 Jul 04 05:34:15 PM PDT 24 Jul 04 05:34:22 PM PDT 24 2508889760 ps
T303 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2469354932 Jul 04 05:33:38 PM PDT 24 Jul 04 05:33:46 PM PDT 24 2511088691 ps
T46 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2574973882 Jul 04 05:35:00 PM PDT 24 Jul 04 05:37:36 PM PDT 24 58459861485 ps
T36 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1115228200 Jul 04 05:32:55 PM PDT 24 Jul 04 05:43:14 PM PDT 24 233488445220 ps
T178 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.499702150 Jul 04 05:32:44 PM PDT 24 Jul 04 05:32:47 PM PDT 24 2923517024 ps
T35 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.8554312 Jul 04 05:32:49 PM PDT 24 Jul 04 05:33:02 PM PDT 24 5348187121 ps
T179 /workspace/coverage/default/44.sysrst_ctrl_alert_test.50641662 Jul 04 05:34:34 PM PDT 24 Jul 04 05:34:36 PM PDT 24 2075566254 ps
T180 /workspace/coverage/default/22.sysrst_ctrl_smoke.3394578888 Jul 04 05:33:45 PM PDT 24 Jul 04 05:33:50 PM PDT 24 2113945770 ps
T65 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2293877941 Jul 04 05:32:53 PM PDT 24 Jul 04 05:32:59 PM PDT 24 5128020643 ps
T133 /workspace/coverage/default/21.sysrst_ctrl_stress_all.218074337 Jul 04 05:33:45 PM PDT 24 Jul 04 05:34:24 PM PDT 24 15293997113 ps
T110 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1645883758 Jul 04 05:34:48 PM PDT 24 Jul 04 05:35:12 PM PDT 24 39017830036 ps
T134 /workspace/coverage/default/28.sysrst_ctrl_alert_test.2988204198 Jul 04 05:33:47 PM PDT 24 Jul 04 05:33:49 PM PDT 24 2033388896 ps
T112 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.396463042 Jul 04 05:34:22 PM PDT 24 Jul 04 05:34:26 PM PDT 24 3506905323 ps
T135 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.850848561 Jul 04 05:33:09 PM PDT 24 Jul 04 05:33:12 PM PDT 24 2525615883 ps
T81 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4205868691 Jul 04 05:34:54 PM PDT 24 Jul 04 05:37:18 PM PDT 24 56502097534 ps
T136 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.39167877 Jul 04 05:33:54 PM PDT 24 Jul 04 05:33:57 PM PDT 24 4032603458 ps
T137 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1437814158 Jul 04 05:33:24 PM PDT 24 Jul 04 05:33:30 PM PDT 24 2011026531 ps
T37 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.276836141 Jul 04 05:33:35 PM PDT 24 Jul 04 05:35:08 PM PDT 24 195093850922 ps
T93 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.95722930 Jul 04 05:34:37 PM PDT 24 Jul 04 05:34:39 PM PDT 24 2082107742 ps
T94 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2364268977 Jul 04 05:33:54 PM PDT 24 Jul 04 05:33:58 PM PDT 24 2624948488 ps
T95 /workspace/coverage/default/31.sysrst_ctrl_stress_all.3845614678 Jul 04 05:33:59 PM PDT 24 Jul 04 05:34:21 PM PDT 24 15932675298 ps
T96 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3034657191 Jul 04 05:34:42 PM PDT 24 Jul 04 05:35:49 PM PDT 24 25829476761 ps
T97 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.774452937 Jul 04 05:33:26 PM PDT 24 Jul 04 05:33:36 PM PDT 24 3727603852 ps
T98 /workspace/coverage/default/9.sysrst_ctrl_alert_test.31710899 Jul 04 05:33:03 PM PDT 24 Jul 04 05:33:05 PM PDT 24 2056393371 ps
T99 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3353258949 Jul 04 05:34:29 PM PDT 24 Jul 04 05:34:36 PM PDT 24 2240585724 ps
T100 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1074544403 Jul 04 05:34:02 PM PDT 24 Jul 04 05:34:09 PM PDT 24 2214657481 ps
T101 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1448717321 Jul 04 05:34:27 PM PDT 24 Jul 04 05:35:33 PM PDT 24 1510949810548 ps
T66 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.115305040 Jul 04 05:32:40 PM PDT 24 Jul 04 05:32:50 PM PDT 24 9550168004 ps
T64 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.4098851197 Jul 04 05:33:08 PM PDT 24 Jul 04 05:33:12 PM PDT 24 3542333509 ps
T67 /workspace/coverage/default/47.sysrst_ctrl_stress_all.1578314748 Jul 04 05:34:34 PM PDT 24 Jul 04 05:35:06 PM PDT 24 17217984479 ps
T111 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2286727824 Jul 04 05:33:46 PM PDT 24 Jul 04 05:36:10 PM PDT 24 54834618235 ps
T381 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.664794694 Jul 04 05:32:46 PM PDT 24 Jul 04 05:32:48 PM PDT 24 2090412413 ps
T250 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4067075015 Jul 04 05:33:51 PM PDT 24 Jul 04 05:34:38 PM PDT 24 35358957264 ps
T382 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.267055523 Jul 04 05:33:03 PM PDT 24 Jul 04 05:33:08 PM PDT 24 3552283916 ps
T115 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.66544780 Jul 04 05:34:28 PM PDT 24 Jul 04 05:34:30 PM PDT 24 3145978574 ps
T383 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1235914479 Jul 04 05:33:30 PM PDT 24 Jul 04 05:33:33 PM PDT 24 3526172505 ps
T384 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1668672354 Jul 04 05:33:14 PM PDT 24 Jul 04 05:33:18 PM PDT 24 2616444756 ps
T385 /workspace/coverage/default/15.sysrst_ctrl_smoke.1789881616 Jul 04 05:33:06 PM PDT 24 Jul 04 05:33:10 PM PDT 24 2121471197 ps
T242 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.831919666 Jul 04 05:33:52 PM PDT 24 Jul 04 05:35:12 PM PDT 24 61390194905 ps
T32 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2280966561 Jul 04 05:33:20 PM PDT 24 Jul 04 05:34:47 PM PDT 24 134111442902 ps
T102 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2367798291 Jul 04 05:33:18 PM PDT 24 Jul 04 05:33:20 PM PDT 24 2529906552 ps
T73 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.95957107 Jul 04 05:32:44 PM PDT 24 Jul 04 05:32:47 PM PDT 24 5701950003 ps
T82 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.2245784149 Jul 04 05:34:21 PM PDT 24 Jul 04 05:36:13 PM PDT 24 150327000980 ps
T83 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2781890371 Jul 04 05:33:26 PM PDT 24 Jul 04 05:34:10 PM PDT 24 69435561162 ps
T103 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1316736825 Jul 04 05:33:02 PM PDT 24 Jul 04 05:33:12 PM PDT 24 3577586905 ps
T104 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3922645774 Jul 04 05:33:28 PM PDT 24 Jul 04 05:33:30 PM PDT 24 2704724797 ps
T105 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3122977648 Jul 04 05:34:29 PM PDT 24 Jul 04 05:37:29 PM PDT 24 141403589251 ps
T106 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2921445649 Jul 04 05:33:54 PM PDT 24 Jul 04 05:34:01 PM PDT 24 2511411469 ps
T107 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3065967385 Jul 04 05:32:53 PM PDT 24 Jul 04 05:32:55 PM PDT 24 3173671291 ps
T386 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.4080612998 Jul 04 05:34:23 PM PDT 24 Jul 04 05:34:31 PM PDT 24 2509382010 ps
T238 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1445002592 Jul 04 05:32:48 PM PDT 24 Jul 04 05:35:32 PM PDT 24 66025807496 ps
T33 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2949614135 Jul 04 05:34:57 PM PDT 24 Jul 04 05:37:55 PM PDT 24 71673125241 ps
T151 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1464051860 Jul 04 05:33:24 PM PDT 24 Jul 04 05:33:27 PM PDT 24 4957259832 ps
T239 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2887254517 Jul 04 05:33:47 PM PDT 24 Jul 04 05:34:49 PM PDT 24 23079593984 ps
T387 /workspace/coverage/default/41.sysrst_ctrl_smoke.1318916079 Jul 04 05:34:19 PM PDT 24 Jul 04 05:34:25 PM PDT 24 2107510286 ps
T388 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.273660721 Jul 04 05:34:43 PM PDT 24 Jul 04 05:34:45 PM PDT 24 2067928902 ps
T34 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.764270918 Jul 04 05:34:25 PM PDT 24 Jul 04 05:38:07 PM PDT 24 163641021092 ps
T188 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.969472909 Jul 04 05:33:49 PM PDT 24 Jul 04 05:33:51 PM PDT 24 2763464870 ps
T254 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.1100855078 Jul 04 05:32:45 PM PDT 24 Jul 04 05:39:56 PM PDT 24 182815167217 ps
T389 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2223181049 Jul 04 05:34:16 PM PDT 24 Jul 04 05:34:20 PM PDT 24 2100714166 ps
T240 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2934592810 Jul 04 05:34:15 PM PDT 24 Jul 04 05:36:29 PM PDT 24 103764276191 ps
T304 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3507759471 Jul 04 05:33:15 PM PDT 24 Jul 04 05:33:16 PM PDT 24 5524967422 ps
T390 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3626228568 Jul 04 05:34:20 PM PDT 24 Jul 04 05:34:22 PM PDT 24 2029940473 ps
T391 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2404024760 Jul 04 05:34:19 PM PDT 24 Jul 04 05:34:22 PM PDT 24 2483329895 ps
T392 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1666149586 Jul 04 05:34:28 PM PDT 24 Jul 04 05:34:35 PM PDT 24 2008865812 ps
T393 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2865971907 Jul 04 05:32:38 PM PDT 24 Jul 04 05:32:45 PM PDT 24 2609777347 ps
T394 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3164786851 Jul 04 05:32:46 PM PDT 24 Jul 04 05:32:54 PM PDT 24 2607659864 ps
T395 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1080551944 Jul 04 05:34:28 PM PDT 24 Jul 04 05:34:32 PM PDT 24 2063770883 ps
T84 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1409894618 Jul 04 05:33:48 PM PDT 24 Jul 04 05:34:25 PM PDT 24 43681120279 ps
T396 /workspace/coverage/default/1.sysrst_ctrl_smoke.3687356792 Jul 04 05:32:55 PM PDT 24 Jul 04 05:32:57 PM PDT 24 2133663850 ps
T397 /workspace/coverage/default/48.sysrst_ctrl_smoke.2555615973 Jul 04 05:34:35 PM PDT 24 Jul 04 05:34:37 PM PDT 24 2124558253 ps
T241 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.28637161 Jul 04 05:33:29 PM PDT 24 Jul 04 05:33:42 PM PDT 24 37116745101 ps
T398 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.4166715309 Jul 04 05:33:03 PM PDT 24 Jul 04 05:33:14 PM PDT 24 3714244473 ps
T399 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.4103307276 Jul 04 05:34:33 PM PDT 24 Jul 04 05:34:36 PM PDT 24 2623453925 ps
T292 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.963210188 Jul 04 05:34:13 PM PDT 24 Jul 04 05:34:16 PM PDT 24 3175164212 ps
T247 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3451758049 Jul 04 05:33:01 PM PDT 24 Jul 04 05:33:17 PM PDT 24 74666801880 ps
T400 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3302475113 Jul 04 05:33:07 PM PDT 24 Jul 04 05:33:09 PM PDT 24 3768709146 ps
T237 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.4073253251 Jul 04 05:33:32 PM PDT 24 Jul 04 05:33:45 PM PDT 24 19840421742 ps
T182 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.1476149946 Jul 04 05:33:28 PM PDT 24 Jul 04 05:33:30 PM PDT 24 2833718998 ps
T85 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2271362913 Jul 04 05:34:36 PM PDT 24 Jul 04 05:35:27 PM PDT 24 98184906649 ps
T255 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2249199019 Jul 04 05:33:50 PM PDT 24 Jul 04 05:35:10 PM PDT 24 31580993370 ps
T140 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.939428905 Jul 04 05:34:12 PM PDT 24 Jul 04 05:34:23 PM PDT 24 4035399238 ps
T401 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.4023592597 Jul 04 05:33:14 PM PDT 24 Jul 04 05:33:22 PM PDT 24 2879215799 ps
T402 /workspace/coverage/default/46.sysrst_ctrl_smoke.3368164820 Jul 04 05:34:34 PM PDT 24 Jul 04 05:34:36 PM PDT 24 2135856453 ps
T403 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1683110063 Jul 04 05:33:26 PM PDT 24 Jul 04 05:33:32 PM PDT 24 2052829792 ps
T404 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2173877540 Jul 04 05:33:05 PM PDT 24 Jul 04 05:33:13 PM PDT 24 2609004771 ps
T405 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2028809122 Jul 04 05:32:57 PM PDT 24 Jul 04 05:34:09 PM PDT 24 27831668065 ps
T152 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.3793824270 Jul 04 05:33:17 PM PDT 24 Jul 04 05:33:26 PM PDT 24 3545722275 ps
T291 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1579827524 Jul 04 05:34:20 PM PDT 24 Jul 04 05:36:03 PM PDT 24 76535497380 ps
T406 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2670926225 Jul 04 05:33:04 PM PDT 24 Jul 04 05:33:06 PM PDT 24 3516845560 ps
T407 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3242165309 Jul 04 05:34:30 PM PDT 24 Jul 04 05:34:37 PM PDT 24 2512479683 ps
T300 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.4290204337 Jul 04 05:33:45 PM PDT 24 Jul 04 05:33:48 PM PDT 24 2474510644 ps
T343 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1914500237 Jul 04 05:34:28 PM PDT 24 Jul 04 05:36:59 PM PDT 24 55420749287 ps
T116 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4043545904 Jul 04 05:32:49 PM PDT 24 Jul 04 05:37:24 PM PDT 24 273245275806 ps
T75 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2700197445 Jul 04 05:34:26 PM PDT 24 Jul 04 05:34:36 PM PDT 24 3412825581 ps
T141 /workspace/coverage/default/19.sysrst_ctrl_alert_test.4119735724 Jul 04 05:33:22 PM PDT 24 Jul 04 05:33:28 PM PDT 24 2013620047 ps
T142 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.3609092679 Jul 04 05:33:07 PM PDT 24 Jul 04 05:33:09 PM PDT 24 3574672580 ps
T117 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.1750310669 Jul 04 05:34:24 PM PDT 24 Jul 04 05:34:28 PM PDT 24 10821286653 ps
T143 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.641520398 Jul 04 05:32:39 PM PDT 24 Jul 04 05:32:50 PM PDT 24 4228080551 ps
T144 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.700924391 Jul 04 05:34:51 PM PDT 24 Jul 04 05:36:03 PM PDT 24 27831467542 ps
T145 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2340314535 Jul 04 05:33:55 PM PDT 24 Jul 04 05:35:37 PM PDT 24 264118677096 ps
T146 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.153177871 Jul 04 05:32:45 PM PDT 24 Jul 04 05:32:52 PM PDT 24 2508627590 ps
T147 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3060689498 Jul 04 05:34:18 PM PDT 24 Jul 04 05:34:23 PM PDT 24 2514440845 ps
T118 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.457823323 Jul 04 05:33:46 PM PDT 24 Jul 04 05:33:48 PM PDT 24 5809253984 ps
T248 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4173700145 Jul 04 05:34:03 PM PDT 24 Jul 04 05:35:13 PM PDT 24 50065660702 ps
T345 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1524155696 Jul 04 05:34:49 PM PDT 24 Jul 04 05:35:51 PM PDT 24 46347052211 ps
T408 /workspace/coverage/default/32.sysrst_ctrl_smoke.2207140150 Jul 04 05:33:53 PM PDT 24 Jul 04 05:33:59 PM PDT 24 2113555273 ps
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T420 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.257547764 Jul 04 05:34:21 PM PDT 24 Jul 04 05:34:24 PM PDT 24 5349797756 ps
T421 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3004998289 Jul 04 05:34:03 PM PDT 24 Jul 04 05:34:11 PM PDT 24 2612243510 ps
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T424 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1505326593 Jul 04 05:33:48 PM PDT 24 Jul 04 05:33:51 PM PDT 24 3961938628 ps
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T425 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.561119875 Jul 04 05:33:54 PM PDT 24 Jul 04 05:34:00 PM PDT 24 2246621184 ps
T426 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2349159593 Jul 04 05:33:40 PM PDT 24 Jul 04 05:33:50 PM PDT 24 3538158310 ps
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T428 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2940950079 Jul 04 05:34:27 PM PDT 24 Jul 04 05:34:30 PM PDT 24 2216388182 ps
T429 /workspace/coverage/default/4.sysrst_ctrl_smoke.367999648 Jul 04 05:33:02 PM PDT 24 Jul 04 05:33:05 PM PDT 24 2131507309 ps
T430 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1864859806 Jul 04 05:32:48 PM PDT 24 Jul 04 05:32:51 PM PDT 24 2389120486 ps
T431 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.849120307 Jul 04 05:33:03 PM PDT 24 Jul 04 05:33:08 PM PDT 24 27467503643 ps
T432 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3191012594 Jul 04 05:33:23 PM PDT 24 Jul 04 05:33:30 PM PDT 24 2611416314 ps
T433 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.829186075 Jul 04 05:33:03 PM PDT 24 Jul 04 05:33:06 PM PDT 24 3459952048 ps
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