Name |
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/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1247275495 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3695883828 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3521312645 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4253389766 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.651624719 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1242340590 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1541826161 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2552734922 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.669991078 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2542510676 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2136805380 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3881893408 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.973719803 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2950820551 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1891309200 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1258050915 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2095195134 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.178330722 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3082654021 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.166010499 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1639867339 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.776535726 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.377801994 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.946092141 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1821886278 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2962586652 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1480456333 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2986107940 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2119451535 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3753532635 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3841798764 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.4210846272 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1512030765 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.974852336 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1755793131 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.495760713 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.258316216 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2417898837 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1710570035 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3021220912 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.4009259969 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.93485771 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2870233812 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3001637984 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4214402181 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1853105937 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3579683369 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4270838576 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1896779155 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2926783232 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2584620342 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3349254594 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.244188340 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1099261146 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2859909399 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2233256493 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2390739618 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1908916025 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3776149520 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.360325876 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.903321091 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1304287078 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.610558427 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2014576079 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.4034634 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3326011570 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1245993602 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.577462774 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.312503237 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3127588022 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2446000724 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.4017288927 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.4179669369 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1664857310 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1129148141 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2268617866 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2272408089 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2371886945 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.744748047 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.787210555 |
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.812324811 |
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2423476971 |
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2953518009 |
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.2300310751 |
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3209404786 |
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.3326077924 |
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.398263107 |
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1109913846 |
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.4277932993 |
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.1251996660 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.1021534733 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.483692593 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.3872869565 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.3623525539 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.4269001624 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.4207877601 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1992425670 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.571193108 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.3523989582 |
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.4286792090 |
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.2459577330 |
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.1206166842 |
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.769421637 |
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.689517216 |
/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1396055241 |
/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.1552231670 |
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/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.710626402 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.3972073469 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.2094582456 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.436207826 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.1170615308 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.2602140579 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.2403320108 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.3676491399 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.2497566068 |
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.1076084493 |
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.4018003735 |
/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.2257059122 |
/workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.231880008 |
/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.3294575525 |
/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.2869903187 |
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.4185588466 |
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.3376000632 |
/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.937818417 |
/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.3890538157 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1125139526 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.3470235595 |
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/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2196099465 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.4010774280 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.3918498644 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.1603930877 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.1902272364 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.449494933 |
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/workspace/coverage/default/0.sysrst_ctrl_alert_test.3528569532 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1721006308 |
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/workspace/coverage/default/15.sysrst_ctrl_alert_test.3395521088 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.4077440773 |
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/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2794335063 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2393480733 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2652786760 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3609092679 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.223713688 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2511793032 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2888504669 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3908228784 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3926070396 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2617367200 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1246455551 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2219103967 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1142228971 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1359147989 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1862847647 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.390018047 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1439635400 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.31710899 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3955536253 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3022918651 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.127124947 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1388207616 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3216584977 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2201367344 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1514153130 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2627991336 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.3138463328 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1157126313 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2511332 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4095820826 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4205868691 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3531931681 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1851416424 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2826669870 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2574973882 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2422054740 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.380248735 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1402796749 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T5 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.3659936988 |
|
|
Jul 04 05:33:16 PM PDT 24 |
Jul 04 05:33:22 PM PDT 24 |
2111801177 ps |
T1 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3625921237 |
|
|
Jul 04 05:33:08 PM PDT 24 |
Jul 04 05:33:12 PM PDT 24 |
6551746878 ps |
T6 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2904738352 |
|
|
Jul 04 05:32:59 PM PDT 24 |
Jul 04 05:33:04 PM PDT 24 |
3248418526 ps |
T2 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3058572011 |
|
|
Jul 04 05:34:51 PM PDT 24 |
Jul 04 05:35:15 PM PDT 24 |
81091633205 ps |
T13 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2001013743 |
|
|
Jul 04 05:34:43 PM PDT 24 |
Jul 04 05:34:49 PM PDT 24 |
3678659748 ps |
T14 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1624631085 |
|
|
Jul 04 05:33:29 PM PDT 24 |
Jul 04 05:33:32 PM PDT 24 |
2150372186 ps |
T15 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.951114527 |
|
|
Jul 04 05:34:03 PM PDT 24 |
Jul 04 05:34:11 PM PDT 24 |
2609519882 ps |
T16 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.843815092 |
|
|
Jul 04 05:34:26 PM PDT 24 |
Jul 04 05:34:27 PM PDT 24 |
2698628037 ps |
T17 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1131539774 |
|
|
Jul 04 05:32:59 PM PDT 24 |
Jul 04 05:33:02 PM PDT 24 |
7854888089 ps |
T18 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.159414664 |
|
|
Jul 04 05:33:39 PM PDT 24 |
Jul 04 05:33:41 PM PDT 24 |
2789514910 ps |
T19 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.860958454 |
|
|
Jul 04 05:32:50 PM PDT 24 |
Jul 04 05:33:00 PM PDT 24 |
31725922643 ps |
T24 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3242375281 |
|
|
Jul 04 05:34:41 PM PDT 24 |
Jul 04 05:34:45 PM PDT 24 |
2465012212 ps |
T47 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3821745573 |
|
|
Jul 04 05:32:42 PM PDT 24 |
Jul 04 05:32:44 PM PDT 24 |
2532400799 ps |
T29 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1259074116 |
|
|
Jul 04 05:32:53 PM PDT 24 |
Jul 04 05:32:55 PM PDT 24 |
3765409345 ps |
T48 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3628503178 |
|
|
Jul 04 05:33:13 PM PDT 24 |
Jul 04 05:33:14 PM PDT 24 |
2271877586 ps |
T3 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2315370976 |
|
|
Jul 04 05:34:22 PM PDT 24 |
Jul 04 05:35:30 PM PDT 24 |
97834136456 ps |
T4 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1083286484 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:34:31 PM PDT 24 |
2500730312 ps |
T49 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.3596995617 |
|
|
Jul 04 05:33:04 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
2126522301 ps |
T50 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.343038696 |
|
|
Jul 04 05:34:21 PM PDT 24 |
Jul 04 05:34:27 PM PDT 24 |
2109069004 ps |
T26 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.2292436025 |
|
|
Jul 04 05:34:02 PM PDT 24 |
Jul 04 05:37:39 PM PDT 24 |
91955772759 ps |
T51 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2341495997 |
|
|
Jul 04 05:33:28 PM PDT 24 |
Jul 04 05:33:36 PM PDT 24 |
2610810459 ps |
T62 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1364296580 |
|
|
Jul 04 05:34:24 PM PDT 24 |
Jul 04 05:34:27 PM PDT 24 |
2629558485 ps |
T55 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3751551638 |
|
|
Jul 04 05:34:41 PM PDT 24 |
Jul 04 05:34:45 PM PDT 24 |
2499591966 ps |
T56 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2806726946 |
|
|
Jul 04 05:34:01 PM PDT 24 |
Jul 04 05:34:04 PM PDT 24 |
4923742019 ps |
T7 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3242339399 |
|
|
Jul 04 05:32:44 PM PDT 24 |
Jul 04 05:33:20 PM PDT 24 |
104042099242 ps |
T113 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1334497505 |
|
|
Jul 04 05:34:36 PM PDT 24 |
Jul 04 05:34:38 PM PDT 24 |
2045515425 ps |
T8 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3040348840 |
|
|
Jul 04 05:32:57 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
7877343734 ps |
T114 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2104885809 |
|
|
Jul 04 05:34:26 PM PDT 24 |
Jul 04 05:34:28 PM PDT 24 |
2146388064 ps |
T63 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2471597061 |
|
|
Jul 04 05:34:25 PM PDT 24 |
Jul 04 05:34:33 PM PDT 24 |
2509076869 ps |
T9 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2870590294 |
|
|
Jul 04 05:32:39 PM PDT 24 |
Jul 04 05:33:13 PM PDT 24 |
162965559892 ps |
T39 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.916418359 |
|
|
Jul 04 05:32:46 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
27098162633 ps |
T25 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2617367200 |
|
|
Jul 04 05:33:00 PM PDT 24 |
Jul 04 05:33:02 PM PDT 24 |
7365768119 ps |
T40 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.981844632 |
|
|
Jul 04 05:33:15 PM PDT 24 |
Jul 04 05:33:25 PM PDT 24 |
13074539645 ps |
T10 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.838022203 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:35:48 PM PDT 24 |
116400263795 ps |
T59 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2511793032 |
|
|
Jul 04 05:32:50 PM PDT 24 |
Jul 04 05:32:59 PM PDT 24 |
2469927854 ps |
T11 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.838122102 |
|
|
Jul 04 05:34:17 PM PDT 24 |
Jul 04 05:34:19 PM PDT 24 |
2934836675 ps |
T38 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2840334459 |
|
|
Jul 04 05:33:25 PM PDT 24 |
Jul 04 05:33:32 PM PDT 24 |
37295878098 ps |
T60 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3367931808 |
|
|
Jul 04 05:33:22 PM PDT 24 |
Jul 04 05:33:24 PM PDT 24 |
2467679840 ps |
T41 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2422054740 |
|
|
Jul 04 05:35:04 PM PDT 24 |
Jul 04 05:36:09 PM PDT 24 |
24327669170 ps |
T42 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.488761475 |
|
|
Jul 04 05:32:54 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
3649989228 ps |
T153 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3895005288 |
|
|
Jul 04 05:34:37 PM PDT 24 |
Jul 04 05:34:40 PM PDT 24 |
2632069292 ps |
T43 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1359147989 |
|
|
Jul 04 05:35:00 PM PDT 24 |
Jul 04 05:35:34 PM PDT 24 |
24589511873 ps |
T12 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.247207700 |
|
|
Jul 04 05:34:07 PM PDT 24 |
Jul 04 05:34:34 PM PDT 24 |
40384665348 ps |
T169 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.405439016 |
|
|
Jul 04 05:33:00 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
2111039822 ps |
T170 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2348872255 |
|
|
Jul 04 05:33:41 PM PDT 24 |
Jul 04 05:33:45 PM PDT 24 |
2620255323 ps |
T171 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3809417419 |
|
|
Jul 04 05:34:34 PM PDT 24 |
Jul 04 05:34:41 PM PDT 24 |
2172201401 ps |
T172 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.2783766978 |
|
|
Jul 04 05:34:42 PM PDT 24 |
Jul 04 05:34:48 PM PDT 24 |
2112856197 ps |
T173 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1468065415 |
|
|
Jul 04 05:34:40 PM PDT 24 |
Jul 04 05:34:42 PM PDT 24 |
2535591506 ps |
T30 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3622886835 |
|
|
Jul 04 05:33:39 PM PDT 24 |
Jul 04 05:34:15 PM PDT 24 |
58266598888 ps |
T61 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3142656155 |
|
|
Jul 04 05:32:42 PM PDT 24 |
Jul 04 05:32:49 PM PDT 24 |
2458410224 ps |
T174 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1274663579 |
|
|
Jul 04 05:34:33 PM PDT 24 |
Jul 04 05:34:41 PM PDT 24 |
2513142439 ps |
T175 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1366811441 |
|
|
Jul 04 05:32:52 PM PDT 24 |
Jul 04 05:32:54 PM PDT 24 |
2039730658 ps |
T80 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2533853673 |
|
|
Jul 04 05:32:58 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
2194737454 ps |
T44 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2621281100 |
|
|
Jul 04 05:34:32 PM PDT 24 |
Jul 04 05:35:10 PM PDT 24 |
61440722853 ps |
T45 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3022918651 |
|
|
Jul 04 05:32:59 PM PDT 24 |
Jul 04 05:33:35 PM PDT 24 |
26339324211 ps |
T378 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2353051894 |
|
|
Jul 04 05:34:23 PM PDT 24 |
Jul 04 05:34:25 PM PDT 24 |
2541556421 ps |
T278 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.4123380317 |
|
|
Jul 04 05:32:52 PM PDT 24 |
Jul 04 05:32:54 PM PDT 24 |
2037563110 ps |
T53 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.744410160 |
|
|
Jul 04 05:34:01 PM PDT 24 |
Jul 04 05:41:04 PM PDT 24 |
172059705810 ps |
T108 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.5372322 |
|
|
Jul 04 05:34:25 PM PDT 24 |
Jul 04 05:37:39 PM PDT 24 |
74638923490 ps |
T54 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.46968406 |
|
|
Jul 04 05:33:50 PM PDT 24 |
Jul 04 05:35:29 PM PDT 24 |
44693108532 ps |
T379 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.90762032 |
|
|
Jul 04 05:32:42 PM PDT 24 |
Jul 04 05:32:46 PM PDT 24 |
3706038389 ps |
T377 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3113608708 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:34:31 PM PDT 24 |
2524754875 ps |
T31 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2201560140 |
|
|
Jul 04 05:34:21 PM PDT 24 |
Jul 04 05:34:55 PM PDT 24 |
119178494631 ps |
T259 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3994458097 |
|
|
Jul 04 05:33:14 PM PDT 24 |
Jul 04 05:33:17 PM PDT 24 |
2490513551 ps |
T260 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.3328210572 |
|
|
Jul 04 05:33:00 PM PDT 24 |
Jul 04 05:33:07 PM PDT 24 |
2110218896 ps |
T261 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.709828787 |
|
|
Jul 04 05:34:14 PM PDT 24 |
Jul 04 05:34:20 PM PDT 24 |
2012453409 ps |
T57 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.244873283 |
|
|
Jul 04 05:32:46 PM PDT 24 |
Jul 04 05:32:50 PM PDT 24 |
7379223422 ps |
T109 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1557528944 |
|
|
Jul 04 05:33:51 PM PDT 24 |
Jul 04 05:34:01 PM PDT 24 |
3389239869 ps |
T262 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3988956767 |
|
|
Jul 04 05:33:52 PM PDT 24 |
Jul 04 05:34:01 PM PDT 24 |
2820974097 ps |
T263 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1294310052 |
|
|
Jul 04 05:32:55 PM PDT 24 |
Jul 04 05:33:03 PM PDT 24 |
11253078824 ps |
T58 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3442283315 |
|
|
Jul 04 05:33:29 PM PDT 24 |
Jul 04 05:33:31 PM PDT 24 |
3608360121 ps |
T264 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2163600187 |
|
|
Jul 04 05:34:27 PM PDT 24 |
Jul 04 05:34:29 PM PDT 24 |
2652809047 ps |
T302 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3327417352 |
|
|
Jul 04 05:34:07 PM PDT 24 |
Jul 04 05:34:15 PM PDT 24 |
2511094256 ps |
T380 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2594826800 |
|
|
Jul 04 05:34:15 PM PDT 24 |
Jul 04 05:34:22 PM PDT 24 |
2508889760 ps |
T303 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2469354932 |
|
|
Jul 04 05:33:38 PM PDT 24 |
Jul 04 05:33:46 PM PDT 24 |
2511088691 ps |
T46 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2574973882 |
|
|
Jul 04 05:35:00 PM PDT 24 |
Jul 04 05:37:36 PM PDT 24 |
58459861485 ps |
T36 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1115228200 |
|
|
Jul 04 05:32:55 PM PDT 24 |
Jul 04 05:43:14 PM PDT 24 |
233488445220 ps |
T178 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.499702150 |
|
|
Jul 04 05:32:44 PM PDT 24 |
Jul 04 05:32:47 PM PDT 24 |
2923517024 ps |
T35 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.8554312 |
|
|
Jul 04 05:32:49 PM PDT 24 |
Jul 04 05:33:02 PM PDT 24 |
5348187121 ps |
T179 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.50641662 |
|
|
Jul 04 05:34:34 PM PDT 24 |
Jul 04 05:34:36 PM PDT 24 |
2075566254 ps |
T180 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.3394578888 |
|
|
Jul 04 05:33:45 PM PDT 24 |
Jul 04 05:33:50 PM PDT 24 |
2113945770 ps |
T65 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2293877941 |
|
|
Jul 04 05:32:53 PM PDT 24 |
Jul 04 05:32:59 PM PDT 24 |
5128020643 ps |
T133 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.218074337 |
|
|
Jul 04 05:33:45 PM PDT 24 |
Jul 04 05:34:24 PM PDT 24 |
15293997113 ps |
T110 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1645883758 |
|
|
Jul 04 05:34:48 PM PDT 24 |
Jul 04 05:35:12 PM PDT 24 |
39017830036 ps |
T134 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2988204198 |
|
|
Jul 04 05:33:47 PM PDT 24 |
Jul 04 05:33:49 PM PDT 24 |
2033388896 ps |
T112 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.396463042 |
|
|
Jul 04 05:34:22 PM PDT 24 |
Jul 04 05:34:26 PM PDT 24 |
3506905323 ps |
T135 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.850848561 |
|
|
Jul 04 05:33:09 PM PDT 24 |
Jul 04 05:33:12 PM PDT 24 |
2525615883 ps |
T81 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4205868691 |
|
|
Jul 04 05:34:54 PM PDT 24 |
Jul 04 05:37:18 PM PDT 24 |
56502097534 ps |
T136 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.39167877 |
|
|
Jul 04 05:33:54 PM PDT 24 |
Jul 04 05:33:57 PM PDT 24 |
4032603458 ps |
T137 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1437814158 |
|
|
Jul 04 05:33:24 PM PDT 24 |
Jul 04 05:33:30 PM PDT 24 |
2011026531 ps |
T37 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.276836141 |
|
|
Jul 04 05:33:35 PM PDT 24 |
Jul 04 05:35:08 PM PDT 24 |
195093850922 ps |
T93 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.95722930 |
|
|
Jul 04 05:34:37 PM PDT 24 |
Jul 04 05:34:39 PM PDT 24 |
2082107742 ps |
T94 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2364268977 |
|
|
Jul 04 05:33:54 PM PDT 24 |
Jul 04 05:33:58 PM PDT 24 |
2624948488 ps |
T95 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.3845614678 |
|
|
Jul 04 05:33:59 PM PDT 24 |
Jul 04 05:34:21 PM PDT 24 |
15932675298 ps |
T96 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3034657191 |
|
|
Jul 04 05:34:42 PM PDT 24 |
Jul 04 05:35:49 PM PDT 24 |
25829476761 ps |
T97 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.774452937 |
|
|
Jul 04 05:33:26 PM PDT 24 |
Jul 04 05:33:36 PM PDT 24 |
3727603852 ps |
T98 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.31710899 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
2056393371 ps |
T99 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3353258949 |
|
|
Jul 04 05:34:29 PM PDT 24 |
Jul 04 05:34:36 PM PDT 24 |
2240585724 ps |
T100 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1074544403 |
|
|
Jul 04 05:34:02 PM PDT 24 |
Jul 04 05:34:09 PM PDT 24 |
2214657481 ps |
T101 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1448717321 |
|
|
Jul 04 05:34:27 PM PDT 24 |
Jul 04 05:35:33 PM PDT 24 |
1510949810548 ps |
T66 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.115305040 |
|
|
Jul 04 05:32:40 PM PDT 24 |
Jul 04 05:32:50 PM PDT 24 |
9550168004 ps |
T64 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.4098851197 |
|
|
Jul 04 05:33:08 PM PDT 24 |
Jul 04 05:33:12 PM PDT 24 |
3542333509 ps |
T67 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1578314748 |
|
|
Jul 04 05:34:34 PM PDT 24 |
Jul 04 05:35:06 PM PDT 24 |
17217984479 ps |
T111 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2286727824 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:36:10 PM PDT 24 |
54834618235 ps |
T381 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.664794694 |
|
|
Jul 04 05:32:46 PM PDT 24 |
Jul 04 05:32:48 PM PDT 24 |
2090412413 ps |
T250 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4067075015 |
|
|
Jul 04 05:33:51 PM PDT 24 |
Jul 04 05:34:38 PM PDT 24 |
35358957264 ps |
T382 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.267055523 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:08 PM PDT 24 |
3552283916 ps |
T115 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.66544780 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:34:30 PM PDT 24 |
3145978574 ps |
T383 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1235914479 |
|
|
Jul 04 05:33:30 PM PDT 24 |
Jul 04 05:33:33 PM PDT 24 |
3526172505 ps |
T384 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1668672354 |
|
|
Jul 04 05:33:14 PM PDT 24 |
Jul 04 05:33:18 PM PDT 24 |
2616444756 ps |
T385 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.1789881616 |
|
|
Jul 04 05:33:06 PM PDT 24 |
Jul 04 05:33:10 PM PDT 24 |
2121471197 ps |
T242 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.831919666 |
|
|
Jul 04 05:33:52 PM PDT 24 |
Jul 04 05:35:12 PM PDT 24 |
61390194905 ps |
T32 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2280966561 |
|
|
Jul 04 05:33:20 PM PDT 24 |
Jul 04 05:34:47 PM PDT 24 |
134111442902 ps |
T102 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2367798291 |
|
|
Jul 04 05:33:18 PM PDT 24 |
Jul 04 05:33:20 PM PDT 24 |
2529906552 ps |
T73 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.95957107 |
|
|
Jul 04 05:32:44 PM PDT 24 |
Jul 04 05:32:47 PM PDT 24 |
5701950003 ps |
T82 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2245784149 |
|
|
Jul 04 05:34:21 PM PDT 24 |
Jul 04 05:36:13 PM PDT 24 |
150327000980 ps |
T83 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2781890371 |
|
|
Jul 04 05:33:26 PM PDT 24 |
Jul 04 05:34:10 PM PDT 24 |
69435561162 ps |
T103 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1316736825 |
|
|
Jul 04 05:33:02 PM PDT 24 |
Jul 04 05:33:12 PM PDT 24 |
3577586905 ps |
T104 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3922645774 |
|
|
Jul 04 05:33:28 PM PDT 24 |
Jul 04 05:33:30 PM PDT 24 |
2704724797 ps |
T105 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3122977648 |
|
|
Jul 04 05:34:29 PM PDT 24 |
Jul 04 05:37:29 PM PDT 24 |
141403589251 ps |
T106 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2921445649 |
|
|
Jul 04 05:33:54 PM PDT 24 |
Jul 04 05:34:01 PM PDT 24 |
2511411469 ps |
T107 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3065967385 |
|
|
Jul 04 05:32:53 PM PDT 24 |
Jul 04 05:32:55 PM PDT 24 |
3173671291 ps |
T386 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.4080612998 |
|
|
Jul 04 05:34:23 PM PDT 24 |
Jul 04 05:34:31 PM PDT 24 |
2509382010 ps |
T238 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1445002592 |
|
|
Jul 04 05:32:48 PM PDT 24 |
Jul 04 05:35:32 PM PDT 24 |
66025807496 ps |
T33 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2949614135 |
|
|
Jul 04 05:34:57 PM PDT 24 |
Jul 04 05:37:55 PM PDT 24 |
71673125241 ps |
T151 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1464051860 |
|
|
Jul 04 05:33:24 PM PDT 24 |
Jul 04 05:33:27 PM PDT 24 |
4957259832 ps |
T239 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2887254517 |
|
|
Jul 04 05:33:47 PM PDT 24 |
Jul 04 05:34:49 PM PDT 24 |
23079593984 ps |
T387 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.1318916079 |
|
|
Jul 04 05:34:19 PM PDT 24 |
Jul 04 05:34:25 PM PDT 24 |
2107510286 ps |
T388 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.273660721 |
|
|
Jul 04 05:34:43 PM PDT 24 |
Jul 04 05:34:45 PM PDT 24 |
2067928902 ps |
T34 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.764270918 |
|
|
Jul 04 05:34:25 PM PDT 24 |
Jul 04 05:38:07 PM PDT 24 |
163641021092 ps |
T188 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.969472909 |
|
|
Jul 04 05:33:49 PM PDT 24 |
Jul 04 05:33:51 PM PDT 24 |
2763464870 ps |
T254 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1100855078 |
|
|
Jul 04 05:32:45 PM PDT 24 |
Jul 04 05:39:56 PM PDT 24 |
182815167217 ps |
T389 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2223181049 |
|
|
Jul 04 05:34:16 PM PDT 24 |
Jul 04 05:34:20 PM PDT 24 |
2100714166 ps |
T240 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2934592810 |
|
|
Jul 04 05:34:15 PM PDT 24 |
Jul 04 05:36:29 PM PDT 24 |
103764276191 ps |
T304 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3507759471 |
|
|
Jul 04 05:33:15 PM PDT 24 |
Jul 04 05:33:16 PM PDT 24 |
5524967422 ps |
T390 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3626228568 |
|
|
Jul 04 05:34:20 PM PDT 24 |
Jul 04 05:34:22 PM PDT 24 |
2029940473 ps |
T391 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2404024760 |
|
|
Jul 04 05:34:19 PM PDT 24 |
Jul 04 05:34:22 PM PDT 24 |
2483329895 ps |
T392 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1666149586 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:34:35 PM PDT 24 |
2008865812 ps |
T393 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2865971907 |
|
|
Jul 04 05:32:38 PM PDT 24 |
Jul 04 05:32:45 PM PDT 24 |
2609777347 ps |
T394 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3164786851 |
|
|
Jul 04 05:32:46 PM PDT 24 |
Jul 04 05:32:54 PM PDT 24 |
2607659864 ps |
T395 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1080551944 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:34:32 PM PDT 24 |
2063770883 ps |
T84 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.1409894618 |
|
|
Jul 04 05:33:48 PM PDT 24 |
Jul 04 05:34:25 PM PDT 24 |
43681120279 ps |
T396 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.3687356792 |
|
|
Jul 04 05:32:55 PM PDT 24 |
Jul 04 05:32:57 PM PDT 24 |
2133663850 ps |
T397 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.2555615973 |
|
|
Jul 04 05:34:35 PM PDT 24 |
Jul 04 05:34:37 PM PDT 24 |
2124558253 ps |
T241 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.28637161 |
|
|
Jul 04 05:33:29 PM PDT 24 |
Jul 04 05:33:42 PM PDT 24 |
37116745101 ps |
T398 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.4166715309 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:14 PM PDT 24 |
3714244473 ps |
T399 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.4103307276 |
|
|
Jul 04 05:34:33 PM PDT 24 |
Jul 04 05:34:36 PM PDT 24 |
2623453925 ps |
T292 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.963210188 |
|
|
Jul 04 05:34:13 PM PDT 24 |
Jul 04 05:34:16 PM PDT 24 |
3175164212 ps |
T247 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3451758049 |
|
|
Jul 04 05:33:01 PM PDT 24 |
Jul 04 05:33:17 PM PDT 24 |
74666801880 ps |
T400 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3302475113 |
|
|
Jul 04 05:33:07 PM PDT 24 |
Jul 04 05:33:09 PM PDT 24 |
3768709146 ps |
T237 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.4073253251 |
|
|
Jul 04 05:33:32 PM PDT 24 |
Jul 04 05:33:45 PM PDT 24 |
19840421742 ps |
T182 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1476149946 |
|
|
Jul 04 05:33:28 PM PDT 24 |
Jul 04 05:33:30 PM PDT 24 |
2833718998 ps |
T85 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2271362913 |
|
|
Jul 04 05:34:36 PM PDT 24 |
Jul 04 05:35:27 PM PDT 24 |
98184906649 ps |
T255 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2249199019 |
|
|
Jul 04 05:33:50 PM PDT 24 |
Jul 04 05:35:10 PM PDT 24 |
31580993370 ps |
T140 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.939428905 |
|
|
Jul 04 05:34:12 PM PDT 24 |
Jul 04 05:34:23 PM PDT 24 |
4035399238 ps |
T401 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.4023592597 |
|
|
Jul 04 05:33:14 PM PDT 24 |
Jul 04 05:33:22 PM PDT 24 |
2879215799 ps |
T402 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.3368164820 |
|
|
Jul 04 05:34:34 PM PDT 24 |
Jul 04 05:34:36 PM PDT 24 |
2135856453 ps |
T403 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1683110063 |
|
|
Jul 04 05:33:26 PM PDT 24 |
Jul 04 05:33:32 PM PDT 24 |
2052829792 ps |
T404 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2173877540 |
|
|
Jul 04 05:33:05 PM PDT 24 |
Jul 04 05:33:13 PM PDT 24 |
2609004771 ps |
T405 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2028809122 |
|
|
Jul 04 05:32:57 PM PDT 24 |
Jul 04 05:34:09 PM PDT 24 |
27831668065 ps |
T152 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3793824270 |
|
|
Jul 04 05:33:17 PM PDT 24 |
Jul 04 05:33:26 PM PDT 24 |
3545722275 ps |
T291 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1579827524 |
|
|
Jul 04 05:34:20 PM PDT 24 |
Jul 04 05:36:03 PM PDT 24 |
76535497380 ps |
T406 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2670926225 |
|
|
Jul 04 05:33:04 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
3516845560 ps |
T407 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3242165309 |
|
|
Jul 04 05:34:30 PM PDT 24 |
Jul 04 05:34:37 PM PDT 24 |
2512479683 ps |
T300 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.4290204337 |
|
|
Jul 04 05:33:45 PM PDT 24 |
Jul 04 05:33:48 PM PDT 24 |
2474510644 ps |
T343 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1914500237 |
|
|
Jul 04 05:34:28 PM PDT 24 |
Jul 04 05:36:59 PM PDT 24 |
55420749287 ps |
T116 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4043545904 |
|
|
Jul 04 05:32:49 PM PDT 24 |
Jul 04 05:37:24 PM PDT 24 |
273245275806 ps |
T75 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2700197445 |
|
|
Jul 04 05:34:26 PM PDT 24 |
Jul 04 05:34:36 PM PDT 24 |
3412825581 ps |
T141 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.4119735724 |
|
|
Jul 04 05:33:22 PM PDT 24 |
Jul 04 05:33:28 PM PDT 24 |
2013620047 ps |
T142 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3609092679 |
|
|
Jul 04 05:33:07 PM PDT 24 |
Jul 04 05:33:09 PM PDT 24 |
3574672580 ps |
T117 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.1750310669 |
|
|
Jul 04 05:34:24 PM PDT 24 |
Jul 04 05:34:28 PM PDT 24 |
10821286653 ps |
T143 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.641520398 |
|
|
Jul 04 05:32:39 PM PDT 24 |
Jul 04 05:32:50 PM PDT 24 |
4228080551 ps |
T144 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.700924391 |
|
|
Jul 04 05:34:51 PM PDT 24 |
Jul 04 05:36:03 PM PDT 24 |
27831467542 ps |
T145 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2340314535 |
|
|
Jul 04 05:33:55 PM PDT 24 |
Jul 04 05:35:37 PM PDT 24 |
264118677096 ps |
T146 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.153177871 |
|
|
Jul 04 05:32:45 PM PDT 24 |
Jul 04 05:32:52 PM PDT 24 |
2508627590 ps |
T147 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3060689498 |
|
|
Jul 04 05:34:18 PM PDT 24 |
Jul 04 05:34:23 PM PDT 24 |
2514440845 ps |
T118 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.457823323 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:33:48 PM PDT 24 |
5809253984 ps |
T248 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4173700145 |
|
|
Jul 04 05:34:03 PM PDT 24 |
Jul 04 05:35:13 PM PDT 24 |
50065660702 ps |
T345 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1524155696 |
|
|
Jul 04 05:34:49 PM PDT 24 |
Jul 04 05:35:51 PM PDT 24 |
46347052211 ps |
T408 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.2207140150 |
|
|
Jul 04 05:33:53 PM PDT 24 |
Jul 04 05:33:59 PM PDT 24 |
2113555273 ps |
T305 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3189262119 |
|
|
Jul 04 05:33:37 PM PDT 24 |
Jul 04 05:34:27 PM PDT 24 |
20564394247 ps |
T77 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2815247813 |
|
|
Jul 04 05:34:02 PM PDT 24 |
Jul 04 05:34:10 PM PDT 24 |
6833805974 ps |
T86 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3578458653 |
|
|
Jul 04 05:32:53 PM PDT 24 |
Jul 04 05:32:55 PM PDT 24 |
3210681655 ps |
T122 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2432207844 |
|
|
Jul 04 05:33:52 PM PDT 24 |
Jul 04 05:34:27 PM PDT 24 |
26843207100 ps |
T123 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3546134049 |
|
|
Jul 04 05:33:01 PM PDT 24 |
Jul 04 05:33:03 PM PDT 24 |
4197630824 ps |
T124 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3303923732 |
|
|
Jul 04 05:34:27 PM PDT 24 |
Jul 04 05:35:49 PM PDT 24 |
32932347881 ps |
T125 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.3106948549 |
|
|
Jul 04 05:33:51 PM PDT 24 |
Jul 04 05:33:57 PM PDT 24 |
2014872158 ps |
T126 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.375659675 |
|
|
Jul 04 05:34:05 PM PDT 24 |
Jul 04 05:34:14 PM PDT 24 |
12674185902 ps |
T127 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2454001169 |
|
|
Jul 04 05:34:34 PM PDT 24 |
Jul 04 05:34:41 PM PDT 24 |
3561376759 ps |
T128 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3871168619 |
|
|
Jul 04 05:34:29 PM PDT 24 |
Jul 04 05:34:35 PM PDT 24 |
3558445035 ps |
T129 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.3580446462 |
|
|
Jul 04 05:33:06 PM PDT 24 |
Jul 04 05:33:12 PM PDT 24 |
2012247116 ps |
T409 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.4032031674 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:33:49 PM PDT 24 |
2523586062 ps |
T301 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1528272013 |
|
|
Jul 04 05:32:55 PM PDT 24 |
Jul 04 05:33:00 PM PDT 24 |
2468277045 ps |
T410 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1669569220 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:33:49 PM PDT 24 |
3073710834 ps |
T411 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3657880146 |
|
|
Jul 04 05:34:51 PM PDT 24 |
Jul 04 05:35:01 PM PDT 24 |
26122053535 ps |
T249 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.283735790 |
|
|
Jul 04 05:33:51 PM PDT 24 |
Jul 04 05:34:58 PM PDT 24 |
104726673809 ps |
T268 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1017503396 |
|
|
Jul 04 05:32:36 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
22019159887 ps |
T287 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.575996442 |
|
|
Jul 04 05:32:59 PM PDT 24 |
Jul 04 05:33:04 PM PDT 24 |
2517684890 ps |
T288 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.4025878212 |
|
|
Jul 04 05:33:38 PM PDT 24 |
Jul 04 05:33:45 PM PDT 24 |
2111058439 ps |
T289 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3261660684 |
|
|
Jul 04 05:32:45 PM PDT 24 |
Jul 04 05:34:26 PM PDT 24 |
46633282575 ps |
T156 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1369901392 |
|
|
Jul 04 05:33:45 PM PDT 24 |
Jul 04 05:33:52 PM PDT 24 |
5991033917 ps |
T290 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3337652483 |
|
|
Jul 04 05:34:14 PM PDT 24 |
Jul 04 05:34:17 PM PDT 24 |
2020680840 ps |
T183 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2351262985 |
|
|
Jul 04 05:33:50 PM PDT 24 |
Jul 04 05:37:32 PM PDT 24 |
401620124725 ps |
T211 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2147911647 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:33:48 PM PDT 24 |
2554006468 ps |
T212 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4086965743 |
|
|
Jul 04 05:34:22 PM PDT 24 |
Jul 04 05:34:25 PM PDT 24 |
2073953354 ps |
T213 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1760041471 |
|
|
Jul 04 05:34:48 PM PDT 24 |
Jul 04 05:37:32 PM PDT 24 |
63262770430 ps |
T214 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1919073247 |
|
|
Jul 04 05:33:46 PM PDT 24 |
Jul 04 05:33:53 PM PDT 24 |
3767980073 ps |
T215 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.835815346 |
|
|
Jul 04 05:33:52 PM PDT 24 |
Jul 04 05:33:58 PM PDT 24 |
7151356101 ps |
T216 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.4042003405 |
|
|
Jul 04 05:33:35 PM PDT 24 |
Jul 04 05:33:40 PM PDT 24 |
5438312580 ps |
T217 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3015311425 |
|
|
Jul 04 05:33:05 PM PDT 24 |
Jul 04 05:33:13 PM PDT 24 |
4839514838 ps |
T218 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.405585197 |
|
|
Jul 04 05:33:08 PM PDT 24 |
Jul 04 05:33:56 PM PDT 24 |
99433114763 ps |
T166 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3885035879 |
|
|
Jul 04 05:33:16 PM PDT 24 |
Jul 04 05:33:24 PM PDT 24 |
2815473286 ps |
T167 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2230855103 |
|
|
Jul 04 05:32:41 PM PDT 24 |
Jul 04 05:32:43 PM PDT 24 |
3657784227 ps |
T412 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.1598830088 |
|
|
Jul 04 05:34:15 PM PDT 24 |
Jul 04 05:34:17 PM PDT 24 |
2128480111 ps |
T119 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2744909888 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:35:53 PM PDT 24 |
66736642775 ps |
T193 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.170201658 |
|
|
Jul 04 05:32:47 PM PDT 24 |
Jul 04 05:32:50 PM PDT 24 |
2273305367 ps |
T194 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3107248151 |
|
|
Jul 04 05:33:12 PM PDT 24 |
Jul 04 05:33:23 PM PDT 24 |
30178356709 ps |
T195 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.486731427 |
|
|
Jul 04 05:33:00 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
2469798738 ps |
T196 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1228245252 |
|
|
Jul 04 05:33:43 PM PDT 24 |
Jul 04 05:34:03 PM PDT 24 |
16676094209 ps |
T197 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.330049752 |
|
|
Jul 04 05:34:22 PM PDT 24 |
Jul 04 05:36:00 PM PDT 24 |
194484418477 ps |
T198 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1769114922 |
|
|
Jul 04 05:33:26 PM PDT 24 |
Jul 04 05:33:31 PM PDT 24 |
3244002393 ps |
T189 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1808954561 |
|
|
Jul 04 05:34:29 PM PDT 24 |
Jul 04 05:34:35 PM PDT 24 |
2574693631 ps |
T199 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.399804333 |
|
|
Jul 04 05:33:27 PM PDT 24 |
Jul 04 05:33:30 PM PDT 24 |
2943937360 ps |
T200 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1596983580 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:10 PM PDT 24 |
2512171681 ps |
T326 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.2097075709 |
|
|
Jul 04 05:33:33 PM PDT 24 |
Jul 04 05:34:25 PM PDT 24 |
84172836401 ps |
T293 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3955536253 |
|
|
Jul 04 05:32:43 PM PDT 24 |
Jul 04 05:32:48 PM PDT 24 |
3335841251 ps |
T413 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.1770637131 |
|
|
Jul 04 05:33:09 PM PDT 24 |
Jul 04 05:33:15 PM PDT 24 |
2015070879 ps |
T87 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1423552409 |
|
|
Jul 04 05:34:23 PM PDT 24 |
Jul 04 05:37:08 PM PDT 24 |
1061211761077 ps |
T414 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1142228971 |
|
|
Jul 04 05:35:00 PM PDT 24 |
Jul 04 05:36:10 PM PDT 24 |
25833628628 ps |
T294 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1135280254 |
|
|
Jul 04 05:34:14 PM PDT 24 |
Jul 04 05:34:16 PM PDT 24 |
3291936589 ps |
T415 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.906047107 |
|
|
Jul 04 05:34:00 PM PDT 24 |
Jul 04 05:34:02 PM PDT 24 |
2531705462 ps |
T416 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3124641687 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:13 PM PDT 24 |
3177598456 ps |
T417 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2485180802 |
|
|
Jul 04 05:33:25 PM PDT 24 |
Jul 04 05:33:31 PM PDT 24 |
2087759042 ps |
T418 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.2897603197 |
|
|
Jul 04 05:34:20 PM PDT 24 |
Jul 04 05:34:24 PM PDT 24 |
2116765025 ps |
T419 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1693423177 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:04 PM PDT 24 |
2589234618 ps |
T420 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.257547764 |
|
|
Jul 04 05:34:21 PM PDT 24 |
Jul 04 05:34:24 PM PDT 24 |
5349797756 ps |
T421 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3004998289 |
|
|
Jul 04 05:34:03 PM PDT 24 |
Jul 04 05:34:11 PM PDT 24 |
2612243510 ps |
T422 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.2588158563 |
|
|
Jul 04 05:32:37 PM PDT 24 |
Jul 04 05:32:43 PM PDT 24 |
2109576719 ps |
T423 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.3049083487 |
|
|
Jul 04 05:32:42 PM PDT 24 |
Jul 04 05:32:44 PM PDT 24 |
2518244723 ps |
T424 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1505326593 |
|
|
Jul 04 05:33:48 PM PDT 24 |
Jul 04 05:33:51 PM PDT 24 |
3961938628 ps |
T88 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1157126313 |
|
|
Jul 04 05:33:02 PM PDT 24 |
Jul 04 05:33:40 PM PDT 24 |
108808076564 ps |
T425 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.561119875 |
|
|
Jul 04 05:33:54 PM PDT 24 |
Jul 04 05:34:00 PM PDT 24 |
2246621184 ps |
T426 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2349159593 |
|
|
Jul 04 05:33:40 PM PDT 24 |
Jul 04 05:33:50 PM PDT 24 |
3538158310 ps |
T427 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3497821252 |
|
|
Jul 04 05:32:44 PM PDT 24 |
Jul 04 05:32:48 PM PDT 24 |
2516640448 ps |
T428 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2940950079 |
|
|
Jul 04 05:34:27 PM PDT 24 |
Jul 04 05:34:30 PM PDT 24 |
2216388182 ps |
T429 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.367999648 |
|
|
Jul 04 05:33:02 PM PDT 24 |
Jul 04 05:33:05 PM PDT 24 |
2131507309 ps |
T430 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1864859806 |
|
|
Jul 04 05:32:48 PM PDT 24 |
Jul 04 05:32:51 PM PDT 24 |
2389120486 ps |
T431 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.849120307 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:08 PM PDT 24 |
27467503643 ps |
T432 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3191012594 |
|
|
Jul 04 05:33:23 PM PDT 24 |
Jul 04 05:33:30 PM PDT 24 |
2611416314 ps |
T433 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.829186075 |
|
|
Jul 04 05:33:03 PM PDT 24 |
Jul 04 05:33:06 PM PDT 24 |
3459952048 ps |