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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.09 99.42 96.83 100.00 98.08 98.89 99.71 93.73


Total test records in report: 907
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T603 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1721627457 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:30 PM PDT 24 2485151239 ps
T604 /workspace/coverage/default/28.sysrst_ctrl_alert_test.3561174459 Jul 11 04:53:47 PM PDT 24 Jul 11 04:54:01 PM PDT 24 2012355641 ps
T287 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3586549133 Jul 11 04:53:43 PM PDT 24 Jul 11 04:57:23 PM PDT 24 79863959043 ps
T241 /workspace/coverage/default/3.sysrst_ctrl_stress_all.999534407 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:34 PM PDT 24 13636873194 ps
T605 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2046331911 Jul 11 04:54:06 PM PDT 24 Jul 11 04:56:02 PM PDT 24 78024404822 ps
T606 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2699358503 Jul 11 04:53:24 PM PDT 24 Jul 11 04:53:38 PM PDT 24 3622304857 ps
T607 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3591454726 Jul 11 04:54:27 PM PDT 24 Jul 11 04:54:39 PM PDT 24 3724515144 ps
T405 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4231787175 Jul 11 04:53:23 PM PDT 24 Jul 11 04:54:19 PM PDT 24 967327907491 ps
T147 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.54302480 Jul 11 04:53:38 PM PDT 24 Jul 11 04:53:56 PM PDT 24 3610265897 ps
T608 /workspace/coverage/default/31.sysrst_ctrl_smoke.439162697 Jul 11 04:53:59 PM PDT 24 Jul 11 04:54:12 PM PDT 24 2116269026 ps
T609 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1817465242 Jul 11 04:53:33 PM PDT 24 Jul 11 04:53:43 PM PDT 24 2242006498 ps
T610 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.153117299 Jul 11 04:54:39 PM PDT 24 Jul 11 04:55:50 PM PDT 24 69350207286 ps
T331 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.1747775853 Jul 11 05:20:58 PM PDT 24 Jul 11 05:21:05 PM PDT 24 4014930563 ps
T315 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.1511450781 Jul 11 04:52:47 PM PDT 24 Jul 11 04:53:47 PM PDT 24 42041508006 ps
T266 /workspace/coverage/default/32.sysrst_ctrl_stress_all.1915469619 Jul 11 04:53:50 PM PDT 24 Jul 11 04:54:18 PM PDT 24 33150133083 ps
T611 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2784935618 Jul 11 04:54:20 PM PDT 24 Jul 11 05:00:33 PM PDT 24 141459170347 ps
T206 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2660067817 Jul 11 05:15:47 PM PDT 24 Jul 11 05:17:40 PM PDT 24 59667695999 ps
T612 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.4193497830 Jul 11 04:52:47 PM PDT 24 Jul 11 04:52:56 PM PDT 24 2452292763 ps
T613 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3413013173 Jul 11 04:54:06 PM PDT 24 Jul 11 04:54:17 PM PDT 24 2488800929 ps
T614 /workspace/coverage/default/39.sysrst_ctrl_smoke.1029218019 Jul 11 04:54:05 PM PDT 24 Jul 11 04:54:15 PM PDT 24 2120654175 ps
T615 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3819000590 Jul 11 04:53:38 PM PDT 24 Jul 11 04:55:25 PM PDT 24 38579293068 ps
T616 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.257398003 Jul 11 04:54:12 PM PDT 24 Jul 11 04:54:23 PM PDT 24 3293352857 ps
T617 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1960668511 Jul 11 04:52:44 PM PDT 24 Jul 11 04:52:59 PM PDT 24 2509123312 ps
T618 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1449367437 Jul 11 04:52:50 PM PDT 24 Jul 11 04:53:04 PM PDT 24 2416772129 ps
T316 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.2486695758 Jul 11 04:52:47 PM PDT 24 Jul 11 04:53:03 PM PDT 24 22178564059 ps
T619 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3982651540 Jul 11 04:54:17 PM PDT 24 Jul 11 04:56:50 PM PDT 24 54747678795 ps
T620 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.190835307 Jul 11 04:53:48 PM PDT 24 Jul 11 04:54:02 PM PDT 24 2050503205 ps
T621 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1779235342 Jul 11 04:54:07 PM PDT 24 Jul 11 04:54:17 PM PDT 24 2540292311 ps
T622 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2308851731 Jul 11 04:52:43 PM PDT 24 Jul 11 04:52:56 PM PDT 24 2717868002 ps
T623 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.4104545204 Jul 11 04:52:54 PM PDT 24 Jul 11 04:53:02 PM PDT 24 2119220562 ps
T624 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1366910950 Jul 11 04:54:05 PM PDT 24 Jul 11 04:54:16 PM PDT 24 3220817863 ps
T625 /workspace/coverage/default/23.sysrst_ctrl_smoke.2452808131 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:39 PM PDT 24 2126658032 ps
T626 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3115554643 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:34 PM PDT 24 2498000708 ps
T627 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2330987802 Jul 11 04:54:32 PM PDT 24 Jul 11 04:55:22 PM PDT 24 65787994842 ps
T628 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1439361000 Jul 11 04:52:59 PM PDT 24 Jul 11 04:53:07 PM PDT 24 2538132082 ps
T629 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.817999737 Jul 11 04:53:15 PM PDT 24 Jul 11 04:53:24 PM PDT 24 4003440887 ps
T267 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.420241660 Jul 11 04:54:01 PM PDT 24 Jul 11 04:56:44 PM PDT 24 86265471613 ps
T630 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2543569250 Jul 11 04:53:12 PM PDT 24 Jul 11 04:53:21 PM PDT 24 2917329995 ps
T631 /workspace/coverage/default/17.sysrst_ctrl_smoke.3282803465 Jul 11 04:53:18 PM PDT 24 Jul 11 04:53:28 PM PDT 24 2118115585 ps
T632 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2526853874 Jul 11 04:53:46 PM PDT 24 Jul 11 04:54:00 PM PDT 24 2027092531 ps
T633 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3847803817 Jul 11 04:53:59 PM PDT 24 Jul 11 04:54:11 PM PDT 24 2685579247 ps
T634 /workspace/coverage/default/46.sysrst_ctrl_smoke.2276482730 Jul 11 04:54:21 PM PDT 24 Jul 11 04:54:36 PM PDT 24 2110879916 ps
T635 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1536243399 Jul 11 04:52:39 PM PDT 24 Jul 11 04:52:56 PM PDT 24 2508624242 ps
T636 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.409220852 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:43 PM PDT 24 4386239501 ps
T637 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3879121900 Jul 11 04:53:26 PM PDT 24 Jul 11 04:53:39 PM PDT 24 2012805616 ps
T638 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2062994763 Jul 11 04:53:30 PM PDT 24 Jul 11 04:53:40 PM PDT 24 2572713503 ps
T639 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3705332986 Jul 11 04:53:09 PM PDT 24 Jul 11 04:53:17 PM PDT 24 2177991747 ps
T640 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3666268669 Jul 11 04:53:52 PM PDT 24 Jul 11 04:54:02 PM PDT 24 2642313447 ps
T641 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2081172150 Jul 11 04:53:38 PM PDT 24 Jul 11 04:54:51 PM PDT 24 26332518770 ps
T642 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1915379476 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:29 PM PDT 24 2538518196 ps
T643 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1491944153 Jul 11 04:53:02 PM PDT 24 Jul 11 04:53:15 PM PDT 24 2479289599 ps
T193 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.403266461 Jul 11 04:53:23 PM PDT 24 Jul 11 04:53:41 PM PDT 24 4503976257 ps
T644 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1260105993 Jul 11 04:54:39 PM PDT 24 Jul 11 04:57:44 PM PDT 24 66978249020 ps
T645 /workspace/coverage/default/6.sysrst_ctrl_smoke.3476761420 Jul 11 04:52:58 PM PDT 24 Jul 11 04:53:07 PM PDT 24 2123479418 ps
T646 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2791890404 Jul 11 04:53:45 PM PDT 24 Jul 11 04:54:00 PM PDT 24 2513798611 ps
T647 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4276334850 Jul 11 04:53:44 PM PDT 24 Jul 11 04:54:00 PM PDT 24 2458368200 ps
T648 /workspace/coverage/default/37.sysrst_ctrl_alert_test.1999414949 Jul 11 04:54:13 PM PDT 24 Jul 11 04:54:26 PM PDT 24 2014080540 ps
T649 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.677030608 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:41 PM PDT 24 3211529218 ps
T650 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2554877912 Jul 11 04:53:53 PM PDT 24 Jul 11 04:54:03 PM PDT 24 2529689234 ps
T651 /workspace/coverage/default/13.sysrst_ctrl_alert_test.2427385975 Jul 11 04:53:13 PM PDT 24 Jul 11 04:53:23 PM PDT 24 2016765716 ps
T288 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.2371675896 Jul 11 04:54:22 PM PDT 24 Jul 11 04:58:05 PM PDT 24 86263762841 ps
T327 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1877216790 Jul 11 04:54:15 PM PDT 24 Jul 11 04:55:10 PM PDT 24 18281604404 ps
T652 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.587861908 Jul 11 04:54:17 PM PDT 24 Jul 11 04:54:32 PM PDT 24 2613579596 ps
T653 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3558281143 Jul 11 04:53:06 PM PDT 24 Jul 11 04:53:18 PM PDT 24 2470549479 ps
T242 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1146952528 Jul 11 04:53:18 PM PDT 24 Jul 11 04:53:37 PM PDT 24 15316253277 ps
T654 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3150471072 Jul 11 04:53:54 PM PDT 24 Jul 11 04:54:07 PM PDT 24 2760229530 ps
T655 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2702936649 Jul 11 04:54:20 PM PDT 24 Jul 11 04:54:42 PM PDT 24 4677989138 ps
T656 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.4216726765 Jul 11 04:53:56 PM PDT 24 Jul 11 04:54:05 PM PDT 24 2325875388 ps
T657 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2517115119 Jul 11 04:54:27 PM PDT 24 Jul 11 04:54:43 PM PDT 24 2509171467 ps
T658 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2599947332 Jul 11 04:54:42 PM PDT 24 Jul 11 04:55:01 PM PDT 24 42545674509 ps
T135 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.904743056 Jul 11 04:54:14 PM PDT 24 Jul 11 04:54:29 PM PDT 24 5986789700 ps
T659 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1330075923 Jul 11 04:52:57 PM PDT 24 Jul 11 04:53:10 PM PDT 24 3372789574 ps
T660 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2072126973 Jul 11 04:54:06 PM PDT 24 Jul 11 04:54:17 PM PDT 24 6236617494 ps
T661 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.1701598447 Jul 11 05:25:58 PM PDT 24 Jul 11 05:31:05 PM PDT 24 114871568269 ps
T398 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.3755805218 Jul 11 04:53:58 PM PDT 24 Jul 11 04:55:05 PM PDT 24 111870794274 ps
T662 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1541258613 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:37 PM PDT 24 2612377173 ps
T277 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.2040260708 Jul 11 04:52:45 PM PDT 24 Jul 11 04:55:08 PM PDT 24 51995961480 ps
T663 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1387448408 Jul 11 04:54:13 PM PDT 24 Jul 11 04:54:22 PM PDT 24 2569910399 ps
T664 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.89206216 Jul 11 04:53:37 PM PDT 24 Jul 11 04:53:48 PM PDT 24 2506059293 ps
T665 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2277013235 Jul 11 04:54:22 PM PDT 24 Jul 11 04:54:33 PM PDT 24 2489933010 ps
T666 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.3969641736 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:01 PM PDT 24 2631579828 ps
T667 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3505883129 Jul 11 04:54:25 PM PDT 24 Jul 11 04:54:44 PM PDT 24 4131558461 ps
T668 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3631394104 Jul 11 04:53:27 PM PDT 24 Jul 11 04:53:38 PM PDT 24 3194479558 ps
T402 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3568376994 Jul 11 04:54:32 PM PDT 24 Jul 11 04:57:14 PM PDT 24 229006629929 ps
T219 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1446701362 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:03 PM PDT 24 4843034290 ps
T669 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2893468638 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:35 PM PDT 24 3478903896 ps
T670 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.869047193 Jul 11 04:53:14 PM PDT 24 Jul 11 04:53:25 PM PDT 24 9959253743 ps
T671 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2148354058 Jul 11 04:52:54 PM PDT 24 Jul 11 04:53:02 PM PDT 24 3234921153 ps
T389 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1363257368 Jul 11 04:54:39 PM PDT 24 Jul 11 04:57:29 PM PDT 24 125194477979 ps
T672 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1211196086 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:10 PM PDT 24 2458389377 ps
T673 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1218986006 Jul 11 04:54:38 PM PDT 24 Jul 11 04:55:17 PM PDT 24 140449362006 ps
T674 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3856673746 Jul 11 04:53:35 PM PDT 24 Jul 11 04:53:52 PM PDT 24 2454260305 ps
T675 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.1351349537 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:18 PM PDT 24 2511440521 ps
T676 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2156595556 Jul 11 04:54:07 PM PDT 24 Jul 11 04:55:13 PM PDT 24 183915876127 ps
T677 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2149612806 Jul 11 04:53:04 PM PDT 24 Jul 11 04:53:13 PM PDT 24 3721104365 ps
T678 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4174474923 Jul 11 04:54:24 PM PDT 24 Jul 11 04:54:42 PM PDT 24 3232380685 ps
T328 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1677098103 Jul 11 04:54:04 PM PDT 24 Jul 11 04:56:02 PM PDT 24 40759557953 ps
T679 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3488651211 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:11 PM PDT 24 3357947477 ps
T680 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3299707291 Jul 11 04:53:01 PM PDT 24 Jul 11 04:55:57 PM PDT 24 63398665113 ps
T681 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.735843743 Jul 11 04:54:33 PM PDT 24 Jul 11 04:58:07 PM PDT 24 82576940068 ps
T682 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4095073540 Jul 11 04:54:20 PM PDT 24 Jul 11 04:54:30 PM PDT 24 2539331187 ps
T683 /workspace/coverage/default/49.sysrst_ctrl_alert_test.1877089129 Jul 11 04:54:31 PM PDT 24 Jul 11 04:54:41 PM PDT 24 2029454068 ps
T684 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2047006340 Jul 11 04:53:04 PM PDT 24 Jul 11 04:53:10 PM PDT 24 2544182210 ps
T685 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.1631838745 Jul 11 04:54:08 PM PDT 24 Jul 11 04:58:04 PM PDT 24 98733532048 ps
T686 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1415640943 Jul 11 04:53:22 PM PDT 24 Jul 11 04:54:29 PM PDT 24 64400094826 ps
T136 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.4185966529 Jul 11 04:53:05 PM PDT 24 Jul 11 04:53:18 PM PDT 24 8388742096 ps
T687 /workspace/coverage/default/24.sysrst_ctrl_smoke.2962006737 Jul 11 04:53:33 PM PDT 24 Jul 11 04:53:48 PM PDT 24 2112168194 ps
T688 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.382641458 Jul 11 04:54:33 PM PDT 24 Jul 11 04:55:31 PM PDT 24 113189093863 ps
T689 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2762472925 Jul 11 04:53:45 PM PDT 24 Jul 11 04:53:56 PM PDT 24 2016358137 ps
T156 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1545215383 Jul 11 04:53:45 PM PDT 24 Jul 11 04:54:01 PM PDT 24 4108244378 ps
T690 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3098133664 Jul 11 04:53:27 PM PDT 24 Jul 11 04:53:38 PM PDT 24 2527980351 ps
T691 /workspace/coverage/default/14.sysrst_ctrl_alert_test.233204657 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:25 PM PDT 24 2061445296 ps
T692 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.2052033261 Jul 11 04:54:10 PM PDT 24 Jul 11 04:54:19 PM PDT 24 2958852230 ps
T693 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3103085311 Jul 11 04:52:54 PM PDT 24 Jul 11 04:53:08 PM PDT 24 2613186510 ps
T694 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.841500042 Jul 11 04:54:24 PM PDT 24 Jul 11 04:54:36 PM PDT 24 3765530669 ps
T695 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3931656914 Jul 11 04:54:13 PM PDT 24 Jul 11 04:54:23 PM PDT 24 2033507340 ps
T696 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2252844849 Jul 11 04:54:34 PM PDT 24 Jul 11 04:59:28 PM PDT 24 106259494972 ps
T697 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.724462077 Jul 11 04:54:36 PM PDT 24 Jul 11 04:55:15 PM PDT 24 25084181044 ps
T698 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3418749511 Jul 11 04:53:17 PM PDT 24 Jul 11 04:53:30 PM PDT 24 2061114080 ps
T699 /workspace/coverage/default/0.sysrst_ctrl_smoke.3643530134 Jul 11 04:52:34 PM PDT 24 Jul 11 04:52:47 PM PDT 24 2136000976 ps
T397 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.770808671 Jul 11 04:53:40 PM PDT 24 Jul 11 04:55:02 PM PDT 24 56088910342 ps
T278 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.1537640748 Jul 11 04:53:13 PM PDT 24 Jul 11 04:54:42 PM PDT 24 66856987472 ps
T700 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3138015131 Jul 11 04:54:22 PM PDT 24 Jul 11 04:54:33 PM PDT 24 2343604156 ps
T701 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3341161021 Jul 11 04:53:02 PM PDT 24 Jul 11 04:53:10 PM PDT 24 2526611112 ps
T249 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.3891691199 Jul 11 04:54:35 PM PDT 24 Jul 11 04:54:50 PM PDT 24 3051650115 ps
T702 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1364432820 Jul 11 04:54:31 PM PDT 24 Jul 11 04:54:59 PM PDT 24 30352978623 ps
T703 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3163880738 Jul 11 04:54:31 PM PDT 24 Jul 11 04:55:10 PM PDT 24 22590022764 ps
T229 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2645878189 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:04 PM PDT 24 3036065839 ps
T142 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1714713829 Jul 11 04:52:52 PM PDT 24 Jul 11 04:53:01 PM PDT 24 6534738399 ps
T231 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.76723955 Jul 11 04:53:41 PM PDT 24 Jul 11 04:55:46 PM PDT 24 45981582130 ps
T232 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1612663085 Jul 11 04:53:44 PM PDT 24 Jul 11 04:55:42 PM PDT 24 84761893053 ps
T233 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.620648334 Jul 11 04:52:43 PM PDT 24 Jul 11 04:52:52 PM PDT 24 2444929031 ps
T234 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1545060919 Jul 11 04:53:18 PM PDT 24 Jul 11 04:53:28 PM PDT 24 2468670518 ps
T235 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.651909249 Jul 11 04:53:10 PM PDT 24 Jul 11 04:54:01 PM PDT 24 67730633382 ps
T236 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2325563857 Jul 11 04:54:35 PM PDT 24 Jul 11 04:54:50 PM PDT 24 41552368490 ps
T137 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3910519886 Jul 11 04:53:04 PM PDT 24 Jul 11 04:53:11 PM PDT 24 4527042457 ps
T237 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2732051934 Jul 11 04:53:29 PM PDT 24 Jul 11 04:53:40 PM PDT 24 2179447926 ps
T704 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3464206397 Jul 11 04:54:02 PM PDT 24 Jul 11 04:54:13 PM PDT 24 2814143166 ps
T705 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.831962225 Jul 11 04:54:40 PM PDT 24 Jul 11 04:55:59 PM PDT 24 26577220930 ps
T706 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.4001650697 Jul 11 04:53:39 PM PDT 24 Jul 11 04:54:47 PM PDT 24 101577091463 ps
T707 /workspace/coverage/default/9.sysrst_ctrl_stress_all.2782933149 Jul 11 04:53:11 PM PDT 24 Jul 11 04:55:57 PM PDT 24 61042497235 ps
T279 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2895275671 Jul 11 04:52:59 PM PDT 24 Jul 11 04:58:45 PM PDT 24 135666377787 ps
T708 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1363360174 Jul 11 04:53:26 PM PDT 24 Jul 11 04:53:39 PM PDT 24 4816520164 ps
T230 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1480061828 Jul 11 04:53:38 PM PDT 24 Jul 11 04:54:11 PM PDT 24 8915431838 ps
T709 /workspace/coverage/default/40.sysrst_ctrl_smoke.649971321 Jul 11 04:54:12 PM PDT 24 Jul 11 04:54:21 PM PDT 24 2147475936 ps
T710 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.4105842983 Jul 11 04:54:26 PM PDT 24 Jul 11 04:54:41 PM PDT 24 2262041400 ps
T711 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2565575572 Jul 11 04:53:06 PM PDT 24 Jul 11 04:53:23 PM PDT 24 4577901451 ps
T712 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.3796726755 Jul 11 04:53:44 PM PDT 24 Jul 11 04:54:53 PM PDT 24 89878300106 ps
T713 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2720952195 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:08 PM PDT 24 3545106260 ps
T714 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.317288340 Jul 11 04:53:50 PM PDT 24 Jul 11 04:57:48 PM PDT 24 86469956637 ps
T715 /workspace/coverage/default/27.sysrst_ctrl_smoke.1377355293 Jul 11 04:53:39 PM PDT 24 Jul 11 04:53:54 PM PDT 24 2110454900 ps
T716 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1072620773 Jul 11 04:53:55 PM PDT 24 Jul 11 04:54:08 PM PDT 24 3108730351 ps
T717 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3192755508 Jul 11 04:54:37 PM PDT 24 Jul 11 04:55:49 PM PDT 24 27080192608 ps
T718 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1006984765 Jul 11 04:54:30 PM PDT 24 Jul 11 04:54:54 PM PDT 24 25107224409 ps
T298 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3982097834 Jul 11 04:53:08 PM PDT 24 Jul 11 04:53:46 PM PDT 24 53240544094 ps
T719 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1504628225 Jul 11 04:53:21 PM PDT 24 Jul 11 04:55:04 PM PDT 24 72995544136 ps
T720 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2144452906 Jul 11 04:53:54 PM PDT 24 Jul 11 04:55:19 PM PDT 24 2459552920685 ps
T721 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2610660624 Jul 11 04:52:44 PM PDT 24 Jul 11 04:52:54 PM PDT 24 2270069895 ps
T722 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.639543610 Jul 11 04:54:13 PM PDT 24 Jul 11 04:54:23 PM PDT 24 2524283646 ps
T723 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3772771959 Jul 11 04:54:01 PM PDT 24 Jul 11 04:54:12 PM PDT 24 2207045011 ps
T724 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.4013653196 Jul 11 04:53:05 PM PDT 24 Jul 11 04:53:14 PM PDT 24 3327997854 ps
T725 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1505172523 Jul 11 04:53:30 PM PDT 24 Jul 11 04:53:40 PM PDT 24 2505432668 ps
T726 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.925108651 Jul 11 04:53:32 PM PDT 24 Jul 11 04:53:43 PM PDT 24 5798324577 ps
T727 /workspace/coverage/default/14.sysrst_ctrl_smoke.480506725 Jul 11 04:53:09 PM PDT 24 Jul 11 04:53:16 PM PDT 24 2152238880 ps
T728 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1224728851 Jul 11 04:53:41 PM PDT 24 Jul 11 04:53:55 PM PDT 24 2616496637 ps
T729 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3831265532 Jul 11 04:53:27 PM PDT 24 Jul 11 04:53:42 PM PDT 24 2610571921 ps
T730 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.651881702 Jul 11 04:53:36 PM PDT 24 Jul 11 04:54:00 PM PDT 24 300332795824 ps
T731 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1774869039 Jul 11 04:54:03 PM PDT 24 Jul 11 04:54:15 PM PDT 24 2129738695 ps
T732 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2702439905 Jul 11 04:53:52 PM PDT 24 Jul 11 04:54:01 PM PDT 24 2701503066 ps
T138 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3846467566 Jul 11 04:52:58 PM PDT 24 Jul 11 04:53:12 PM PDT 24 12000103579 ps
T733 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2813883835 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:35 PM PDT 24 6502602081 ps
T734 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.768769377 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:15 PM PDT 24 2064353326 ps
T735 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2808004070 Jul 11 05:03:18 PM PDT 24 Jul 11 05:03:27 PM PDT 24 3220270955 ps
T380 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1337419704 Jul 11 04:54:39 PM PDT 24 Jul 11 04:55:36 PM PDT 24 81224991681 ps
T170 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1888147539 Jul 11 04:52:50 PM PDT 24 Jul 11 04:54:29 PM PDT 24 398705547132 ps
T172 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3708583733 Jul 11 04:53:55 PM PDT 24 Jul 11 04:54:05 PM PDT 24 2501158547 ps
T173 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.593445417 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:08 PM PDT 24 5160202793 ps
T174 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3467464326 Jul 11 04:54:26 PM PDT 24 Jul 11 04:55:50 PM PDT 24 109966211273 ps
T175 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2393317927 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:31 PM PDT 24 2612925879 ps
T176 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.646292672 Jul 11 04:54:25 PM PDT 24 Jul 11 04:54:37 PM PDT 24 4127851249 ps
T177 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3572236084 Jul 11 04:54:27 PM PDT 24 Jul 11 04:54:37 PM PDT 24 2038167424 ps
T178 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.662407217 Jul 11 04:53:09 PM PDT 24 Jul 11 04:53:20 PM PDT 24 2455638240 ps
T179 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2834745944 Jul 11 04:54:23 PM PDT 24 Jul 11 04:56:26 PM PDT 24 49141659319 ps
T180 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1183441585 Jul 11 04:52:39 PM PDT 24 Jul 11 04:52:52 PM PDT 24 4281676983 ps
T736 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.1584638174 Jul 11 04:54:26 PM PDT 24 Jul 11 04:56:10 PM PDT 24 143041333561 ps
T737 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2814788882 Jul 11 04:52:48 PM PDT 24 Jul 11 04:54:09 PM PDT 24 60123208015 ps
T738 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1349291241 Jul 11 04:54:02 PM PDT 24 Jul 11 04:54:15 PM PDT 24 2485155478 ps
T739 /workspace/coverage/default/18.sysrst_ctrl_alert_test.4052185453 Jul 11 04:53:26 PM PDT 24 Jul 11 04:53:40 PM PDT 24 2009654894 ps
T740 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2062297777 Jul 11 04:54:06 PM PDT 24 Jul 11 04:54:20 PM PDT 24 3410709732 ps
T741 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3775081935 Jul 11 04:53:31 PM PDT 24 Jul 11 04:56:15 PM PDT 24 59992855740 ps
T139 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.420616365 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:31 PM PDT 24 9185100693 ps
T742 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3739505027 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:07 PM PDT 24 2676412153 ps
T743 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2061897066 Jul 11 04:53:56 PM PDT 24 Jul 11 04:54:07 PM PDT 24 3594428271 ps
T744 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1940191984 Jul 11 04:53:03 PM PDT 24 Jul 11 04:53:11 PM PDT 24 2629522922 ps
T745 /workspace/coverage/default/34.sysrst_ctrl_stress_all.3787174899 Jul 11 04:53:58 PM PDT 24 Jul 11 04:54:18 PM PDT 24 16124142858 ps
T746 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3028968576 Jul 11 04:53:13 PM PDT 24 Jul 11 04:57:07 PM PDT 24 91386436807 ps
T747 /workspace/coverage/default/4.sysrst_ctrl_smoke.3232296151 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:05 PM PDT 24 2110552542 ps
T748 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.60919033 Jul 11 04:54:05 PM PDT 24 Jul 11 04:54:20 PM PDT 24 3134188608 ps
T749 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4162903107 Jul 11 04:54:13 PM PDT 24 Jul 11 04:54:23 PM PDT 24 2566662176 ps
T750 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3304225310 Jul 11 04:53:51 PM PDT 24 Jul 11 05:07:27 PM PDT 24 294969692833 ps
T751 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2283851089 Jul 11 04:53:32 PM PDT 24 Jul 11 04:53:48 PM PDT 24 2512666206 ps
T752 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2225047849 Jul 11 04:54:33 PM PDT 24 Jul 11 04:55:37 PM PDT 24 22333146488 ps
T753 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1861909895 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:31 PM PDT 24 2611009311 ps
T754 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.534917955 Jul 11 04:54:06 PM PDT 24 Jul 11 04:54:17 PM PDT 24 2478441093 ps
T755 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2958641072 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:09 PM PDT 24 2527204919 ps
T756 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.4180631876 Jul 11 04:54:04 PM PDT 24 Jul 11 04:54:15 PM PDT 24 2816965057 ps
T757 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.787251168 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:18 PM PDT 24 3673895827 ps
T758 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.914412755 Jul 11 04:54:33 PM PDT 24 Jul 11 04:55:17 PM PDT 24 78026958258 ps
T759 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.945047599 Jul 11 04:53:56 PM PDT 24 Jul 11 04:54:08 PM PDT 24 2487983814 ps
T760 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2942635214 Jul 11 04:53:13 PM PDT 24 Jul 11 04:53:26 PM PDT 24 2048407300 ps
T761 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2971321501 Jul 11 04:53:46 PM PDT 24 Jul 11 04:54:19 PM PDT 24 536374411035 ps
T762 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2757551960 Jul 11 04:53:38 PM PDT 24 Jul 11 04:53:53 PM PDT 24 3407289595 ps
T763 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2205386555 Jul 11 04:53:59 PM PDT 24 Jul 11 04:54:19 PM PDT 24 14903586821 ps
T764 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1099768352 Jul 11 04:54:11 PM PDT 24 Jul 11 04:54:22 PM PDT 24 72329874085 ps
T765 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2592887160 Jul 11 04:52:57 PM PDT 24 Jul 11 04:53:05 PM PDT 24 2530101790 ps
T766 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2264947872 Jul 11 04:53:37 PM PDT 24 Jul 11 04:55:27 PM PDT 24 1497241857143 ps
T403 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2002928785 Jul 11 04:53:33 PM PDT 24 Jul 11 04:54:46 PM PDT 24 452258130877 ps
T767 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.3942006195 Jul 11 04:54:17 PM PDT 24 Jul 11 04:54:28 PM PDT 24 3161655942 ps
T144 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.992686893 Jul 11 04:54:06 PM PDT 24 Jul 11 04:55:12 PM PDT 24 1339076878231 ps
T329 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.4289768061 Jul 11 04:52:40 PM PDT 24 Jul 11 04:53:36 PM PDT 24 246019684119 ps
T768 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1292195640 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:08 PM PDT 24 2524832246 ps
T769 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3377797374 Jul 11 04:52:41 PM PDT 24 Jul 11 04:52:53 PM PDT 24 2274321203 ps
T145 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2543403724 Jul 11 04:54:23 PM PDT 24 Jul 11 04:55:13 PM PDT 24 73005889545 ps
T770 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2711664747 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:06 PM PDT 24 2610247202 ps
T771 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1472121169 Jul 11 04:53:38 PM PDT 24 Jul 11 04:53:50 PM PDT 24 2480066457 ps
T772 /workspace/coverage/default/29.sysrst_ctrl_stress_all.959895080 Jul 11 04:53:46 PM PDT 24 Jul 11 04:54:23 PM PDT 24 12611638202 ps
T773 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.344751360 Jul 11 04:54:14 PM PDT 24 Jul 11 04:54:29 PM PDT 24 4676023490 ps
T341 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.587766010 Jul 11 04:53:09 PM PDT 24 Jul 11 04:55:44 PM PDT 24 60621866066 ps
T774 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2106985079 Jul 11 04:54:02 PM PDT 24 Jul 11 04:54:15 PM PDT 24 3505400841 ps
T775 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1212117055 Jul 11 04:52:39 PM PDT 24 Jul 11 04:52:51 PM PDT 24 2515253759 ps
T776 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1152791070 Jul 11 05:12:21 PM PDT 24 Jul 11 05:12:28 PM PDT 24 2121806446 ps
T777 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1564727279 Jul 11 04:52:55 PM PDT 24 Jul 11 04:53:08 PM PDT 24 2474288172 ps
T778 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.951366315 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:28 PM PDT 24 2733473703 ps
T779 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.557303628 Jul 11 04:52:41 PM PDT 24 Jul 11 04:52:56 PM PDT 24 2107146467 ps
T207 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.4182754102 Jul 11 04:53:42 PM PDT 24 Jul 11 04:53:56 PM PDT 24 4092399110 ps
T780 /workspace/coverage/default/10.sysrst_ctrl_stress_all.1400709359 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:30 PM PDT 24 7119884648 ps
T781 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.662507171 Jul 11 04:53:33 PM PDT 24 Jul 11 04:53:51 PM PDT 24 2453389695 ps
T782 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.1771921174 Jul 11 04:54:02 PM PDT 24 Jul 11 05:02:45 PM PDT 24 192846400502 ps
T783 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3403081782 Jul 11 04:53:41 PM PDT 24 Jul 11 05:02:10 PM PDT 24 180320626436 ps
T784 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.790715617 Jul 11 04:52:52 PM PDT 24 Jul 11 04:53:06 PM PDT 24 2509889839 ps
T785 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.72458359 Jul 11 04:53:09 PM PDT 24 Jul 11 04:53:20 PM PDT 24 2121668882 ps
T786 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1032501219 Jul 11 04:54:18 PM PDT 24 Jul 11 04:54:32 PM PDT 24 2074702548 ps
T787 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.298872641 Jul 11 04:28:19 PM PDT 24 Jul 11 04:28:23 PM PDT 24 2034967717 ps
T30 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2113852304 Jul 11 04:27:34 PM PDT 24 Jul 11 04:27:42 PM PDT 24 6123895888 ps
T31 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2030635668 Jul 11 04:28:07 PM PDT 24 Jul 11 04:28:10 PM PDT 24 2131233886 ps
T32 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3899943642 Jul 11 04:28:18 PM PDT 24 Jul 11 04:30:08 PM PDT 24 42422633072 ps
T33 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.79176887 Jul 11 04:27:27 PM PDT 24 Jul 11 04:27:38 PM PDT 24 2065520863 ps
T21 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.3872173423 Jul 11 04:28:06 PM PDT 24 Jul 11 04:28:10 PM PDT 24 5520586432 ps
T369 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1642545243 Jul 11 04:29:16 PM PDT 24 Jul 11 04:29:22 PM PDT 24 2066058368 ps
T788 /workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.3627421401 Jul 11 04:28:23 PM PDT 24 Jul 11 04:28:29 PM PDT 24 2018977462 ps
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