Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.09 99.42 96.83 100.00 98.08 98.89 99.71 93.73


Total tests in report: 907
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
54.63 54.63 71.10 71.10 56.50 56.50 88.58 88.58 19.23 19.23 73.90 73.90 57.80 57.80 15.32 15.32 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1403895850
70.33 15.69 86.84 15.75 78.97 22.47 94.52 5.94 36.54 17.31 87.91 14.01 78.32 20.52 29.17 13.85 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3138847182
78.59 8.27 90.35 3.51 82.46 3.49 95.43 0.91 61.54 25.00 90.72 2.81 86.42 8.09 43.24 14.07 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2015586
82.91 4.31 93.69 3.34 86.65 4.20 97.03 1.60 67.95 6.41 93.53 2.81 91.43 5.01 50.05 6.82 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3993948431
86.00 3.09 95.48 1.79 89.96 3.31 97.26 0.23 80.13 12.18 95.30 1.77 93.74 2.31 50.11 0.05 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1654001007
87.78 1.78 97.05 1.57 92.34 2.38 97.49 0.23 80.13 0.00 96.78 1.48 94.51 0.77 56.16 6.05 /workspace/coverage/default/41.sysrst_ctrl_stress_all.900696793
89.23 1.45 97.63 0.58 92.97 0.63 97.49 0.00 82.69 2.56 97.15 0.37 95.76 1.25 60.91 4.74 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2776122305
90.60 1.37 97.70 0.07 94.16 1.19 98.17 0.68 82.69 0.00 97.26 0.11 95.86 0.10 68.32 7.42 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.1773515387
91.85 1.26 98.23 0.52 94.24 0.08 98.17 0.00 90.38 7.69 97.78 0.52 95.86 0.00 68.32 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2204099339
92.65 0.79 98.23 0.00 94.29 0.05 98.17 0.00 90.38 0.00 97.82 0.04 95.86 0.00 73.77 5.45 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3982097834
93.32 0.67 98.30 0.07 94.46 0.18 98.17 0.00 90.38 0.00 97.86 0.04 95.95 0.10 78.08 4.31 /workspace/coverage/default/47.sysrst_ctrl_stress_all.3819281821
93.84 0.52 98.38 0.07 94.59 0.13 98.17 0.00 91.03 0.64 97.97 0.11 96.24 0.29 80.48 2.40 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2948212874
94.21 0.37 98.43 0.06 94.62 0.03 98.17 0.00 91.67 0.64 98.04 0.07 97.50 1.25 81.03 0.55 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3077610889
94.54 0.34 98.58 0.15 94.79 0.18 98.17 0.00 91.67 0.00 98.11 0.07 97.59 0.10 82.88 1.85 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.293373173
94.85 0.31 98.58 0.00 94.82 0.03 98.17 0.00 91.67 0.00 98.11 0.00 97.69 0.10 84.90 2.02 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2418498361
95.13 0.28 98.58 0.00 94.84 0.03 99.77 1.60 91.67 0.00 98.11 0.00 97.78 0.10 85.17 0.27 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.880735637
95.38 0.25 98.66 0.07 94.89 0.05 99.77 0.00 92.95 1.28 98.19 0.07 97.98 0.19 85.22 0.05 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1821745809
95.62 0.24 98.73 0.07 94.94 0.05 99.77 0.00 94.23 1.28 98.26 0.07 98.17 0.19 85.22 0.00 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1888147539
95.81 0.19 98.79 0.06 94.94 0.00 99.77 0.00 94.23 0.00 98.26 0.00 98.17 0.00 86.53 1.31 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.858763200
95.98 0.17 98.86 0.07 94.94 0.00 99.77 0.00 94.23 0.00 98.26 0.00 98.17 0.00 87.62 1.09 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4206535678
96.14 0.16 98.90 0.04 95.20 0.25 99.77 0.00 94.23 0.00 98.34 0.07 98.84 0.67 87.73 0.11 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3435873573
96.29 0.15 98.90 0.00 95.93 0.73 99.77 0.00 94.23 0.00 98.34 0.00 98.94 0.10 87.95 0.22 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3364716910
96.42 0.13 98.96 0.06 95.96 0.03 99.77 0.00 94.87 0.64 98.41 0.07 99.04 0.10 87.95 0.00 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.403266461
96.55 0.13 99.01 0.06 95.98 0.03 99.77 0.00 95.51 0.64 98.48 0.07 99.13 0.10 87.95 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.590807180
96.68 0.13 99.07 0.06 96.01 0.03 99.77 0.00 96.15 0.64 98.56 0.07 99.23 0.10 87.95 0.00 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2263725324
96.80 0.12 99.10 0.04 96.03 0.03 99.77 0.00 96.79 0.64 98.60 0.04 99.33 0.10 87.95 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.496803557
96.92 0.12 99.14 0.04 96.06 0.03 99.77 0.00 97.44 0.64 98.63 0.04 99.42 0.10 87.95 0.00 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3088793623
97.04 0.12 99.18 0.04 96.08 0.03 99.77 0.00 98.08 0.64 98.67 0.04 99.52 0.10 87.95 0.00 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1480061828
97.14 0.10 99.20 0.02 96.08 0.00 99.77 0.00 98.08 0.00 98.67 0.00 99.52 0.00 88.66 0.71 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2252307471
97.23 0.09 99.20 0.00 96.08 0.00 99.77 0.00 98.08 0.00 98.67 0.00 99.52 0.00 89.31 0.65 /workspace/coverage/default/6.sysrst_ctrl_stress_all.1492071481
97.31 0.07 99.22 0.02 96.08 0.00 99.77 0.00 98.08 0.00 98.67 0.00 99.52 0.00 89.80 0.49 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1358165023
97.37 0.06 99.23 0.02 96.08 0.00 99.77 0.00 98.08 0.00 98.71 0.04 99.52 0.00 90.19 0.38 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1855512338
97.42 0.06 99.23 0.00 96.11 0.03 99.77 0.00 98.08 0.00 98.71 0.00 99.61 0.10 90.46 0.27 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3586549133
97.48 0.05 99.23 0.00 96.11 0.00 99.77 0.00 98.08 0.00 98.71 0.00 99.61 0.00 90.84 0.38 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1337419704
97.53 0.05 99.29 0.06 96.18 0.08 100.00 0.23 98.08 0.00 98.71 0.00 99.61 0.00 90.84 0.00 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1001721872
97.58 0.05 99.29 0.00 96.49 0.30 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 90.89 0.05 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4023507391
97.63 0.05 99.31 0.02 96.49 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.22 0.33 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3864114271
97.67 0.04 99.31 0.00 96.49 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.49 0.27 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3354109121
97.70 0.03 99.31 0.00 96.71 0.23 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.49 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2412861036
97.73 0.03 99.31 0.00 96.74 0.03 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.66 0.16 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3295792695
97.75 0.02 99.31 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.82 0.16 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.769169690
97.78 0.02 99.31 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 91.98 0.16 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2675600137
97.80 0.02 99.31 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.61 0.00 92.15 0.16 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1517950203
97.82 0.02 99.31 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.71 0.10 92.20 0.05 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2113852304
97.84 0.02 99.33 0.02 96.74 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.71 0.00 92.31 0.11 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.133203260
97.85 0.02 99.37 0.04 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.07 99.71 0.00 92.31 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.54302480
97.87 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.42 0.11 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1230659102
97.89 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.53 0.11 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3181485699
97.90 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.64 0.11 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.770808671
97.92 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.75 0.11 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2002928785
97.93 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.86 0.11 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.117166024
97.95 0.02 99.37 0.00 96.74 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 92.97 0.11 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3023520907
97.96 0.02 99.37 0.00 96.79 0.05 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 93.02 0.05 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.333250
97.97 0.01 99.38 0.02 96.79 0.00 100.00 0.00 98.08 0.00 98.82 0.04 99.71 0.00 93.02 0.00 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1446701362
97.98 0.01 99.40 0.02 96.79 0.00 100.00 0.00 98.08 0.00 98.85 0.04 99.71 0.00 93.02 0.00 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1380529279
97.99 0.01 99.42 0.02 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.04 99.71 0.00 93.02 0.00 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3578321204
98.00 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.08 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2182615876
98.00 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.13 0.05 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3095845991
98.01 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.18 0.05 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2755038742
98.02 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.24 0.05 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.1537640748
98.03 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.29 0.05 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2509991154
98.03 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.35 0.05 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1669120049
98.04 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.40 0.05 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.327988428
98.05 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.46 0.05 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1504628225
98.06 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.51 0.05 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.305623054
98.07 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.57 0.05 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3237517527
98.07 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.62 0.05 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2683559655
98.08 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.68 0.05 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1968154419
98.09 0.01 99.42 0.00 96.79 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.73 0.05 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4019064997
98.09 0.01 99.42 0.00 96.81 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 93.73 0.00 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.962541265


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3023648236
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.467492827
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1052689713
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3523013740
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1571886734
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3189460199
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1241189302
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1801196754
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2411930099
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.267907665
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.212942088
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1571833986
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4119658726
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3136996532
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3308250190
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.128767071
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2130720409
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3002623427
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.4031135290
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.509784654
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3650366072
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3093617996
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2030635668
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1740686600
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.503161026
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.517976516
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.4229422530
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.977912635
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3448067596
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2331779334
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.360922144
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2103894550
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2844129234
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3267490903
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3545547404
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2047702033
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.4176529269
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1689948737
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3899943642
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3877784891
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3838750441
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3431104633
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1418825014
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2853318964
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2186024861
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3010940265
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1450153186
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2582673052
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1183112742
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.814308679
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1842885150
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1317901068
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3899887649
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2570698910
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2679505563
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3543718630
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3550321272
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2948179856
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1642545243
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.754690684
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2385490886
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.558543129
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3230558523
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.559152362
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2904016571
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3215983167
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.119476508
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3870413561
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.510473171
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1165366999
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2685463872
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.659905431
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2178974041
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3378219656
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.4230147365
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1047810982
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2384043033
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/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1478100170
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2061486116
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1278617862
/workspace/coverage/default/42.sysrst_ctrl_smoke.971375362
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2784164725
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2834745944
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1534871738
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3970729175
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2893468638
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1120877637
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2290927694
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2702936649
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3942006195
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1541258613
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4095073540
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2646772365
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1020947363
/workspace/coverage/default/43.sysrst_ctrl_smoke.3825861493
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.344751360
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1243696031
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3898657085
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2784935618
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3982651540
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3027235718
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.587861908
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1680880730
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1032501219
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3896007363
/workspace/coverage/default/44.sysrst_ctrl_smoke.2035383479
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2876674402
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3759197323
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3483530392
/workspace/coverage/default/45.sysrst_ctrl_alert_test.82339294
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4174474923
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2892278662
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.4115527847
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3505883129
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3819946322
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3555490272
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3115554643
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2110405344
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4162342751
/workspace/coverage/default/45.sysrst_ctrl_smoke.2741013009
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1018399840
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3482115841
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.841500042
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2371675896
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4256883358
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2180926780
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3138015131
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1941362474
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3750146512
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1423010459
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3082248119
/workspace/coverage/default/46.sysrst_ctrl_smoke.2276482730
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1759428962
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2543403724
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2557377195
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1674540690
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3990878760
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1584638174
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3781943982
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.646292672
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.563704266
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2277013235
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3040400682
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1475065720
/workspace/coverage/default/47.sysrst_ctrl_smoke.2109112699
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.779978560
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1709402846
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3572236084
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2045546001
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1701598447
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2437138208
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3803355882
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1747775853
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.286295231
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1467537963
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.4105842983
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2517115119
/workspace/coverage/default/48.sysrst_ctrl_smoke.3511668734
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1357973782
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2660067817
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2066713767
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1877089129
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3591454726
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2282611766
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3467464326
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1969870311
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3891691199
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.33189460
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.781480116
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1152791070
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.244078810
/workspace/coverage/default/49.sysrst_ctrl_smoke.2828813411
/workspace/coverage/default/49.sysrst_ctrl_stress_all.630223747
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3513076670
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1331778878
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.375578468
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2895275671
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4021722968
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3646521961
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.829851399
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3103085311
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2297146582
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.922249160
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3109404011
/workspace/coverage/default/5.sysrst_ctrl_smoke.2648202929
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2332576669
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1618402692
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3163880738
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1187587659
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.447198893
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.724462077
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.914412755
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2686267760
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3168584699
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2325563857
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3280499279
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1330075923
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3130892710
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3299707291
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3817967122
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.144050135
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3605613117
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.608467725
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.72458359
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3433590305
/workspace/coverage/default/6.sysrst_ctrl_smoke.3476761420
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4262280278
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2225226409
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2330987802
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.6181694
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3962440592
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2557333125
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3568376994
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2225047849
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.735843743
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2252844849
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.436637030
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3546760085
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.19590535
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.560875709
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2242604701
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1952178387
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2645878189
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1563660193
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1211196086
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2220717515
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1439361000
/workspace/coverage/default/7.sysrst_ctrl_smoke.2690789193
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1583664119
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2166009310
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3846467566
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2168300349
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1006984765
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.382641458
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1364432820
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3289531917
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3142333801
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1218986006
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.890589843
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1346954068
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1357250518
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1738176676
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2707448099
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2932534975
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1940191984
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2969922607
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.768769377
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2047006340
/workspace/coverage/default/8.sysrst_ctrl_smoke.893871929
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1530033141
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3099196334
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3910519886
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2635794441
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1363257368
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.590529932
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2299413439
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3192755508
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2929153172
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1260105993
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3327142395
/workspace/coverage/default/9.sysrst_ctrl_alert_test.4086248507
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1186887048
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.106305591
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1402417277
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2565575572
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.787251168
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1631324963
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1491944153
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1481723160
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2969752114
/workspace/coverage/default/9.sysrst_ctrl_smoke.60829885
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2782933149
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2087404011
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2478292274
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.153117299
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.187749927
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.831962225
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1435972230
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2599947332
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1734024109




Total test records in report: 907
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2969752114 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:21 PM PDT 24 2519630129 ps
T1 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1403895850 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:41 PM PDT 24 16921601520 ps
T5 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3743302178 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:38 PM PDT 24 2511334395 ps
T13 /workspace/coverage/default/34.sysrst_ctrl_smoke.1848293023 Jul 11 04:53:58 PM PDT 24 Jul 11 04:54:14 PM PDT 24 2110893872 ps
T2 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.3674160464 Jul 11 04:53:58 PM PDT 24 Jul 11 04:55:30 PM PDT 24 169503155607 ps
T14 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3241550539 Jul 11 04:53:15 PM PDT 24 Jul 11 04:53:29 PM PDT 24 2132676888 ps
T15 /workspace/coverage/default/5.sysrst_ctrl_smoke.2648202929 Jul 11 04:52:52 PM PDT 24 Jul 11 04:53:01 PM PDT 24 2136816193 ps
T3 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1254985533 Jul 11 04:52:40 PM PDT 24 Jul 11 04:53:41 PM PDT 24 38428406027 ps
T16 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.608467725 Jul 11 04:52:58 PM PDT 24 Jul 11 04:53:05 PM PDT 24 2524948823 ps
T17 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.3463052482 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:08 PM PDT 24 2244736252 ps
T6 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.133203260 Jul 11 04:53:29 PM PDT 24 Jul 11 04:54:29 PM PDT 24 77732218960 ps
T49 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.423760354 Jul 11 04:53:58 PM PDT 24 Jul 11 04:54:08 PM PDT 24 3144381066 ps
T27 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.19590535 Jul 11 04:53:08 PM PDT 24 Jul 11 04:53:19 PM PDT 24 3337471876 ps
T28 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2169804093 Jul 11 04:53:14 PM PDT 24 Jul 11 04:53:23 PM PDT 24 2972424410 ps
T25 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2969922607 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:19 PM PDT 24 2471712557 ps
T29 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.39757781 Jul 11 04:53:21 PM PDT 24 Jul 11 04:53:32 PM PDT 24 3637328224 ps
T50 /workspace/coverage/default/30.sysrst_ctrl_smoke.1285345244 Jul 11 04:53:48 PM PDT 24 Jul 11 04:53:58 PM PDT 24 2122143868 ps
T7 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3138847182 Jul 11 04:53:08 PM PDT 24 Jul 11 04:53:40 PM PDT 24 117666800884 ps
T51 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.585425602 Jul 11 04:52:52 PM PDT 24 Jul 11 04:53:09 PM PDT 24 4167396000 ps
T8 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1658686154 Jul 11 04:53:54 PM PDT 24 Jul 11 04:55:30 PM PDT 24 163947954313 ps
T9 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3027235718 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:46 PM PDT 24 5021863066 ps
T10 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1391799956 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:04 PM PDT 24 2521694037 ps
T11 /workspace/coverage/default/6.sysrst_ctrl_stress_all.1492071481 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:42 PM PDT 24 547212160562 ps
T67 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3404032834 Jul 11 04:53:11 PM PDT 24 Jul 11 04:53:23 PM PDT 24 6671472651 ps
T52 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.22201743 Jul 11 04:52:38 PM PDT 24 Jul 11 04:52:53 PM PDT 24 3599056794 ps
T68 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2686030487 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:31 PM PDT 24 2512571278 ps
T12 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2242604701 Jul 11 04:53:01 PM PDT 24 Jul 11 04:53:12 PM PDT 24 35560510940 ps
T69 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2313855540 Jul 11 04:53:12 PM PDT 24 Jul 11 04:53:21 PM PDT 24 2626863854 ps
T159 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2061486116 Jul 11 04:54:18 PM PDT 24 Jul 11 04:54:30 PM PDT 24 2220312277 ps
T26 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.200794433 Jul 11 04:53:52 PM PDT 24 Jul 11 04:54:06 PM PDT 24 2452385963 ps
T42 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4206535678 Jul 11 04:53:56 PM PDT 24 Jul 11 04:57:45 PM PDT 24 91936539017 ps
T70 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.491763679 Jul 11 04:53:48 PM PDT 24 Jul 11 04:54:00 PM PDT 24 2515611463 ps
T262 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1672553222 Jul 11 04:53:14 PM PDT 24 Jul 11 04:53:24 PM PDT 24 2171740308 ps
T263 /workspace/coverage/default/44.sysrst_ctrl_smoke.2035383479 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:35 PM PDT 24 2119230506 ps
T43 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.4115527847 Jul 11 04:54:19 PM PDT 24 Jul 11 04:55:41 PM PDT 24 26082425694 ps
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T44 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.67731164 Jul 11 04:52:47 PM PDT 24 Jul 11 04:53:15 PM PDT 24 16237224785 ps
T63 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1822276063 Jul 11 04:52:48 PM PDT 24 Jul 11 04:53:01 PM PDT 24 2456314291 ps
T71 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1168981348 Jul 11 04:53:27 PM PDT 24 Jul 11 04:53:37 PM PDT 24 2653533610 ps
T64 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2298953364 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:30 PM PDT 24 2465468703 ps
T321 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2110405344 Jul 11 04:54:24 PM PDT 24 Jul 11 04:54:39 PM PDT 24 2144184934 ps
T322 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.558766889 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:32 PM PDT 24 3609451177 ps
T45 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.257922844 Jul 11 04:53:44 PM PDT 24 Jul 11 04:54:20 PM PDT 24 10172971214 ps
T65 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2422408617 Jul 11 04:54:21 PM PDT 24 Jul 11 04:54:38 PM PDT 24 2486057227 ps
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T34 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.363966530 Jul 11 04:53:29 PM PDT 24 Jul 11 04:53:42 PM PDT 24 9457998302 ps
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T58 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.4047751689 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:40 PM PDT 24 3049610113 ps
T59 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2755038742 Jul 11 04:52:42 PM PDT 24 Jul 11 04:52:54 PM PDT 24 2477029194 ps
T22 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1821745809 Jul 11 04:52:42 PM PDT 24 Jul 11 04:52:56 PM PDT 24 3300845030 ps
T60 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2656541895 Jul 11 04:53:43 PM PDT 24 Jul 11 04:54:00 PM PDT 24 2513694214 ps
T47 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3621151782 Jul 11 04:52:42 PM PDT 24 Jul 11 04:52:55 PM PDT 24 8194900872 ps
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T66 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.577533143 Jul 11 04:53:34 PM PDT 24 Jul 11 04:53:52 PM PDT 24 2464019548 ps
T36 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.951659076 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:48 PM PDT 24 4048620257 ps
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T82 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.4238635751 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:32 PM PDT 24 2478238483 ps
T23 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4023507391 Jul 11 04:52:55 PM PDT 24 Jul 11 04:56:43 PM PDT 24 1684547731566 ps
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T130 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.753823100 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:18 PM PDT 24 2214534401 ps
T74 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1091989657 Jul 11 04:52:45 PM PDT 24 Jul 11 04:52:59 PM PDT 24 2519480692 ps
T48 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3429944243 Jul 11 04:54:07 PM PDT 24 Jul 11 04:55:04 PM PDT 24 264702267670 ps
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T41 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3289531917 Jul 11 04:54:33 PM PDT 24 Jul 11 04:55:33 PM PDT 24 76675436786 ps
T133 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3692444316 Jul 11 04:53:08 PM PDT 24 Jul 11 04:53:17 PM PDT 24 2524874129 ps
T38 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1130315621 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:40 PM PDT 24 3370925543 ps
T37 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3993948431 Jul 11 04:53:24 PM PDT 24 Jul 11 04:54:35 PM PDT 24 55631921324 ps
T200 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1346954068 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:16 PM PDT 24 2017683651 ps
T201 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3082248119 Jul 11 04:54:22 PM PDT 24 Jul 11 04:54:38 PM PDT 24 2507418300 ps
T202 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2189198887 Jul 11 04:53:58 PM PDT 24 Jul 11 04:54:14 PM PDT 24 2510615455 ps
T203 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.239845940 Jul 11 04:52:39 PM PDT 24 Jul 11 04:52:51 PM PDT 24 2635936133 ps
T24 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1032620849 Jul 11 04:53:03 PM PDT 24 Jul 11 04:54:31 PM PDT 24 33313210063 ps
T204 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.375578468 Jul 11 04:52:59 PM PDT 24 Jul 11 04:53:13 PM PDT 24 3158097549 ps
T205 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3737687346 Jul 11 04:53:48 PM PDT 24 Jul 11 04:54:03 PM PDT 24 2610406491 ps
T75 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2557333125 Jul 11 04:54:31 PM PDT 24 Jul 11 04:55:52 PM PDT 24 55916106353 ps
T73 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.496803557 Jul 11 04:53:16 PM PDT 24 Jul 11 04:54:03 PM PDT 24 64310159981 ps
T96 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1418986333 Jul 11 04:53:13 PM PDT 24 Jul 11 04:53:28 PM PDT 24 3032112556 ps
T83 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.2672396918 Jul 11 04:53:14 PM PDT 24 Jul 11 04:57:31 PM PDT 24 179700858144 ps
T35 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.293373173 Jul 11 04:53:29 PM PDT 24 Jul 11 04:55:01 PM PDT 24 596580740252 ps
T53 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2052372410 Jul 11 04:53:23 PM PDT 24 Jul 11 04:54:58 PM PDT 24 32862358366 ps
T76 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3525638857 Jul 11 04:54:11 PM PDT 24 Jul 11 04:55:18 PM PDT 24 21578763657 ps
T111 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1357250518 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:21 PM PDT 24 3268668942 ps
T112 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.829851399 Jul 11 04:52:56 PM PDT 24 Jul 11 04:53:05 PM PDT 24 3507681436 ps
T77 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2509991154 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:59 PM PDT 24 103159866549 ps
T113 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1513439935 Jul 11 04:53:47 PM PDT 24 Jul 11 04:53:58 PM PDT 24 3670338823 ps
T114 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2839497258 Jul 11 04:54:12 PM PDT 24 Jul 11 04:54:24 PM PDT 24 3673898707 ps
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T134 /workspace/coverage/default/19.sysrst_ctrl_alert_test.1114112951 Jul 11 04:53:30 PM PDT 24 Jul 11 04:53:44 PM PDT 24 2014781617 ps
T97 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1435972230 Jul 11 04:54:37 PM PDT 24 Jul 11 04:55:34 PM PDT 24 35613894152 ps
T409 /workspace/coverage/default/16.sysrst_ctrl_alert_test.509425682 Jul 11 04:53:15 PM PDT 24 Jul 11 04:53:24 PM PDT 24 2023354779 ps
T54 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2776122305 Jul 11 04:52:51 PM PDT 24 Jul 11 05:00:09 PM PDT 24 462023243897 ps
T55 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.769169690 Jul 11 04:53:08 PM PDT 24 Jul 11 04:55:08 PM PDT 24 48048663061 ps
T268 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1183090895 Jul 11 04:53:50 PM PDT 24 Jul 11 04:54:56 PM PDT 24 43113123223 ps
T84 /workspace/coverage/default/47.sysrst_ctrl_stress_all.3819281821 Jul 11 04:54:26 PM PDT 24 Jul 11 04:56:22 PM PDT 24 387911299405 ps
T98 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3962440592 Jul 11 04:54:30 PM PDT 24 Jul 11 04:57:50 PM PDT 24 77175061177 ps
T56 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3190549871 Jul 11 04:53:22 PM PDT 24 Jul 11 04:54:40 PM PDT 24 111536242930 ps
T269 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1094937186 Jul 11 04:54:17 PM PDT 24 Jul 11 04:54:34 PM PDT 24 3327193024 ps
T270 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2899126265 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:41 PM PDT 24 2020176561 ps
T92 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.73328327 Jul 11 04:53:21 PM PDT 24 Jul 11 04:53:30 PM PDT 24 2612806874 ps
T194 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2045546001 Jul 11 05:34:15 PM PDT 24 Jul 11 05:34:33 PM PDT 24 3363098774 ps
T195 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1117321942 Jul 11 04:53:39 PM PDT 24 Jul 11 04:53:50 PM PDT 24 2645216809 ps
T196 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.922249160 Jul 11 04:52:51 PM PDT 24 Jul 11 04:53:04 PM PDT 24 2225160481 ps
T39 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1654001007 Jul 11 04:52:40 PM PDT 24 Jul 11 04:53:39 PM PDT 24 36807034271 ps
T157 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.275436352 Jul 11 04:53:15 PM PDT 24 Jul 11 04:53:28 PM PDT 24 4827519185 ps
T197 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.880735637 Jul 11 04:52:53 PM PDT 24 Jul 11 04:53:58 PM PDT 24 22011616082 ps
T99 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.349950347 Jul 11 04:53:17 PM PDT 24 Jul 11 04:54:24 PM PDT 24 23833694754 ps
T198 /workspace/coverage/default/23.sysrst_ctrl_alert_test.773699415 Jul 11 04:53:30 PM PDT 24 Jul 11 04:53:45 PM PDT 24 2014045427 ps
T40 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1288309443 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:48 PM PDT 24 5545034373 ps
T260 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2168300349 Jul 11 04:54:30 PM PDT 24 Jul 11 04:54:50 PM PDT 24 52151990972 ps
T78 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.558796552 Jul 11 04:54:12 PM PDT 24 Jul 11 04:54:22 PM PDT 24 7732961484 ps
T317 /workspace/coverage/default/16.sysrst_ctrl_stress_all.3763550782 Jul 11 04:53:15 PM PDT 24 Jul 11 04:53:28 PM PDT 24 9513058318 ps
T318 /workspace/coverage/default/41.sysrst_ctrl_smoke.1749538712 Jul 11 04:54:14 PM PDT 24 Jul 11 04:54:25 PM PDT 24 2121497054 ps
T319 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3095845991 Jul 11 04:52:38 PM PDT 24 Jul 11 04:52:52 PM PDT 24 2518521072 ps
T320 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3896007363 Jul 11 04:54:19 PM PDT 24 Jul 11 04:54:30 PM PDT 24 2530354485 ps
T410 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2741080115 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:47 PM PDT 24 5580634155 ps
T411 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2894746274 Jul 11 04:52:46 PM PDT 24 Jul 11 04:52:56 PM PDT 24 3723411216 ps
T412 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4158209913 Jul 11 04:54:10 PM PDT 24 Jul 11 04:54:20 PM PDT 24 2259158222 ps
T332 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1666860248 Jul 11 04:53:18 PM PDT 24 Jul 11 04:53:27 PM PDT 24 2518441539 ps
T413 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2061519806 Jul 11 04:53:54 PM PDT 24 Jul 11 04:54:04 PM PDT 24 2101263274 ps
T79 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3759197323 Jul 11 04:54:24 PM PDT 24 Jul 11 04:55:47 PM PDT 24 38257447012 ps
T414 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.5175202 Jul 11 04:53:23 PM PDT 24 Jul 11 04:53:33 PM PDT 24 2279239912 ps
T415 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.20200824 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:25 PM PDT 24 3970735114 ps
T416 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3909421495 Jul 11 04:54:11 PM PDT 24 Jul 11 04:54:23 PM PDT 24 2611701923 ps
T271 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.2236930800 Jul 11 04:54:14 PM PDT 24 Jul 11 05:00:03 PM PDT 24 124933876292 ps
T272 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.444743677 Jul 11 04:53:03 PM PDT 24 Jul 11 04:54:34 PM PDT 24 35745322725 ps
T289 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.4044602649 Jul 11 04:53:11 PM PDT 24 Jul 11 04:53:25 PM PDT 24 2781925003 ps
T290 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2248718932 Jul 11 04:53:34 PM PDT 24 Jul 11 04:53:45 PM PDT 24 3665764537 ps
T80 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3520285773 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:34 PM PDT 24 4314119795 ps
T91 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2015586 Jul 11 04:53:57 PM PDT 24 Jul 11 04:55:08 PM PDT 24 95986334921 ps
T146 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.4216250113 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:19 PM PDT 24 3273078084 ps
T100 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.4118311462 Jul 11 04:53:54 PM PDT 24 Jul 11 04:54:39 PM PDT 24 27340394694 ps
T250 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3483530392 Jul 11 04:54:16 PM PDT 24 Jul 11 04:54:28 PM PDT 24 5588484744 ps
T101 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2437138208 Jul 11 05:43:51 PM PDT 24 Jul 11 05:44:09 PM PDT 24 25351775914 ps
T251 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1001721872 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:36 PM PDT 24 2013751759 ps
T252 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.206837723 Jul 11 04:52:39 PM PDT 24 Jul 11 04:52:58 PM PDT 24 3323869269 ps
T253 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.3130892710 Jul 11 04:52:58 PM PDT 24 Jul 11 04:57:04 PM PDT 24 147356982405 ps
T254 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3990878760 Jul 11 04:54:29 PM PDT 24 Jul 11 04:54:41 PM PDT 24 3948430961 ps
T148 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3734939249 Jul 11 04:53:14 PM PDT 24 Jul 11 04:53:23 PM PDT 24 3354192941 ps
T417 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.622623829 Jul 11 04:53:45 PM PDT 24 Jul 11 04:53:55 PM PDT 24 2166458712 ps
T324 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1800648891 Jul 11 04:53:20 PM PDT 24 Jul 11 04:53:35 PM PDT 24 3253583874 ps
T418 /workspace/coverage/default/37.sysrst_ctrl_stress_all.408614245 Jul 11 04:54:06 PM PDT 24 Jul 11 04:54:25 PM PDT 24 7831286124 ps
T419 /workspace/coverage/default/22.sysrst_ctrl_alert_test.1859392641 Jul 11 04:53:31 PM PDT 24 Jul 11 04:53:45 PM PDT 24 2021335416 ps
T420 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1216322832 Jul 11 04:54:19 PM PDT 24 Jul 11 04:54:35 PM PDT 24 2727507209 ps
T421 /workspace/coverage/default/26.sysrst_ctrl_alert_test.3708797840 Jul 11 04:53:50 PM PDT 24 Jul 11 04:54:01 PM PDT 24 2021670133 ps
T93 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1529220096 Jul 11 04:53:27 PM PDT 24 Jul 11 04:54:27 PM PDT 24 81234403458 ps
T243 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2096149046 Jul 11 04:53:58 PM PDT 24 Jul 11 04:58:17 PM PDT 24 91405117161 ps
T244 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3768600050 Jul 11 04:53:28 PM PDT 24 Jul 11 04:53:38 PM PDT 24 2701585955 ps
T102 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3917919401 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:36 PM PDT 24 19683882793 ps
T245 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2010980547 Jul 11 04:53:47 PM PDT 24 Jul 11 04:53:59 PM PDT 24 9568923756 ps
T246 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3491309540 Jul 11 04:53:32 PM PDT 24 Jul 11 04:53:43 PM PDT 24 3043117326 ps
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T149 /workspace/coverage/default/42.sysrst_ctrl_stress_all.2784164725 Jul 11 04:54:18 PM PDT 24 Jul 11 04:54:42 PM PDT 24 12533302768 ps
T122 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1265279434 Jul 11 04:54:09 PM PDT 24 Jul 11 04:54:51 PM PDT 24 34861467272 ps
T248 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2180926780 Jul 11 04:54:23 PM PDT 24 Jul 11 04:54:43 PM PDT 24 4277825819 ps
T185 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.1464323988 Jul 11 04:54:07 PM PDT 24 Jul 11 04:54:20 PM PDT 24 4202744752 ps
T422 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.971488197 Jul 11 04:53:54 PM PDT 24 Jul 11 04:54:08 PM PDT 24 2086254386 ps
T423 /workspace/coverage/default/45.sysrst_ctrl_smoke.2741013009 Jul 11 04:54:20 PM PDT 24 Jul 11 04:54:34 PM PDT 24 2110219341 ps
T424 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1767896150 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:15 PM PDT 24 2535076175 ps
T425 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3058900376 Jul 11 04:53:19 PM PDT 24 Jul 11 04:53:38 PM PDT 24 3769238599 ps
T426 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1712935724 Jul 11 04:53:18 PM PDT 24 Jul 11 04:53:27 PM PDT 24 2226387284 ps
T261 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2683559655 Jul 11 04:54:05 PM PDT 24 Jul 11 04:54:34 PM PDT 24 29846074843 ps
T427 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1085670413 Jul 11 04:53:22 PM PDT 24 Jul 11 04:53:41 PM PDT 24 3895070335 ps
T428 /workspace/coverage/default/9.sysrst_ctrl_alert_test.4086248507 Jul 11 04:53:04 PM PDT 24 Jul 11 04:53:10 PM PDT 24 2043927558 ps
T338 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2225226409 Jul 11 04:52:59 PM PDT 24 Jul 11 04:53:08 PM PDT 24 4797997773 ps
T257 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4019064997 Jul 11 04:54:33 PM PDT 24 Jul 11 04:56:54 PM PDT 24 101104787924 ps
T429 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1003867756 Jul 11 04:54:09 PM PDT 24 Jul 11 04:54:21 PM PDT 24 2029992560 ps
T123 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1348778086 Jul 11 04:54:11 PM PDT 24 Jul 11 04:54:23 PM PDT 24 16981590691 ps
T430 /workspace/coverage/default/12.sysrst_ctrl_alert_test.377272328 Jul 11 04:53:16 PM PDT 24 Jul 11 04:53:25 PM PDT 24 2026617687 ps
T373 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.333250 Jul 11 04:53:36 PM PDT 24 Jul 11 04:56:03 PM PDT 24 100220821697 ps
T431 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3212273937 Jul 11 04:53:10 PM PDT 24 Jul 11 04:53:24 PM PDT 24 2513541162 ps
T333 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3086207931 Jul 11 04:54:09 PM PDT 24 Jul 11 04:54:24 PM PDT 24 2450087265 ps
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T103 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2418498361 Jul 11 04:53:36 PM PDT 24 Jul 11 04:56:05 PM PDT 24 56402752893 ps
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T89 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1358165023 Jul 11 04:53:15 PM PDT 24 Jul 11 04:54:58 PM PDT 24 143772109582 ps
T119 /workspace/coverage/default/37.sysrst_ctrl_smoke.1549331272 Jul 11 04:53:57 PM PDT 24 Jul 11 04:54:12 PM PDT 24 2108877787 ps
T95 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.457407344 Jul 11 04:52:38 PM PDT 24 Jul 11 04:52:52 PM PDT 24 7731731549 ps
T120 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.4045348845 Jul 11 04:53:07 PM PDT 24 Jul 11 04:53:16 PM PDT 24 3696527796 ps
T90 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.6181694 Jul 11 04:54:38 PM PDT 24 Jul 11 04:56:59 PM PDT 24 53972558827 ps
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T462 /workspace/coverage/default/47.sysrst_ctrl_smoke.2109112699 Jul 11 04:54:28 PM PDT 24 Jul 11 04:54:42 PM PDT 24 2112958390 ps
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