Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.21	99.33	96.41	100.00	96.79	98.78	99.52	89.62

Total tests in report: 908

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
54.71	54.71	72.48	72.48	59.28	59.28	90.18	90.18	11.54	11.54	74.12	74.12	60.40	60.40	14.95	14.95	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.849367304
71.09	16.38	87.40	14.93	78.06	18.78	93.61	3.42	53.85	42.31	87.69	13.57	79.19	18.79	17.81	2.86	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1549077105
77.73	6.65	92.29	4.89	84.98	6.93	96.58	2.97	61.54	7.69	92.27	4.58	86.71	7.51	29.75	11.94	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3585132925
81.92	4.19	94.64	2.35	88.09	3.11	96.80	0.23	76.92	15.38	94.79	2.51	92.10	5.39	30.11	0.36	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3796287450
85.89	3.97	96.25	1.60	90.44	2.35	97.03	0.23	76.92	0.00	96.27	1.48	92.68	0.58	51.66	21.55	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.180065494
88.01	2.11	97.52	1.27	91.61	1.16	97.03	0.00	85.26	8.33	97.12	0.85	95.86	3.18	51.66	0.00	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.4145512455
89.26	1.25	97.54	0.02	92.67	1.06	97.72	0.68	85.26	0.00	97.15	0.04	95.86	0.00	58.62	6.96	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3742302196
90.45	1.20	97.78	0.24	93.12	0.46	97.72	0.00	85.26	0.00	97.15	0.00	95.95	0.10	66.20	7.58	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2227630891
91.17	0.72	98.10	0.32	93.48	0.35	97.72	0.00	88.46	3.21	97.45	0.30	96.82	0.87	66.20	0.00	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.802761344
91.80	0.62	98.12	0.02	93.55	0.08	97.72	0.00	88.46	0.00	97.52	0.07	97.11	0.29	70.09	3.89	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2801031574
92.32	0.52	98.25	0.13	93.63	0.08	98.17	0.46	90.38	1.92	97.67	0.15	97.50	0.39	70.61	0.52	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2390662909
92.80	0.48	98.28	0.04	93.73	0.10	98.17	0.00	90.38	0.00	97.67	0.00	97.50	0.00	73.83	3.22	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1468920421
93.19	0.39	98.41	0.13	93.78	0.05	98.17	0.00	90.38	0.00	97.67	0.00	97.50	0.00	76.38	2.54	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2434162570
93.46	0.27	98.54	0.13	93.83	0.05	98.17	0.00	91.67	1.28	97.86	0.18	97.69	0.19	76.43	0.05	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4080094932
93.72	0.27	98.56	0.02	93.83	0.00	98.17	0.00	91.67	0.00	97.89	0.04	97.69	0.00	78.25	1.82	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3887647184
93.98	0.25	98.56	0.00	93.83	0.00	98.17	0.00	91.67	0.00	97.89	0.00	97.69	0.00	80.01	1.77	/workspace/coverage/default/15.sysrst_ctrl_stress_all.3622278274
94.21	0.24	98.64	0.07	93.88	0.05	98.17	0.00	92.95	1.28	97.97	0.07	97.88	0.19	80.01	0.00	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.4279665316
94.45	0.24	98.69	0.06	93.96	0.08	99.54	1.37	92.95	0.00	97.97	0.00	97.88	0.00	80.17	0.16	/workspace/coverage/default/0.sysrst_ctrl_alert_test.981673931
94.65	0.20	98.79	0.09	94.31	0.35	99.54	0.00	92.95	0.00	98.11	0.15	98.55	0.67	80.32	0.16	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.2147254879
94.85	0.20	98.79	0.00	94.49	0.18	99.54	0.00	92.95	0.00	98.19	0.07	98.65	0.10	81.36	1.04	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3333578844
95.04	0.19	98.79	0.00	95.30	0.81	99.54	0.00	92.95	0.00	98.19	0.00	98.75	0.10	81.78	0.42	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.832359184
95.23	0.19	98.79	0.00	95.30	0.00	99.54	0.00	92.95	0.00	98.19	0.00	98.75	0.00	83.07	1.30	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1072175198
95.36	0.13	98.82	0.04	95.35	0.05	99.54	0.00	92.95	0.00	98.19	0.00	98.75	0.00	83.90	0.83	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3326559239
95.49	0.13	98.88	0.06	95.37	0.03	99.54	0.00	93.59	0.64	98.26	0.07	98.84	0.10	83.90	0.00	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1745443556
95.61	0.12	98.92	0.04	95.40	0.03	99.54	0.00	94.23	0.64	98.30	0.04	98.94	0.10	83.90	0.00	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.2005861113
95.72	0.12	98.96	0.04	95.42	0.03	99.54	0.00	94.87	0.64	98.34	0.04	99.04	0.10	83.90	0.00	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2546652799
95.84	0.12	98.99	0.04	95.45	0.03	99.54	0.00	95.51	0.64	98.37	0.04	99.13	0.10	83.90	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1307626916
95.96	0.12	99.03	0.04	95.48	0.03	99.54	0.00	96.15	0.64	98.41	0.04	99.23	0.10	83.90	0.00	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.560368655
96.08	0.12	99.07	0.04	95.50	0.03	99.54	0.00	96.79	0.64	98.45	0.04	99.33	0.10	83.90	0.00	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.530422397
96.19	0.11	99.09	0.02	95.53	0.03	99.54	0.00	96.79	0.00	98.45	0.00	99.33	0.00	84.63	0.73	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2535365189
96.29	0.10	99.09	0.00	95.55	0.03	100.00	0.46	96.79	0.00	98.45	0.00	99.42	0.10	84.74	0.10	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.4025138872
96.38	0.09	99.09	0.00	95.58	0.03	100.00	0.00	96.79	0.00	98.45	0.00	99.42	0.00	85.31	0.57	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.134980841
96.46	0.08	99.09	0.00	95.58	0.00	100.00	0.00	96.79	0.00	98.45	0.00	99.42	0.00	85.88	0.57	/workspace/coverage/default/45.sysrst_ctrl_stress_all.3551533138
96.52	0.06	99.09	0.00	95.58	0.00	100.00	0.00	96.79	0.00	98.45	0.00	99.42	0.00	86.29	0.42	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1757485402
96.57	0.06	99.12	0.04	95.60	0.03	100.00	0.00	96.79	0.00	98.52	0.07	99.42	0.00	86.55	0.26	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1164707178
96.63	0.05	99.14	0.02	95.60	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	86.92	0.36	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1550912445
96.68	0.05	99.14	0.00	95.93	0.33	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	86.97	0.05	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.272836529
96.73	0.05	99.14	0.00	96.26	0.33	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	86.97	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1750348128
96.77	0.04	99.14	0.00	96.28	0.03	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	87.23	0.26	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3640188218
96.81	0.04	99.14	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	87.49	0.26	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2642277498
96.84	0.03	99.14	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.52	0.10	87.59	0.10	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.450250823
96.86	0.03	99.16	0.02	96.31	0.03	100.00	0.00	96.79	0.00	98.52	0.00	99.52	0.00	87.75	0.16	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1069563912
96.89	0.02	99.18	0.02	96.31	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.52	0.00	87.90	0.16	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1974676021
96.91	0.02	99.23	0.06	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.11	99.52	0.00	87.90	0.00	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3690375621
96.94	0.02	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.06	0.16	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2225053276
96.96	0.02	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.21	0.16	/workspace/coverage/default/5.sysrst_ctrl_stress_all.1607561651
96.98	0.02	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.37	0.16	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1599503534
96.99	0.01	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.47	0.10	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.599507919
97.01	0.01	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.58	0.10	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3753109471
97.02	0.01	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.68	0.10	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3372651052
97.04	0.01	99.23	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.79	0.10	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1473587130
97.05	0.01	99.23	0.00	96.33	0.03	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.84	0.05	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4187935356
97.06	0.01	99.23	0.00	96.36	0.03	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.89	0.05	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1928702598
97.07	0.01	99.25	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	88.94	0.05	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4103648177
97.08	0.01	99.27	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.67	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3644631863
97.09	0.01	99.29	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.71	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.1459168379
97.10	0.01	99.31	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.74	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2672197767
97.10	0.01	99.33	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3370362889
97.11	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	88.99	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.798774120
97.12	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.04	0.05	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3126602514
97.13	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.10	0.05	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.3514318664
97.13	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.15	0.05	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.4214856581
97.14	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.20	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2021985263
97.15	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.25	0.05	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3439539591
97.16	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.30	0.05	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2960770290
97.16	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.36	0.05	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1583600030
97.17	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.41	0.05	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2073291437
97.18	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.46	0.05	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1051024947
97.18	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.51	0.05	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.816550181
97.19	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.56	0.05	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2450090575
97.20	0.01	99.33	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.62	0.05	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2288355023
97.20	0.01	99.33	0.00	96.39	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.62	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2197791742

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2769361433
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.780697141
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2145718398
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1060759199
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1197404812
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.4065625538
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.395910529
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.555756455
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3857250115
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.859877176
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3071957356
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1682204678
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.517960956
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.256265181
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.472584295
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.35671384
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1389204978
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2961645314
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1869006656
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3685243778
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2672974180
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4160125781
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2422060711
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3207051442
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1065067295
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3180102317
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3589045085
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1133954548
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3025212352
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3529161535
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3389281619
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2719414626
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3191712405
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.671966916
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1141723991
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/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3526160695
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1221332077
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2196187971
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3024604651
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.210078177
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.722343034
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2809562104
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2607468556
/workspace/coverage/default/39.sysrst_ctrl_smoke.485551061
/workspace/coverage/default/39.sysrst_ctrl_stress_all.215691384
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.678966441
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2308819536
/workspace/coverage/default/4.sysrst_ctrl_alert_test.4254091878
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.4074700198
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.12545406
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1621289272
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3188966335
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3470543684
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3471979455
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1772447131
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3571982201
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.820343236
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2380533221
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3759786294
/workspace/coverage/default/4.sysrst_ctrl_smoke.2977601394
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3114422889
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3727446453
/workspace/coverage/default/40.sysrst_ctrl_alert_test.142781535
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.226381168
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1951674090
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1298966899
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2240376166
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3697531532
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.4255256209
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.893707564
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1355642739
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3757870172
/workspace/coverage/default/40.sysrst_ctrl_smoke.1705798069
/workspace/coverage/default/40.sysrst_ctrl_stress_all.124765913
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2844356621
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4159872391
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1140023341
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2643338212
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4289337963
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2908485709
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1522603537
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.6843162
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.924143719
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1311835250
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2545182487
/workspace/coverage/default/41.sysrst_ctrl_smoke.3649484543
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3699582143
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3564588250
/workspace/coverage/default/42.sysrst_ctrl_alert_test.213588642
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2135850663
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2877333553
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2118740115
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4192840022
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1601798582
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.763508431
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1224725526
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3193228945
/workspace/coverage/default/42.sysrst_ctrl_smoke.201997454
/workspace/coverage/default/42.sysrst_ctrl_stress_all.642693581
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4213162944
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1329565478
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3751118959
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2955670031
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.61819294
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.575413184
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3453318273
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2824400304
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3089353595
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3995952153
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3413163532
/workspace/coverage/default/43.sysrst_ctrl_smoke.3460381945
/workspace/coverage/default/43.sysrst_ctrl_stress_all.448809333
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4040688301
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3920224909
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2417045043
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3752957664
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1360141153
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.730439527
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2056122681
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3558327732
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2849200181
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2865097261
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.474611509
/workspace/coverage/default/44.sysrst_ctrl_smoke.912358997
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1456059555
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3531269492
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3210190612
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3581020971
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3705020713
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.624557139
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4081275326
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.792084105
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3305684594
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1131823526
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.591474617
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2374612856
/workspace/coverage/default/45.sysrst_ctrl_smoke.1171809402
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2207424548
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1012077551
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3783021765
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2543082837
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1486700025
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.903271023
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1365667210
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4002423933
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.975555867
/workspace/coverage/default/46.sysrst_ctrl_smoke.2130199130
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3811106500
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3809447408
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.173671594
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1189844354
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1731870984
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2641561985
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.323724150
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2259639025
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3589554275
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3088496118
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3117481199
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.10826364
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.649961855
/workspace/coverage/default/47.sysrst_ctrl_smoke.4198671978
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2048162162
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3044240297
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.505090254
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1522052855
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1178989019
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3173980717
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.736568766
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.635633483
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1498869982
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2383989437
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2303442638
/workspace/coverage/default/48.sysrst_ctrl_smoke.890066030
/workspace/coverage/default/48.sysrst_ctrl_stress_all.633537966
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1581508734
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.909369448
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3614048111
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.724909957
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3563930862
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2557203541
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.13597173
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2893433677
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4105394138
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1578262735
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3973591229
/workspace/coverage/default/49.sysrst_ctrl_smoke.1291371066
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3975112445
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3570564146
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3056332223
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1914371224
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.894077450
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1624804182
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4117975842
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.369453390
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3287772188
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2699633125
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.836926499
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4019792113
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.365404040
/workspace/coverage/default/5.sysrst_ctrl_smoke.2768737065
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.355070776
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2483892685
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.887107590
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3853460242
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2277360269
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.393365016
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2209461014
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2035040213
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1164049844
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2662944046
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1858290143
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4239134256
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1444598518
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2106029841
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3238932044
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.87855455
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4285751612
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.786403249
/workspace/coverage/default/6.sysrst_ctrl_smoke.389380074
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2457393871
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1215628408
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.4207477800
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1082811119
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1332413084
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3048467429
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3544924726
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4258769
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1854465675
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.628053187
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2084216978
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.265611808
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2562378888
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3643236668
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4130139880
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3698652667
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1625455010
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3311367767
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2547954082
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2900908749
/workspace/coverage/default/7.sysrst_ctrl_smoke.1529825141
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3183043824
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2929294582
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1912566597
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3518980384
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.933473565
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1171084096
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.489350497
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1478304042
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1257554700
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1756593851
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1013411086
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.218830900
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2195196315
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3065272106
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.670191866
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1202042799
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1316003220
/workspace/coverage/default/8.sysrst_ctrl_smoke.2522002452
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2749723908
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2378135562
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1797376619
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3101660495
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1293121727
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3098488007
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2323277711
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3445619918
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1316862745
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4267729193
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3546676343
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3090230283
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3415667943
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.598696365
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1430051689
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2391888261
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2877439842
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4241996090
/workspace/coverage/default/9.sysrst_ctrl_smoke.3057340921
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3721013329
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3821824546
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.154582967
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.738971813
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1317020684
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2196116556
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1106711876
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.4062216920
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3524983984

Total test records in report: 908

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2507319944	Aug 11 06:14:45 PM PDT 24	Aug 11 06:14:49 PM PDT 24	2615730825 ps
T5	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2929309969	Aug 11 06:16:13 PM PDT 24	Aug 11 06:16:40 PM PDT 24	41315222711 ps
T6	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3499276944	Aug 11 06:16:15 PM PDT 24	Aug 11 06:16:22 PM PDT 24	2221526095 ps
T22	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1316003220	Aug 11 06:15:03 PM PDT 24	Aug 11 06:15:05 PM PDT 24	2636480973 ps
T1	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3585132925	Aug 11 06:15:26 PM PDT 24	Aug 11 06:16:32 PM PDT 24	663209619062 ps
T14	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.1672585235	Aug 11 06:15:43 PM PDT 24	Aug 11 06:15:47 PM PDT 24	3158632296 ps
T15	/workspace/coverage/default/3.sysrst_ctrl_smoke.1612999921	Aug 11 06:14:56 PM PDT 24	Aug 11 06:14:58 PM PDT 24	2133043885 ps
T2	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.849367304	Aug 11 06:16:45 PM PDT 24	Aug 11 06:22:56 PM PDT 24	144113702841 ps
T16	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3924091183	Aug 11 06:16:07 PM PDT 24	Aug 11 06:16:08 PM PDT 24	2632651725 ps
T17	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3333578844	Aug 11 06:15:42 PM PDT 24	Aug 11 06:15:46 PM PDT 24	2520901156 ps
T18	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1288009729	Aug 11 06:16:08 PM PDT 24	Aug 11 06:16:09 PM PDT 24	2753787506 ps
T19	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3975112445	Aug 11 06:16:49 PM PDT 24	Aug 11 06:17:24 PM PDT 24	14088669423 ps
T20	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2099644809	Aug 11 06:15:42 PM PDT 24	Aug 11 06:19:28 PM PDT 24	177818401680 ps
T21	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2473773559	Aug 11 06:15:42 PM PDT 24	Aug 11 06:15:49 PM PDT 24	2510286696 ps
T67	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1071059797	Aug 11 06:14:56 PM PDT 24	Aug 11 06:14:59 PM PDT 24	2186785623 ps
T26	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1549077105	Aug 11 06:14:46 PM PDT 24	Aug 11 06:15:28 PM PDT 24	31628930723 ps
T27	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3311367767	Aug 11 06:15:18 PM PDT 24	Aug 11 06:15:23 PM PDT 24	2459545890 ps
T54	/workspace/coverage/default/36.sysrst_ctrl_stress_all.2818010571	Aug 11 06:16:16 PM PDT 24	Aug 11 06:16:19 PM PDT 24	13686067831 ps
T55	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3640188218	Aug 11 06:15:58 PM PDT 24	Aug 11 06:16:00 PM PDT 24	2528283733 ps
T3	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.272836529	Aug 11 06:15:01 PM PDT 24	Aug 11 06:16:37 PM PDT 24	831183441452 ps
T46	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3972612147	Aug 11 06:14:59 PM PDT 24	Aug 11 06:15:04 PM PDT 24	3550161249 ps
T56	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4061671374	Aug 11 06:14:44 PM PDT 24	Aug 11 06:14:47 PM PDT 24	2537641395 ps
T30	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.624557139	Aug 11 06:16:35 PM PDT 24	Aug 11 06:17:47 PM PDT 24	27334157495 ps
T47	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3098488007	Aug 11 06:16:55 PM PDT 24	Aug 11 06:17:11 PM PDT 24	23851188990 ps
T7	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.656326825	Aug 11 06:15:53 PM PDT 24	Aug 11 06:15:56 PM PDT 24	3116778963 ps
T29	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3558327732	Aug 11 06:16:37 PM PDT 24	Aug 11 06:16:42 PM PDT 24	2615473322 ps
T122	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.837371062	Aug 11 06:15:56 PM PDT 24	Aug 11 06:16:04 PM PDT 24	2511619341 ps
T28	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2776541597	Aug 11 06:15:53 PM PDT 24	Aug 11 06:15:57 PM PDT 24	2461424654 ps
T123	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1844891977	Aug 11 06:15:19 PM PDT 24	Aug 11 06:15:21 PM PDT 24	2528103416 ps
T177	/workspace/coverage/default/29.sysrst_ctrl_alert_test.2953996601	Aug 11 06:16:12 PM PDT 24	Aug 11 06:16:18 PM PDT 24	2012212584 ps
T8	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3796287450	Aug 11 06:16:34 PM PDT 24	Aug 11 06:16:40 PM PDT 24	5090445167 ps
T59	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3106219086	Aug 11 06:15:12 PM PDT 24	Aug 11 06:15:15 PM PDT 24	6444045949 ps
T9	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2289917787	Aug 11 06:14:56 PM PDT 24	Aug 11 06:15:03 PM PDT 24	5171782662 ps
T60	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2428534655	Aug 11 06:15:39 PM PDT 24	Aug 11 06:15:46 PM PDT 24	4758061425 ps
T10	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1486700025	Aug 11 06:16:38 PM PDT 24	Aug 11 06:16:42 PM PDT 24	3014491828 ps
T179	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.464510890	Aug 11 06:16:05 PM PDT 24	Aug 11 06:16:08 PM PDT 24	2524705663 ps
T11	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2227630891	Aug 11 06:15:42 PM PDT 24	Aug 11 06:17:11 PM PDT 24	64025800959 ps
T12	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2474984181	Aug 11 06:16:12 PM PDT 24	Aug 11 06:16:33 PM PDT 24	1082548240045 ps
T104	/workspace/coverage/default/5.sysrst_ctrl_alert_test.1914371224	Aug 11 06:15:03 PM PDT 24	Aug 11 06:15:07 PM PDT 24	2010359590 ps
T48	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.599507919	Aug 11 06:14:44 PM PDT 24	Aug 11 06:14:47 PM PDT 24	3446162860 ps
T105	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.975555867	Aug 11 06:16:41 PM PDT 24	Aug 11 06:16:44 PM PDT 24	2536288916 ps
T106	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.730439527	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:37 PM PDT 24	4455913489 ps
T107	/workspace/coverage/default/44.sysrst_ctrl_smoke.912358997	Aug 11 06:16:35 PM PDT 24	Aug 11 06:16:37 PM PDT 24	2139333105 ps
T49	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.134980841	Aug 11 06:15:31 PM PDT 24	Aug 11 06:17:18 PM PDT 24	43306548241 ps
T13	/workspace/coverage/default/16.sysrst_ctrl_stress_all.1752236552	Aug 11 06:15:30 PM PDT 24	Aug 11 06:16:12 PM PDT 24	19334601322 ps
T108	/workspace/coverage/default/17.sysrst_ctrl_alert_test.3003367455	Aug 11 06:15:29 PM PDT 24	Aug 11 06:15:31 PM PDT 24	2034943332 ps
T236	/workspace/coverage/default/0.sysrst_ctrl_alert_test.981673931	Aug 11 06:14:41 PM PDT 24	Aug 11 06:14:47 PM PDT 24	2009950357 ps
T237	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2345382396	Aug 11 06:14:56 PM PDT 24	Aug 11 06:14:57 PM PDT 24	3510535688 ps
T238	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1323466378	Aug 11 06:15:19 PM PDT 24	Aug 11 06:15:21 PM PDT 24	3557383836 ps
T61	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3531269492	Aug 11 06:16:31 PM PDT 24	Aug 11 06:16:37 PM PDT 24	6653732079 ps
T32	/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3705020713	Aug 11 06:16:31 PM PDT 24	Aug 11 06:18:14 PM PDT 24	76509312366 ps
T43	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2764006040	Aug 11 06:16:15 PM PDT 24	Aug 11 06:16:21 PM PDT 24	2420643572 ps
T156	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3088496118	Aug 11 06:16:41 PM PDT 24	Aug 11 06:16:43 PM PDT 24	2633223984 ps
T34	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3445619918	Aug 11 06:16:53 PM PDT 24	Aug 11 06:17:35 PM PDT 24	64470532913 ps
T50	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4182097990	Aug 11 06:14:42 PM PDT 24	Aug 11 06:14:45 PM PDT 24	2331861584 ps
T58	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2010809939	Aug 11 06:16:18 PM PDT 24	Aug 11 06:16:20 PM PDT 24	6313374269 ps
T142	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2567011527	Aug 11 06:16:11 PM PDT 24	Aug 11 06:16:13 PM PDT 24	2088303284 ps
T143	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3888676939	Aug 11 06:16:15 PM PDT 24	Aug 11 06:16:17 PM PDT 24	2523765672 ps
T42	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3697531532	Aug 11 06:16:28 PM PDT 24	Aug 11 06:16:34 PM PDT 24	2819844700 ps
T35	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1858290143	Aug 11 06:14:59 PM PDT 24	Aug 11 06:15:38 PM PDT 24	114859167457 ps
T144	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3564588250	Aug 11 06:16:27 PM PDT 24	Aug 11 06:16:29 PM PDT 24	4630846548 ps
T145	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1057491093	Aug 11 06:14:45 PM PDT 24	Aug 11 06:14:47 PM PDT 24	2673611244 ps
T62	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2163727648	Aug 11 06:16:04 PM PDT 24	Aug 11 06:16:11 PM PDT 24	2467161662 ps
T51	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3125237971	Aug 11 06:16:09 PM PDT 24	Aug 11 06:16:11 PM PDT 24	3212955324 ps
T52	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1854465675	Aug 11 06:16:50 PM PDT 24	Aug 11 06:17:26 PM PDT 24	27338333412 ps
T385	/workspace/coverage/default/23.sysrst_ctrl_smoke.1792557417	Aug 11 06:15:43 PM PDT 24	Aug 11 06:15:49 PM PDT 24	2108799387 ps
T40	/workspace/coverage/default/18.sysrst_ctrl_stress_all.1705668026	Aug 11 06:15:33 PM PDT 24	Aug 11 06:15:54 PM PDT 24	90115219971 ps
T72	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4080094932	Aug 11 06:15:32 PM PDT 24	Aug 11 06:15:36 PM PDT 24	3133197728 ps
T33	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.180065494	Aug 11 06:15:03 PM PDT 24	Aug 11 06:15:28 PM PDT 24	38112826111 ps
T86	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1624804182	Aug 11 06:15:01 PM PDT 24	Aug 11 06:16:27 PM PDT 24	165385700257 ps
T135	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.202104688	Aug 11 06:15:50 PM PDT 24	Aug 11 06:15:56 PM PDT 24	4099677700 ps
T136	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2932351835	Aug 11 06:15:49 PM PDT 24	Aug 11 06:15:51 PM PDT 24	2635986188 ps
T53	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3695073836	Aug 11 06:15:06 PM PDT 24	Aug 11 06:15:10 PM PDT 24	3246625439 ps
T137	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1972895420	Aug 11 06:15:29 PM PDT 24	Aug 11 06:36:49 PM PDT 24	472279925300 ps
T63	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2466411809	Aug 11 06:15:20 PM PDT 24	Aug 11 06:15:22 PM PDT 24	2473340389 ps
T138	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1138339723	Aug 11 06:16:06 PM PDT 24	Aug 11 06:16:12 PM PDT 24	2246706220 ps
T39	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1307626916	Aug 11 06:15:38 PM PDT 24	Aug 11 06:18:27 PM PDT 24	473925102223 ps
T118	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.4070493041	Aug 11 06:14:58 PM PDT 24	Aug 11 06:15:04 PM PDT 24	2421385566 ps
T119	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.4259112860	Aug 11 06:15:36 PM PDT 24	Aug 11 06:16:25 PM PDT 24	78927431808 ps
T120	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.3595679203	Aug 11 06:16:03 PM PDT 24	Aug 11 06:17:30 PM PDT 24	69063551388 ps
T87	/workspace/coverage/default/37.sysrst_ctrl_stress_all.4235644664	Aug 11 06:16:18 PM PDT 24	Aug 11 06:16:40 PM PDT 24	8015440032 ps
T64	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.924143719	Aug 11 06:16:26 PM PDT 24	Aug 11 06:16:28 PM PDT 24	2466248858 ps
T45	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.792084105	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:36 PM PDT 24	3258178492 ps
T36	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1332413084	Aug 11 06:16:54 PM PDT 24	Aug 11 06:18:52 PM PDT 24	88022377714 ps
T232	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3356708835	Aug 11 06:15:48 PM PDT 24	Aug 11 06:15:54 PM PDT 24	2147583245 ps
T233	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.4188517923	Aug 11 06:14:59 PM PDT 24	Aug 11 06:16:40 PM PDT 24	525863353581 ps
T68	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.828945618	Aug 11 06:14:56 PM PDT 24	Aug 11 06:14:59 PM PDT 24	2519646908 ps
T386	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1625455010	Aug 11 06:15:01 PM PDT 24	Aug 11 06:15:04 PM PDT 24	2633587626 ps
T69	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1478304042	Aug 11 06:16:59 PM PDT 24	Aug 11 06:17:39 PM PDT 24	56067879063 ps
T387	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1976938146	Aug 11 06:15:47 PM PDT 24	Aug 11 06:15:51 PM PDT 24	2518801294 ps
T388	/workspace/coverage/default/4.sysrst_ctrl_smoke.2977601394	Aug 11 06:14:53 PM PDT 24	Aug 11 06:14:57 PM PDT 24	2120394212 ps
T44	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1164707178	Aug 11 06:15:57 PM PDT 24	Aug 11 06:16:53 PM PDT 24	23321281452 ps
T303	/workspace/coverage/default/47.sysrst_ctrl_alert_test.1189844354	Aug 11 06:16:48 PM PDT 24	Aug 11 06:16:53 PM PDT 24	2017895242 ps
T304	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1430051689	Aug 11 06:15:11 PM PDT 24	Aug 11 06:15:18 PM PDT 24	2612350076 ps
T41	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1946613607	Aug 11 06:16:14 PM PDT 24	Aug 11 06:16:21 PM PDT 24	2722294026 ps
T160	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.601891473	Aug 11 06:16:11 PM PDT 24	Aug 11 06:16:15 PM PDT 24	2517536693 ps
T161	/workspace/coverage/default/18.sysrst_ctrl_smoke.1288804282	Aug 11 06:15:26 PM PDT 24	Aug 11 06:15:32 PM PDT 24	2109635317 ps
T162	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.247496388	Aug 11 06:15:47 PM PDT 24	Aug 11 06:15:53 PM PDT 24	2221345302 ps
T163	/workspace/coverage/default/28.sysrst_ctrl_stress_all.2100709516	Aug 11 06:15:54 PM PDT 24	Aug 11 06:16:08 PM PDT 24	6588754948 ps
T73	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3345742349	Aug 11 06:16:03 PM PDT 24	Aug 11 06:16:05 PM PDT 24	4952204614 ps
T164	/workspace/coverage/default/30.sysrst_ctrl_alert_test.346019591	Aug 11 06:16:03 PM PDT 24	Aug 11 06:16:09 PM PDT 24	2014329211 ps
T165	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4081275326	Aug 11 06:16:34 PM PDT 24	Aug 11 06:16:41 PM PDT 24	2795559852 ps
T166	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.77349440	Aug 11 06:15:12 PM PDT 24	Aug 11 06:15:19 PM PDT 24	2610836765 ps
T88	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1178989019	Aug 11 06:16:49 PM PDT 24	Aug 11 06:16:52 PM PDT 24	3596980085 ps
T70	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2434162570	Aug 11 06:16:53 PM PDT 24	Aug 11 06:22:03 PM PDT 24	113431129328 ps
T153	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.4145512455	Aug 11 06:15:03 PM PDT 24	Aug 11 06:15:07 PM PDT 24	3915232609 ps
T89	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.1748236601	Aug 11 06:15:05 PM PDT 24	Aug 11 06:15:08 PM PDT 24	3523859705 ps
T389	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2592197777	Aug 11 06:16:09 PM PDT 24	Aug 11 06:16:11 PM PDT 24	3330430332 ps
T121	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3049671472	Aug 11 06:15:39 PM PDT 24	Aug 11 06:15:41 PM PDT 24	2786984899 ps
T74	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.909369448	Aug 11 06:16:48 PM PDT 24	Aug 11 06:16:51 PM PDT 24	8764080124 ps
T390	/workspace/coverage/default/19.sysrst_ctrl_alert_test.2259826034	Aug 11 06:15:35 PM PDT 24	Aug 11 06:15:37 PM PDT 24	2039204091 ps
T37	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3442616593	Aug 11 06:15:26 PM PDT 24	Aug 11 06:16:29 PM PDT 24	98986525174 ps
T38	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1055538675	Aug 11 06:15:23 PM PDT 24	Aug 11 06:18:20 PM PDT 24	147243889759 ps
T391	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2196187971	Aug 11 06:16:20 PM PDT 24	Aug 11 06:16:29 PM PDT 24	3295400847 ps
T392	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.210078177	Aug 11 06:16:19 PM PDT 24	Aug 11 06:16:26 PM PDT 24	2611194381 ps
T202	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1397266564	Aug 11 06:15:56 PM PDT 24	Aug 11 06:16:00 PM PDT 24	4336220986 ps
T393	/workspace/coverage/default/6.sysrst_ctrl_alert_test.1164049844	Aug 11 06:15:11 PM PDT 24	Aug 11 06:15:13 PM PDT 24	2048057257 ps
T71	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2197791742	Aug 11 06:14:45 PM PDT 24	Aug 11 06:15:07 PM PDT 24	34987085840 ps
T394	/workspace/coverage/default/14.sysrst_ctrl_stress_all.493422812	Aug 11 06:15:22 PM PDT 24	Aug 11 06:15:27 PM PDT 24	14890007488 ps
T242	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2960770290	Aug 11 06:15:28 PM PDT 24	Aug 11 06:18:09 PM PDT 24	58212946338 ps
T395	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4192840022	Aug 11 06:16:29 PM PDT 24	Aug 11 06:16:34 PM PDT 24	3367398215 ps
T396	/workspace/coverage/default/48.sysrst_ctrl_alert_test.1522052855	Aug 11 06:16:45 PM PDT 24	Aug 11 06:16:47 PM PDT 24	2028456375 ps
T90	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1171084096	Aug 11 06:16:51 PM PDT 24	Aug 11 06:17:35 PM PDT 24	69203744644 ps
T397	/workspace/coverage/default/20.sysrst_ctrl_alert_test.3440935180	Aug 11 06:15:34 PM PDT 24	Aug 11 06:15:35 PM PDT 24	2027041797 ps
T398	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3995952153	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:39 PM PDT 24	2076125487 ps
T399	/workspace/coverage/default/14.sysrst_ctrl_smoke.4076665101	Aug 11 06:15:21 PM PDT 24	Aug 11 06:15:27 PM PDT 24	2111245344 ps
T65	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1516540300	Aug 11 06:16:21 PM PDT 24	Aug 11 06:16:24 PM PDT 24	2464971233 ps
T168	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3471979455	Aug 11 06:15:00 PM PDT 24	Aug 11 06:15:03 PM PDT 24	2582692410 ps
T400	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1224725526	Aug 11 06:16:28 PM PDT 24	Aug 11 06:16:32 PM PDT 24	2104504875 ps
T401	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1013162920	Aug 11 06:16:08 PM PDT 24	Aug 11 06:16:10 PM PDT 24	2631131735 ps
T379	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3531243163	Aug 11 06:14:59 PM PDT 24	Aug 11 06:19:46 PM PDT 24	277607601472 ps
T402	/workspace/coverage/default/25.sysrst_ctrl_smoke.811081445	Aug 11 06:15:45 PM PDT 24	Aug 11 06:15:47 PM PDT 24	2131117715 ps
T403	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3593527211	Aug 11 06:16:16 PM PDT 24	Aug 11 06:16:24 PM PDT 24	2893656275 ps
T248	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4130139880	Aug 11 06:15:05 PM PDT 24	Aug 11 06:15:58 PM PDT 24	85149282979 ps
T91	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.218830900	Aug 11 06:15:01 PM PDT 24	Aug 11 06:16:29 PM PDT 24	96461190378 ps
T243	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3392677026	Aug 11 06:15:39 PM PDT 24	Aug 11 06:19:46 PM PDT 24	92797922395 ps
T404	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1950353567	Aug 11 06:16:18 PM PDT 24	Aug 11 06:16:20 PM PDT 24	2542223935 ps
T92	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1082811119	Aug 11 06:16:54 PM PDT 24	Aug 11 06:17:53 PM PDT 24	92017429872 ps
T405	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2993810264	Aug 11 06:15:52 PM PDT 24	Aug 11 06:15:55 PM PDT 24	2631951657 ps
T295	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3746158001	Aug 11 06:15:11 PM PDT 24	Aug 11 06:15:14 PM PDT 24	2526799772 ps
T124	/workspace/coverage/default/48.sysrst_ctrl_stress_all.633537966	Aug 11 06:16:47 PM PDT 24	Aug 11 06:19:13 PM PDT 24	147786474552 ps
T244	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.933473565	Aug 11 06:17:00 PM PDT 24	Aug 11 06:18:46 PM PDT 24	45446577784 ps
T380	/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1475324754	Aug 11 06:15:15 PM PDT 24	Aug 11 06:27:03 PM PDT 24	1205783134531 ps
T93	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4103648177	Aug 11 06:16:43 PM PDT 24	Aug 11 06:19:00 PM PDT 24	51286902384 ps
T84	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2893120325	Aug 11 06:15:35 PM PDT 24	Aug 11 06:15:40 PM PDT 24	3834811342 ps
T406	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4019792113	Aug 11 06:15:01 PM PDT 24	Aug 11 06:15:03 PM PDT 24	2131457379 ps
T407	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2908485709	Aug 11 06:16:28 PM PDT 24	Aug 11 06:16:33 PM PDT 24	4873121643 ps
T241	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1974676021	Aug 11 06:16:50 PM PDT 24	Aug 11 06:18:56 PM PDT 24	100921762738 ps
T66	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3699582143	Aug 11 06:16:34 PM PDT 24	Aug 11 06:19:02 PM PDT 24	54328498586 ps
T408	/workspace/coverage/default/0.sysrst_ctrl_smoke.3129267485	Aug 11 06:14:44 PM PDT 24	Aug 11 06:14:46 PM PDT 24	2135819935 ps
T85	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.4056388842	Aug 11 06:15:41 PM PDT 24	Aug 11 06:15:48 PM PDT 24	6969194045 ps
T287	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2928540107	Aug 11 06:14:56 PM PDT 24	Aug 11 06:15:39 PM PDT 24	20382026078 ps
T409	/workspace/coverage/default/9.sysrst_ctrl_smoke.3057340921	Aug 11 06:15:12 PM PDT 24	Aug 11 06:15:14 PM PDT 24	2128904058 ps
T410	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.369475654	Aug 11 06:15:30 PM PDT 24	Aug 11 06:15:36 PM PDT 24	2215882137 ps
T411	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3431816290	Aug 11 06:15:06 PM PDT 24	Aug 11 06:15:09 PM PDT 24	3577265060 ps
T412	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2849200181	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:37 PM PDT 24	2458799248 ps
T413	/workspace/coverage/default/35.sysrst_ctrl_alert_test.2201132102	Aug 11 06:16:16 PM PDT 24	Aug 11 06:16:22 PM PDT 24	2012322306 ps
T414	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3941623279	Aug 11 06:15:39 PM PDT 24	Aug 11 06:15:41 PM PDT 24	2217535829 ps
T245	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2084216978	Aug 11 06:17:00 PM PDT 24	Aug 11 06:18:25 PM PDT 24	69196084930 ps
T415	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.47701507	Aug 11 06:15:39 PM PDT 24	Aug 11 06:15:47 PM PDT 24	2609831317 ps
T148	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3287772188	Aug 11 06:14:59 PM PDT 24	Aug 11 06:19:59 PM PDT 24	336122493941 ps
T416	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1609498264	Aug 11 06:15:29 PM PDT 24	Aug 11 06:15:36 PM PDT 24	2468270746 ps
T417	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1068104779	Aug 11 06:14:51 PM PDT 24	Aug 11 06:14:57 PM PDT 24	2510815587 ps
T418	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.80457900	Aug 11 06:15:43 PM PDT 24	Aug 11 06:15:49 PM PDT 24	2034766426 ps
T125	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1468920421	Aug 11 06:16:30 PM PDT 24	Aug 11 06:17:55 PM PDT 24	236723209451 ps
T419	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.829436160	Aug 11 06:15:44 PM PDT 24	Aug 11 06:15:47 PM PDT 24	2630556147 ps
T420	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.820343236	Aug 11 06:14:58 PM PDT 24	Aug 11 06:15:02 PM PDT 24	2187069918 ps
T94	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4289337963	Aug 11 06:16:28 PM PDT 24	Aug 11 06:17:19 PM PDT 24	75238552269 ps
T421	/workspace/coverage/default/4.sysrst_ctrl_alert_test.4254091878	Aug 11 06:15:01 PM PDT 24	Aug 11 06:15:07 PM PDT 24	2012742141 ps
T262	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3759786294	Aug 11 06:15:00 PM PDT 24	Aug 11 06:15:27 PM PDT 24	42159012844 ps
T283	/workspace/coverage/default/19.sysrst_ctrl_smoke.1488958310	Aug 11 06:15:34 PM PDT 24	Aug 11 06:15:38 PM PDT 24	2120452494 ps
T284	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.355070776	Aug 11 06:15:04 PM PDT 24	Aug 11 06:15:06 PM PDT 24	6428191848 ps
T285	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.321770478	Aug 11 06:15:12 PM PDT 24	Aug 11 06:15:18 PM PDT 24	4063871900 ps
T126	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.430553755	Aug 11 06:16:02 PM PDT 24	Aug 11 06:16:05 PM PDT 24	5812520507 ps
T127	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2181399916	Aug 11 06:15:25 PM PDT 24	Aug 11 06:15:32 PM PDT 24	5340654462 ps
T149	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.802761344	Aug 11 06:16:46 PM PDT 24	Aug 11 06:16:50 PM PDT 24	6037800885 ps
T286	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2700718946	Aug 11 06:14:49 PM PDT 24	Aug 11 06:14:55 PM PDT 24	2228484034 ps
T139	/workspace/coverage/default/46.sysrst_ctrl_stress_all.3811106500	Aug 11 06:16:43 PM PDT 24	Aug 11 06:22:52 PM PDT 24	898452827851 ps
T82	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2546652799	Aug 11 06:15:28 PM PDT 24	Aug 11 06:15:35 PM PDT 24	3059514457 ps
T422	/workspace/coverage/default/43.sysrst_ctrl_stress_all.448809333	Aug 11 06:16:35 PM PDT 24	Aug 11 06:17:14 PM PDT 24	14450789706 ps
T329	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2535365189	Aug 11 06:16:30 PM PDT 24	Aug 11 06:17:50 PM PDT 24	105255936747 ps
T253	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.689291660	Aug 11 06:16:23 PM PDT 24	Aug 11 06:16:59 PM PDT 24	59266103338 ps
T423	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3188966335	Aug 11 06:14:53 PM PDT 24	Aug 11 06:14:54 PM PDT 24	2362130589 ps
T81	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2225053276	Aug 11 06:16:23 PM PDT 24	Aug 11 06:18:02 PM PDT 24	69423262247 ps
T424	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.763508431	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:40 PM PDT 24	2452143544 ps
T292	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3163337949	Aug 11 06:16:08 PM PDT 24	Aug 11 06:16:15 PM PDT 24	2458839315 ps
T362	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2277360269	Aug 11 06:16:46 PM PDT 24	Aug 11 06:17:46 PM PDT 24	80883708213 ps
T266	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2844356621	Aug 11 06:16:27 PM PDT 24	Aug 11 06:17:09 PM PDT 24	15525473791 ps
T224	/workspace/coverage/default/25.sysrst_ctrl_stress_all.2901608826	Aug 11 06:15:46 PM PDT 24	Aug 11 06:16:15 PM PDT 24	11300430394 ps
T128	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.38922631	Aug 11 06:15:19 PM PDT 24	Aug 11 06:15:29 PM PDT 24	3224283962 ps
T83	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2929294582	Aug 11 06:15:04 PM PDT 24	Aug 11 06:15:37 PM PDT 24	51313803275 ps
T425	/workspace/coverage/default/6.sysrst_ctrl_smoke.389380074	Aug 11 06:15:02 PM PDT 24	Aug 11 06:15:04 PM PDT 24	2138638976 ps
T426	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2937065043	Aug 11 06:14:45 PM PDT 24	Aug 11 06:15:12 PM PDT 24	41837357767 ps
T348	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3750298657	Aug 11 06:16:10 PM PDT 24	Aug 11 06:18:01 PM PDT 24	46119677301 ps
T427	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3524983984	Aug 11 06:17:00 PM PDT 24	Aug 11 06:18:57 PM PDT 24	195370480115 ps
T176	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1504671565	Aug 11 06:15:12 PM PDT 24	Aug 11 06:15:18 PM PDT 24	25059745970 ps
T95	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3783021765	Aug 11 06:16:40 PM PDT 24	Aug 11 06:20:52 PM PDT 24	90936335304 ps
T367	/workspace/coverage/default/26.sysrst_ctrl_stress_all.829946647	Aug 11 06:15:49 PM PDT 24	Aug 11 06:20:06 PM PDT 24	177966102016 ps
T350	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2073291437	Aug 11 06:15:48 PM PDT 24	Aug 11 06:17:37 PM PDT 24	89021803006 ps
T328	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1550912445	Aug 11 06:16:41 PM PDT 24	Aug 11 06:22:23 PM PDT 24	128430151301 ps
T428	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1635469017	Aug 11 06:14:58 PM PDT 24	Aug 11 06:15:00 PM PDT 24	2433414151 ps
T429	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2303442638	Aug 11 06:16:50 PM PDT 24	Aug 11 06:16:54 PM PDT 24	2517111203 ps
T430	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3219277854	Aug 11 06:15:36 PM PDT 24	Aug 11 06:15:40 PM PDT 24	2452791391 ps
T327	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3887647184	Aug 11 06:16:09 PM PDT 24	Aug 11 06:19:15 PM PDT 24	130199738968 ps
T381	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3727446453	Aug 11 06:15:01 PM PDT 24	Aug 11 06:17:32 PM PDT 24	358073510047 ps
T383	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.39960385	Aug 11 06:16:16 PM PDT 24	Aug 11 06:17:08 PM PDT 24	22515355703 ps
T296	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.786403249	Aug 11 06:15:02 PM PDT 24	Aug 11 06:15:04 PM PDT 24	2542921826 ps
T431	/workspace/coverage/default/10.sysrst_ctrl_alert_test.241581958	Aug 11 06:15:13 PM PDT 24	Aug 11 06:15:15 PM PDT 24	2026295490 ps
T432	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2907864569	Aug 11 06:14:56 PM PDT 24	Aug 11 06:15:01 PM PDT 24	2483200337 ps
T75	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1069563912	Aug 11 06:15:44 PM PDT 24	Aug 11 06:17:16 PM PDT 24	34606871659 ps
T433	/workspace/coverage/default/5.sysrst_ctrl_smoke.2768737065	Aug 11 06:15:03 PM PDT 24	Aug 11 06:15:07 PM PDT 24	2120159565 ps
T434	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.289059504	Aug 11 06:16:05 PM PDT 24	Aug 11 06:16:09 PM PDT 24	2515328348 ps
T435	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2310584495	Aug 11 06:15:13 PM PDT 24	Aug 11 06:15:15 PM PDT 24	2498394925 ps
T436	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1374499833	Aug 11 06:15:23 PM PDT 24	Aug 11 06:15:25 PM PDT 24	2475679273 ps
T297	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2380533221	Aug 11 06:14:59 PM PDT 24	Aug 11 06:15:06 PM PDT 24	2512671582 ps
T437	/workspace/coverage/default/11.sysrst_ctrl_stress_all.3480908559	Aug 11 06:15:13 PM PDT 24	Aug 11 06:15:33 PM PDT 24	7031094439 ps
T146	/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2308819536	Aug 11 06:16:18 PM PDT 24	Aug 11 06:16:22 PM PDT 24	8433679577 ps
T298	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2891461562	Aug 11 06:15:18 PM PDT 24	Aug 11 06:15:21 PM PDT 24	2519397385 ps
T438	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2195196315	Aug 11 06:15:17 PM PDT 24	Aug 11 06:15:26 PM PDT 24	3242323902 ps
T247	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2483892685	Aug 11 06:16:48 PM PDT 24	Aug 11 06:17:06 PM PDT 24	25362650785 ps
T289	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2076825264	Aug 11 06:15:01 PM PDT 24	Aug 11 06:15:10 PM PDT 24	3462966114 ps
T326	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3563930862	Aug 11 06:16:50 PM PDT 24	Aug 11 06:21:14 PM PDT 24	147320255283 ps
T96	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3605215827	Aug 11 06:16:17 PM PDT 24	Aug 11 06:16:50 PM PDT 24	51318145938 ps
T439	/workspace/coverage/default/13.sysrst_ctrl_alert_test.735349901	Aug 11 06:15:13 PM PDT 24	Aug 11 06:15:15 PM PDT 24	2032521938 ps
T440	/workspace/coverage/default/44.sysrst_ctrl_alert_test.3920224909	Aug 11 06:16:33 PM PDT 24	Aug 11 06:16:36 PM PDT 24	2023679633 ps
T263	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2641776736	Aug 11 06:14:55 PM PDT 24	Aug 11 06:15:22 PM PDT 24	42101638685 ps
T333	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3326559239	Aug 11 06:15:01 PM PDT 24	Aug 11 06:16:09 PM PDT 24	52281015637 ps
T441	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3742984751	Aug 11 06:16:07 PM PDT 24	Aug 11 06:16:15 PM PDT 24	2507705999 ps
T288	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3337193543	Aug 11 06:15:42 PM PDT 24	Aug 11 06:18:32 PM PDT 24	65148772734 ps
T442	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.13597173	Aug 11 06:16:44 PM PDT 24	Aug 11 06:16:56 PM PDT 24	4256812327 ps
T154	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.736568766	Aug 11 06:16:46 PM PDT 24	Aug 11 06:16:50 PM PDT 24	3418623406 ps
T155	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1522603537	Aug 11 06:16:32 PM PDT 24	Aug 11 06:16:45 PM PDT 24	4806892515 ps
T443	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3643236668	Aug 11 06:15:04 PM PDT 24	Aug 11 06:15:09 PM PDT 24	3618976194 ps
T444	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2543082837	Aug 11 06:16:38 PM PDT 24	Aug 11 06:16:40 PM PDT 24	3618909816 ps
T445	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3305162080	Aug 11 06:15:57 PM PDT 24	Aug 11 06:16:03 PM PDT 24	2460409197 ps
T331	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2535911660	Aug 11 06:15:51 PM PDT 24	Aug 11 06:17:23 PM PDT 24	145326532696 ps
T201	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.2071816007	Aug 11 06:16:12 PM PDT 24	Aug 11 06:16:13 PM PDT 24	4684368973 ps
T446	/workspace/coverage/default/1.sysrst_ctrl_smoke.1035648868	Aug 11 06:14:56 PM PDT 24	Aug 11 06:15:02 PM PDT 24	2112945524 ps
T447	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2560984780	Aug 11 06:15:58 PM PDT 24	Aug 11 06:16:00 PM PDT 24	3012871533 ps
T97	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.2279577494	Aug 11 06:15:19 PM PDT 24	Aug 11 06:16:48 PM PDT 24	33933793719 ps
T332	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1757485402	Aug 11 06:16:20 PM PDT 24	Aug 11 06:20:20 PM PDT 24	192737491962 ps
T178	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2439647726	Aug 11 06:15:14 PM PDT 24	Aug 11 06:15:21 PM PDT 24	3581135427 ps
T448	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3653246422	Aug 11 06:16:12 PM PDT 24	Aug 11 06:16:15 PM PDT 24	2873968703 ps
T449	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.248721509	Aug 11 06:15:58 PM PDT 24	Aug 11 07:05:12 PM PDT 24	1129010684541 ps
T342	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3372651052	Aug 11 06:15:52 PM PDT 24	Aug 11 06:16:44 PM PDT 24	139813868841 ps
T249	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3759772428	Aug 11 06:14:57 PM PDT 24	Aug 11 06:18:58 PM PDT 24	91828926511 ps
T450	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.32680793	Aug 11 06:15:20 PM PDT 24	Aug 11 06:15:23 PM PDT 24	2524148977 ps
T451	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.226381168	Aug 11 06:16:28 PM PDT 24	Aug 11 06:18:52 PM PDT 24	231665482502 ps
T352	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.738971813	Aug 11 06:16:54 PM PDT 24	Aug 11 06:21:27 PM PDT 24	102008040460 ps
T452	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2900908749	Aug 11 06:15:05 PM PDT 24	Aug 11 06:15:12 PM PDT 24	2509680952 ps