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ASSERTIONS	CATEGORY	SEVERITY	ATTEMPTS	REAL SUCCESSES	FAILURES	INCOMPLETE
tb.dut.tlul_assert_device.gen_assert_final[92].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[93].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[94].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[95].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[96].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[97].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[98].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[99].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_assert_final[9].noOutstandingReqsAtEndOfSim_A	0	0	910	910	0	0
tb.dut.tlul_assert_device.gen_device.aDataKnown_M	0	0	1117176228	2993972	0	0
tb.dut.tlul_assert_device.gen_device.addrSizeAlignedErr_A	0	0	1117175658	7015	0	0
tb.dut.tlul_assert_device.gen_device.contigMask_M	0	0	1117176228	14965342	0	0
tb.dut.tlul_assert_device.gen_device.dDataKnown_A	0	0	1117176228	177983	0	0
tb.dut.tlul_assert_device.gen_device.legalAOpcodeErr_A	0	0	1117175658	7404	0	0
tb.dut.tlul_assert_device.gen_device.legalAParam_M	0	0	1117176228	16824844	0	0
tb.dut.tlul_assert_device.gen_device.legalDParam_A	0	0	1117176228	545259	0	0
tb.dut.tlul_assert_device.gen_device.pendingReqPerSrc_M	0	0	1117176228	16824844	0	0
tb.dut.tlul_assert_device.gen_device.respMustHaveReq_A	0	0	1117176228	545259	0	0
tb.dut.tlul_assert_device.gen_device.respOpcode_A	0	0	1117176228	545259	0	0
tb.dut.tlul_assert_device.gen_device.respSzEqReqSz_A	0	0	1117176228	545259	0	0
tb.dut.tlul_assert_device.gen_device.sizeGTEMaskErr_A	0	0	1117175658	4382	0	0
tb.dut.tlul_assert_device.gen_device.sizeMatchesMaskErr_A	0	0	1117175658	3936	0	0
tb.dut.tlul_assert_device.p_dbw.TlDbw_A	0	0	910	910	0	0
tb.dut.u_reg.en2addrHit	0	0	1117175658	253505	0	0
tb.dut.u_reg.reAfterRv	0	0	1117175658	253503	0	0
tb.dut.u_reg.rePulse	0	0	1117175658	138357	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1248750	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1228	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1228	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1228	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1167	0	0
tb.dut.u_reg.u_auto_block_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1237	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1114517	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1104	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1104	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1104	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1045	0	0
tb.dut.u_reg.u_auto_block_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1114	0	0
tb.dut.u_reg.u_chk.PayLoadWidthCheck	0	0	910	910	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.BusySrcReqChk_A	0	0	1117175658	1756264	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcAckBusyChk_A	0	0	1117175658	1758	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1758	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1758	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1697	0	0
tb.dut.u_reg.u_com_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1767	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.BusySrcReqChk_A	0	0	1117175658	1721362	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcAckBusyChk_A	0	0	1117175658	1733	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1733	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1733	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1669	0	0
tb.dut.u_reg.u_com_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1742	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.BusySrcReqChk_A	0	0	1117175658	1665489	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcAckBusyChk_A	0	0	1117175658	1704	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1704	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1704	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1642	0	0
tb.dut.u_reg.u_com_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1713	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.BusySrcReqChk_A	0	0	1117175658	1637480	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcAckBusyChk_A	0	0	1117175658	1705	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1705	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1705	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1643	0	0
tb.dut.u_reg.u_com_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1715	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.BusySrcReqChk_A	0	0	1117175658	1696140	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcAckBusyChk_A	0	0	1117175658	1727	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1726	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1727	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1662	0	0
tb.dut.u_reg.u_com_out_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1735	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.BusySrcReqChk_A	0	0	1117175658	1670247	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcAckBusyChk_A	0	0	1117175658	1710	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1710	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1710	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1646	0	0
tb.dut.u_reg.u_com_out_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1718	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.BusySrcReqChk_A	0	0	1117175658	1657334	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcAckBusyChk_A	0	0	1117175658	1687	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1687	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1687	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1625	0	0
tb.dut.u_reg.u_com_out_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1695	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.BusySrcReqChk_A	0	0	1117175658	1642753	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcAckBusyChk_A	0	0	1117175658	1704	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1704	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1704	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1640	0	0
tb.dut.u_reg.u_com_out_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1711	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.BusySrcReqChk_A	0	0	1117175658	1334035	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcAckBusyChk_A	0	0	1117175658	1308	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1308	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1308	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1245	0	0
tb.dut.u_reg.u_com_pre_det_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1316	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.BusySrcReqChk_A	0	0	1117175658	1374159	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcAckBusyChk_A	0	0	1117175658	1319	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1319	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1319	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1255	0	0
tb.dut.u_reg.u_com_pre_det_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1327	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.BusySrcReqChk_A	0	0	1117175658	1340790	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcAckBusyChk_A	0	0	1117175658	1321	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1321	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1321	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1258	0	0
tb.dut.u_reg.u_com_pre_det_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1329	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.BusySrcReqChk_A	0	0	1117175658	1323998	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcAckBusyChk_A	0	0	1117175658	1303	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1303	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1303	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1240	0	0
tb.dut.u_reg.u_com_pre_det_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1312	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.BusySrcReqChk_A	0	0	1117175658	7225020	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcAckBusyChk_A	0	0	1117175658	7096	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7096	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7096	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7034	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7104	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.BusySrcReqChk_A	0	0	1117175658	7225766	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcAckBusyChk_A	0	0	1117175658	7177	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7177	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7177	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7111	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7186	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.BusySrcReqChk_A	0	0	1117175658	7187097	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcAckBusyChk_A	0	0	1117175658	7277	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7276	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7277	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7212	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7286	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.BusySrcReqChk_A	0	0	1117175658	6943717	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcAckBusyChk_A	0	0	1117175658	7121	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7121	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7121	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7060	0	0
tb.dut.u_reg.u_com_pre_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7130	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.BusySrcReqChk_A	0	0	1117175658	7621645	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcAckBusyChk_A	0	0	1117175658	7501	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7500	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7501	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7433	0	0
tb.dut.u_reg.u_com_sel_ctl_0_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7510	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.BusySrcReqChk_A	0	0	1117175658	7623231	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcAckBusyChk_A	0	0	1117175658	7600	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7600	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7600	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7536	0	0
tb.dut.u_reg.u_com_sel_ctl_1_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7607	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.BusySrcReqChk_A	0	0	1117175658	7554645	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcAckBusyChk_A	0	0	1117175658	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7666	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7603	0	0
tb.dut.u_reg.u_com_sel_ctl_2_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7673	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.BusySrcReqChk_A	0	0	1117175658	7332051	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcAckBusyChk_A	0	0	1117175658	7498	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	7498	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	7498	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	7433	0	0
tb.dut.u_reg.u_com_sel_ctl_3_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	7506	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1733328	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1801	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1801	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1801	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1738	0	0
tb.dut.u_reg.u_ec_rst_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1812	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1110230	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1049	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1048	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1049	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	984	0	0
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1059	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1704742	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1795	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1795	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1795	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1736	0	0
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1804	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	2257053	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	2270	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	2270	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	2270	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	2212	0	0
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	2279	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	3707939	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	3967	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	3967	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	3967	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	3904	0	0
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	3977	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	4550638	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	4838	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	4838	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	4838	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	4774	0	0
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	4847	0	0
tb.dut.u_reg.u_pin_out_value_cdc.BusySrcReqChk_A	0	0	1117175658	3662633	0	0
tb.dut.u_reg.u_pin_out_value_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_pin_out_value_cdc.SrcAckBusyChk_A	0	0	1117175658	3900	0	0
tb.dut.u_reg.u_pin_out_value_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	3899	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	3900	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	3835	0	0
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	3909	0	0
tb.dut.u_reg.u_reg_if.AllowedLatency_A	0	0	910	910	0	0
tb.dut.u_reg.u_reg_if.MatchedWidthAssert	0	0	910	910	0	0
tb.dut.u_reg.u_reg_if.u_err.dataWidthOnly32_A	0	0	910	910	0	0
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.DataWidthCheck_A	0	0	910	910	0	0
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.PayLoadWidthCheck	0	0	910	910	0	0
tb.dut.u_reg.u_rsp_intg_gen.DataWidthCheck_A	0	0	910	910	0	0
tb.dut.u_reg.u_rsp_intg_gen.PayLoadWidthCheck	0	0	910	910	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1090866	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1046	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1046	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1046	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	984	0	0
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1054	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1063501	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1017	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1016	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1017	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	950	0	0
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1029	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1106388	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1062	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1062	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1062	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1004	0	0
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1070	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.BusySrcReqChk_A	0	0	1117175658	1106889	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcAckBusyChk_A	0	0	1117175658	1069	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A	0	0	1117175658	1069	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M	0	0	5241046	1070	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	1006	0	0
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1077	0	0
tb.dut.u_reg.u_wkup_status_cdc.BusySrcReqChk_A	0	0	1117175658	1000938	0	0
tb.dut.u_reg.u_wkup_status_cdc.DstReqKnown_A	0	0	5241046	4578963	0	0
tb.dut.u_reg.u_wkup_status_cdc.SrcAckBusyChk_A	0	0	1117175658	1039	0	0
tb.dut.u_reg.u_wkup_status_cdc.SrcBusyKnown_A	0	0	1117175658	1116768365	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.DstUpdateReqCheck_A	0	0	5241046	598	0	909
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.HwIdSelCheck_A	0	0	5241046	598	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckAckNeedsReq	0	0	1117175658	1637	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckHoldReq	0	0	5241046	866	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.DstPulseCheck_A	0	0	5241046	978	0	0
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.SrcPulseCheck_M	0	0	1117175658	1048	0	0
tb.dut.u_reg.wePulse	0	0	1117175658	115146	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntClr_A	0	0	4968661	185	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntIncr_A	0	0	4968661	132638	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntNoWrap_A	0	0	4968661	4511849	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedOut_A	0	0	4968661	584	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedPulseOut_A	0	0	4968661	85	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledIdleSt_A	0	0	4968661	4375131	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledNoDetection_A	0	0	4968661	4376874	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterDebounceSt_A	0	0	4968661	101	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterDetectSt_A	0	0	4968661	85	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterStableSt_A	0	0	4968661	85	0	0
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.PulseIsPulse_A	0	0	4968661	85	0	0

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	ASSERT	PROPERTIES	SEQUENCES
Total	1028	0	10
Category 0	1028	0	10

	ASSERT	PROPERTIES	SEQUENCES
Total	1028	0	10
Severity 0	1028	0	10

	NUMBER	PERCENT
Total Number	1028	100.00
Uncovered	4	0.39
Success	1024	99.61
Failure	0	0.00
Incomplete	1	0.10
Without Attempts	0	0.00

	NUMBER	PERCENT
Total Number	10	100.00
Uncovered	0	0.00
All Matches	10	100.00
First Matches	10	100.00