| T334 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.196178412 |
|
|
Sep 04 10:16:25 AM UTC 24 |
Sep 04 10:17:52 AM UTC 24 |
49210386111 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/12.uart_fifo_reset.2805111756 |
|
|
Sep 04 10:13:46 AM UTC 24 |
Sep 04 10:17:57 AM UTC 24 |
93648842183 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.2849269610 |
|
|
Sep 04 10:16:32 AM UTC 24 |
Sep 04 10:18:01 AM UTC 24 |
3109576518 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_rx_oversample.3458798793 |
|
|
Sep 04 10:17:58 AM UTC 24 |
Sep 04 10:18:02 AM UTC 24 |
3815086255 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.4094752098 |
|
|
Sep 04 10:13:20 AM UTC 24 |
Sep 04 10:18:11 AM UTC 24 |
63083026440 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.3462730561 |
|
|
Sep 04 10:17:04 AM UTC 24 |
Sep 04 10:18:11 AM UTC 24 |
62697768106 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_noise_filter.846289230 |
|
|
Sep 04 10:18:03 AM UTC 24 |
Sep 04 10:18:17 AM UTC 24 |
105921835461 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.4040505440 |
|
|
Sep 04 10:18:12 AM UTC 24 |
Sep 04 10:18:23 AM UTC 24 |
4687078820 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_fifo_full.3069923800 |
|
|
Sep 04 10:17:48 AM UTC 24 |
Sep 04 10:18:28 AM UTC 24 |
118330505393 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_loopback.3521226742 |
|
|
Sep 04 10:18:23 AM UTC 24 |
Sep 04 10:18:33 AM UTC 24 |
2668380161 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_fifo_full.236497029 |
|
|
Sep 04 10:16:51 AM UTC 24 |
Sep 04 10:18:39 AM UTC 24 |
413488598105 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/13.uart_stress_all.1935645405 |
|
|
Sep 04 10:15:17 AM UTC 24 |
Sep 04 10:18:45 AM UTC 24 |
200572100945 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.4175791911 |
|
|
Sep 04 10:17:52 AM UTC 24 |
Sep 04 10:18:48 AM UTC 24 |
175203359925 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_alert_test.1311644930 |
|
|
Sep 04 10:18:49 AM UTC 24 |
Sep 04 10:18:51 AM UTC 24 |
11748481 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/10.uart_perf.2218445415 |
|
|
Sep 04 10:12:28 AM UTC 24 |
Sep 04 10:18:53 AM UTC 24 |
28660237945 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.1879575452 |
|
|
Sep 04 10:17:33 AM UTC 24 |
Sep 04 10:18:54 AM UTC 24 |
14777415247 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_smoke.1331391685 |
|
|
Sep 04 10:18:52 AM UTC 24 |
Sep 04 10:18:55 AM UTC 24 |
718470527 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_tx_rx.805447780 |
|
|
Sep 04 10:17:48 AM UTC 24 |
Sep 04 10:19:00 AM UTC 24 |
110919191585 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.3375049604 |
|
|
Sep 04 10:06:06 AM UTC 24 |
Sep 04 10:18:59 AM UTC 24 |
108299226913 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.360446817 |
|
|
Sep 04 10:18:12 AM UTC 24 |
Sep 04 10:19:11 AM UTC 24 |
27153718249 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_fifo_reset.2977887908 |
|
|
Sep 04 10:16:09 AM UTC 24 |
Sep 04 10:19:20 AM UTC 24 |
137771619204 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_tx_rx.3019420596 |
|
|
Sep 04 10:18:54 AM UTC 24 |
Sep 04 10:19:23 AM UTC 24 |
8831205761 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.3427450528 |
|
|
Sep 04 10:19:20 AM UTC 24 |
Sep 04 10:19:28 AM UTC 24 |
3845745439 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_noise_filter.3591405362 |
|
|
Sep 04 10:16:21 AM UTC 24 |
Sep 04 10:19:39 AM UTC 24 |
96763087632 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3070053950 |
|
|
Sep 04 10:18:41 AM UTC 24 |
Sep 04 10:19:40 AM UTC 24 |
14534889413 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/2.uart_stress_all.1569633285 |
|
|
Sep 04 10:06:15 AM UTC 24 |
Sep 04 10:19:41 AM UTC 24 |
203699243481 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/14.uart_fifo_full.1305484295 |
|
|
Sep 04 10:15:20 AM UTC 24 |
Sep 04 10:19:51 AM UTC 24 |
147400455432 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.3353997057 |
|
|
Sep 04 10:19:29 AM UTC 24 |
Sep 04 10:19:54 AM UTC 24 |
7121441062 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_intr.278565211 |
|
|
Sep 04 10:19:00 AM UTC 24 |
Sep 04 10:19:59 AM UTC 24 |
34448463409 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_noise_filter.3077706045 |
|
|
Sep 04 10:17:01 AM UTC 24 |
Sep 04 10:20:00 AM UTC 24 |
79581099264 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_alert_test.4034709535 |
|
|
Sep 04 10:20:00 AM UTC 24 |
Sep 04 10:20:02 AM UTC 24 |
15614589 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_smoke.515860918 |
|
|
Sep 04 10:20:01 AM UTC 24 |
Sep 04 10:20:04 AM UTC 24 |
301556601 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_loopback.2239897702 |
|
|
Sep 04 10:19:40 AM UTC 24 |
Sep 04 10:20:05 AM UTC 24 |
10812585332 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_rx_oversample.2819398784 |
|
|
Sep 04 10:19:00 AM UTC 24 |
Sep 04 10:20:09 AM UTC 24 |
7144397012 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.204630263 |
|
|
Sep 04 10:15:51 AM UTC 24 |
Sep 04 10:20:15 AM UTC 24 |
337619407694 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.1844208928 |
|
|
Sep 04 10:16:53 AM UTC 24 |
Sep 04 10:20:15 AM UTC 24 |
147261716634 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/9.uart_stress_all.4066070551 |
|
|
Sep 04 10:11:43 AM UTC 24 |
Sep 04 10:20:20 AM UTC 24 |
265373306529 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_fifo_reset.2285582177 |
|
|
Sep 04 10:17:53 AM UTC 24 |
Sep 04 10:20:20 AM UTC 24 |
98714462113 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_rx_oversample.2652853348 |
|
|
Sep 04 10:20:16 AM UTC 24 |
Sep 04 10:20:22 AM UTC 24 |
7285592042 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.1871138814 |
|
|
Sep 04 10:20:21 AM UTC 24 |
Sep 04 10:20:25 AM UTC 24 |
1204023966 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_fifo_reset.1510688896 |
|
|
Sep 04 10:18:57 AM UTC 24 |
Sep 04 10:20:26 AM UTC 24 |
25904473958 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.2863877021 |
|
|
Sep 04 10:19:51 AM UTC 24 |
Sep 04 10:20:26 AM UTC 24 |
3248123803 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.3309048219 |
|
|
Sep 04 10:20:26 AM UTC 24 |
Sep 04 10:20:32 AM UTC 24 |
975070608 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.4120057662 |
|
|
Sep 04 10:18:56 AM UTC 24 |
Sep 04 10:20:38 AM UTC 24 |
48585902649 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_loopback.3287070596 |
|
|
Sep 04 10:20:26 AM UTC 24 |
Sep 04 10:20:39 AM UTC 24 |
9774296436 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_intr.225679473 |
|
|
Sep 04 10:20:16 AM UTC 24 |
Sep 04 10:20:43 AM UTC 24 |
49571832434 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.529606088 |
|
|
Sep 04 10:20:06 AM UTC 24 |
Sep 04 10:20:44 AM UTC 24 |
38366422295 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_alert_test.3550297526 |
|
|
Sep 04 10:20:43 AM UTC 24 |
Sep 04 10:20:45 AM UTC 24 |
14799194 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_smoke.3881663998 |
|
|
Sep 04 10:20:46 AM UTC 24 |
Sep 04 10:20:48 AM UTC 24 |
331815307 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_fifo_full.2893409922 |
|
|
Sep 04 10:18:55 AM UTC 24 |
Sep 04 10:20:57 AM UTC 24 |
52296852213 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.3710181505 |
|
|
Sep 04 10:20:39 AM UTC 24 |
Sep 04 10:21:07 AM UTC 24 |
812166770 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_noise_filter.3181077415 |
|
|
Sep 04 10:19:11 AM UTC 24 |
Sep 04 10:21:07 AM UTC 24 |
156819737552 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_rx_oversample.530158718 |
|
|
Sep 04 10:21:08 AM UTC 24 |
Sep 04 10:21:25 AM UTC 24 |
4759973938 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.3743050001 |
|
|
Sep 04 10:20:23 AM UTC 24 |
Sep 04 10:21:27 AM UTC 24 |
19879196193 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.657393828 |
|
|
Sep 04 10:21:38 AM UTC 24 |
Sep 04 10:21:43 AM UTC 24 |
2170461566 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/8.uart_stress_all.1327899958 |
|
|
Sep 04 10:11:05 AM UTC 24 |
Sep 04 10:21:46 AM UTC 24 |
325516250549 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_fifo_full.1901711371 |
|
|
Sep 04 10:20:04 AM UTC 24 |
Sep 04 10:21:48 AM UTC 24 |
25675783074 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.2140101623 |
|
|
Sep 04 10:14:14 AM UTC 24 |
Sep 04 10:21:50 AM UTC 24 |
77794483734 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.4062347598 |
|
|
Sep 04 10:14:59 AM UTC 24 |
Sep 04 10:21:53 AM UTC 24 |
236147796544 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.3440706109 |
|
|
Sep 04 10:21:48 AM UTC 24 |
Sep 04 10:21:55 AM UTC 24 |
9952033251 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_perf.3428629179 |
|
|
Sep 04 10:16:30 AM UTC 24 |
Sep 04 10:21:59 AM UTC 24 |
3978711909 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_loopback.231089379 |
|
|
Sep 04 10:21:50 AM UTC 24 |
Sep 04 10:22:06 AM UTC 24 |
9212580655 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_fifo_reset.3199675883 |
|
|
Sep 04 10:20:10 AM UTC 24 |
Sep 04 10:22:08 AM UTC 24 |
72426880993 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_alert_test.1640448845 |
|
|
Sep 04 10:22:07 AM UTC 24 |
Sep 04 10:22:09 AM UTC 24 |
52773396 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/5.uart_stress_all.2575364909 |
|
|
Sep 04 10:08:21 AM UTC 24 |
Sep 04 10:22:25 AM UTC 24 |
564116563845 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_smoke.3116829027 |
|
|
Sep 04 10:22:09 AM UTC 24 |
Sep 04 10:22:37 AM UTC 24 |
6272609976 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_tx_rx.13871716 |
|
|
Sep 04 10:22:10 AM UTC 24 |
Sep 04 10:22:39 AM UTC 24 |
17327414880 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.3696845707 |
|
|
Sep 04 10:21:56 AM UTC 24 |
Sep 04 10:22:43 AM UTC 24 |
11990617639 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_noise_filter.3255384296 |
|
|
Sep 04 10:21:27 AM UTC 24 |
Sep 04 10:22:49 AM UTC 24 |
82594284639 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_fifo_full.319862980 |
|
|
Sep 04 10:22:26 AM UTC 24 |
Sep 04 10:22:52 AM UTC 24 |
143023101328 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/10.uart_stress_all.1551934176 |
|
|
Sep 04 10:12:33 AM UTC 24 |
Sep 04 10:23:01 AM UTC 24 |
51823004813 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_fifo_reset.882382416 |
|
|
Sep 04 10:21:08 AM UTC 24 |
Sep 04 10:23:05 AM UTC 24 |
124760904339 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_stress_all.1137678540 |
|
|
Sep 04 10:18:47 AM UTC 24 |
Sep 04 10:23:13 AM UTC 24 |
179136598694 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_intr.2423465434 |
|
|
Sep 04 10:21:26 AM UTC 24 |
Sep 04 10:23:15 AM UTC 24 |
52935447686 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_tx_rx.4226874303 |
|
|
Sep 04 10:20:46 AM UTC 24 |
Sep 04 10:23:16 AM UTC 24 |
103941824371 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/12.uart_perf.2691867461 |
|
|
Sep 04 10:14:12 AM UTC 24 |
Sep 04 10:23:18 AM UTC 24 |
19680303047 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_perf.2286861586 |
|
|
Sep 04 10:21:51 AM UTC 24 |
Sep 04 10:23:21 AM UTC 24 |
25847102740 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.2548126165 |
|
|
Sep 04 10:16:32 AM UTC 24 |
Sep 04 10:23:22 AM UTC 24 |
124239723267 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_intr.1470115196 |
|
|
Sep 04 10:22:50 AM UTC 24 |
Sep 04 10:23:23 AM UTC 24 |
14513507792 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_loopback.2048929755 |
|
|
Sep 04 10:23:16 AM UTC 24 |
Sep 04 10:23:23 AM UTC 24 |
3842373958 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.3479465669 |
|
|
Sep 04 10:23:02 AM UTC 24 |
Sep 04 10:23:24 AM UTC 24 |
5527291582 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_alert_test.668009179 |
|
|
Sep 04 10:23:24 AM UTC 24 |
Sep 04 10:23:26 AM UTC 24 |
41551735 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.2718498839 |
|
|
Sep 04 10:20:33 AM UTC 24 |
Sep 04 10:23:28 AM UTC 24 |
73175835314 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.124680667 |
|
|
Sep 04 10:23:14 AM UTC 24 |
Sep 04 10:23:29 AM UTC 24 |
7154514455 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/14.uart_stress_all.3373887911 |
|
|
Sep 04 10:15:54 AM UTC 24 |
Sep 04 10:23:30 AM UTC 24 |
352056885333 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_smoke.3302503049 |
|
|
Sep 04 10:23:24 AM UTC 24 |
Sep 04 10:23:30 AM UTC 24 |
646250230 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/9.uart_perf.1962464289 |
|
|
Sep 04 10:11:40 AM UTC 24 |
Sep 04 10:23:39 AM UTC 24 |
18039967131 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_fifo_full.1608629889 |
|
|
Sep 04 10:20:49 AM UTC 24 |
Sep 04 10:23:39 AM UTC 24 |
72799861258 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/11.uart_perf.2874721083 |
|
|
Sep 04 10:13:14 AM UTC 24 |
Sep 04 10:23:43 AM UTC 24 |
13526816013 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.4001711767 |
|
|
Sep 04 10:21:43 AM UTC 24 |
Sep 04 10:23:44 AM UTC 24 |
38254800326 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_fifo_reset.3539555659 |
|
|
Sep 04 10:23:29 AM UTC 24 |
Sep 04 10:23:49 AM UTC 24 |
23211132809 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_rx_oversample.2238521719 |
|
|
Sep 04 10:22:44 AM UTC 24 |
Sep 04 10:23:51 AM UTC 24 |
5080112208 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_intr.4061406502 |
|
|
Sep 04 10:23:31 AM UTC 24 |
Sep 04 10:23:52 AM UTC 24 |
8595231694 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/12.uart_stress_all.904556780 |
|
|
Sep 04 10:14:18 AM UTC 24 |
Sep 04 10:23:55 AM UTC 24 |
405489199753 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.3140448242 |
|
|
Sep 04 10:23:27 AM UTC 24 |
Sep 04 10:23:58 AM UTC 24 |
9722595130 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_noise_filter.1335782869 |
|
|
Sep 04 10:22:53 AM UTC 24 |
Sep 04 10:23:59 AM UTC 24 |
114118559746 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_rx_oversample.1819762015 |
|
|
Sep 04 10:23:30 AM UTC 24 |
Sep 04 10:23:59 AM UTC 24 |
7323884255 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_alert_test.4256893439 |
|
|
Sep 04 10:23:59 AM UTC 24 |
Sep 04 10:24:00 AM UTC 24 |
45357452 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_tx_rx.3457325527 |
|
|
Sep 04 10:16:50 AM UTC 24 |
Sep 04 10:24:01 AM UTC 24 |
118332069908 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_smoke.1823782859 |
|
|
Sep 04 10:24:00 AM UTC 24 |
Sep 04 10:24:03 AM UTC 24 |
294555315 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_loopback.1087076416 |
|
|
Sep 04 10:23:44 AM UTC 24 |
Sep 04 10:24:07 AM UTC 24 |
4974107200 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.3934087369 |
|
|
Sep 04 10:23:39 AM UTC 24 |
Sep 04 10:24:09 AM UTC 24 |
25250579663 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.1171106615 |
|
|
Sep 04 10:23:21 AM UTC 24 |
Sep 04 10:24:10 AM UTC 24 |
11315297673 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_tx_rx.1698225954 |
|
|
Sep 04 10:24:00 AM UTC 24 |
Sep 04 10:24:10 AM UTC 24 |
10318187965 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.3635125005 |
|
|
Sep 04 10:23:44 AM UTC 24 |
Sep 04 10:24:10 AM UTC 24 |
7191034171 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_perf.3505539252 |
|
|
Sep 04 10:20:27 AM UTC 24 |
Sep 04 10:24:11 AM UTC 24 |
15512373771 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_fifo_full.143488411 |
|
|
Sep 04 10:23:27 AM UTC 24 |
Sep 04 10:24:12 AM UTC 24 |
47462055873 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/14.uart_perf.982508699 |
|
|
Sep 04 10:15:49 AM UTC 24 |
Sep 04 10:24:13 AM UTC 24 |
14420703975 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_stress_all.529223750 |
|
|
Sep 04 10:22:00 AM UTC 24 |
Sep 04 10:24:13 AM UTC 24 |
61605853640 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.574365007 |
|
|
Sep 04 10:19:42 AM UTC 24 |
Sep 04 10:24:15 AM UTC 24 |
124277071417 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.3314268595 |
|
|
Sep 04 10:24:11 AM UTC 24 |
Sep 04 10:24:17 AM UTC 24 |
1038985231 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.635596644 |
|
|
Sep 04 10:23:53 AM UTC 24 |
Sep 04 10:24:22 AM UTC 24 |
7862438495 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_alert_test.669605358 |
|
|
Sep 04 10:24:23 AM UTC 24 |
Sep 04 10:24:25 AM UTC 24 |
14173055 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_smoke.671378855 |
|
|
Sep 04 10:24:25 AM UTC 24 |
Sep 04 10:24:28 AM UTC 24 |
497016219 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.839975520 |
|
|
Sep 04 10:24:11 AM UTC 24 |
Sep 04 10:24:30 AM UTC 24 |
44993029013 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_fifo_reset.3061221576 |
|
|
Sep 04 10:24:04 AM UTC 24 |
Sep 04 10:24:30 AM UTC 24 |
5557704950 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_rx_oversample.2534681990 |
|
|
Sep 04 10:24:08 AM UTC 24 |
Sep 04 10:24:30 AM UTC 24 |
6949953086 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.2564679100 |
|
|
Sep 04 10:24:11 AM UTC 24 |
Sep 04 10:24:32 AM UTC 24 |
52433724884 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_rx_oversample.2463494471 |
|
|
Sep 04 10:24:32 AM UTC 24 |
Sep 04 10:24:36 AM UTC 24 |
2322772971 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.1159988481 |
|
|
Sep 04 10:24:16 AM UTC 24 |
Sep 04 10:24:36 AM UTC 24 |
1697725589 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.1228125941 |
|
|
Sep 04 10:24:37 AM UTC 24 |
Sep 04 10:24:40 AM UTC 24 |
4408222603 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_noise_filter.1053651044 |
|
|
Sep 04 10:23:31 AM UTC 24 |
Sep 04 10:24:43 AM UTC 24 |
107049396078 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.2892008469 |
|
|
Sep 04 10:24:02 AM UTC 24 |
Sep 04 10:24:49 AM UTC 24 |
164562054978 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_intr.877371300 |
|
|
Sep 04 10:24:33 AM UTC 24 |
Sep 04 10:24:51 AM UTC 24 |
15042714132 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_loopback.3938394425 |
|
|
Sep 04 10:24:13 AM UTC 24 |
Sep 04 10:24:52 AM UTC 24 |
6217900608 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_fifo_reset.3480283422 |
|
|
Sep 04 10:22:40 AM UTC 24 |
Sep 04 10:24:54 AM UTC 24 |
78795350854 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_alert_test.658591486 |
|
|
Sep 04 10:24:54 AM UTC 24 |
Sep 04 10:24:56 AM UTC 24 |
14052497 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_tx_rx.3381992028 |
|
|
Sep 04 10:20:03 AM UTC 24 |
Sep 04 10:24:57 AM UTC 24 |
95190618467 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/7.uart_perf.943310755 |
|
|
Sep 04 10:10:04 AM UTC 24 |
Sep 04 10:24:58 AM UTC 24 |
15374207659 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_smoke.420058190 |
|
|
Sep 04 10:24:57 AM UTC 24 |
Sep 04 10:25:00 AM UTC 24 |
503140392 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_loopback.2624220422 |
|
|
Sep 04 10:24:41 AM UTC 24 |
Sep 04 10:25:00 AM UTC 24 |
11321993929 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.4229684863 |
|
|
Sep 04 10:24:40 AM UTC 24 |
Sep 04 10:25:01 AM UTC 24 |
7215596353 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_tx_rx.1370718198 |
|
|
Sep 04 10:24:29 AM UTC 24 |
Sep 04 10:25:07 AM UTC 24 |
22525287624 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_rx_oversample.3055825560 |
|
|
Sep 04 10:25:02 AM UTC 24 |
Sep 04 10:25:07 AM UTC 24 |
1925797822 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3033534059 |
|
|
Sep 04 10:19:25 AM UTC 24 |
Sep 04 10:25:07 AM UTC 24 |
97556070388 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_noise_filter.1491013916 |
|
|
Sep 04 10:24:10 AM UTC 24 |
Sep 04 10:25:12 AM UTC 24 |
261772303284 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.2879623663 |
|
|
Sep 04 10:22:38 AM UTC 24 |
Sep 04 10:25:12 AM UTC 24 |
156483479753 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_tx_rx.3186120285 |
|
|
Sep 04 10:24:57 AM UTC 24 |
Sep 04 10:25:12 AM UTC 24 |
8465663383 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.223011316 |
|
|
Sep 04 10:24:37 AM UTC 24 |
Sep 04 10:25:15 AM UTC 24 |
89731083599 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.2025795719 |
|
|
Sep 04 10:25:13 AM UTC 24 |
Sep 04 10:25:16 AM UTC 24 |
3378681310 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_loopback.875611729 |
|
|
Sep 04 10:25:13 AM UTC 24 |
Sep 04 10:25:21 AM UTC 24 |
1588366670 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_intr.592580259 |
|
|
Sep 04 10:17:00 AM UTC 24 |
Sep 04 10:25:26 AM UTC 24 |
188302548667 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_alert_test.3459570066 |
|
|
Sep 04 10:25:27 AM UTC 24 |
Sep 04 10:25:29 AM UTC 24 |
51396187 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.4132788097 |
|
|
Sep 04 10:24:51 AM UTC 24 |
Sep 04 10:25:30 AM UTC 24 |
9965350568 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_smoke.2713871056 |
|
|
Sep 04 10:25:30 AM UTC 24 |
Sep 04 10:25:33 AM UTC 24 |
289411892 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.727520312 |
|
|
Sep 04 10:25:01 AM UTC 24 |
Sep 04 10:25:33 AM UTC 24 |
64465700630 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.3692257912 |
|
|
Sep 04 10:20:58 AM UTC 24 |
Sep 04 10:25:34 AM UTC 24 |
110459422121 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_noise_filter.2147809163 |
|
|
Sep 04 10:24:36 AM UTC 24 |
Sep 04 10:25:34 AM UTC 24 |
20689786364 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_fifo_reset.339596738 |
|
|
Sep 04 10:25:01 AM UTC 24 |
Sep 04 10:25:34 AM UTC 24 |
10483424221 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/20.uart_long_xfer_wo_dly.1144349088 |
|
|
Sep 04 10:21:54 AM UTC 24 |
Sep 04 10:25:42 AM UTC 24 |
248264635425 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_noise_filter.2167718223 |
|
|
Sep 04 10:25:42 AM UTC 24 |
Sep 04 10:25:45 AM UTC 24 |
893142545 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_fifo_full.2474132149 |
|
|
Sep 04 10:24:31 AM UTC 24 |
Sep 04 10:25:48 AM UTC 24 |
19327385545 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_rx_oversample.131892346 |
|
|
Sep 04 10:25:35 AM UTC 24 |
Sep 04 10:25:50 AM UTC 24 |
1796884530 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_fifo_full.1391626663 |
|
|
Sep 04 10:25:34 AM UTC 24 |
Sep 04 10:25:55 AM UTC 24 |
25250675351 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.2601869202 |
|
|
Sep 04 10:25:08 AM UTC 24 |
Sep 04 10:25:55 AM UTC 24 |
48962683620 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.216748633 |
|
|
Sep 04 10:25:50 AM UTC 24 |
Sep 04 10:25:56 AM UTC 24 |
1015563937 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_tx_rx.439672699 |
|
|
Sep 04 10:23:24 AM UTC 24 |
Sep 04 10:25:58 AM UTC 24 |
58284267325 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_loopback.1113717722 |
|
|
Sep 04 10:25:56 AM UTC 24 |
Sep 04 10:26:04 AM UTC 24 |
10733979322 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.2508076488 |
|
|
Sep 04 10:06:03 AM UTC 24 |
Sep 04 10:26:10 AM UTC 24 |
107588151929 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_alert_test.3395326041 |
|
|
Sep 04 10:26:10 AM UTC 24 |
Sep 04 10:26:12 AM UTC 24 |
13166985 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_intr.271024463 |
|
|
Sep 04 10:24:10 AM UTC 24 |
Sep 04 10:26:17 AM UTC 24 |
106823527655 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.3024375598 |
|
|
Sep 04 10:25:17 AM UTC 24 |
Sep 04 10:26:18 AM UTC 24 |
18572305865 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_noise_filter.2034868227 |
|
|
Sep 04 10:25:08 AM UTC 24 |
Sep 04 10:26:18 AM UTC 24 |
140120642407 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.2934230854 |
|
|
Sep 04 10:25:46 AM UTC 24 |
Sep 04 10:26:22 AM UTC 24 |
38122924395 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_tx_rx.328225295 |
|
|
Sep 04 10:26:18 AM UTC 24 |
Sep 04 10:26:23 AM UTC 24 |
805662749 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_smoke.498357725 |
|
|
Sep 04 10:26:13 AM UTC 24 |
Sep 04 10:26:24 AM UTC 24 |
5550677031 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_fifo_reset.3082312135 |
|
|
Sep 04 10:24:31 AM UTC 24 |
Sep 04 10:26:25 AM UTC 24 |
84099421175 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.3191087651 |
|
|
Sep 04 10:25:13 AM UTC 24 |
Sep 04 10:26:30 AM UTC 24 |
144934199903 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.787630377 |
|
|
Sep 04 10:25:49 AM UTC 24 |
Sep 04 10:26:30 AM UTC 24 |
19902752862 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_stress_all.3005845171 |
|
|
Sep 04 10:24:52 AM UTC 24 |
Sep 04 10:26:31 AM UTC 24 |
132947947688 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.2396770850 |
|
|
Sep 04 10:26:31 AM UTC 24 |
Sep 04 10:26:36 AM UTC 24 |
11550893642 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_fifo_full.2610874948 |
|
|
Sep 04 10:24:59 AM UTC 24 |
Sep 04 10:26:39 AM UTC 24 |
37147993188 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/1.uart_perf.382004900 |
|
|
Sep 04 10:06:06 AM UTC 24 |
Sep 04 10:26:41 AM UTC 24 |
21319196809 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_rx_oversample.3410604576 |
|
|
Sep 04 10:26:24 AM UTC 24 |
Sep 04 10:26:44 AM UTC 24 |
3256178693 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_loopback.1619795290 |
|
|
Sep 04 10:26:32 AM UTC 24 |
Sep 04 10:26:46 AM UTC 24 |
9736870351 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.2413053080 |
|
|
Sep 04 10:26:26 AM UTC 24 |
Sep 04 10:26:48 AM UTC 24 |
6293734964 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_stress_all.123440008 |
|
|
Sep 04 10:17:35 AM UTC 24 |
Sep 04 10:26:49 AM UTC 24 |
142313356184 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_alert_test.670161895 |
|
|
Sep 04 10:26:47 AM UTC 24 |
Sep 04 10:26:49 AM UTC 24 |
14396127 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_smoke.114130273 |
|
|
Sep 04 10:26:48 AM UTC 24 |
Sep 04 10:26:51 AM UTC 24 |
299394072 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.39280470 |
|
|
Sep 04 10:23:40 AM UTC 24 |
Sep 04 10:26:53 AM UTC 24 |
93717777256 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.1050459260 |
|
|
Sep 04 10:25:34 AM UTC 24 |
Sep 04 10:26:54 AM UTC 24 |
168480227790 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_tx_rx.314841341 |
|
|
Sep 04 10:25:31 AM UTC 24 |
Sep 04 10:27:04 AM UTC 24 |
29648856267 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.428968096 |
|
|
Sep 04 10:25:59 AM UTC 24 |
Sep 04 10:27:07 AM UTC 24 |
76106107105 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.4286525489 |
|
|
Sep 04 10:26:42 AM UTC 24 |
Sep 04 10:27:09 AM UTC 24 |
3403182470 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.2564868551 |
|
|
Sep 04 10:27:08 AM UTC 24 |
Sep 04 10:27:18 AM UTC 24 |
2401162453 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_stress_all.1642064884 |
|
|
Sep 04 10:19:54 AM UTC 24 |
Sep 04 10:27:21 AM UTC 24 |
247856353475 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_intr.3021004149 |
|
|
Sep 04 10:26:25 AM UTC 24 |
Sep 04 10:27:21 AM UTC 24 |
38228295555 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_rx_oversample.1681742366 |
|
|
Sep 04 10:26:55 AM UTC 24 |
Sep 04 10:27:24 AM UTC 24 |
5996971048 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.4209266835 |
|
|
Sep 04 10:27:19 AM UTC 24 |
Sep 04 10:27:26 AM UTC 24 |
1081295016 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_noise_filter.2172014618 |
|
|
Sep 04 10:26:25 AM UTC 24 |
Sep 04 10:27:26 AM UTC 24 |
100064012328 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_intr.65320855 |
|
|
Sep 04 10:26:59 AM UTC 24 |
Sep 04 10:27:31 AM UTC 24 |
8911348027 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.1576525245 |
|
|
Sep 04 10:24:31 AM UTC 24 |
Sep 04 10:27:33 AM UTC 24 |
183306360389 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_alert_test.2199980704 |
|
|
Sep 04 10:27:32 AM UTC 24 |
Sep 04 10:27:34 AM UTC 24 |
43186180 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_fifo_full.314691268 |
|
|
Sep 04 10:26:19 AM UTC 24 |
Sep 04 10:27:35 AM UTC 24 |
95637054623 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.1672822007 |
|
|
Sep 04 10:18:34 AM UTC 24 |
Sep 04 10:27:36 AM UTC 24 |
80055195563 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_loopback.3432134396 |
|
|
Sep 04 10:27:21 AM UTC 24 |
Sep 04 10:27:36 AM UTC 24 |
6435847781 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_fifo_reset.1443627513 |
|
|
Sep 04 10:27:37 AM UTC 24 |
Sep 04 10:27:48 AM UTC 24 |
4625151372 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_stress_all.2337185803 |
|
|
Sep 04 10:16:38 AM UTC 24 |
Sep 04 10:27:50 AM UTC 24 |
436807743493 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/11.uart_stress_all.3654869807 |
|
|
Sep 04 10:13:30 AM UTC 24 |
Sep 04 10:27:56 AM UTC 24 |
146827340026 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_stress_all.265912456 |
|
|
Sep 04 10:26:45 AM UTC 24 |
Sep 04 10:28:01 AM UTC 24 |
50693756498 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_smoke.1428408694 |
|
|
Sep 04 10:27:34 AM UTC 24 |
Sep 04 10:28:06 AM UTC 24 |
6093659624 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_perf.1345845361 |
|
|
Sep 04 10:25:13 AM UTC 24 |
Sep 04 10:28:08 AM UTC 24 |
25657020914 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.344235387 |
|
|
Sep 04 10:28:02 AM UTC 24 |
Sep 04 10:28:09 AM UTC 24 |
2970059511 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_loopback.2180170478 |
|
|
Sep 04 10:28:09 AM UTC 24 |
Sep 04 10:28:15 AM UTC 24 |
3792859869 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_tx_rx.1123601382 |
|
|
Sep 04 10:27:35 AM UTC 24 |
Sep 04 10:28:15 AM UTC 24 |
103697890318 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.2131924087 |
|
|
Sep 04 10:28:07 AM UTC 24 |
Sep 04 10:28:18 AM UTC 24 |
9184524040 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_fifo_full.838913449 |
|
|
Sep 04 10:24:01 AM UTC 24 |
Sep 04 10:28:19 AM UTC 24 |
127096898322 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_alert_test.219958516 |
|
|
Sep 04 10:28:19 AM UTC 24 |
Sep 04 10:28:21 AM UTC 24 |
22575836 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_rx_oversample.793115324 |
|
|
Sep 04 10:27:49 AM UTC 24 |
Sep 04 10:28:22 AM UTC 24 |
6727749985 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_perf.3613888189 |
|
|
Sep 04 10:23:50 AM UTC 24 |
Sep 04 10:28:23 AM UTC 24 |
14044717215 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_fifo_reset.4284281963 |
|
|
Sep 04 10:26:22 AM UTC 24 |
Sep 04 10:28:24 AM UTC 24 |
114300612484 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_tx_rx.1973973242 |
|
|
Sep 04 10:26:49 AM UTC 24 |
Sep 04 10:28:35 AM UTC 24 |
32617109374 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_smoke.3989784353 |
|
|
Sep 04 10:28:21 AM UTC 24 |
Sep 04 10:28:39 AM UTC 24 |
5565564359 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_long_xfer_wo_dly.2217332758 |
|
|
Sep 04 10:23:18 AM UTC 24 |
Sep 04 10:28:40 AM UTC 24 |
50695372980 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.1020258211 |
|
|
Sep 04 10:27:27 AM UTC 24 |
Sep 04 10:28:40 AM UTC 24 |
15516476425 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.2818746803 |
|
|
Sep 04 10:26:52 AM UTC 24 |
Sep 04 10:28:47 AM UTC 24 |
103276432113 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_noise_filter.1944879818 |
|
|
Sep 04 10:27:05 AM UTC 24 |
Sep 04 10:28:48 AM UTC 24 |
153173428926 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/19.uart_noise_filter.2329833545 |
|
|
Sep 04 10:20:21 AM UTC 24 |
Sep 04 10:28:49 AM UTC 24 |
128548950066 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.4217408503 |
|
|
Sep 04 10:25:57 AM UTC 24 |
Sep 04 10:28:50 AM UTC 24 |
228423617229 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.1603124085 |
|
|
Sep 04 10:26:19 AM UTC 24 |
Sep 04 10:28:51 AM UTC 24 |
78869355982 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.4160997791 |
|
|
Sep 04 10:28:49 AM UTC 24 |
Sep 04 10:28:53 AM UTC 24 |
1891375210 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_stress_all.422937281 |
|
|
Sep 04 10:24:18 AM UTC 24 |
Sep 04 10:28:53 AM UTC 24 |
140989970319 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_rx_oversample.3683588222 |
|
|
Sep 04 10:28:36 AM UTC 24 |
Sep 04 10:28:55 AM UTC 24 |
2105159127 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_alert_test.24868577 |
|
|
Sep 04 10:28:56 AM UTC 24 |
Sep 04 10:28:57 AM UTC 24 |
12961154 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_smoke.2731161134 |
|
|
Sep 04 10:28:58 AM UTC 24 |
Sep 04 10:29:00 AM UTC 24 |
453682239 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.2573807099 |
|
|
Sep 04 10:27:10 AM UTC 24 |
Sep 04 10:29:02 AM UTC 24 |
70884887014 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_loopback.2223202383 |
|
|
Sep 04 10:28:49 AM UTC 24 |
Sep 04 10:29:03 AM UTC 24 |
8614432597 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.3785190755 |
|
|
Sep 04 10:25:15 AM UTC 24 |
Sep 04 10:29:04 AM UTC 24 |
85223141167 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.1367111073 |
|
|
Sep 04 10:28:41 AM UTC 24 |
Sep 04 10:29:04 AM UTC 24 |
5855196492 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_intr.836287742 |
|
|
Sep 04 10:28:40 AM UTC 24 |
Sep 04 10:29:05 AM UTC 24 |
13557927930 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_fifo_full.391839330 |
|
|
Sep 04 10:27:36 AM UTC 24 |
Sep 04 10:29:07 AM UTC 24 |
48235974652 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/25.uart_intr.3549456549 |
|
|
Sep 04 10:25:08 AM UTC 24 |
Sep 04 10:29:12 AM UTC 24 |
219686144239 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_intr.399516895 |
|
|
Sep 04 10:29:06 AM UTC 24 |
Sep 04 10:29:13 AM UTC 24 |
6164338721 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_long_xfer_wo_dly.117311514 |
|
|
Sep 04 10:26:40 AM UTC 24 |
Sep 04 10:29:14 AM UTC 24 |
61664488499 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.644882472 |
|
|
Sep 04 10:28:48 AM UTC 24 |
Sep 04 10:29:18 AM UTC 24 |
55470365534 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_fifo_reset.1769184267 |
|
|
Sep 04 10:28:26 AM UTC 24 |
Sep 04 10:29:18 AM UTC 24 |
228912362388 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.711715501 |
|
|
Sep 04 10:29:13 AM UTC 24 |
Sep 04 10:29:20 AM UTC 24 |
6558234366 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.1801396001 |
|
|
Sep 04 10:29:14 AM UTC 24 |
Sep 04 10:29:22 AM UTC 24 |
831974746 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.137445197 |
|
|
Sep 04 10:28:16 AM UTC 24 |
Sep 04 10:29:29 AM UTC 24 |
3633370444 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.3004056466 |
|
|
Sep 04 10:27:37 AM UTC 24 |
Sep 04 10:29:31 AM UTC 24 |
31982843469 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_alert_test.178577144 |
|
|
Sep 04 10:29:32 AM UTC 24 |
Sep 04 10:29:34 AM UTC 24 |
34490277 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_loopback.3849571205 |
|
|
Sep 04 10:29:18 AM UTC 24 |
Sep 04 10:29:36 AM UTC 24 |
12224864373 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_fifo_full.559818336 |
|
|
Sep 04 10:29:03 AM UTC 24 |
Sep 04 10:29:37 AM UTC 24 |
40445905036 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_smoke.1929475198 |
|
|
Sep 04 10:29:35 AM UTC 24 |
Sep 04 10:29:38 AM UTC 24 |
1003275841 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_tx_rx.3457773807 |
|
|
Sep 04 10:29:36 AM UTC 24 |
Sep 04 10:29:39 AM UTC 24 |
697436958 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_stress_all.2271254197 |
|
|
Sep 04 10:23:56 AM UTC 24 |
Sep 04 10:29:40 AM UTC 24 |
215142938051 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_tx_rx.3634547389 |
|
|
Sep 04 10:28:22 AM UTC 24 |
Sep 04 10:29:44 AM UTC 24 |
70430429542 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.1090741775 |
|
|
Sep 04 10:11:04 AM UTC 24 |
Sep 04 10:29:44 AM UTC 24 |
152843249153 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_rx_oversample.3174855656 |
|
|
Sep 04 10:29:05 AM UTC 24 |
Sep 04 10:29:45 AM UTC 24 |
4821817873 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/18.uart_perf.2242668743 |
|
|
Sep 04 10:19:41 AM UTC 24 |
Sep 04 10:29:47 AM UTC 24 |
11486466384 ps |