| T632 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.2541631619 |
|
|
Sep 04 10:28:05 AM UTC 24 |
Sep 04 10:29:48 AM UTC 24 |
140555217872 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_rx_oversample.2615803990 |
|
|
Sep 04 10:29:41 AM UTC 24 |
Sep 04 10:29:49 AM UTC 24 |
3250256649 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.1645988424 |
|
|
Sep 04 10:29:45 AM UTC 24 |
Sep 04 10:29:50 AM UTC 24 |
2030181149 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_stress_all.2061292894 |
|
|
Sep 04 10:23:22 AM UTC 24 |
Sep 04 10:29:50 AM UTC 24 |
160260205084 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.1724032047 |
|
|
Sep 04 10:29:23 AM UTC 24 |
Sep 04 10:29:56 AM UTC 24 |
2313610058 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.51042827 |
|
|
Sep 04 10:24:15 AM UTC 24 |
Sep 04 10:29:57 AM UTC 24 |
68027899848 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.980589652 |
|
|
Sep 04 10:29:04 AM UTC 24 |
Sep 04 10:29:59 AM UTC 24 |
49230309620 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_intr.791944512 |
|
|
Sep 04 10:25:35 AM UTC 24 |
Sep 04 10:30:00 AM UTC 24 |
193830764239 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_perf.2014532373 |
|
|
Sep 04 10:24:43 AM UTC 24 |
Sep 04 10:30:02 AM UTC 24 |
11766713556 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_alert_test.922723664 |
|
|
Sep 04 10:30:00 AM UTC 24 |
Sep 04 10:30:02 AM UTC 24 |
14164627 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_smoke.3423528770 |
|
|
Sep 04 10:30:00 AM UTC 24 |
Sep 04 10:30:03 AM UTC 24 |
641240597 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_noise_filter.3052044218 |
|
|
Sep 04 10:29:07 AM UTC 24 |
Sep 04 10:30:04 AM UTC 24 |
38425283802 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.1191901367 |
|
|
Sep 04 10:28:53 AM UTC 24 |
Sep 04 10:30:05 AM UTC 24 |
9165190807 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_loopback.2883503643 |
|
|
Sep 04 10:29:50 AM UTC 24 |
Sep 04 10:30:05 AM UTC 24 |
5869339427 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_stress_all.4225444902 |
|
|
Sep 04 10:28:53 AM UTC 24 |
Sep 04 10:30:06 AM UTC 24 |
48876183966 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_stress_all.2082827174 |
|
|
Sep 04 10:29:30 AM UTC 24 |
Sep 04 10:30:07 AM UTC 24 |
6136450016 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_noise_filter.1919823475 |
|
|
Sep 04 10:27:56 AM UTC 24 |
Sep 04 10:30:09 AM UTC 24 |
70897274894 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.2777287367 |
|
|
Sep 04 10:23:06 AM UTC 24 |
Sep 04 10:30:11 AM UTC 24 |
74096998688 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.600546160 |
|
|
Sep 04 10:29:49 AM UTC 24 |
Sep 04 10:30:11 AM UTC 24 |
6701736139 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.2380006792 |
|
|
Sep 04 10:30:08 AM UTC 24 |
Sep 04 10:30:12 AM UTC 24 |
4400768470 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.2919337664 |
|
|
Sep 04 10:29:38 AM UTC 24 |
Sep 04 10:30:13 AM UTC 24 |
16827895030 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_noise_filter.2092134329 |
|
|
Sep 04 10:28:41 AM UTC 24 |
Sep 04 10:30:14 AM UTC 24 |
153409189437 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/24.uart_long_xfer_wo_dly.98687399 |
|
|
Sep 04 10:24:49 AM UTC 24 |
Sep 04 10:30:14 AM UTC 24 |
51176800273 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.1225340247 |
|
|
Sep 04 10:30:10 AM UTC 24 |
Sep 04 10:30:16 AM UTC 24 |
969219677 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_alert_test.1361807812 |
|
|
Sep 04 10:30:15 AM UTC 24 |
Sep 04 10:30:17 AM UTC 24 |
16273232 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_fifo_reset.2166409066 |
|
|
Sep 04 10:29:39 AM UTC 24 |
Sep 04 10:30:18 AM UTC 24 |
44826918969 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_smoke.3210958983 |
|
|
Sep 04 10:30:16 AM UTC 24 |
Sep 04 10:30:20 AM UTC 24 |
445106827 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2719228456 |
|
|
Sep 04 10:29:57 AM UTC 24 |
Sep 04 10:30:21 AM UTC 24 |
1076292966 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_fifo_reset.2607569491 |
|
|
Sep 04 10:26:54 AM UTC 24 |
Sep 04 10:30:29 AM UTC 24 |
49171684083 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_loopback.3363677910 |
|
|
Sep 04 10:30:11 AM UTC 24 |
Sep 04 10:30:29 AM UTC 24 |
8775958395 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_fifo_full.2423379159 |
|
|
Sep 04 10:30:02 AM UTC 24 |
Sep 04 10:30:31 AM UTC 24 |
33042753330 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_rx_oversample.254795463 |
|
|
Sep 04 10:30:06 AM UTC 24 |
Sep 04 10:30:33 AM UTC 24 |
4932142511 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_noise_filter.2163593281 |
|
|
Sep 04 10:29:45 AM UTC 24 |
Sep 04 10:30:36 AM UTC 24 |
17695032476 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_tx_rx.652376572 |
|
|
Sep 04 10:30:02 AM UTC 24 |
Sep 04 10:30:40 AM UTC 24 |
15211367280 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_intr.2144875297 |
|
|
Sep 04 10:18:02 AM UTC 24 |
Sep 04 10:30:41 AM UTC 24 |
382948317879 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.1625157458 |
|
|
Sep 04 10:30:40 AM UTC 24 |
Sep 04 10:30:43 AM UTC 24 |
521423470 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/15.uart_fifo_full.1297365028 |
|
|
Sep 04 10:16:07 AM UTC 24 |
Sep 04 10:30:43 AM UTC 24 |
303741786771 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_loopback.2278954037 |
|
|
Sep 04 10:30:42 AM UTC 24 |
Sep 04 10:30:45 AM UTC 24 |
211257416 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.3113815321 |
|
|
Sep 04 10:30:34 AM UTC 24 |
Sep 04 10:30:53 AM UTC 24 |
47617344838 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_alert_test.2115034021 |
|
|
Sep 04 10:30:55 AM UTC 24 |
Sep 04 10:30:57 AM UTC 24 |
12328200 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_noise_filter.2088431912 |
|
|
Sep 04 10:30:32 AM UTC 24 |
Sep 04 10:31:01 AM UTC 24 |
39996073616 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_smoke.3897714726 |
|
|
Sep 04 10:30:58 AM UTC 24 |
Sep 04 10:31:02 AM UTC 24 |
511537944 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_noise_filter.460586498 |
|
|
Sep 04 10:30:06 AM UTC 24 |
Sep 04 10:31:05 AM UTC 24 |
53704664826 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.3764543609 |
|
|
Sep 04 10:29:13 AM UTC 24 |
Sep 04 10:31:09 AM UTC 24 |
43623757476 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.1034351778 |
|
|
Sep 04 10:30:14 AM UTC 24 |
Sep 04 10:31:11 AM UTC 24 |
3152775951 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_rx_oversample.777798833 |
|
|
Sep 04 10:31:11 AM UTC 24 |
Sep 04 10:31:14 AM UTC 24 |
1197763225 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.4054818540 |
|
|
Sep 04 10:30:12 AM UTC 24 |
Sep 04 10:31:15 AM UTC 24 |
33683391486 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.1081171883 |
|
|
Sep 04 10:27:25 AM UTC 24 |
Sep 04 10:31:16 AM UTC 24 |
104603048848 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_fifo_full.2475956788 |
|
|
Sep 04 10:31:03 AM UTC 24 |
Sep 04 10:31:19 AM UTC 24 |
106332154361 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.3411126915 |
|
|
Sep 04 10:31:06 AM UTC 24 |
Sep 04 10:31:25 AM UTC 24 |
23266701251 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_fifo_full.2911361747 |
|
|
Sep 04 10:30:18 AM UTC 24 |
Sep 04 10:31:26 AM UTC 24 |
34355566964 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.3171476235 |
|
|
Sep 04 10:31:18 AM UTC 24 |
Sep 04 10:31:27 AM UTC 24 |
2009268326 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/28.uart_fifo_full.1387831029 |
|
|
Sep 04 10:26:51 AM UTC 24 |
Sep 04 10:31:29 AM UTC 24 |
87335264661 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_intr.1072771388 |
|
|
Sep 04 10:31:15 AM UTC 24 |
Sep 04 10:31:30 AM UTC 24 |
11670323808 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_tx_rx.313832466 |
|
|
Sep 04 10:31:02 AM UTC 24 |
Sep 04 10:31:31 AM UTC 24 |
20881455395 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_loopback.309756302 |
|
|
Sep 04 10:31:27 AM UTC 24 |
Sep 04 10:31:34 AM UTC 24 |
2231928643 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_fifo_overflow.2359697627 |
|
|
Sep 04 10:30:22 AM UTC 24 |
Sep 04 10:31:34 AM UTC 24 |
97871262797 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/17.uart_perf.680641675 |
|
|
Sep 04 10:18:28 AM UTC 24 |
Sep 04 10:31:35 AM UTC 24 |
14206515885 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_fifo_reset.57993285 |
|
|
Sep 04 10:31:09 AM UTC 24 |
Sep 04 10:31:36 AM UTC 24 |
33550539249 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_alert_test.485295550 |
|
|
Sep 04 10:31:34 AM UTC 24 |
Sep 04 10:31:36 AM UTC 24 |
45046127 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_fifo_reset.2904806634 |
|
|
Sep 04 10:30:06 AM UTC 24 |
Sep 04 10:31:37 AM UTC 24 |
97821918720 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_smoke.3159532730 |
|
|
Sep 04 10:31:35 AM UTC 24 |
Sep 04 10:31:38 AM UTC 24 |
976477165 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_tx_rx.2336515501 |
|
|
Sep 04 10:30:17 AM UTC 24 |
Sep 04 10:31:41 AM UTC 24 |
137964332531 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.1212340616 |
|
|
Sep 04 10:29:48 AM UTC 24 |
Sep 04 10:31:42 AM UTC 24 |
118022400578 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_rx_oversample.2876914673 |
|
|
Sep 04 10:30:30 AM UTC 24 |
Sep 04 10:31:43 AM UTC 24 |
8223200852 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.54563923 |
|
|
Sep 04 10:30:04 AM UTC 24 |
Sep 04 10:31:44 AM UTC 24 |
43028231591 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.1747248109 |
|
|
Sep 04 10:31:20 AM UTC 24 |
Sep 04 10:31:47 AM UTC 24 |
122890705762 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.2676851995 |
|
|
Sep 04 10:28:23 AM UTC 24 |
Sep 04 10:31:48 AM UTC 24 |
113622742816 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_tx_rx.1190388257 |
|
|
Sep 04 10:29:01 AM UTC 24 |
Sep 04 10:31:50 AM UTC 24 |
74159483423 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_intr.3114498888 |
|
|
Sep 04 10:31:42 AM UTC 24 |
Sep 04 10:31:51 AM UTC 24 |
9376264730 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.1879821410 |
|
|
Sep 04 10:31:44 AM UTC 24 |
Sep 04 10:31:51 AM UTC 24 |
4247386498 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_loopback.2426275564 |
|
|
Sep 04 10:31:49 AM UTC 24 |
Sep 04 10:31:55 AM UTC 24 |
1487385621 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.2655261443 |
|
|
Sep 04 10:31:38 AM UTC 24 |
Sep 04 10:31:55 AM UTC 24 |
98332184206 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_alert_test.2406569317 |
|
|
Sep 04 10:31:55 AM UTC 24 |
Sep 04 10:31:57 AM UTC 24 |
46979816 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.2150836615 |
|
|
Sep 04 10:31:26 AM UTC 24 |
Sep 04 10:31:58 AM UTC 24 |
7203300616 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_smoke.3034045700 |
|
|
Sep 04 10:31:59 AM UTC 24 |
Sep 04 10:32:01 AM UTC 24 |
101072659 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_fifo_reset.2333053384 |
|
|
Sep 04 10:25:35 AM UTC 24 |
Sep 04 10:32:03 AM UTC 24 |
122367506786 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_rx_oversample.1179604596 |
|
|
Sep 04 10:31:39 AM UTC 24 |
Sep 04 10:32:06 AM UTC 24 |
6184423025 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.4004633835 |
|
|
Sep 04 10:30:08 AM UTC 24 |
Sep 04 10:32:08 AM UTC 24 |
315186083418 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.4156609514 |
|
|
Sep 04 10:31:31 AM UTC 24 |
Sep 04 10:32:09 AM UTC 24 |
7686914367 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.2902518504 |
|
|
Sep 04 10:31:45 AM UTC 24 |
Sep 04 10:32:10 AM UTC 24 |
25380913034 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_fifo_reset.1757989902 |
|
|
Sep 04 10:31:39 AM UTC 24 |
Sep 04 10:32:12 AM UTC 24 |
17091219999 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_rx_oversample.1434006814 |
|
|
Sep 04 10:32:09 AM UTC 24 |
Sep 04 10:32:13 AM UTC 24 |
2029137566 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_intr.3983557714 |
|
|
Sep 04 10:29:44 AM UTC 24 |
Sep 04 10:32:14 AM UTC 24 |
54162354795 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.1198765676 |
|
|
Sep 04 10:31:48 AM UTC 24 |
Sep 04 10:32:15 AM UTC 24 |
6446185369 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.4294588737 |
|
|
Sep 04 10:30:45 AM UTC 24 |
Sep 04 10:32:16 AM UTC 24 |
14441776012 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_loopback.4196651323 |
|
|
Sep 04 10:32:16 AM UTC 24 |
Sep 04 10:32:18 AM UTC 24 |
58276665 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.2812437555 |
|
|
Sep 04 10:32:13 AM UTC 24 |
Sep 04 10:32:20 AM UTC 24 |
3159792764 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_noise_filter.3274039835 |
|
|
Sep 04 10:31:43 AM UTC 24 |
Sep 04 10:32:22 AM UTC 24 |
15555139639 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_fifo_reset.933144116 |
|
|
Sep 04 10:32:07 AM UTC 24 |
Sep 04 10:32:38 AM UTC 24 |
29349594568 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_intr.808109376 |
|
|
Sep 04 10:30:30 AM UTC 24 |
Sep 04 10:32:40 AM UTC 24 |
48838329986 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_alert_test.2509053251 |
|
|
Sep 04 10:32:39 AM UTC 24 |
Sep 04 10:32:41 AM UTC 24 |
10728695 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_fifo_full.1177683462 |
|
|
Sep 04 10:29:37 AM UTC 24 |
Sep 04 10:32:41 AM UTC 24 |
152017102182 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_smoke.4244906322 |
|
|
Sep 04 10:32:41 AM UTC 24 |
Sep 04 10:32:44 AM UTC 24 |
526871870 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_fifo_full.3422185109 |
|
|
Sep 04 10:32:02 AM UTC 24 |
Sep 04 10:32:47 AM UTC 24 |
104970550298 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.3438795207 |
|
|
Sep 04 10:30:37 AM UTC 24 |
Sep 04 10:32:52 AM UTC 24 |
63134218758 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.3850322334 |
|
|
Sep 04 10:17:30 AM UTC 24 |
Sep 04 10:32:52 AM UTC 24 |
115229950957 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.3349684760 |
|
|
Sep 04 10:32:14 AM UTC 24 |
Sep 04 10:32:53 AM UTC 24 |
6860466207 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.617532600 |
|
|
Sep 04 10:32:04 AM UTC 24 |
Sep 04 10:33:00 AM UTC 24 |
75429974193 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_tx_rx.3861975154 |
|
|
Sep 04 10:32:42 AM UTC 24 |
Sep 04 10:33:01 AM UTC 24 |
24171505908 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_intr.1996440965 |
|
|
Sep 04 10:32:52 AM UTC 24 |
Sep 04 10:33:10 AM UTC 24 |
31594426021 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_rx_oversample.3417755800 |
|
|
Sep 04 10:32:52 AM UTC 24 |
Sep 04 10:33:11 AM UTC 24 |
5389386376 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.2904484243 |
|
|
Sep 04 10:33:00 AM UTC 24 |
Sep 04 10:33:12 AM UTC 24 |
45359625235 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.956188640 |
|
|
Sep 04 10:32:21 AM UTC 24 |
Sep 04 10:33:16 AM UTC 24 |
5204848256 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.3065881258 |
|
|
Sep 04 10:33:11 AM UTC 24 |
Sep 04 10:33:17 AM UTC 24 |
1291370763 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_fifo_reset.3772172347 |
|
|
Sep 04 10:32:48 AM UTC 24 |
Sep 04 10:33:19 AM UTC 24 |
70684768248 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_intr.2022873321 |
|
|
Sep 04 10:32:10 AM UTC 24 |
Sep 04 10:33:21 AM UTC 24 |
237312043101 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.51407940 |
|
|
Sep 04 10:31:52 AM UTC 24 |
Sep 04 10:33:23 AM UTC 24 |
18621370197 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_alert_test.585090293 |
|
|
Sep 04 10:33:22 AM UTC 24 |
Sep 04 10:33:24 AM UTC 24 |
44197000 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_fifo_full.1994169532 |
|
|
Sep 04 10:32:42 AM UTC 24 |
Sep 04 10:33:24 AM UTC 24 |
26418003583 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_smoke.1291911605 |
|
|
Sep 04 10:33:24 AM UTC 24 |
Sep 04 10:33:28 AM UTC 24 |
676881550 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.947152507 |
|
|
Sep 04 10:33:02 AM UTC 24 |
Sep 04 10:33:30 AM UTC 24 |
36334292203 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.3389665658 |
|
|
Sep 04 10:32:14 AM UTC 24 |
Sep 04 10:33:30 AM UTC 24 |
93589880215 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_stress_all.3100363134 |
|
|
Sep 04 10:31:55 AM UTC 24 |
Sep 04 10:33:33 AM UTC 24 |
60002184514 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/6.uart_stress_all.1474818840 |
|
|
Sep 04 10:09:14 AM UTC 24 |
Sep 04 10:33:35 AM UTC 24 |
39087398941 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_loopback.2144434430 |
|
|
Sep 04 10:33:12 AM UTC 24 |
Sep 04 10:33:35 AM UTC 24 |
7895859388 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.90804664 |
|
|
Sep 04 10:23:51 AM UTC 24 |
Sep 04 10:33:42 AM UTC 24 |
141115197714 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_perf.4043349071 |
|
|
Sep 04 10:28:50 AM UTC 24 |
Sep 04 10:33:44 AM UTC 24 |
20427175748 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_fifo_reset.4051496698 |
|
|
Sep 04 10:29:05 AM UTC 24 |
Sep 04 10:33:45 AM UTC 24 |
107745736536 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_rx_oversample.2604202720 |
|
|
Sep 04 10:33:31 AM UTC 24 |
Sep 04 10:33:50 AM UTC 24 |
5787104083 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_fifo_reset.3113885359 |
|
|
Sep 04 10:30:22 AM UTC 24 |
Sep 04 10:33:50 AM UTC 24 |
64679353274 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_fifo_full.429893751 |
|
|
Sep 04 10:33:25 AM UTC 24 |
Sep 04 10:33:55 AM UTC 24 |
27747086073 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/32.uart_perf.2430957594 |
|
|
Sep 04 10:29:51 AM UTC 24 |
Sep 04 10:33:57 AM UTC 24 |
16996237538 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.1901603403 |
|
|
Sep 04 10:33:29 AM UTC 24 |
Sep 04 10:33:58 AM UTC 24 |
36141972808 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_loopback.1535592519 |
|
|
Sep 04 10:33:45 AM UTC 24 |
Sep 04 10:33:59 AM UTC 24 |
5243701393 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_alert_test.131816004 |
|
|
Sep 04 10:33:59 AM UTC 24 |
Sep 04 10:34:01 AM UTC 24 |
12563442 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_smoke.854590307 |
|
|
Sep 04 10:34:00 AM UTC 24 |
Sep 04 10:34:03 AM UTC 24 |
692539468 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_intr.3995626464 |
|
|
Sep 04 10:33:34 AM UTC 24 |
Sep 04 10:34:06 AM UTC 24 |
22867027867 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_noise_filter.230174777 |
|
|
Sep 04 10:32:54 AM UTC 24 |
Sep 04 10:34:09 AM UTC 24 |
71265058217 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_fifo_reset.1881993325 |
|
|
Sep 04 10:33:31 AM UTC 24 |
Sep 04 10:34:15 AM UTC 24 |
114955820908 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.1600924249 |
|
|
Sep 04 10:32:20 AM UTC 24 |
Sep 04 10:34:17 AM UTC 24 |
184748614335 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.189527265 |
|
|
Sep 04 10:33:18 AM UTC 24 |
Sep 04 10:34:18 AM UTC 24 |
3507429912 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.1256505881 |
|
|
Sep 04 10:28:16 AM UTC 24 |
Sep 04 10:34:18 AM UTC 24 |
152339115168 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.3694231770 |
|
|
Sep 04 10:33:45 AM UTC 24 |
Sep 04 10:34:20 AM UTC 24 |
6539101214 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.3420048384 |
|
|
Sep 04 10:26:31 AM UTC 24 |
Sep 04 10:34:22 AM UTC 24 |
188293846063 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.3857282234 |
|
|
Sep 04 10:34:19 AM UTC 24 |
Sep 04 10:34:25 AM UTC 24 |
4535844579 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.163027099 |
|
|
Sep 04 10:34:23 AM UTC 24 |
Sep 04 10:34:30 AM UTC 24 |
2524492659 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_loopback.2021227956 |
|
|
Sep 04 10:34:26 AM UTC 24 |
Sep 04 10:34:30 AM UTC 24 |
377323683 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_noise_filter.3503102409 |
|
|
Sep 04 10:32:11 AM UTC 24 |
Sep 04 10:34:31 AM UTC 24 |
77353263461 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.1182010936 |
|
|
Sep 04 10:33:55 AM UTC 24 |
Sep 04 10:34:31 AM UTC 24 |
7401884399 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_fifo_full.3294878185 |
|
|
Sep 04 10:28:22 AM UTC 24 |
Sep 04 10:34:31 AM UTC 24 |
129237689308 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_alert_test.1829551831 |
|
|
Sep 04 10:34:32 AM UTC 24 |
Sep 04 10:34:34 AM UTC 24 |
36972745 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_noise_filter.3151520888 |
|
|
Sep 04 10:31:17 AM UTC 24 |
Sep 04 10:34:35 AM UTC 24 |
350038268855 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_fifo_reset.3615045957 |
|
|
Sep 04 10:34:10 AM UTC 24 |
Sep 04 10:34:37 AM UTC 24 |
21889629015 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_smoke.2106347695 |
|
|
Sep 04 10:34:35 AM UTC 24 |
Sep 04 10:34:38 AM UTC 24 |
488790573 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_rx_oversample.1324288317 |
|
|
Sep 04 10:34:16 AM UTC 24 |
Sep 04 10:34:40 AM UTC 24 |
3552177393 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.4074488435 |
|
|
Sep 04 10:33:36 AM UTC 24 |
Sep 04 10:34:41 AM UTC 24 |
36435213270 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_tx_rx.468834192 |
|
|
Sep 04 10:31:35 AM UTC 24 |
Sep 04 10:34:46 AM UTC 24 |
80999150601 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_noise_filter.2710821639 |
|
|
Sep 04 10:33:36 AM UTC 24 |
Sep 04 10:34:48 AM UTC 24 |
34524497234 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_stress_all.4013860373 |
|
|
Sep 04 10:28:19 AM UTC 24 |
Sep 04 10:34:48 AM UTC 24 |
234014689360 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_fifo_full.3537512310 |
|
|
Sep 04 10:31:36 AM UTC 24 |
Sep 04 10:34:49 AM UTC 24 |
147544236093 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_tx_rx.328808478 |
|
|
Sep 04 10:34:02 AM UTC 24 |
Sep 04 10:34:49 AM UTC 24 |
23437949071 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_intr.3490033209 |
|
|
Sep 04 10:34:18 AM UTC 24 |
Sep 04 10:34:49 AM UTC 24 |
45859077194 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.72227786 |
|
|
Sep 04 10:34:07 AM UTC 24 |
Sep 04 10:34:53 AM UTC 24 |
100549289840 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.434167667 |
|
|
Sep 04 10:34:50 AM UTC 24 |
Sep 04 10:35:04 AM UTC 24 |
7549978636 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_loopback.2065815801 |
|
|
Sep 04 10:34:51 AM UTC 24 |
Sep 04 10:35:05 AM UTC 24 |
4304805449 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_intr.2315608870 |
|
|
Sep 04 10:34:46 AM UTC 24 |
Sep 04 10:35:06 AM UTC 24 |
6456917119 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_rx_oversample.2923561041 |
|
|
Sep 04 10:34:42 AM UTC 24 |
Sep 04 10:35:06 AM UTC 24 |
3184229576 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_perf.657866838 |
|
|
Sep 04 10:31:28 AM UTC 24 |
Sep 04 10:35:08 AM UTC 24 |
15933316679 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_alert_test.1696475273 |
|
|
Sep 04 10:35:07 AM UTC 24 |
Sep 04 10:35:09 AM UTC 24 |
20522460 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_perf.281780419 |
|
|
Sep 04 10:28:10 AM UTC 24 |
Sep 04 10:35:10 AM UTC 24 |
16408949236 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.1582377401 |
|
|
Sep 04 10:35:06 AM UTC 24 |
Sep 04 10:35:20 AM UTC 24 |
1421819831 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/34.uart_long_xfer_wo_dly.4007176764 |
|
|
Sep 04 10:30:44 AM UTC 24 |
Sep 04 10:35:28 AM UTC 24 |
43540023043 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_perf.1711084090 |
|
|
Sep 04 10:30:12 AM UTC 24 |
Sep 04 10:35:29 AM UTC 24 |
21058125236 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.2512377266 |
|
|
Sep 04 10:34:32 AM UTC 24 |
Sep 04 10:35:32 AM UTC 24 |
12595197104 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_smoke.2350403238 |
|
|
Sep 04 10:35:09 AM UTC 24 |
Sep 04 10:35:37 AM UTC 24 |
5305607098 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.1407142937 |
|
|
Sep 04 10:33:43 AM UTC 24 |
Sep 04 10:35:39 AM UTC 24 |
92109949086 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.316363841 |
|
|
Sep 04 10:28:51 AM UTC 24 |
Sep 04 10:35:41 AM UTC 24 |
164638856319 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.3255695693 |
|
|
Sep 04 10:32:44 AM UTC 24 |
Sep 04 10:35:43 AM UTC 24 |
68924632218 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/37.uart_tx_rx.719192657 |
|
|
Sep 04 10:31:59 AM UTC 24 |
Sep 04 10:35:47 AM UTC 24 |
107330659239 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_rx_oversample.612208950 |
|
|
Sep 04 10:35:31 AM UTC 24 |
Sep 04 10:35:48 AM UTC 24 |
6177131922 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.310955591 |
|
|
Sep 04 10:35:40 AM UTC 24 |
Sep 04 10:35:50 AM UTC 24 |
4423351353 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_stress_all.3303718595 |
|
|
Sep 04 10:34:32 AM UTC 24 |
Sep 04 10:35:51 AM UTC 24 |
40487665033 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.3636959160 |
|
|
Sep 04 10:34:50 AM UTC 24 |
Sep 04 10:35:53 AM UTC 24 |
128368786897 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_noise_filter.2751785054 |
|
|
Sep 04 10:35:38 AM UTC 24 |
Sep 04 10:35:56 AM UTC 24 |
65155218318 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/49.uart_noise_filter.1072777480 |
|
|
Sep 04 10:40:06 AM UTC 24 |
Sep 04 10:40:31 AM UTC 24 |
41136099647 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_loopback.521847333 |
|
|
Sep 04 10:35:48 AM UTC 24 |
Sep 04 10:35:59 AM UTC 24 |
9302899673 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_alert_test.2631676275 |
|
|
Sep 04 10:35:57 AM UTC 24 |
Sep 04 10:35:59 AM UTC 24 |
35761340 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.4159454673 |
|
|
Sep 04 10:35:43 AM UTC 24 |
Sep 04 10:36:08 AM UTC 24 |
6627784708 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/29.uart_intr.3230647666 |
|
|
Sep 04 10:27:51 AM UTC 24 |
Sep 04 10:36:10 AM UTC 24 |
240213242376 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_stress_all.2397818692 |
|
|
Sep 04 10:37:43 AM UTC 24 |
Sep 04 10:40:34 AM UTC 24 |
608083937916 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.1912504090 |
|
|
Sep 04 10:34:50 AM UTC 24 |
Sep 04 10:36:12 AM UTC 24 |
36712341261 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/16.uart_perf.3659171366 |
|
|
Sep 04 10:17:30 AM UTC 24 |
Sep 04 10:36:14 AM UTC 24 |
21135946137 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_noise_filter.1528816825 |
|
|
Sep 04 10:34:48 AM UTC 24 |
Sep 04 10:36:17 AM UTC 24 |
123140616837 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/36.uart_perf.2187828774 |
|
|
Sep 04 10:31:51 AM UTC 24 |
Sep 04 10:36:17 AM UTC 24 |
23475033768 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.1731823982 |
|
|
Sep 04 10:36:11 AM UTC 24 |
Sep 04 10:36:21 AM UTC 24 |
10178142026 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_tx_rx.870659959 |
|
|
Sep 04 10:34:36 AM UTC 24 |
Sep 04 10:36:22 AM UTC 24 |
61821348660 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_rx_oversample.1423727200 |
|
|
Sep 04 10:36:15 AM UTC 24 |
Sep 04 10:36:27 AM UTC 24 |
3391398034 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_smoke.1079173447 |
|
|
Sep 04 10:35:59 AM UTC 24 |
Sep 04 10:36:29 AM UTC 24 |
11591189889 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.984917164 |
|
|
Sep 04 10:36:22 AM UTC 24 |
Sep 04 10:36:31 AM UTC 24 |
2780991780 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.4166370221 |
|
|
Sep 04 10:36:28 AM UTC 24 |
Sep 04 10:36:33 AM UTC 24 |
1218583469 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_tx_rx.2956479373 |
|
|
Sep 04 10:36:01 AM UTC 24 |
Sep 04 10:36:34 AM UTC 24 |
32369654944 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/39.uart_tx_rx.3622355208 |
|
|
Sep 04 10:33:24 AM UTC 24 |
Sep 04 10:36:42 AM UTC 24 |
123519919005 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.2220508573 |
|
|
Sep 04 10:35:52 AM UTC 24 |
Sep 04 10:36:43 AM UTC 24 |
6525566143 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_loopback.107336152 |
|
|
Sep 04 10:36:30 AM UTC 24 |
Sep 04 10:36:45 AM UTC 24 |
9562727628 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_fifo_reset.1193153073 |
|
|
Sep 04 10:36:13 AM UTC 24 |
Sep 04 10:36:45 AM UTC 24 |
39932941746 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_alert_test.1657363159 |
|
|
Sep 04 10:36:44 AM UTC 24 |
Sep 04 10:36:46 AM UTC 24 |
15843208 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/33.uart_stress_all.1143129307 |
|
|
Sep 04 10:30:15 AM UTC 24 |
Sep 04 10:36:46 AM UTC 24 |
245615495304 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_fifo_full.3223176028 |
|
|
Sep 04 10:35:10 AM UTC 24 |
Sep 04 10:36:48 AM UTC 24 |
237128475585 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_smoke.3989919974 |
|
|
Sep 04 10:36:46 AM UTC 24 |
Sep 04 10:36:50 AM UTC 24 |
459002851 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.1835867429 |
|
|
Sep 04 10:34:21 AM UTC 24 |
Sep 04 10:36:51 AM UTC 24 |
69337226806 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.873109113 |
|
|
Sep 04 10:34:39 AM UTC 24 |
Sep 04 10:36:58 AM UTC 24 |
120012375178 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_tx_rx.2740894598 |
|
|
Sep 04 10:36:46 AM UTC 24 |
Sep 04 10:37:03 AM UTC 24 |
39459010490 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_perf.3543718302 |
|
|
Sep 04 10:29:19 AM UTC 24 |
Sep 04 10:37:04 AM UTC 24 |
16220081198 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_noise_filter.281292871 |
|
|
Sep 04 10:36:18 AM UTC 24 |
Sep 04 10:37:06 AM UTC 24 |
58136016603 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_tx_rx.2068596549 |
|
|
Sep 04 10:35:10 AM UTC 24 |
Sep 04 10:37:06 AM UTC 24 |
91974437148 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_rx_oversample.981243171 |
|
|
Sep 04 10:36:50 AM UTC 24 |
Sep 04 10:37:06 AM UTC 24 |
4630812248 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.61076998 |
|
|
Sep 04 10:36:35 AM UTC 24 |
Sep 04 10:37:11 AM UTC 24 |
3204139759 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_fifo_reset.3742094323 |
|
|
Sep 04 10:35:28 AM UTC 24 |
Sep 04 10:37:12 AM UTC 24 |
44964654250 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/35.uart_long_xfer_wo_dly.1829623031 |
|
|
Sep 04 10:31:30 AM UTC 24 |
Sep 04 10:37:15 AM UTC 24 |
49246607832 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.1746916316 |
|
|
Sep 04 10:37:04 AM UTC 24 |
Sep 04 10:37:16 AM UTC 24 |
5487643531 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_noise_filter.3492837853 |
|
|
Sep 04 10:36:59 AM UTC 24 |
Sep 04 10:37:18 AM UTC 24 |
34357309048 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_rx_parity_err.265847974 |
|
|
Sep 04 10:37:05 AM UTC 24 |
Sep 04 10:37:18 AM UTC 24 |
7252575403 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_intr.116046067 |
|
|
Sep 04 10:36:51 AM UTC 24 |
Sep 04 10:37:18 AM UTC 24 |
16644223017 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/40.uart_noise_filter.3983410548 |
|
|
Sep 04 10:34:19 AM UTC 24 |
Sep 04 10:37:18 AM UTC 24 |
77597580462 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.4050115090 |
|
|
Sep 04 10:36:47 AM UTC 24 |
Sep 04 10:37:19 AM UTC 24 |
17720006544 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_alert_test.3700017559 |
|
|
Sep 04 10:37:17 AM UTC 24 |
Sep 04 10:37:19 AM UTC 24 |
15317325 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_smoke.1137280829 |
|
|
Sep 04 10:37:18 AM UTC 24 |
Sep 04 10:37:21 AM UTC 24 |
102043305 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.13585679 |
|
|
Sep 04 10:29:21 AM UTC 24 |
Sep 04 10:37:29 AM UTC 24 |
128723149942 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_stress_all_with_rand_reset.1282759012 |
|
|
Sep 04 10:37:13 AM UTC 24 |
Sep 04 10:37:29 AM UTC 24 |
10969725176 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_loopback.393440110 |
|
|
Sep 04 10:37:07 AM UTC 24 |
Sep 04 10:37:36 AM UTC 24 |
6937775050 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.1753504065 |
|
|
Sep 04 10:37:31 AM UTC 24 |
Sep 04 10:37:36 AM UTC 24 |
2352096780 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_rx_oversample.1705000873 |
|
|
Sep 04 10:37:19 AM UTC 24 |
Sep 04 10:37:37 AM UTC 24 |
5278295759 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.3483811667 |
|
|
Sep 04 10:37:07 AM UTC 24 |
Sep 04 10:37:38 AM UTC 24 |
6306038748 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.1742352019 |
|
|
Sep 04 10:35:42 AM UTC 24 |
Sep 04 10:37:41 AM UTC 24 |
47546146211 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/27.uart_perf.538276651 |
|
|
Sep 04 10:26:37 AM UTC 24 |
Sep 04 10:37:42 AM UTC 24 |
18970955030 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_tx_ovrd.3339006480 |
|
|
Sep 04 10:37:37 AM UTC 24 |
Sep 04 10:37:42 AM UTC 24 |
767959497 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_loopback.1652254215 |
|
|
Sep 04 10:37:38 AM UTC 24 |
Sep 04 10:37:45 AM UTC 24 |
2493608028 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_fifo_full.145291327 |
|
|
Sep 04 10:37:19 AM UTC 24 |
Sep 04 10:37:46 AM UTC 24 |
33853580850 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_alert_test.3016080317 |
|
|
Sep 04 10:37:45 AM UTC 24 |
Sep 04 10:37:47 AM UTC 24 |
12423965 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/46.uart_smoke.3406537743 |
|
|
Sep 04 10:37:47 AM UTC 24 |
Sep 04 10:37:50 AM UTC 24 |
124007281 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_fifo_full.78945712 |
|
|
Sep 04 10:36:10 AM UTC 24 |
Sep 04 10:37:56 AM UTC 24 |
66858245814 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_fifo_full.4133991125 |
|
|
Sep 04 10:36:46 AM UTC 24 |
Sep 04 10:37:58 AM UTC 24 |
74372181711 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.3820179078 |
|
|
Sep 04 10:35:21 AM UTC 24 |
Sep 04 10:37:58 AM UTC 24 |
72130630925 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/41.uart_fifo_reset.2099307653 |
|
|
Sep 04 10:34:41 AM UTC 24 |
Sep 04 10:38:00 AM UTC 24 |
107179666883 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_fifo_reset.2476751702 |
|
|
Sep 04 10:36:49 AM UTC 24 |
Sep 04 10:38:12 AM UTC 24 |
154149282207 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/42.uart_stress_all.4027882457 |
|
|
Sep 04 10:35:53 AM UTC 24 |
Sep 04 10:38:16 AM UTC 24 |
244582497276 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/46.uart_intr.1955422385 |
|
|
Sep 04 10:38:01 AM UTC 24 |
Sep 04 10:38:19 AM UTC 24 |
22232488464 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_fifo_overflow.2827612964 |
|
|
Sep 04 10:37:19 AM UTC 24 |
Sep 04 10:38:20 AM UTC 24 |
32714096856 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/44.uart_perf.2625922855 |
|
|
Sep 04 10:37:07 AM UTC 24 |
Sep 04 10:38:22 AM UTC 24 |
1663255864 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/26.uart_stress_all.3056914160 |
|
|
Sep 04 10:26:05 AM UTC 24 |
Sep 04 10:38:24 AM UTC 24 |
137546873768 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/46.uart_tx_ovrd.1973190396 |
|
|
Sep 04 10:38:21 AM UTC 24 |
Sep 04 10:38:25 AM UTC 24 |
1346321311 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_stress_all_with_rand_reset.566728887 |
|
|
Sep 04 10:37:43 AM UTC 24 |
Sep 04 10:38:29 AM UTC 24 |
72422385222 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/46.uart_rx_start_bit_filter.2125742897 |
|
|
Sep 04 10:38:16 AM UTC 24 |
Sep 04 10:38:29 AM UTC 24 |
3140998651 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.3029594538 |
|
|
Sep 04 10:36:23 AM UTC 24 |
Sep 04 10:38:32 AM UTC 24 |
74769787348 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/46.uart_alert_test.3544537264 |
|
|
Sep 04 10:38:33 AM UTC 24 |
Sep 04 10:38:35 AM UTC 24 |
190064661 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/47.uart_smoke.4215388402 |
|
|
Sep 04 10:38:36 AM UTC 24 |
Sep 04 10:38:38 AM UTC 24 |
342068364 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_perf.1768520114 |
|
|
Sep 04 10:36:32 AM UTC 24 |
Sep 04 10:38:39 AM UTC 24 |
11466246728 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/43.uart_intr.2446308036 |
|
|
Sep 04 10:36:18 AM UTC 24 |
Sep 04 10:38:47 AM UTC 24 |
57005717758 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_03/uart-sim-vcs/coverage/default/45.uart_intr.3438295414 |
|
|
Sep 04 10:37:22 AM UTC 24 |
Sep 04 10:38:50 AM UTC 24 |
62452009174 ps |