Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : usb_fs_nb_pe
SCORELINECONDTOGGLEFSMBRANCHASSERT
83.33 100.00 50.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.usbdev_impl.u_usb_fs_nb_pe 83.33 100.00 50.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
83.33 100.00 50.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
83.38 92.86 82.89 54.05 87.08 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
95.61 97.06 94.20 91.18 100.00 usbdev_impl


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_usb_fs_nb_in_pe 78.32 84.26 82.86 50.00 74.47 100.00
u_usb_fs_nb_out_pe 78.31 86.51 75.81 50.00 79.25 100.00
u_usb_fs_rx 93.25 98.92 87.56 93.26
u_usb_fs_tx 86.28 95.61 84.48 58.82 92.50 100.00
u_usb_fs_tx_mux 100.00 100.00 100.00 100.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : usb_fs_nb_pe
Line No.TotalCoveredPercent
TOTAL44100.00
CONT_ASSIGN15211100.00
CONT_ASSIGN15311100.00
CONT_ASSIGN15411100.00
CONT_ASSIGN15811100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv' or '../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_pe.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
152 1 1
153 1 1
154 1 1
158 1 1


Cond Coverage for Module : usb_fs_nb_pe
TotalCoveredPercent
Conditions6350.00
Logical6350.00
Non-Logical00
Event00

 LINE       152
 EXPRESSION (rx_pkt_end & rx_pkt_valid & (usb_pid_e'(rx_pid) == UsbPidSof))
             -----1----   ------2-----   ----------------3----------------
-1--2--3-StatusTests
011Not Covered
101Not Covered
110CoveredT1,T2,T3
111Not Covered

 LINE       152
 SUB-EXPRESSION (usb_pid_e'(rx_pid) == UsbPidSof)
                ----------------1----------------
-1-StatusTests
0CoveredT1,T2,T3
1CoveredT4,T5,T6

Assert Coverage for Module : usb_fs_nb_pe
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 5 5 100.00 5 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 5 5 100.00 5 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
NumOutEpsEqualsNumInEps_A 289 289 0 0
ParamMaxPktSizeByteValid 289 289 0 0
ParamNumEpsOutAndInEqual 289 289 0 0
ParamNumInEpsValid 289 289 0 0
ParamNumOutEpsValid 289 289 0 0


NumOutEpsEqualsNumInEps_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 289 289 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamMaxPktSizeByteValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 289 289 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumEpsOutAndInEqual
NameAttemptsReal SuccessesFailuresIncomplete
Total 289 289 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumInEpsValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 289 289 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

ParamNumOutEpsValid
NameAttemptsReal SuccessesFailuresIncomplete
Total 289 289 0 0
T1 1 1 0 0
T2 1 1 0 0
T3 1 1 0 0
T4 1 1 0 0
T5 1 1 0 0
T6 1 1 0 0
T7 1 1 0 0
T8 1 1 0 0
T9 1 1 0 0
T10 1 1 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%