f7fc348358| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | usbdev_smoke | 9.940s | 8.475ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | usbdev_csr_hw_reset | 0.840s | 54.698us | 5 | 5 | 100.00 |
| V1 | csr_rw | usbdev_csr_rw | 1.060s | 69.688us | 12 | 20 | 60.00 |
| V1 | csr_bit_bash | usbdev_csr_bit_bash | 4.830s | 501.899us | 1 | 5 | 20.00 |
| V1 | csr_aliasing | usbdev_csr_aliasing | 3.310s | 128.754us | 4 | 5 | 80.00 |
| V1 | csr_mem_rw_with_rand_reset | usbdev_csr_mem_rw_with_rand_reset | 2.030s | 40.601us | 12 | 20 | 60.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | usbdev_csr_rw | 1.060s | 69.688us | 12 | 20 | 60.00 |
| usbdev_csr_aliasing | 3.310s | 128.754us | 4 | 5 | 80.00 | ||
| V1 | mem_walk | usbdev_mem_walk | 3.890s | 152.149us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | usbdev_mem_partial_access | 2.100s | 147.490us | 5 | 5 | 100.00 |
| V1 | TOTAL | 94 | 115 | 81.74 | |||
| V2 | in_trans | usbdev_in_trans | 10.270s | 8.425ms | 45 | 50 | 90.00 |
| V2 | data_toggle_clear | data_toggle_clear | 0 | 0 | -- | ||
| V2 | phy_pins_sense | usbdev_phy_pins_sense | 0.700s | 26.929us | 50 | 50 | 100.00 |
| V2 | wake_events | wake_events | 0 | 0 | -- | ||
| V2 | av_buffer | usbdev_av_buffer | 10.000s | 8.370ms | 50 | 50 | 100.00 |
| V2 | rx_fifo | rx_fifo | 0 | 0 | -- | ||
| V2 | phy_config_tx_osc_test_mode | phy_config_tx_osc_test_mode | 0 | 0 | -- | ||
| V2 | phy_config_eop_single_bit_handling | phy_config_eop_single_bit_handling | 0 | 0 | -- | ||
| V2 | phy_config_pinflip | phy_config_pinflip | 0 | 0 | -- | ||
| V2 | phy_config_usb_ref_disable | phy_config_usb_ref_disable | 0 | 0 | -- | ||
| V2 | max_length_out_transaction | usbdev_max_length_out_transaction | 10.100s | 8.407ms | 50 | 50 | 100.00 |
| V2 | max_length_in_transaction | max_length_in_transaction | 0 | 0 | -- | ||
| V2 | min_length_out_transaction | usbdev_min_length_out_transaction | 10.000s | 8.363ms | 50 | 50 | 100.00 |
| V2 | min_length_in_transaction | min_length_in_transaction | 0 | 0 | -- | ||
| V2 | random_length_out_trans | usbdev_random_length_out_trans | 9.920s | 8.368ms | 50 | 50 | 100.00 |
| V2 | random_length_in_trans | random_length_in_trans | 0 | 0 | -- | ||
| V2 | out_stall | usbdev_out_stall | 10.160s | 8.374ms | 50 | 50 | 100.00 |
| V2 | in_stall | in_stall | 0 | 0 | -- | ||
| V2 | out_iso | out_iso | 0 | 0 | -- | ||
| V2 | in_iso | in_iso | 0 | 0 | -- | ||
| V2 | pkt_received | usbdev_pkt_received | 9.920s | 8.393ms | 50 | 50 | 100.00 |
| V2 | pkt_sent | usbdev_pkt_sent | 10.290s | 8.428ms | 47 | 50 | 94.00 |
| V2 | disconnected | disconnected | 0 | 0 | -- | ||
| V2 | host_lost | host_lost | 0 | 0 | -- | ||
| V2 | link_reset | link_reset | 0 | 0 | -- | ||
| V2 | link_suspend | link_suspend | 0 | 0 | -- | ||
| V2 | link_resume | link_resume | 0 | 0 | -- | ||
| V2 | av_empty | av_empty | 0 | 0 | -- | ||
| V2 | rx_full | rx_full | 0 | 0 | -- | ||
| V2 | av_overflow | av_overflow | 0 | 0 | -- | ||
| V2 | enable | usbdev_enable | 10.200s | 8.373ms | 50 | 50 | 100.00 |
| V2 | resume_link_active | resume_link_active | 0 | 0 | -- | ||
| V2 | device_address | device_address | 0 | 0 | -- | ||
| V2 | link_in_err | link_in_err | 0 | 0 | -- | ||
| V2 | rx_crc_err | rx_crc_err | 0 | 0 | -- | ||
| V2 | rx_pid_err | rx_pid_err | 0 | 0 | -- | ||
| V2 | rx_bitstuff_err | rx_bitstuff_err | 0 | 0 | -- | ||
| V2 | link_out_err | link_out_err | 0 | 0 | -- | ||
| V2 | invalid_data1_data0_toggle_test | invalid_data1_data0_toggle_test | 0 | 0 | -- | ||
| V2 | setup_stage | setup_stage | 0 | 0 | -- | ||
| V2 | in_data_stage | in_data_stage | 0 | 0 | -- | ||
| V2 | out_data_stage | out_data_stage | 0 | 0 | -- | ||
| V2 | out_status_stage | out_status_stage | 0 | 0 | -- | ||
| V2 | in_status_stage | in_status_stage | 0 | 0 | -- | ||
| V2 | endpoint_access | endpoint_access | 0 | 0 | -- | ||
| V2 | disable_endpoint | disable_endpoint | 0 | 0 | -- | ||
| V2 | out_trans_nak | usbdev_out_trans_nak | 9.520s | 8.394ms | 50 | 50 | 100.00 |
| V2 | setup_trans_ignored | usbdev_setup_trans_ignored | 9.930s | 8.362ms | 50 | 50 | 100.00 |
| V2 | nak_trans | usbdev_nak_trans | 10.060s | 8.434ms | 48 | 50 | 96.00 |
| V2 | stall_trans | stall_trans | 0 | 0 | -- | ||
| V2 | setup_priority_over_stall_response | setup_priority_over_stall_response | 0 | 0 | -- | ||
| V2 | stall_priority_over_NAK | stall_priority_over_NAK | 0 | 0 | -- | ||
| V2 | pending_in_trans | pending_in_trans | 0 | 0 | -- | ||
| V2 | streaming_test | streaming_test | 0 | 0 | -- | ||
| V2 | max_clock_error_untracked | max_clock_error_untracked | 0 | 0 | -- | ||
| V2 | max_clock_error_tracking | max_clock_error_tracking | 0 | 0 | -- | ||
| V2 | max_phase_error | max_phase_error | 0 | 0 | -- | ||
| V2 | min_inter_pkt_delay | min_inter_pkt_delay | 0 | 0 | -- | ||
| V2 | max_inter_pkt_delay | max_inter_pkt_delay | 0 | 0 | -- | ||
| V2 | device_timeout_missing_host_handshake | device_timeout_missing_host_handshake | 0 | 0 | -- | ||
| V2 | device_timeout | device_timeout | 0 | 0 | -- | ||
| V2 | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | 0 | 0 | -- | ||
| V2 | aon_wake_resume | aon_wake_resume | 0 | 0 | -- | ||
| V2 | aon_wake_reset | aon_wake_reset | 0 | 0 | -- | ||
| V2 | aon_wake_disconnect | aon_wake_disconnect | 0 | 0 | -- | ||
| V2 | invalid_sync | invalid_sync | 0 | 0 | -- | ||
| V2 | spurious_tokens_ignored | spurious_tokens_ignored | 0 | 0 | -- | ||
| V2 | low_speed_traffic | low_speed_traffic | 0 | 0 | -- | ||
| V2 | rand_bus_resets | rand_bus_resets | 0 | 0 | -- | ||
| V2 | rand_disconnects | rand_disconnects | 0 | 0 | -- | ||
| V2 | max_usb_traffic | max_usb_traffic | 0 | 0 | -- | ||
| V2 | stress_usb_traffic | stress_usb_traffic | 0 | 0 | -- | ||
| V2 | in_packet_retraction | in_packet_retraction | 0 | 0 | -- | ||
| V2 | data_toggle_restore | data_toggle_restore | 0 | 0 | -- | ||
| V2 | setup_priority | setup_priority | 0 | 0 | -- | ||
| V2 | fifo_resets | usbdev_fifo_rst | 2.490s | 302.394us | 50 | 50 | 100.00 |
| V2 | intr_test | usbdev_intr_test | 0.720s | 26.560us | 28 | 50 | 56.00 |
| V2 | alert_test | usbdev_alert_test | 0 | 0 | -- | ||
| V2 | tl_d_oob_addr_access | usbdev_tl_errors | 2.950s | 226.696us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | usbdev_tl_errors | 2.950s | 226.696us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | usbdev_csr_hw_reset | 0.840s | 54.698us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.060s | 69.688us | 12 | 20 | 60.00 | ||
| usbdev_csr_aliasing | 3.310s | 128.754us | 4 | 5 | 80.00 | ||
| usbdev_same_csr_outstanding | 1.560s | 120.073us | 17 | 20 | 85.00 | ||
| V2 | tl_d_partial_access | usbdev_csr_hw_reset | 0.840s | 54.698us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.060s | 69.688us | 12 | 20 | 60.00 | ||
| usbdev_csr_aliasing | 3.310s | 128.754us | 4 | 5 | 80.00 | ||
| usbdev_same_csr_outstanding | 1.560s | 120.073us | 17 | 20 | 85.00 | ||
| V2 | TOTAL | 755 | 790 | 95.57 | |||
| V2S | tl_intg_err | usbdev_sec_cm | 1.030s | 176.435us | 5 | 5 | 100.00 |
| usbdev_tl_intg_err | 1.100s | 25.022us | 0 | 20 | 0.00 | ||
| V2S | sec_cm_bus_integrity | usbdev_tl_intg_err | 1.100s | 25.022us | 0 | 20 | 0.00 |
| V2S | TOTAL | 5 | 25 | 20.00 | |||
| V3 | TOTAL | 0 | 0 | -- | |||
| Unmapped tests | usbdev_in_stall | 9.940s | 8.358ms | 50 | 50 | 100.00 | |
| usbdev_stress_all_with_rand_reset | 0.670s | 6.098us | 0 | 50 | 0.00 | ||
| usbdev_stress_all | 0.590s | 0 | 50 | 0.00 | |||
| TOTAL | 904 | 1080 | 83.70 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| N.A. | 3 | 3 | 1 | 33.33 |
| V1 | 8 | 8 | 4 | 50.00 |
| V2 | 80 | 17 | 12 | 15.00 |
| V2S | 2 | 2 | 1 | 50.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 87.52 | 96.31 | 88.57 | 97.17 | 46.88 | 94.11 | 97.36 | 92.25 |
UVM_WARNING [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory. has 100 failures:
0.usbdev_stress_all_with_rand_reset.28820749983099467906025041513385397503889870993073245014150158696650295100180
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 5516069 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 5516069 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all_with_rand_reset.26596829177339772940377404679345743561864486682840142204700616065087559639001
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 6893614 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 6893614 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
0.usbdev_stress_all.18144547286538435227989056122239871876490048804785963769589638040419634382203
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all.41378210515495758976178305856549540924125312879342136020866794531444583353513
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
UVM_ERROR (cip_base_vseq.sv:473) [usbdev_common_vseq] Check failed exp_val == act_val (* [*] vs * [*]) when reading the intr CSRusbdev_reg_block.intr_state has 22 failures:
0.usbdev_intr_test.25497450330758505671000774700796022614152626984967333743442986930276691100003
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_intr_test/latest/run.log
UVM_ERROR @ 4886768 ps: (cip_base_vseq.sv:473) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed exp_val == act_val (65600 [0x10040] vs 98368 [0x18040]) when reading the intr CSRusbdev_reg_block.intr_state
UVM_INFO @ 4886768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_intr_test.63273300202968882171921111750242329924951066092459651487509951707091889517541
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_intr_test/latest/run.log
UVM_ERROR @ 5363580 ps: (cip_base_vseq.sv:473) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed exp_val == act_val (65636 [0x10064] vs 98404 [0x18064]) when reading the intr CSRusbdev_reg_block.intr_state
UVM_INFO @ 5363580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 20 more failures.
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_* reset value: * has 19 failures:
0.usbdev_tl_intg_err.112748664520885200338881060614587546163290212441928900654624518990723772257229
Line 252, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 6039156 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073767447 [0x40006417] vs 2147509271 [0x80006417]) Regname: usbdev_reg_block.configin_1 reset value: 0x0
UVM_INFO @ 6039156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_tl_intg_err.102131438626735811960341306733721580807015032798737884681357080431178771320249
Line 263, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 42716606 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073769746 [0x40006d12] vs 2147511570 [0x80006d12]) Regname: usbdev_reg_block.configin_8 reset value: 0x0
UVM_INFO @ 42716606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 7 more failures.
0.usbdev_csr_mem_rw_with_rand_reset.1526727888418671326588085817472246532353707373421459005209544606200452846640
Line 256, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 40601347 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073752846 [0x40002b0e] vs 2147494670 [0x80002b0e]) Regname: usbdev_reg_block.configin_10 reset value: 0x0
UVM_INFO @ 40601347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_csr_mem_rw_with_rand_reset.100391494231626883666954857174131530548787686822133009788187829424655128465940
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 21595084 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073750794 [0x4000230a] vs 2147492618 [0x8000230a]) Regname: usbdev_reg_block.configin_11 reset value: 0x0
UVM_INFO @ 21595084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
2.usbdev_csr_rw.66981287933852295138003270636601642790004682888230362528939379928605731442393
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 6450742 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073760522 [0x4000490a] vs 2147502346 [0x8000490a]) Regname: usbdev_reg_block.configin_11 reset value: 0x0
UVM_INFO @ 6450742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
8.usbdev_csr_rw.39149196868766707596415182564248618258519687081852178646622363164308941232539
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/8.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 6304153 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073750042 [0x4000201a] vs 2147491866 [0x8000201a]) Regname: usbdev_reg_block.configin_3 reset value: 0x0
UVM_INFO @ 6304153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
2.usbdev_csr_aliasing.7602766089989912984905673586731875628990690936768697793092259382146308126934
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest/run.log
UVM_ERROR @ 6165296 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073752321 [0x40002901] vs 2147494145 [0x80002901]) Regname: usbdev_reg_block.configin_4 reset value: 0x0
UVM_INFO @ 6165296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_*.pend reset value: * has 10 failures:
2.usbdev_tl_intg_err.68904817955366594530967978547910787935677171656923482522530733830277731686361
Line 256, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 6531442 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_6.pend reset value: 0x0
UVM_INFO @ 6531442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.usbdev_tl_intg_err.58074296704097648344284130096395179573411710960420421190016263446389643942801
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 10843395 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_6.pend reset value: 0x0
UVM_INFO @ 10843395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 5 more failures.
4.usbdev_csr_mem_rw_with_rand_reset.30242658200636346240374615862452294900488525181839800688513736626977019507565
Line 256, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 31557216 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_10.pend reset value: 0x0
UVM_INFO @ 31557216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
9.usbdev_csr_mem_rw_with_rand_reset.68023556330427873449423300828117950592662425788365038854159637377344830529448
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 24307417 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_9.pend reset value: 0x0
UVM_INFO @ 24307417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_*.rdy reset value: * has 8 failures:
1.usbdev_csr_rw.114991584925081669302562863977557951248936293186811536235780924540292613605254
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 9547880 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_6.rdy reset value: 0x0
UVM_INFO @ 9547880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.usbdev_csr_rw.4439210033081141604300758825106787557584726060109791469245813959618551033469
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/3.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 6722730 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_3.rdy reset value: 0x0
UVM_INFO @ 6722730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
3.usbdev_tl_intg_err.66854150884977250600975422155353958409142017633234849339263538317447878143467
Line 252, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 9760094 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_11.rdy reset value: 0x0
UVM_INFO @ 9760094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.usbdev_tl_intg_err.89961550798588812018293031633170760126145048237998759714964902635774529301333
Line 256, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 20881083 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_1.rdy reset value: 0x0
UVM_INFO @ 20881083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_in_trans_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 5 failures:
0.usbdev_in_trans.79986100219459342796455183293331494330459557368505416432494677867084248285882
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_in_trans/latest/run.log
UVM_ERROR @ 10838461 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_in_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 10838461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_in_trans.100404063457272707988788121349379653201219893029430824046172851181085842041784
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_in_trans/latest/run.log
UVM_ERROR @ 10972865 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_in_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 10972865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_FATAL (usb20_driver.sv:295) [driver] timeout waiting for usb_pullup has 4 failures:
0.usbdev_csr_bit_bash.22325041333536726246894307690568176278055619961790531110085951190469460899934
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest/run.log
UVM_FATAL @ 501893359 ps: (usb20_driver.sv:295) [uvm_test_top.env.m_usb20_agent.driver] timeout waiting for usb_pullup
UVM_INFO @ 501893359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_csr_bit_bash.92679720303634545235079980579777599671189671059266595701229422230740930516830
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest/run.log
UVM_FATAL @ 502473902 ps: (usb20_driver.sv:295) [uvm_test_top.env.m_usb20_agent.driver] timeout waiting for usb_pullup
UVM_INFO @ 502473902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (cip_base_vseq.sv:250) [usbdev_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch has 3 failures:
12.usbdev_same_csr_outstanding.10136387588824521860005361873308383191034142902637906415380868626255673303949
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest/run.log
UVM_ERROR @ 5456755 ps: (cip_base_vseq.sv:250) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed masked_data == exp_data (1073763352 [0x40005418] vs 2147505176 [0x80005418]) addr 0x4c00d048 read out mismatch
UVM_INFO @ 5456755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
14.usbdev_same_csr_outstanding.56182426360732428024387594539989254752186319484075505613527917518959483023428
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest/run.log
UVM_ERROR @ 6270508 ps: (cip_base_vseq.sv:250) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed masked_data == exp_data (1073747206 [0x40001506] vs 2147489030 [0x80001506]) addr 0x6ba6c05c read out mismatch
UVM_INFO @ 6270508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 3 failures:
14.usbdev_pkt_sent.42859154420586175161736560273638832796620895704487086044668782870782257755780
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/14.usbdev_pkt_sent/latest/run.log
UVM_ERROR @ 11605440 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 11605440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
26.usbdev_pkt_sent.16760670898435689730393713699005429590284834240868864957496328154180848702077
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/26.usbdev_pkt_sent/latest/run.log
UVM_ERROR @ 9143256 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 9143256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_nak_trans_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 2 failures:
10.usbdev_nak_trans.88995121754719861708982212451816973009489992801182429756417274867827570192708
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/10.usbdev_nak_trans/latest/run.log
UVM_ERROR @ 8448139 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_nak_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 8448139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
18.usbdev_nak_trans.37903113811537810957679687235235092196963927097669673189457651789950558945832
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/18.usbdev_nak_trans/latest/run.log
UVM_ERROR @ 9711105 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_nak_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 9711105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---