9f4903e77a| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | usbdev_smoke | 10.430s | 8.514ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | usbdev_csr_hw_reset | 0.970s | 78.331us | 5 | 5 | 100.00 |
| V1 | csr_rw | usbdev_csr_rw | 1.050s | 87.899us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | usbdev_csr_bit_bash | 8.530s | 1.173ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | usbdev_csr_aliasing | 2.180s | 165.291us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | usbdev_csr_mem_rw_with_rand_reset | 2.490s | 90.304us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | usbdev_csr_rw | 1.050s | 87.899us | 20 | 20 | 100.00 |
| usbdev_csr_aliasing | 2.180s | 165.291us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | usbdev_mem_walk | 4.580s | 719.553us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | usbdev_mem_partial_access | 2.380s | 192.454us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | in_trans | usbdev_in_trans | 10.150s | 8.460ms | 50 | 50 | 100.00 |
| V2 | data_toggle_clear | data_toggle_clear | 0 | 0 | -- | ||
| V2 | phy_pins_sense | usbdev_phy_pins_sense | 0.800s | 47.147us | 50 | 50 | 100.00 |
| V2 | av_buffer | usbdev_av_buffer | 11.000s | 8.387ms | 50 | 50 | 100.00 |
| V2 | rx_fifo | rx_fifo | 0 | 0 | -- | ||
| V2 | phy_config_tx_osc_test_mode | phy_config_tx_osc_test_mode | 0 | 0 | -- | ||
| V2 | phy_config_eop_single_bit_handling | phy_config_eop_single_bit_handling | 0 | 0 | -- | ||
| V2 | phy_config_pinflip | phy_config_pinflip | 0 | 0 | -- | ||
| V2 | phy_config_usb_ref_disable | usbdev_phy_config_usb_ref_disable | 10.560s | 8.378ms | 48 | 50 | 96.00 |
| V2 | max_length_out_transaction | usbdev_max_length_out_transaction | 10.720s | 8.422ms | 50 | 50 | 100.00 |
| V2 | max_length_in_transaction | max_length_in_transaction | 0 | 0 | -- | ||
| V2 | min_length_out_transaction | usbdev_min_length_out_transaction | 10.390s | 8.410ms | 50 | 50 | 100.00 |
| V2 | min_length_in_transaction | min_length_in_transaction | 0 | 0 | -- | ||
| V2 | random_length_out_trans | usbdev_random_length_out_trans | 10.510s | 8.429ms | 50 | 50 | 100.00 |
| V2 | random_length_in_trans | random_length_in_trans | 0 | 0 | -- | ||
| V2 | out_stall | usbdev_out_stall | 10.670s | 8.387ms | 50 | 50 | 100.00 |
| V2 | in_stall | usbdev_in_stall | 10.150s | 8.370ms | 50 | 50 | 100.00 |
| V2 | out_iso | out_iso | 0 | 0 | -- | ||
| V2 | in_iso | usbdev_in_iso | 10.400s | 8.383ms | 50 | 50 | 100.00 |
| V2 | pkt_received | usbdev_pkt_received | 10.500s | 8.389ms | 50 | 50 | 100.00 |
| V2 | pkt_sent | usbdev_pkt_sent | 10.000s | 8.388ms | 50 | 50 | 100.00 |
| V2 | disconnected | disconnected | 0 | 0 | -- | ||
| V2 | host_lost | host_lost | 0 | 0 | -- | ||
| V2 | link_reset | link_reset | 0 | 0 | -- | ||
| V2 | link_suspend | link_suspend | 0 | 0 | -- | ||
| V2 | link_resume | link_resume | 0 | 0 | -- | ||
| V2 | av_empty | av_empty | 0 | 0 | -- | ||
| V2 | rx_full | rx_full | 0 | 0 | -- | ||
| V2 | av_overflow | av_overflow | 0 | 0 | -- | ||
| V2 | link_in_err | link_in_err | 0 | 0 | -- | ||
| V2 | rx_crc_err | rx_crc_err | 0 | 0 | -- | ||
| V2 | rx_pid_err | rx_pid_err | 0 | 0 | -- | ||
| V2 | rx_bitstuff_err | rx_bitstuff_err | 0 | 0 | -- | ||
| V2 | link_out_err | link_out_err | 0 | 0 | -- | ||
| V2 | enable | usbdev_enable | 10.010s | 8.372ms | 50 | 50 | 100.00 |
| V2 | resume_link_active | resume_link_active | 0 | 0 | -- | ||
| V2 | device_address | device_address | 0 | 0 | -- | ||
| V2 | invalid_data1_data0_toggle_test | invalid_data1_data0_toggle_test | 0 | 0 | -- | ||
| V2 | setup_stage | usbdev_setup_stage | 9.770s | 8.385ms | 50 | 50 | 100.00 |
| V2 | in_data_stage | in_data_stage | 0 | 0 | -- | ||
| V2 | out_data_stage | out_data_stage | 0 | 0 | -- | ||
| V2 | endpoint_access | endpoint_access | 0 | 0 | -- | ||
| V2 | disable_endpoint | disable_endpoint | 0 | 0 | -- | ||
| V2 | out_trans_nak | usbdev_out_trans_nak | 10.430s | 8.402ms | 49 | 50 | 98.00 |
| V2 | setup_trans_ignored | usbdev_setup_trans_ignored | 10.440s | 8.365ms | 50 | 50 | 100.00 |
| V2 | nak_trans | usbdev_nak_trans | 10.700s | 8.445ms | 50 | 50 | 100.00 |
| V2 | stall_trans | usbdev_stall_trans | 10.450s | 8.453ms | 50 | 50 | 100.00 |
| V2 | setup_priority_over_stall_response | setup_priority_over_stall_response | 0 | 0 | -- | ||
| V2 | stall_priority_over_nak | usbdev_stall_priority_over_nak | 10.320s | 8.381ms | 50 | 50 | 100.00 |
| V2 | pending_in_trans | usbdev_pending_in_trans | 10.600s | 8.403ms | 50 | 50 | 100.00 |
| V2 | streaming_test | streaming_test | 0 | 0 | -- | ||
| V2 | max_clock_error_untracked | max_clock_error_untracked | 0 | 0 | -- | ||
| V2 | max_clock_error_tracking | max_clock_error_tracking | 0 | 0 | -- | ||
| V2 | max_phase_error | max_phase_error | 0 | 0 | -- | ||
| V2 | min_inter_pkt_delay | min_inter_pkt_delay | 0 | 0 | -- | ||
| V2 | max_inter_pkt_delay | max_inter_pkt_delay | 0 | 0 | -- | ||
| V2 | device_timeout_missing_host_handshake | device_timeout_missing_host_handshake | 0 | 0 | -- | ||
| V2 | device_timeout | device_timeout | 0 | 0 | -- | ||
| V2 | packet_buffer | usbdev_pkt_buffer | 1.172m | 31.077ms | 50 | 50 | 100.00 |
| V2 | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | 0 | 0 | -- | ||
| V2 | aon_wake_resume | aon_wake_resume | 0 | 0 | -- | ||
| V2 | aon_wake_reset | aon_wake_reset | 0 | 0 | -- | ||
| V2 | aon_wake_disconnect | aon_wake_disconnect | 0 | 0 | -- | ||
| V2 | invalid_sync | invalid_sync | 0 | 0 | -- | ||
| V2 | spurious_tokens_ignored | spurious_tokens_ignored | 0 | 0 | -- | ||
| V2 | low_speed_traffic | low_speed_traffic | 0 | 0 | -- | ||
| V2 | rand_bus_resets | rand_bus_resets | 0 | 0 | -- | ||
| V2 | rand_disconnects | rand_disconnects | 0 | 0 | -- | ||
| V2 | max_usb_traffic | max_usb_traffic | 0 | 0 | -- | ||
| V2 | stress_usb_traffic | stress_usb_traffic | 0 | 0 | -- | ||
| V2 | in_packet_retraction | in_packet_retraction | 0 | 0 | -- | ||
| V2 | data_toggle_restore | data_toggle_restore | 0 | 0 | -- | ||
| V2 | setup_priority | setup_priority | 0 | 0 | -- | ||
| V2 | fifo_resets | usbdev_fifo_rst | 2.490s | 327.581us | 50 | 50 | 100.00 |
| V2 | intr_test | usbdev_intr_test | 0.740s | 47.921us | 50 | 50 | 100.00 |
| V2 | alert_test | usbdev_alert_test | 0 | 0 | -- | ||
| V2 | tl_d_oob_addr_access | usbdev_tl_errors | 3.160s | 257.945us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | usbdev_tl_errors | 3.160s | 257.945us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | usbdev_csr_hw_reset | 0.970s | 78.331us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.050s | 87.899us | 20 | 20 | 100.00 | ||
| usbdev_csr_aliasing | 2.180s | 165.291us | 5 | 5 | 100.00 | ||
| usbdev_same_csr_outstanding | 1.700s | 206.017us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | usbdev_csr_hw_reset | 0.970s | 78.331us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.050s | 87.899us | 20 | 20 | 100.00 | ||
| usbdev_csr_aliasing | 2.180s | 165.291us | 5 | 5 | 100.00 | ||
| usbdev_same_csr_outstanding | 1.700s | 206.017us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 1187 | 1190 | 99.75 | |||
| V2S | tl_intg_err | usbdev_sec_cm | 1.280s | 400.520us | 5 | 5 | 100.00 |
| usbdev_tl_intg_err | 6.170s | 1.976ms | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | usbdev_tl_intg_err | 6.170s | 1.976ms | 20 | 20 | 100.00 |
| V2S | TOTAL | 25 | 25 | 100.00 | |||
| V3 | TOTAL | 0 | 0 | -- | |||
| Unmapped tests | usbdev_dpi_config_host | 2.321m | 5.102ms | 1 | 1 | 100.00 | |
| random_length_in_trans | 11.020s | 8.468ms | 50 | 50 | 100.00 | ||
| min_length_in_transaction | 10.310s | 8.379ms | 50 | 50 | 100.00 | ||
| max_length_in_transaction | 10.360s | 8.467ms | 50 | 50 | 100.00 | ||
| usbdev_stress_all_with_rand_reset | 0.670s | 68.192us | 0 | 50 | 0.00 | ||
| usbdev_stress_all | 0.620s | 0 | 50 | 0.00 | |||
| TOTAL | 1328 | 1431 | 92.80 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| N.A. | 3 | 3 | 1 | 33.33 |
| V1 | 8 | 8 | 8 | 100.00 |
| V2 | 78 | 25 | 23 | 29.49 |
| V2S | 2 | 2 | 2 | 100.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 88.90 | 96.71 | 89.46 | 97.11 | 50.00 | 94.66 | 97.97 | 96.40 |
UVM_WARNING [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory. has 100 failures:
0.usbdev_stress_all_with_rand_reset.14291396250845738148041605870035533808069482488371925091753697379372375395823
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 10346935 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 10346935 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all_with_rand_reset.110947440203314462769957391260739053027525992689088253788430070894355508343992
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 68192165 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 68192165 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
0.usbdev_stress_all.19275108649757611427900484408113468546178940660667486883719002248038385765
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all.90802307771789008606908395180214172527564294578911006134150829184906037587230
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
Exit reason: Error: User command failed Error-[SV-WMIBC] Width mismatch in bit-stream casting has 2 failures:
5.usbdev_phy_config_usb_ref_disable.21353435429066400832964917596758305094303239325264510804878253693017375241066
Line 270, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest/run.log
Error-[SV-WMIBC] Width mismatch in bit-stream casting
../src/lowrisc_dv_usb20_agent_0.1/usb20_monitor.sv, 109
Source size is 34 bit(s) whereas destination size is 35 bit(s).
Please make sure that both source and destination are of same size.
22.usbdev_phy_config_usb_ref_disable.8996079325284052985330737003458681046176820665887589586368750883682076250072
Line 270, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest/run.log
Error-[SV-WMIBC] Width mismatch in bit-stream casting
../src/lowrisc_dv_usb20_agent_0.1/usb20_monitor.sv, 109
Source size is 34 bit(s) whereas destination size is 35 bit(s).
Please make sure that both source and destination are of same size.
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_out_trans_nak_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
28.usbdev_out_trans_nak.19936162182823827537545701286352434583420232020175776309115812213480711141093
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest/run.log
UVM_ERROR @ 19236793 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_out_trans_nak_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 19236793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---