Module Definition
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Module : prim_edge_detector
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.gen_event 0.00 0.00 0.00



Module Instance : tb.dut.gen_event

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
22.84 0.00 0.00 91.36 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : prim_edge_detector
Line No.TotalCoveredPercent
TOTAL700.00
CONT_ASSIGN42100.00
CONT_ASSIGN45100.00
ALWAYS48300.00
CONT_ASSIGN52100.00
CONT_ASSIGN53100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
42 0 1
45 0 1
48 0 2
49 0 1
52 0 1
53 0 1


Branch Coverage for Module : prim_edge_detector
Line No.TotalCoveredPercent
Branches 2 0 0.00
IF 48 2 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%