USBDEV Simulation Results

Thursday July 04 2024 23:02:28 UTC

GitHub Revision: 3e678c112b

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 94940390549829454688103081328166376218078465228811124044523808815554354133843

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.070s 258.447us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.100s 272.752us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.090s 103.135us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 8.980s 808.160us 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 2.220s 227.434us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.880s 112.658us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.090s 103.135us 20 20 100.00
usbdev_csr_aliasing 2.220s 227.434us 5 5 100.00
V1 mem_walk usbdev_mem_walk 5.130s 754.103us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.350s 185.885us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.040s 231.536us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 1.810s 558.905us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.780s 41.804us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.940s 217.597us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 57.450s 23.624ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.000s 309.361us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.860s 175.078us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.100s 284.265us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.000s 235.671us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 0.860s 206.031us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 0.900s 217.236us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.870s 188.999us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.070s 197.716us 50 50 100.00
usbdev_stream_len_max 3.210s 1.392ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.140s 329.490us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.890s 149.859us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 0.940s 227.156us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 0.950s 204.170us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.000s 266.107us 50 50 100.00
V2 out_stall usbdev_out_stall 0.970s 192.189us 50 50 100.00
V2 in_stall usbdev_in_stall 0.860s 147.601us 50 50 100.00
V2 out_iso usbdev_out_iso 0.990s 214.758us 50 50 100.00
V2 in_iso usbdev_in_iso 1.040s 240.963us 50 50 100.00
V2 pkt_received usbdev_pkt_received 0.970s 234.471us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.070s 305.525us 50 50 100.00
V2 disconnected usbdev_disconnected 0.880s 153.987us 50 50 100.00
V2 host_lost usbdev_host_lost 9.490s 4.166ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.760s 183.767us 1 1 100.00
V2 link_suspend usbdev_link_suspend 4.720s 3.292ms 50 50 100.00
V2 link_resume usbdev_link_resume 28.510s 23.279ms 50 50 100.00
V2 av_empty usbdev_av_empty 0.920s 184.245us 5 5 100.00
V2 rx_full usbdev_rx_full 0.970s 283.924us 1 1 100.00
V2 av_overflow usbdev_av_overflow 0.820s 135.603us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.040s 267.509us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 0.960s 231.207us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.870s 186.059us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.900s 217.439us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.280s 442.621us 1 1 100.00
V2 enable usbdev_enable 0.770s 51.649us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 18.040s 20.244ms 1 1 100.00
V2 device_address usbdev_device_address 47.480s 22.411ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.420s 529.928us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.890s 218.654us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 2.710s 1.014ms 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 1.520s 543.587us 50 50 100.00
V2 out_trans_nak usbdev_out_trans_nak 0.900s 225.978us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.890s 155.089us 50 50 100.00
V2 nak_trans usbdev_nak_trans 0.970s 237.132us 50 50 100.00
V2 stall_trans usbdev_stall_trans 0.950s 175.828us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 0.920s 240.258us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 0.940s 191.644us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.870s 183.072us 50 50 100.00
V2 streaming_test usbdev_streaming_out 3.431m 7.686ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.666m 112.185ms 5 5 100.00
usbdev_freq_loclk 2.723m 114.088ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 3.132m 119.070ms 5 5 100.00
usbdev_freq_loclk_max 2.589m 118.291ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.533m 110.127ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 3.872m 8.050ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 3.571m 7.543ms 50 50 100.00
V2 device_timeout_missing_host_handshake device_timeout_missing_host_handshake 0 0 --
V2 device_timeout device_timeout 0 0 --
V2 packet_buffer usbdev_pkt_buffer 57.450s 23.624ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.290s 498.566us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 30.860s 23.387ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 16.790s 13.346ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 6.680s 4.589ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 4.457m 9.703ms 27 50 54.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 3.227m 6.928ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 5.995m 12.885ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 6.651m 14.184ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 6.111m 16.086ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 4.334m 12.807ms 10 10 100.00
V2 max_usb_traffic usbdev_max_usb_traffic 2.786m 5.880ms 50 50 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 4.414m 13.276ms 5 5 100.00
V2 in_packet_retraction in_packet_retraction 0 0 --
V2 data_toggle_restore usbdev_data_toggle_restore 3.370s 1.434ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.370s 429.411us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.510s 420.420us 50 50 100.00
V2 intr_test usbdev_intr_test 0.760s 106.519us 50 50 100.00
V2 alert_test usbdev_alert_test 0.750s 114.892us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.420s 324.580us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.420s 324.580us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.100s 272.752us 5 5 100.00
usbdev_csr_rw 1.090s 103.135us 20 20 100.00
usbdev_csr_aliasing 2.220s 227.434us 5 5 100.00
usbdev_same_csr_outstanding 2.040s 527.317us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.100s 272.752us 5 5 100.00
usbdev_csr_rw 1.090s 103.135us 20 20 100.00
usbdev_csr_aliasing 2.220s 227.434us 5 5 100.00
usbdev_same_csr_outstanding 2.040s 527.317us 20 20 100.00
V2 TOTAL 2668 2691 99.15
V2S tl_intg_err usbdev_sec_cm 1.870s 971.917us 5 5 100.00
usbdev_tl_intg_err 5.900s 1.130ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.900s 1.130ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 2.272m 5.134ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 0.670s 20.806us 0 10 0.00
usbdev_stress_all 0.660s 0 50 0.00
TOTAL 2809 2892 97.13

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 82 79 78 95.12
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.59 97.84 93.81 97.44 75.00 96.26 98.17 96.58

Failure Buckets

Past Results