USBDEV Simulation Results

Tuesday July 09 2024 23:02:48 UTC

GitHub Revision: 6a84251492

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 61727890964832844865465694323650730626175387240181955975848876152363892893427

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.110s 232.444us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.060s 222.868us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.130s 91.482us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 13.610s 2.215ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.740s 419.054us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.240s 210.315us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.130s 91.482us 20 20 100.00
usbdev_csr_aliasing 3.740s 419.054us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.640s 476.286us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.800s 203.567us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.110s 266.100us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 1.740s 491.609us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.750s 110.348us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.900s 209.345us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 53.280s 23.160ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 0.980s 302.542us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.780s 150.623us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.160s 296.875us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.090s 252.771us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.050s 320.915us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 0.940s 221.054us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.890s 149.903us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 0.980s 251.594us 50 50 100.00
usbdev_stream_len_max 3.110s 1.369ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.020s 251.837us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.920s 222.883us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 0.910s 158.515us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 0.990s 265.258us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.020s 279.647us 50 50 100.00
V2 out_stall usbdev_out_stall 0.980s 187.050us 50 50 100.00
V2 in_stall usbdev_in_stall 0.930s 202.357us 50 50 100.00
V2 out_iso usbdev_out_iso 0.950s 172.279us 50 50 100.00
V2 in_iso usbdev_in_iso 0.980s 252.535us 50 50 100.00
V2 pkt_received usbdev_pkt_received 0.980s 223.676us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.150s 317.325us 50 50 100.00
V2 disconnected usbdev_disconnected 0.890s 138.640us 50 50 100.00
V2 host_lost usbdev_host_lost 9.740s 4.161ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.780s 168.285us 1 1 100.00
V2 link_suspend usbdev_link_suspend 4.940s 3.349ms 50 50 100.00
V2 link_resume usbdev_link_resume 31.450s 23.322ms 50 50 100.00
V2 av_empty usbdev_av_empty 0.870s 157.397us 5 5 100.00
V2 rx_full usbdev_rx_full 1.070s 252.073us 1 1 100.00
V2 av_overflow usbdev_av_overflow 0.860s 135.733us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.000s 246.912us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 0.930s 186.660us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.900s 218.115us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.870s 153.299us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.310s 494.962us 1 1 100.00
V2 enable usbdev_enable 0.740s 84.919us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 25.010s 20.157ms 1 1 100.00
V2 device_address usbdev_device_address 49.200s 22.394ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.290s 420.315us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.960s 247.693us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 2.480s 943.296us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 1.620s 501.450us 50 50 100.00
V2 out_trans_nak usbdev_out_trans_nak 0.930s 204.621us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.900s 197.484us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.010s 204.801us 50 50 100.00
V2 stall_trans usbdev_stall_trans 0.960s 280.138us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.030s 329.044us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 0.980s 233.961us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.910s 165.162us 50 50 100.00
V2 streaming_test usbdev_streaming_out 3.471m 7.523ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.962m 117.184ms 5 5 100.00
usbdev_freq_loclk 2.715m 99.155ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 3.524m 121.168ms 5 5 100.00
usbdev_freq_loclk_max 3.101m 119.974ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 3.028m 106.168ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 3.647m 7.756ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 3.563m 7.369ms 50 50 100.00
V2 device_timeout_missing_host_handshake device_timeout_missing_host_handshake 0 0 --
V2 device_timeout device_timeout 0 0 --
V2 packet_buffer usbdev_pkt_buffer 53.280s 23.160ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.510s 440.349us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 30.380s 23.349ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 16.790s 13.412ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 6.270s 4.432ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 4.711m 9.832ms 27 50 54.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 3.136m 6.859ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 6.231m 13.641ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 7.930m 21.525ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 4.537m 13.233ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 4.357m 12.833ms 10 10 100.00
V2 max_usb_traffic usbdev_max_usb_traffic 3.390m 7.101ms 50 50 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 11.249m 27.120ms 5 5 100.00
V2 in_packet_retraction in_packet_retraction 0 0 --
V2 data_toggle_restore usbdev_data_toggle_restore 3.550s 1.550ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.510s 496.432us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.710s 456.611us 50 50 100.00
V2 intr_test usbdev_intr_test 0.780s 48.406us 50 50 100.00
V2 alert_test usbdev_alert_test 0.790s 94.490us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.560s 284.116us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.560s 284.116us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.060s 222.868us 5 5 100.00
usbdev_csr_rw 1.130s 91.482us 20 20 100.00
usbdev_csr_aliasing 3.740s 419.054us 5 5 100.00
usbdev_same_csr_outstanding 1.930s 272.556us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.060s 222.868us 5 5 100.00
usbdev_csr_rw 1.130s 91.482us 20 20 100.00
usbdev_csr_aliasing 3.740s 419.054us 5 5 100.00
usbdev_same_csr_outstanding 1.930s 272.556us 20 20 100.00
V2 TOTAL 2668 2691 99.15
V2S tl_intg_err usbdev_sec_cm 1.900s 1.086ms 5 5 100.00
usbdev_tl_intg_err 6.030s 1.504ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 6.030s 1.504ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 45.130s 5.117ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 0.680s 49.708us 0 10 0.00
usbdev_stress_all 0.660s 0 50 0.00
TOTAL 2809 2892 97.13

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 82 79 78 95.12
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.35 97.82 93.79 97.44 73.44 96.21 98.17 96.58

Failure Buckets

Past Results