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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.38 98.21 96.03 97.44 94.92 98.38 98.21 98.46


Total test records in report: 3848
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T3226 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3929515067 Sep 18 01:08:31 PM UTC 24 Sep 18 01:08:52 PM UTC 24 14831462502 ps
T3227 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3604729256 Sep 18 01:07:29 PM UTC 24 Sep 18 01:08:52 PM UTC 24 10397748611 ps
T3228 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2728822247 Sep 18 01:08:50 PM UTC 24 Sep 18 01:08:53 PM UTC 24 277073510 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1423506949 Sep 18 01:08:51 PM UTC 24 Sep 18 01:08:53 PM UTC 24 312060539 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2125462145 Sep 18 01:08:50 PM UTC 24 Sep 18 01:08:53 PM UTC 24 263146519 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.4060494461 Sep 18 01:08:50 PM UTC 24 Sep 18 01:08:53 PM UTC 24 567920532 ps
T3229 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2589527022 Sep 18 01:08:50 PM UTC 24 Sep 18 01:08:54 PM UTC 24 567562351 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.2850656210 Sep 18 01:08:50 PM UTC 24 Sep 18 01:08:54 PM UTC 24 480833819 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.4092823097 Sep 18 01:08:51 PM UTC 24 Sep 18 01:08:54 PM UTC 24 364682946 ps
T3230 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2658018454 Sep 18 01:08:51 PM UTC 24 Sep 18 01:08:54 PM UTC 24 541703380 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.378348652 Sep 18 01:08:51 PM UTC 24 Sep 18 01:08:54 PM UTC 24 487417465 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1454485065 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:54 PM UTC 24 165331326 ps
T3231 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.942236480 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 293688846 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.1495008484 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 216800881 ps
T3232 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.727629286 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 227658391 ps
T3233 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.4118647054 Sep 18 01:08:53 PM UTC 24 Sep 18 01:08:55 PM UTC 24 158808320 ps
T3234 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.346266424 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 512875309 ps
T3235 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.3726543765 Sep 18 01:08:36 PM UTC 24 Sep 18 01:08:55 PM UTC 24 11191305469 ps
T3236 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2872767300 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 655649783 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.3438694082 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 298356345 ps
T3237 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.920158 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:55 PM UTC 24 535109570 ps
T3238 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.348991800 Sep 18 01:08:33 PM UTC 24 Sep 18 01:08:56 PM UTC 24 2537450640 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.2416273308 Sep 18 01:08:52 PM UTC 24 Sep 18 01:08:56 PM UTC 24 638690854 ps
T3239 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1722002349 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:56 PM UTC 24 216144169 ps
T3240 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2906352526 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:57 PM UTC 24 278938140 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.197017972 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:57 PM UTC 24 318293020 ps
T3241 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.777479441 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:57 PM UTC 24 456828260 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.692864254 Sep 18 01:08:55 PM UTC 24 Sep 18 01:08:57 PM UTC 24 287988122 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3435761729 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:57 PM UTC 24 210350298 ps
T3242 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.559587278 Sep 18 01:08:04 PM UTC 24 Sep 18 01:08:57 PM UTC 24 27288069681 ps
T3243 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1359091456 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:57 PM UTC 24 595943742 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.920275364 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:58 PM UTC 24 529288144 ps
T3244 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.2965054218 Sep 18 01:08:54 PM UTC 24 Sep 18 01:08:58 PM UTC 24 613209877 ps
T3245 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1186171900 Sep 18 01:08:03 PM UTC 24 Sep 18 01:08:58 PM UTC 24 8719650301 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1932971081 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 276468068 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1878707298 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 216444532 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.2940851842 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 414396629 ps
T3246 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3744761882 Sep 18 01:08:15 PM UTC 24 Sep 18 01:08:59 PM UTC 24 29173677899 ps
T3247 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2134993036 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 514940809 ps
T3248 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1064032166 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 549949786 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.1707617192 Sep 18 01:08:57 PM UTC 24 Sep 18 01:08:59 PM UTC 24 348258938 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3142752025 Sep 18 01:08:57 PM UTC 24 Sep 18 01:08:59 PM UTC 24 248423032 ps
T3249 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3182826755 Sep 18 01:08:23 PM UTC 24 Sep 18 01:08:59 PM UTC 24 3653233468 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.1929305892 Sep 18 01:08:57 PM UTC 24 Sep 18 01:08:59 PM UTC 24 289389301 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.613563086 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 582920132 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2814485358 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 285583854 ps
T3250 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1251959949 Sep 18 01:08:56 PM UTC 24 Sep 18 01:08:59 PM UTC 24 674812527 ps
T3251 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.3456204255 Sep 18 01:08:57 PM UTC 24 Sep 18 01:09:00 PM UTC 24 467750438 ps
T3252 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.294860943 Sep 18 01:08:56 PM UTC 24 Sep 18 01:09:00 PM UTC 24 578441432 ps
T3253 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.3619286695 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:00 PM UTC 24 195779703 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2739463190 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:00 PM UTC 24 146168142 ps
T3254 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.1226411505 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:00 PM UTC 24 246488985 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.864571369 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:00 PM UTC 24 265560815 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.3922720429 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 254056313 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2849119875 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 614423472 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.4048397150 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 437501924 ps
T3255 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.794748216 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 596090474 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.2117005368 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 266133511 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2177630066 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 496215373 ps
T3256 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.3837700375 Sep 18 01:07:45 PM UTC 24 Sep 18 01:09:01 PM UTC 24 2773505747 ps
T3257 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.389763137 Sep 18 01:08:58 PM UTC 24 Sep 18 01:09:01 PM UTC 24 620011235 ps
T3258 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.536707074 Sep 18 01:08:38 PM UTC 24 Sep 18 01:09:02 PM UTC 24 2699436884 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.1666544245 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:03 PM UTC 24 239946782 ps
T248 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.2679660265 Sep 18 01:09:00 PM UTC 24 Sep 18 01:09:03 PM UTC 24 551204435 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.974659086 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:03 PM UTC 24 519855365 ps
T3259 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.2295046479 Sep 18 01:09:00 PM UTC 24 Sep 18 01:09:03 PM UTC 24 627735887 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.2914864500 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:03 PM UTC 24 301971126 ps
T3260 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.1230267703 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:04 PM UTC 24 565768258 ps
T3261 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.126198517 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:04 PM UTC 24 547166821 ps
T3262 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.509195484 Sep 18 01:09:01 PM UTC 24 Sep 18 01:09:04 PM UTC 24 467649165 ps
T3263 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.465389914 Sep 18 01:09:00 PM UTC 24 Sep 18 01:09:04 PM UTC 24 639294055 ps
T3264 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.984825505 Sep 18 01:08:21 PM UTC 24 Sep 18 01:09:04 PM UTC 24 3854394305 ps
T3265 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3958780062 Sep 18 01:09:44 PM UTC 24 Sep 18 01:09:59 PM UTC 24 228989537 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1242765821 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 157995571 ps
T3266 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.1709932305 Sep 18 01:08:34 PM UTC 24 Sep 18 01:09:05 PM UTC 24 2971557377 ps
T3267 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.2599322962 Sep 18 01:07:27 PM UTC 24 Sep 18 01:09:05 PM UTC 24 3894901800 ps
T3268 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.726242807 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 275443317 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.395333578 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 282219308 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.854149067 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 370144795 ps
T3269 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3622135009 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 243402838 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.2634936529 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 156199407 ps
T3270 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.4027756137 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 193985459 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3500989017 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 342316574 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.3283673234 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 569713300 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2550199170 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 525802533 ps
T3271 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2176492390 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:05 PM UTC 24 623366837 ps
T3272 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1723405443 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:06 PM UTC 24 581470813 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.3811257443 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:06 PM UTC 24 734105197 ps
T3273 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.777629431 Sep 18 01:09:03 PM UTC 24 Sep 18 01:09:06 PM UTC 24 529217285 ps
T3274 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.2512863441 Sep 18 01:08:21 PM UTC 24 Sep 18 01:09:06 PM UTC 24 6636198850 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3069458281 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 308544736 ps
T3275 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.1224532590 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 274656098 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.759987800 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 242061361 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.615522010 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 169751164 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2501101610 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 548301724 ps
T3276 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.1154397423 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 325513893 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.597993971 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 265912065 ps
T3277 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.3148496510 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 484183220 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.311056943 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 422387511 ps
T3278 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.3404560675 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:07 PM UTC 24 615242604 ps
T3279 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3338689060 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:08 PM UTC 24 481807975 ps
T3280 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.2359898101 Sep 18 01:08:37 PM UTC 24 Sep 18 01:09:08 PM UTC 24 3723529819 ps
T3281 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3550235945 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:08 PM UTC 24 571169010 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.383497449 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:08 PM UTC 24 460051105 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1430785249 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:08 PM UTC 24 636715215 ps
T3282 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.1635254699 Sep 18 01:09:05 PM UTC 24 Sep 18 01:09:08 PM UTC 24 607542672 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.304717727 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:09 PM UTC 24 313875664 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.3062650668 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:09 PM UTC 24 277416104 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3891809035 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:09 PM UTC 24 461655174 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.610721074 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 154877807 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1442429806 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 304333406 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.2571241812 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 316914282 ps
T3283 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2178536847 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 365919651 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1615074069 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 313033760 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.575462909 Sep 18 01:09:08 PM UTC 24 Sep 18 01:09:10 PM UTC 24 159077266 ps
T3284 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1886289716 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 543252541 ps
T3285 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1856736277 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 518004430 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2869648748 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 346778445 ps
T3286 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.4061302325 Sep 18 01:09:08 PM UTC 24 Sep 18 01:09:10 PM UTC 24 261913824 ps
T3287 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3943209095 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 510606986 ps
T3288 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.2905551095 Sep 18 01:08:33 PM UTC 24 Sep 18 01:09:10 PM UTC 24 21388162867 ps
T3289 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.442375034 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 519829610 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.2443440721 Sep 18 01:09:08 PM UTC 24 Sep 18 01:09:10 PM UTC 24 413565496 ps
T3290 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1995371466 Sep 18 01:08:43 PM UTC 24 Sep 18 01:09:10 PM UTC 24 8996442643 ps
T3291 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3600884774 Sep 18 01:09:07 PM UTC 24 Sep 18 01:09:10 PM UTC 24 626843080 ps
T3292 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.3663144105 Sep 18 01:08:45 PM UTC 24 Sep 18 01:09:11 PM UTC 24 3295505030 ps
T3293 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.758885259 Sep 18 01:09:08 PM UTC 24 Sep 18 01:09:11 PM UTC 24 560893839 ps
T3294 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.868180878 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:11 PM UTC 24 145421844 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3337726080 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 775638697 ps
T3295 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3979274113 Sep 18 01:08:37 PM UTC 24 Sep 18 01:09:11 PM UTC 24 4184494912 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.2469445630 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 270412989 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2167569940 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 300996854 ps
T3296 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.644081593 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 273005456 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1854197088 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 335758040 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.2521192743 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 281459204 ps
T3297 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3991389804 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 514465816 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1710371906 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 338782802 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2984849640 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 261521341 ps
T3298 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.1940048571 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 510257623 ps
T3299 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.2276698252 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 502066331 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3487061204 Sep 18 01:09:09 PM UTC 24 Sep 18 01:09:12 PM UTC 24 886964532 ps
T3300 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.615690127 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 618408690 ps
T3301 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2956282546 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:12 PM UTC 24 543906016 ps
T3302 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.3042826080 Sep 18 01:09:10 PM UTC 24 Sep 18 01:09:13 PM UTC 24 615179202 ps
T3303 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3297918792 Sep 18 01:08:27 PM UTC 24 Sep 18 01:09:14 PM UTC 24 16977083751 ps
T3304 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.149090400 Sep 18 01:08:46 PM UTC 24 Sep 18 01:09:14 PM UTC 24 2979988174 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3288716942 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:14 PM UTC 24 180765422 ps
T3305 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.3106708888 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:14 PM UTC 24 181242046 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2570945984 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 275605434 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2631175593 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 399121515 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3499622787 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 241755088 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.540971753 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 303316149 ps
T3306 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3404500519 Sep 18 01:08:16 PM UTC 24 Sep 18 01:09:15 PM UTC 24 31921486175 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.2794246655 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 368135861 ps
T3307 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2077556541 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 304235921 ps
T3308 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.2904736991 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 500535696 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.227512280 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 279210851 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.3112749331 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 282866838 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.2410233853 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 463919713 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.1743937822 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 374634152 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.3663924665 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 681360285 ps
T3309 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.2381023444 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 542862685 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.413449230 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 411129257 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3530207321 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 425666904 ps
T3310 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.2495986436 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 380268414 ps
T3311 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.4092446927 Sep 18 01:09:12 PM UTC 24 Sep 18 01:09:15 PM UTC 24 549906212 ps
T3312 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2705046450 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 559522781 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2511013889 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:15 PM UTC 24 646135304 ps
T3313 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.2340231764 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:16 PM UTC 24 519360495 ps
T3314 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.2207081301 Sep 18 01:08:31 PM UTC 24 Sep 18 01:09:17 PM UTC 24 29847078265 ps
T3315 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.2494765350 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 184356751 ps
T3316 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3866048027 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 152306259 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.1673361190 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 360976219 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.3483426686 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:18 PM UTC 24 256069281 ps
T3317 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2828493688 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 445869890 ps
T3318 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.854620824 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 289438863 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.4269208485 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:18 PM UTC 24 563353117 ps
T3319 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.761177239 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:18 PM UTC 24 481238555 ps
T3320 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2858972552 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:19 PM UTC 24 524601450 ps
T3321 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3930461061 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:19 PM UTC 24 639301209 ps
T3322 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.3088435158 Sep 18 01:07:57 PM UTC 24 Sep 18 01:09:20 PM UTC 24 49504487443 ps
T3323 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.2848590544 Sep 18 01:08:33 PM UTC 24 Sep 18 01:09:21 PM UTC 24 5672856590 ps
T3324 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1868452017 Sep 18 01:08:06 PM UTC 24 Sep 18 01:09:21 PM UTC 24 2557077827 ps
T3325 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.1923646480 Sep 18 01:07:09 PM UTC 24 Sep 18 01:09:22 PM UTC 24 4913148829 ps
T3326 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.64060485 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:23 PM UTC 24 168927881 ps
T3327 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2849655787 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:23 PM UTC 24 270620217 ps
T3328 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.443663099 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:23 PM UTC 24 302109091 ps
T3329 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4051576597 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:23 PM UTC 24 492181905 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.2955091238 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:23 PM UTC 24 505065603 ps
T3330 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.2778433591 Sep 18 01:07:32 PM UTC 24 Sep 18 01:09:23 PM UTC 24 4093165515 ps
T3331 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.3920512626 Sep 18 01:09:21 PM UTC 24 Sep 18 01:09:24 PM UTC 24 604818121 ps
T3332 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1962184910 Sep 18 01:09:18 PM UTC 24 Sep 18 01:09:24 PM UTC 24 604894354 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3871073196 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:24 PM UTC 24 283226867 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.132893421 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:24 PM UTC 24 303318615 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.1784880053 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:24 PM UTC 24 309192460 ps
T3333 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.3427119089 Sep 18 01:08:36 PM UTC 24 Sep 18 01:09:24 PM UTC 24 28311353627 ps
T3334 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.906992703 Sep 18 01:09:15 PM UTC 24 Sep 18 01:09:24 PM UTC 24 544041205 ps
T3335 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.309259295 Sep 18 01:07:11 PM UTC 24 Sep 18 01:09:26 PM UTC 24 4874834399 ps
T3336 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1286782945 Sep 18 01:09:22 PM UTC 24 Sep 18 01:09:27 PM UTC 24 180897961 ps
T3337 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.1122260727 Sep 18 01:09:22 PM UTC 24 Sep 18 01:09:27 PM UTC 24 246901244 ps
T3338 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.633948646 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 162555550 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2124712767 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 262377797 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.4276315269 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 311684318 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3779605846 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 273196655 ps
T3339 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2385556461 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 146733315 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.3756130383 Sep 18 01:09:26 PM UTC 24 Sep 18 01:09:28 PM UTC 24 180435690 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.4197160984 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:28 PM UTC 24 256108402 ps
T3340 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3468386147 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:28 PM UTC 24 171863635 ps
T3341 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1503436413 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:28 PM UTC 24 379447691 ps
T3342 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.4283430407 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:28 PM UTC 24 275063497 ps
T3343 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.403358917 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:29 PM UTC 24 526978792 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2140673458 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 271914630 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.3249649425 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 280305032 ps
T3344 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.480505105 Sep 18 01:09:23 PM UTC 24 Sep 18 01:09:29 PM UTC 24 253452592 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3717690773 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:29 PM UTC 24 640110041 ps
T3345 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.4049630877 Sep 18 01:09:13 PM UTC 24 Sep 18 01:09:29 PM UTC 24 514035499 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.3172913446 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 370730183 ps
T3346 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2214824823 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:29 PM UTC 24 595689610 ps
T249 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.2078611018 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 472684679 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2160906881 Sep 18 01:09:20 PM UTC 24 Sep 18 01:09:29 PM UTC 24 194356628 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3546454327 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 271182506 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.2421519094 Sep 18 01:09:43 PM UTC 24 Sep 18 01:09:59 PM UTC 24 391520551 ps
T3347 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.418264792 Sep 18 01:09:25 PM UTC 24 Sep 18 01:09:29 PM UTC 24 589714876 ps
T3348 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.3464569392 Sep 18 01:09:23 PM UTC 24 Sep 18 01:09:29 PM UTC 24 384345077 ps
T3349 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.4116703352 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 493603084 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.1765514353 Sep 18 01:09:19 PM UTC 24 Sep 18 01:09:29 PM UTC 24 457180159 ps
T3350 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.4239359220 Sep 18 01:09:20 PM UTC 24 Sep 18 01:09:29 PM UTC 24 598365981 ps
T3351 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.1396298284 Sep 18 01:09:24 PM UTC 24 Sep 18 01:09:29 PM UTC 24 559346168 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.4231171123 Sep 18 01:09:20 PM UTC 24 Sep 18 01:09:30 PM UTC 24 684623077 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.2995874663 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 233230493 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2724010708 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 265807595 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.1662855048 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 301921472 ps
T3352 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1604952336 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 295651850 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.2527598350 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 282069395 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2942616478 Sep 18 01:09:31 PM UTC 24 Sep 18 01:09:33 PM UTC 24 318522739 ps
T3353 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.2370602846 Sep 18 01:09:31 PM UTC 24 Sep 18 01:09:33 PM UTC 24 269914568 ps
T3354 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.404122586 Sep 18 01:08:23 PM UTC 24 Sep 18 01:09:33 PM UTC 24 2678940600 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3169956828 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 445186161 ps
T3355 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2153533551 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 575636876 ps
T3356 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2655405942 Sep 18 01:09:17 PM UTC 24 Sep 18 01:09:33 PM UTC 24 644736699 ps
T3357 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.1158014104 Sep 18 01:09:31 PM UTC 24 Sep 18 01:09:34 PM UTC 24 522600930 ps
T3358 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.661492160 Sep 18 01:09:35 PM UTC 24 Sep 18 01:09:38 PM UTC 24 151320107 ps
T3359 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.1455602761 Sep 18 01:09:29 PM UTC 24 Sep 18 01:09:38 PM UTC 24 152793736 ps
T3360 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.3259746493 Sep 18 01:09:29 PM UTC 24 Sep 18 01:09:38 PM UTC 24 147591334 ps
T3361 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.347002038 Sep 18 01:09:29 PM UTC 24 Sep 18 01:09:38 PM UTC 24 262998773 ps
T3362 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.1083320161 Sep 18 01:09:35 PM UTC 24 Sep 18 01:09:38 PM UTC 24 178989616 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3112452266 Sep 18 01:09:29 PM UTC 24 Sep 18 01:09:38 PM UTC 24 288171158 ps
T3363 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.2262826746 Sep 18 01:09:46 PM UTC 24 Sep 18 01:09:59 PM UTC 24 265253820 ps
T3364 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1462338632 Sep 18 01:09:35 PM UTC 24 Sep 18 01:09:38 PM UTC 24 374397180 ps
T3365 /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.257039724 Sep 18 01:09:35 PM UTC 24 Sep 18 01:09:38 PM UTC 24 253694002 ps
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