| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.38 | 98.21 | 96.03 | 97.44 | 94.92 | 98.38 | 98.21 | 98.46 |
| T3774 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.461908985 | Sep 18 01:11:49 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 100996770 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2522082548 | Sep 18 01:11:57 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 95557693 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.4276205118 | Sep 18 01:11:45 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 234402213 ps | ||
| T3775 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3425731367 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 212877015 ps | ||
| T3776 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.4081250950 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:08 PM UTC 24 | 75786940 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3247409939 | Sep 18 01:11:47 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 98592896 ps | ||
| T3777 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.649286341 | Sep 18 01:11:49 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 87415307 ps | ||
| T324 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1514898568 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 48096967 ps | ||
| T3778 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.75769210 | Sep 18 01:11:50 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 147018625 ps | ||
| T3779 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.635749831 | Sep 18 01:11:47 PM UTC 24 | Sep 18 01:11:59 PM UTC 24 | 144097826 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3091431716 | Sep 18 01:11:45 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 84677738 ps | ||
| T3780 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2722399779 | Sep 18 01:11:47 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 80594044 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3109943213 | Sep 18 01:11:37 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 122591936 ps | ||
| T314 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.4116157711 | Sep 18 01:11:45 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 592846387 ps | ||
| T3781 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.872619527 | Sep 18 01:11:37 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 297777420 ps | ||
| T328 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.2434919475 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 49678915 ps | ||
| T3782 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2110003175 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:12:00 PM UTC 24 | 185894035 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.4161027821 | Sep 18 01:11:49 PM UTC 24 | Sep 18 01:12:01 PM UTC 24 | 238382351 ps | ||
| T3783 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.995656439 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:12:01 PM UTC 24 | 147439254 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3859932704 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:12:01 PM UTC 24 | 139380648 ps | ||
| T3784 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.3981273876 | Sep 18 01:11:51 PM UTC 24 | Sep 18 01:12:02 PM UTC 24 | 91731252 ps | ||
| T3785 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.3640744966 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:02 PM UTC 24 | 125443446 ps | ||
| T329 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.4238902564 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:03 PM UTC 24 | 31627493 ps | ||
| T316 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3248776564 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:03 PM UTC 24 | 88552438 ps | ||
| T588 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.282213626 | Sep 18 01:11:54 PM UTC 24 | Sep 18 01:12:03 PM UTC 24 | 812172315 ps | ||
| T591 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.2657696618 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:04 PM UTC 24 | 804446828 ps | ||
| T3786 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3382258282 | Sep 18 01:11:49 PM UTC 24 | Sep 18 01:12:04 PM UTC 24 | 2082699878 ps | ||
| T587 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.316917950 | Sep 18 01:11:51 PM UTC 24 | Sep 18 01:12:04 PM UTC 24 | 1070573391 ps | ||
| T3787 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.237041220 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:05 PM UTC 24 | 146165502 ps | ||
| T3788 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2873503454 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:08 PM UTC 24 | 38345214 ps | ||
| T3789 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3456459927 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:08 PM UTC 24 | 80676109 ps | ||
| T3790 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.4243769664 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:08 PM UTC 24 | 129944835 ps | ||
| T3791 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.187583116 | Sep 18 01:11:58 PM UTC 24 | Sep 18 01:12:08 PM UTC 24 | 115378920 ps | ||
| T3792 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3627088482 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:09 PM UTC 24 | 386961862 ps | ||
| T3793 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.4125246209 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:09 PM UTC 24 | 119132955 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1973802885 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:09 PM UTC 24 | 259771607 ps | ||
| T592 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1704604611 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:10 PM UTC 24 | 570734012 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3361912091 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 91362680 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3228708349 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 44632431 ps | ||
| T303 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3770858130 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 127449305 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1348148825 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 122755519 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2914148765 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 113170639 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3154871418 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:13 PM UTC 24 | 122163516 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.457696985 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:14 PM UTC 24 | 82574363 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.899827552 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:15 PM UTC 24 | 123200778 ps | ||
| T593 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3658151192 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:16 PM UTC 24 | 733040923 ps | ||
| T590 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.411344456 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:16 PM UTC 24 | 682097408 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.2502283639 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 40695391 ps | ||
| T331 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2320016168 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 105355096 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.167336664 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 35812083 ps | ||
| T301 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2994354224 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 54504174 ps | ||
| T330 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1778397894 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 81602574 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.690995105 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 30581580 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.266055001 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 68666913 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.911413104 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 39704587 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3928222520 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 64659223 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.661058578 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 62521271 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.570884420 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 116024487 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1219501872 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 84382663 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2567137459 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 100377212 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.562598877 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:18 PM UTC 24 | 190320770 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1577167774 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:19 PM UTC 24 | 80351792 ps | ||
| T589 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.4217664536 | Sep 18 01:12:03 PM UTC 24 | Sep 18 01:12:20 PM UTC 24 | 407469561 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3658499070 | Sep 18 01:11:59 PM UTC 24 | Sep 18 01:12:21 PM UTC 24 | 363032682 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2365533504 | Sep 18 01:12:10 PM UTC 24 | Sep 18 01:12:23 PM UTC 24 | 45119234 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3684420455 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:23 PM UTC 24 | 33524445 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1616171599 | Sep 18 01:11:33 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 79062177 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.661579564 | Sep 18 01:12:09 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 38402557 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.286510169 | Sep 18 01:12:09 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 35419459 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.212812754 | Sep 18 01:12:09 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 33182603 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3151482958 | Sep 18 01:12:09 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 65328100 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2713156947 | Sep 18 01:12:16 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 48550040 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3827198348 | Sep 18 01:12:09 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 67088203 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2009128962 | Sep 18 01:12:16 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 39886158 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3315655067 | Sep 18 01:12:16 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 47977857 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.690465969 | Sep 18 01:12:06 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 84136218 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1251959994 | Sep 18 01:12:06 PM UTC 24 | Sep 18 01:12:28 PM UTC 24 | 49057637 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.3371873406 | Sep 18 01:12:17 PM UTC 24 | Sep 18 01:12:29 PM UTC 24 | 86390411 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3307886283 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:30 PM UTC 24 | 116222069 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.4145225928 | Sep 18 01:12:10 PM UTC 24 | Sep 18 01:12:30 PM UTC 24 | 34435966 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3082074915 | Sep 18 01:12:10 PM UTC 24 | Sep 18 01:12:30 PM UTC 24 | 38210967 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2116141990 | Sep 18 01:12:11 PM UTC 24 | Sep 18 01:12:30 PM UTC 24 | 41454366 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3617047809 | Sep 18 01:12:04 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 96232948 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2268323522 | Sep 18 01:12:05 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 66290902 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.115309959 | Sep 18 01:12:05 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 59417686 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2807754028 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 38152407 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.4042008637 | Sep 18 01:12:15 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 49743596 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.2332844814 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 55137952 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.626709022 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 61594861 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.516161189 | Sep 18 01:12:04 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 131357357 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2420829898 | Sep 18 01:12:04 PM UTC 24 | Sep 18 01:12:31 PM UTC 24 | 75084222 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.4143631316 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:32 PM UTC 24 | 179917437 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2769965555 | Sep 18 01:11:32 PM UTC 24 | Sep 18 01:12:32 PM UTC 24 | 37287167 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1126362195 | Sep 18 01:11:33 PM UTC 24 | Sep 18 01:12:32 PM UTC 24 | 69546485 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2023642641 | Sep 18 01:12:01 PM UTC 24 | Sep 18 01:12:33 PM UTC 24 | 541291710 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2599433607 | Sep 18 01:11:32 PM UTC 24 | Sep 18 01:12:33 PM UTC 24 | 168548780 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.2319376100 | Sep 18 01:11:32 PM UTC 24 | Sep 18 01:12:35 PM UTC 24 | 482944552 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3846706506 | Sep 18 01:11:32 PM UTC 24 | Sep 18 01:12:37 PM UTC 24 | 2413767504 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3737332734 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 1089710759 ps |
| CPU time | 3.13 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737332734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3737332734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.1331368405 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 4167052441 ps |
| CPU time | 9.87 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:57 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331368405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.1331368405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.144867419 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 433990088 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144867419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.144867419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.496079655 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 4568433441 ps |
| CPU time | 6.78 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:52 PM UTC 24 |
| Peak memory | 227296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496079655 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.496079655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.474859259 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 43831853 ps |
| CPU time | 0.72 seconds |
| Started | Sep 18 01:11:30 PM UTC 24 |
| Finished | Sep 18 01:11:33 PM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474859259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.474859259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.249779244 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 6507106821 ps |
| CPU time | 25.97 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:51:23 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249779244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.249779244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1982018311 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 775301967 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 01:11:30 PM UTC 24 |
| Finished | Sep 18 01:11:35 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982018311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.1982018311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2361624730 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 4928624888 ps |
| CPU time | 39.01 seconds |
| Started | Sep 18 12:51:11 PM UTC 24 |
| Finished | Sep 18 12:51:51 PM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361624730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2361624730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1333796721 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 1066537953 ps |
| CPU time | 3.24 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:51 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333796721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.1333796721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.791459162 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 39362435338 ps |
| CPU time | 85.85 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:52:30 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791459162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_device_address.791459162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3207077657 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 26276700236 ps |
| CPU time | 48.63 seconds |
| Started | Sep 18 12:54:17 PM UTC 24 |
| Finished | Sep 18 12:55:07 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207077657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3207077657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.2374243202 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 19878532710 ps |
| CPU time | 38.29 seconds |
| Started | Sep 18 12:53:14 PM UTC 24 |
| Finished | Sep 18 12:53:54 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374243202 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.2374243202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.917059663 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 307056554 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917059663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_ mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.917059663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3961563611 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 894139831 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:02 PM UTC 24 |
| Peak memory | 250552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961563611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.3961563611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.2955091238 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 505065603 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 215420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2955091238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.2955091238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2168905644 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 289688772 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 01:11:24 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 227916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168905644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2168905644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2441465762 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 58008683 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441465762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2441465762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.2318405698 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 40002569 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:47 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318405698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.2318405698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.327277579 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 268022836 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327277579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_fifo_levels.327277579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.2846307335 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 137740768 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846307335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.2846307335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.3942164051 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 7976455462 ps |
| CPU time | 35.42 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:34 PM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942164051 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.3942164051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.103453414 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 531168098 ps |
| CPU time | 2.68 seconds |
| Started | Sep 18 01:05:52 PM UTC 24 |
| Finished | Sep 18 01:05:55 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=103453414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx _rx_disruption.103453414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.2157160704 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 21096775190 ps |
| CPU time | 25.04 seconds |
| Started | Sep 18 12:57:07 PM UTC 24 |
| Finished | Sep 18 12:57:33 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157160704 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.2157160704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.2078611018 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 472684679 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2078611018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.2078611018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.2576846617 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 59649940 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576846617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.2576846617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3140735759 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 31121672609 ps |
| CPU time | 118.42 seconds |
| Started | Sep 18 12:51:35 PM UTC 24 |
| Finished | Sep 18 12:53:36 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140735759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3140735759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3136622850 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 423769451 ps |
| CPU time | 2.34 seconds |
| Started | Sep 18 12:52:27 PM UTC 24 |
| Finished | Sep 18 12:52:31 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136622850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.3136622850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.3874976257 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 256204309 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874976257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.3874976257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.3123463628 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 257595946 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 12:51:25 PM UTC 24 |
| Finished | Sep 18 12:51:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123463628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.3123463628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.204848728 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 617626165 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:09:34 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204848728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.204848728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2501101610 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 548301724 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501101610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.2501101610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.1724060210 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 22678674298 ps |
| CPU time | 47.06 seconds |
| Started | Sep 18 12:56:20 PM UTC 24 |
| Finished | Sep 18 12:57:08 PM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724060210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1724060210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.70735994 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 816646909 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:09:50 PM UTC 24 |
| Finished | Sep 18 01:09:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=70735994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.70735994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1218518169 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 668084279 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218518169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1218518169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.1529644117 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 586291061 ps |
| CPU time | 2.75 seconds |
| Started | Sep 18 12:54:12 PM UTC 24 |
| Finished | Sep 18 12:54:16 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529644117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.1529644117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.1772773336 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 149584932 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:46 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772773336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.1772773336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.1609409346 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 162090058 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:50:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609409346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.1609409346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.2756835617 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 8910160083 ps |
| CPU time | 52.39 seconds |
| Started | Sep 18 12:52:03 PM UTC 24 |
| Finished | Sep 18 12:52:57 PM UTC 24 |
| Peak memory | 234852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756835617 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.2756835617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2068590951 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 42562035906 ps |
| CPU time | 89.33 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:52:15 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068590951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2068590951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.2538008039 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 802261187 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:04 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538008039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2538008039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3615801455 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 456484093 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615801455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.3615801455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.316917950 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 1070573391 ps |
| CPU time | 4.65 seconds |
| Started | Sep 18 01:11:51 PM UTC 24 |
| Finished | Sep 18 01:12:04 PM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316917950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.316917950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.2434919475 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 49678915 ps |
| CPU time | 0.72 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434919475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.2434919475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.2512681038 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 604937380 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:18 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512681038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.2512681038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3487061204 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 886964532 ps |
| CPU time | 2.15 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487061204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3487061204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.3967990860 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 959321140 ps |
| CPU time | 4.06 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967990860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.3967990860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1610049482 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 483196743 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 12:57:28 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610049482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1610049482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.1238488966 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 821597866 ps |
| CPU time | 1.89 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238488966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.1238488966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.1270948734 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 284456319 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 12:55:20 PM UTC 24 |
| Finished | Sep 18 12:55:22 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270948734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.1270948734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.1427548084 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 594049401 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:09:44 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427548084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.1427548084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.3350863921 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 493291156 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:03 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350863921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.3350863921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.759692261 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 1172340456 ps |
| CPU time | 3.06 seconds |
| Started | Sep 18 12:51:35 PM UTC 24 |
| Finished | Sep 18 12:51:39 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=759692261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.759692261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.674016873 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 451681173 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 12:53:25 PM UTC 24 |
| Finished | Sep 18 12:53:29 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=674016873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.674016873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2937320104 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 489109314 ps |
| CPU time | 2.19 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:01 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2937320104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2937320104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.894876394 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 40730577 ps |
| CPU time | 0.9 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:02 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894876394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.894876394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.882805596 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 576801795 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 12:50:47 PM UTC 24 |
| Finished | Sep 18 12:50:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882805596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_out_err.882805596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2144311244 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 142846755 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144311244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2144311244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.2735145965 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 182854530 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735145965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.2735145965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.4231171123 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 684623077 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:09:20 PM UTC 24 |
| Finished | Sep 18 01:09:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231171123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.4231171123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3717690773 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 640110041 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717690773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3717690773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.2591742939 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 530152785 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:54 PM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591742939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2591742939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.3452783645 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 571755364 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452783645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.3452783645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3834625678 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 36401598288 ps |
| CPU time | 83.58 seconds |
| Started | Sep 18 12:58:53 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834625678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3834625678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2926532785 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 503770144 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:03:29 PM UTC 24 |
| Finished | Sep 18 01:03:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926532785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2926532785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3523095910 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 533350103 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:47 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523095910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3523095910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3579655778 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 591215782 ps |
| CPU time | 2.9 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579655778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3579655778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3891809035 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 461655174 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891809035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3891809035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.1780927087 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 204053020 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:53:45 PM UTC 24 |
| Finished | Sep 18 12:53:47 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780927087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.1780927087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3859932704 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 139380648 ps |
| CPU time | 2.13 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:12:01 PM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859932704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.3859932704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1041975273 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 4423915517 ps |
| CPU time | 135.26 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:53:06 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041975273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1041975273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3920507048 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 207317364 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:50:59 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920507048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3920507048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1514898568 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 48096967 ps |
| CPU time | 0.65 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514898568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.1514898568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.411344456 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 682097408 ps |
| CPU time | 4.13 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:16 PM UTC 24 |
| Peak memory | 217596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411344456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.411344456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.4217664536 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 407469561 ps |
| CPU time | 2.37 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:20 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217664536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.4217664536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.3928158291 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 95080674704 ps |
| CPU time | 160.93 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:53:29 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3928158291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.3928158291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.1199255674 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 724171933 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:09:56 PM UTC 24 |
| Finished | Sep 18 01:10:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199255674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.1199255674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.2707390643 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 197740523 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 01:09:59 PM UTC 24 |
| Finished | Sep 18 01:10:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707390643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.2707390643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.122643322 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 28960620392 ps |
| CPU time | 72.02 seconds |
| Started | Sep 18 01:02:51 PM UTC 24 |
| Finished | Sep 18 01:04:05 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=122643322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_device_address.122643322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.4079750203 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 37439506638 ps |
| CPU time | 70.55 seconds |
| Started | Sep 18 01:04:48 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079750203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.4079750203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.3292848500 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 295700228 ps |
| CPU time | 1.93 seconds |
| Started | Sep 18 12:57:12 PM UTC 24 |
| Finished | Sep 18 12:57:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292848500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.3292848500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.1652436648 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 9378597485 ps |
| CPU time | 28.59 seconds |
| Started | Sep 18 12:54:28 PM UTC 24 |
| Finished | Sep 18 12:54:58 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652436648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.1652436648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3986781033 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 6592462118 ps |
| CPU time | 79.68 seconds |
| Started | Sep 18 12:51:29 PM UTC 24 |
| Finished | Sep 18 12:52:51 PM UTC 24 |
| Peak memory | 230428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986781033 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.3986781033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3658151192 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 733040923 ps |
| CPU time | 3.75 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:16 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658151192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.3658151192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.4199896904 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 5130834407 ps |
| CPU time | 139.34 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:53:08 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199896904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.4199896904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.313579472 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 273215519 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:56:50 PM UTC 24 |
| Finished | Sep 18 12:56:52 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=313579472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_fifo_levels.313579472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.1743937822 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 374634152 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743937822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.1743937822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2077556541 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 304235921 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077556541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.2077556541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.3112749331 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 282866838 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112749331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.3112749331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3530207321 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 425666904 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530207321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3530207321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.227512280 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 279210851 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227512280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 102.usbdev_fifo_levels.227512280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.3483426686 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 256069281 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483426686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.3483426686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.4283430407 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 275063497 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283430407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.4283430407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3866048027 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 152306259 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866048027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.3866048027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.1673361190 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 360976219 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673361190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.1673361190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2724010708 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 265807595 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724010708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.2724010708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.1662855048 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 301921472 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662855048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.1662855048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.4116027907 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 392080359 ps |
| CPU time | 2.35 seconds |
| Started | Sep 18 12:57:12 PM UTC 24 |
| Finished | Sep 18 12:57:15 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116027907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.4116027907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.2995874663 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 233230493 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995874663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.2995874663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3169956828 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 445186161 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169956828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.3169956828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.2527598350 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 282069395 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527598350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.2527598350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.2046896531 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 474145229 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046896531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.2046896531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.2434584357 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 266376964 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434584357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.2434584357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2284423227 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 533277770 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 216164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284423227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2284423227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.443663099 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 302109091 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443663099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 115.usbdev_fifo_levels.443663099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2140673458 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 271914630 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140673458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.2140673458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.1765514353 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 457180159 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765514353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.1765514353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.2284832398 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 254972208 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 12:57:29 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284832398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.2284832398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.198442140 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 3998043416 ps |
| CPU time | 36.32 seconds |
| Started | Sep 18 12:57:33 PM UTC 24 |
| Finished | Sep 18 12:58:10 PM UTC 24 |
| Peak memory | 230424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=198442140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.198442140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2160906881 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 194356628 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:09:20 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160906881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.2160906881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2124712767 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 262377797 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124712767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.2124712767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.3756130383 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 180435690 ps |
| CPU time | 0.77 seconds |
| Started | Sep 18 01:09:26 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756130383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.3756130383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1169674035 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 444686957 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169674035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1169674035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.1363315006 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 449742078 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:09:33 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363315006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.1363315006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.710791862 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 154041455 ps |
| CPU time | 0.77 seconds |
| Started | Sep 18 01:09:33 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=710791862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 137.usbdev_fifo_levels.710791862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.3207037398 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 257563986 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207037398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.3207037398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.1101380644 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 284959380 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101380644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.1101380644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.3584303007 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 166313741 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 214636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584303007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.3584303007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1689329349 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 269689817 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689329349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1689329349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.3953287194 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 304001379 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:37 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953287194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.3953287194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3652851238 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 718875944 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:09:46 PM UTC 24 |
| Finished | Sep 18 01:10:00 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652851238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3652851238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.2262826746 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 265253820 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:09:46 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262826746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.2262826746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.3618850449 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 180121431 ps |
| CPU time | 0.78 seconds |
| Started | Sep 18 01:09:46 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618850449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.3618850449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.987482094 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 515483214 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:09:54 PM UTC 24 |
| Finished | Sep 18 01:10:03 PM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=987482094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.987482094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.1518756588 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 280326760 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:09:54 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518756588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.1518756588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.2195545598 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 2374233759 ps |
| CPU time | 20.3 seconds |
| Started | Sep 18 12:59:01 PM UTC 24 |
| Finished | Sep 18 12:59:23 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195545598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.2195545598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.153320586 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 397459877 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 12:59:40 PM UTC 24 |
| Finished | Sep 18 12:59:43 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=153320586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.153320586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.1496674265 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 271277496 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:51:40 PM UTC 24 |
| Finished | Sep 18 12:51:42 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496674265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.1496674265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.146844403 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 254720614 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 01:00:50 PM UTC 24 |
| Finished | Sep 18 01:00:53 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146844403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_fifo_levels.146844403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.2265318630 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 297977012 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 01:02:36 PM UTC 24 |
| Finished | Sep 18 01:02:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265318630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.2265318630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.1496566491 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 96288057235 ps |
| CPU time | 181.06 seconds |
| Started | Sep 18 12:52:32 PM UTC 24 |
| Finished | Sep 18 12:55:36 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1496566491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.1496566491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.2365812477 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 250456394 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:03:29 PM UTC 24 |
| Finished | Sep 18 01:03:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365812477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.2365812477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.1407287865 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 261186916 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:04:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407287865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.1407287865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.3900852694 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 368323172 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:31 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900852694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.3900852694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.3350983707 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 247570797 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350983707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.3350983707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2610249638 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 266173186 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:05:20 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610249638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2610249638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.1237634683 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 112365210605 ps |
| CPU time | 262.77 seconds |
| Started | Sep 18 12:53:29 PM UTC 24 |
| Finished | Sep 18 12:57:56 PM UTC 24 |
| Peak memory | 220968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1237634683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.1237634683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2125462145 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 263146519 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:08:50 PM UTC 24 |
| Finished | Sep 18 01:08:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125462145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.2125462145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.597993971 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 265912065 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597993971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 83.usbdev_fifo_levels.597993971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.3062650668 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 277416104 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062650668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.3062650668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.540971753 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 303316149 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540971753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.540971753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.756496525 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 143119169 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756496525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.756496525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3426279533 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 148318058 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:53:16 PM UTC 24 |
| Finished | Sep 18 12:53:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426279533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3426279533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.1479848477 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 10156226711 ps |
| CPU time | 65.67 seconds |
| Started | Sep 18 12:53:52 PM UTC 24 |
| Finished | Sep 18 12:55:00 PM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479848477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1479848477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.1498650706 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 159782103 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:46 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498650706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.1498650706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2583251695 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 200941449 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:50:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583251695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.2583251695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.2977487008 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 177634468 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:50:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977487008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.2977487008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3241485573 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 166242965 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241485573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.3241485573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.4107606135 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 36968158 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:57:20 PM UTC 24 |
| Finished | Sep 18 12:57:22 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107606135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.4107606135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.4105117911 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 613122482 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:11 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4105117911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.4105117911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.1298051448 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 5362132099 ps |
| CPU time | 159.34 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:53:28 PM UTC 24 |
| Peak memory | 234580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298051448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.1298051448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2550245362 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 183121503 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 12:50:49 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550245362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2550245362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.3021939224 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 286379305 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 12:51:15 PM UTC 24 |
| Finished | Sep 18 12:51:18 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021939224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.3021939224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.3530184613 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 47275196 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:51:20 PM UTC 24 |
| Finished | Sep 18 12:51:22 PM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530184613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.3530184613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.3052076519 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 188228545 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:56:57 PM UTC 24 |
| Finished | Sep 18 12:57:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052076519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.3052076519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.1574878410 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 202866305 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:21 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574878410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.1574878410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.1761409381 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 185388183 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:58:22 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761409381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.1761409381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.345709149 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 238968690 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:58:41 PM UTC 24 |
| Finished | Sep 18 12:58:43 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345709149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_nak_trans.345709149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.2625907158 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 205411817 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625907158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.2625907158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1798708164 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 209015630 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798708164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.1798708164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.3173952824 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 217360140 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:01:39 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173952824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.3173952824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.2526707232 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 189963980 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:02:59 PM UTC 24 |
| Finished | Sep 18 01:03:02 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526707232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.2526707232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.2982885605 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 9720777782 ps |
| CPU time | 244.09 seconds |
| Started | Sep 18 12:53:10 PM UTC 24 |
| Finished | Sep 18 12:57:18 PM UTC 24 |
| Peak memory | 237872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982885605 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.2982885605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.1548136680 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 190487899 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:04:07 PM UTC 24 |
| Finished | Sep 18 01:04:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548136680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.1548136680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.1780265485 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 127954882 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 01:11:21 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 217536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780265485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.1780265485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.4287026093 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 1138905351 ps |
| CPU time | 4.92 seconds |
| Started | Sep 18 01:11:21 PM UTC 24 |
| Finished | Sep 18 01:11:34 PM UTC 24 |
| Peak memory | 217536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287026093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.4287026093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.631351237 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 97235650 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=631351237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.631351237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3306647019 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 137541106 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:11:24 PM UTC 24 |
| Finished | Sep 18 01:11:29 PM UTC 24 |
| Peak memory | 227060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306647019 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.3306647019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3873814260 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 95299219 ps |
| CPU time | 0.89 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873814260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3873814260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3413010569 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 46961564 ps |
| CPU time | 0.67 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:29 PM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413010569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3413010569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.4163810751 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 499642466 ps |
| CPU time | 4.03 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:33 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163810751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.4163810751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.984912623 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 109212472 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:11:22 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984912623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.984912623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.4294106065 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 95501891 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294106065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.4294106065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3153144224 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 551947421 ps |
| CPU time | 3.51 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153144224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.3153144224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.777193823 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 1655581857 ps |
| CPU time | 4.52 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:48 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=777193823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.777193823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3770728602 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 59710803 ps |
| CPU time | 0.71 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770728602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3770728602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.3743529403 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 133566163 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:11:30 PM UTC 24 |
| Finished | Sep 18 01:11:33 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743529403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.3743529403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3194036572 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 118753760 ps |
| CPU time | 2.07 seconds |
| Started | Sep 18 01:11:30 PM UTC 24 |
| Finished | Sep 18 01:11:34 PM UTC 24 |
| Peak memory | 217784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194036572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3194036572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.75769210 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 147018625 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:11:50 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 227048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75769210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.75769210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.3356172007 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 62959685 ps |
| CPU time | 0.73 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356172007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.3356172007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.910704738 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 58252831 ps |
| CPU time | 0.67 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910704738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.910704738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.461908985 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 100996770 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=461908985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.461908985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.4161027821 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 238382351 ps |
| CPU time | 2.67 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:12:01 PM UTC 24 |
| Peak memory | 234836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161027821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.4161027821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3382258282 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 2082699878 ps |
| CPU time | 5.7 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:12:04 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382258282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3382258282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.995656439 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 147439254 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:12:01 PM UTC 24 |
| Peak memory | 226764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=995656439 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.995656439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3425731367 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 212877015 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425731367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.3425731367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.3981273876 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 91731252 ps |
| CPU time | 2.23 seconds |
| Started | Sep 18 01:11:51 PM UTC 24 |
| Finished | Sep 18 01:12:02 PM UTC 24 |
| Peak memory | 234296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981273876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.3981273876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2522082548 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 95557693 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:11:57 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522082548 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2522082548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.3870473437 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 84831218 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:11:57 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870473437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.3870473437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2110003175 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 185894035 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2110003175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2110003175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.282213626 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 812172315 ps |
| CPU time | 4.22 seconds |
| Started | Sep 18 01:11:54 PM UTC 24 |
| Finished | Sep 18 01:12:03 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=282213626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.282213626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.187583116 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 115378920 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:08 PM UTC 24 |
| Peak memory | 226240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=187583116 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.187583116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.4081250950 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 75786940 ps |
| CPU time | 0.81 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:08 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081250950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.4081250950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.4243769664 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 129944835 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:08 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243769664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.4243769664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.3640744966 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 125443446 ps |
| CPU time | 2.47 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:02 PM UTC 24 |
| Peak memory | 227840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640744966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.3640744966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.2657696618 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 804446828 ps |
| CPU time | 3.98 seconds |
| Started | Sep 18 01:11:58 PM UTC 24 |
| Finished | Sep 18 01:12:04 PM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657696618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.2657696618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1219501872 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 84382663 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 227024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219501872 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.1219501872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2994354224 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 54504174 ps |
| CPU time | 0.72 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994354224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2994354224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3456459927 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 80676109 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:08 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456459927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3456459927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2567137459 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 100377212 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567137459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.2567137459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.4125246209 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 119132955 ps |
| CPU time | 2.33 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:09 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125246209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.4125246209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3627088482 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 386961862 ps |
| CPU time | 2.21 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:09 PM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627088482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.3627088482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3248776564 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 88552438 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:03 PM UTC 24 |
| Peak memory | 227000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248776564 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.3248776564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.626709022 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 61594861 ps |
| CPU time | 0.9 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626709022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.626709022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.2332844814 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 55137952 ps |
| CPU time | 0.8 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332844814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.2332844814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.4143631316 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 179917437 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:32 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143631316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.4143631316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3658499070 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 363032682 ps |
| CPU time | 3.59 seconds |
| Started | Sep 18 01:11:59 PM UTC 24 |
| Finished | Sep 18 01:12:21 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658499070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3658499070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2023642641 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 541291710 ps |
| CPU time | 2.51 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:33 PM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023642641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.2023642641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.457696985 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 82574363 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:14 PM UTC 24 |
| Peak memory | 227836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=457696985 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.457696985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3361912091 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 91362680 ps |
| CPU time | 0.71 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361912091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.3361912091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.4238902564 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 31627493 ps |
| CPU time | 0.63 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:03 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238902564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.4238902564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1348148825 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 122755519 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348148825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.1348148825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.237041220 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 146165502 ps |
| CPU time | 2.58 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:05 PM UTC 24 |
| Peak memory | 227904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237041220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.237041220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2914148765 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 113170639 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 227052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914148765 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.2914148765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3770858130 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 127449305 ps |
| CPU time | 0.89 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770858130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3770858130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3228708349 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 44632431 ps |
| CPU time | 0.65 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228708349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.3228708349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3154871418 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 122163516 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:13 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154871418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.3154871418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.899827552 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 123200778 ps |
| CPU time | 2.94 seconds |
| Started | Sep 18 01:12:01 PM UTC 24 |
| Finished | Sep 18 01:12:15 PM UTC 24 |
| Peak memory | 234052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=899827552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.899827552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.570884420 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 116024487 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 226996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570884420 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.570884420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.661058578 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 62521271 ps |
| CPU time | 0.78 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=661058578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.661058578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2873503454 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 38345214 ps |
| CPU time | 0.68 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:08 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873503454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.2873503454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.562598877 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 190320770 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=562598877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.562598877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1973802885 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 259771607 ps |
| CPU time | 2.52 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:09 PM UTC 24 |
| Peak memory | 234724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973802885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.1973802885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1704604611 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 570734012 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:10 PM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704604611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1704604611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2420829898 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 75084222 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:12:04 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 227000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420829898 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.2420829898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.516161189 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 131357357 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:12:04 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=516161189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.516161189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1577167774 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 80351792 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:12:03 PM UTC 24 |
| Finished | Sep 18 01:12:19 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577167774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.1577167774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.3801049403 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 210640847 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:49 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801049403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.3801049403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.546575194 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 884778981 ps |
| CPU time | 3.86 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:51 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=546575194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.546575194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.346289355 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 72131708 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:47 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346289355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.346289355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1404477680 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 130724042 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:48 PM UTC 24 |
| Peak memory | 227064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404477680 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.1404477680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1224873088 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 164539349 ps |
| CPU time | 0.91 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:47 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224873088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.1224873088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.188629502 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 76661484 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:48 PM UTC 24 |
| Peak memory | 226956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188629502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.188629502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3995336535 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 120574454 ps |
| CPU time | 2 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:49 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995336535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3995336535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2637889839 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 89025170 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:48 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637889839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2637889839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3617047809 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 96232948 ps |
| CPU time | 0.73 seconds |
| Started | Sep 18 01:12:04 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617047809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.3617047809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2268323522 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 66290902 ps |
| CPU time | 0.71 seconds |
| Started | Sep 18 01:12:05 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268323522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.2268323522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.115309959 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 59417686 ps |
| CPU time | 0.7 seconds |
| Started | Sep 18 01:12:05 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=115309959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.115309959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1251959994 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 49057637 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:12:06 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251959994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.1251959994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.690465969 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 84136218 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:12:06 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690465969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.690465969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.286510169 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 35419459 ps |
| CPU time | 0.63 seconds |
| Started | Sep 18 01:12:09 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286510169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.286510169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.661579564 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 38402557 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:12:09 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=661579564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.661579564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3151482958 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 65328100 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:12:09 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151482958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.3151482958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.212812754 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 33182603 ps |
| CPU time | 0.64 seconds |
| Started | Sep 18 01:12:09 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=212812754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.212812754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3827198348 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 67088203 ps |
| CPU time | 0.69 seconds |
| Started | Sep 18 01:12:09 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827198348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.3827198348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.3395290634 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 120988257 ps |
| CPU time | 3.02 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:46 PM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395290634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.3395290634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.845714707 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 342274768 ps |
| CPU time | 3.67 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:47 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=845714707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.845714707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1126362195 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 69546485 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:11:33 PM UTC 24 |
| Finished | Sep 18 01:12:32 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126362195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.1126362195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1505675409 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 92767304 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 229044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505675409 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.1505675409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1616171599 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 79062177 ps |
| CPU time | 0.89 seconds |
| Started | Sep 18 01:11:33 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616171599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1616171599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2769965555 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 37287167 ps |
| CPU time | 0.72 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:12:32 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769965555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.2769965555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2599433607 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 168548780 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:12:33 PM UTC 24 |
| Peak memory | 227764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599433607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2599433607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.2319376100 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 482944552 ps |
| CPU time | 4.24 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:12:35 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319376100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.2319376100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3678672486 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 113830681 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678672486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3678672486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.2512597265 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 124517724 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:11:50 PM UTC 24 |
| Peak memory | 234152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512597265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.2512597265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3846706506 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 2413767504 ps |
| CPU time | 6.66 seconds |
| Started | Sep 18 01:11:32 PM UTC 24 |
| Finished | Sep 18 01:12:37 PM UTC 24 |
| Peak memory | 219784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846706506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3846706506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2365533504 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 45119234 ps |
| CPU time | 0.63 seconds |
| Started | Sep 18 01:12:10 PM UTC 24 |
| Finished | Sep 18 01:12:23 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365533504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.2365533504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.4145225928 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 34435966 ps |
| CPU time | 0.63 seconds |
| Started | Sep 18 01:12:10 PM UTC 24 |
| Finished | Sep 18 01:12:30 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145225928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.4145225928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3082074915 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 38210967 ps |
| CPU time | 0.69 seconds |
| Started | Sep 18 01:12:10 PM UTC 24 |
| Finished | Sep 18 01:12:30 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082074915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3082074915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2116141990 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 41454366 ps |
| CPU time | 0.67 seconds |
| Started | Sep 18 01:12:11 PM UTC 24 |
| Finished | Sep 18 01:12:30 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116141990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.2116141990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3684420455 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 33524445 ps |
| CPU time | 0.61 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:23 PM UTC 24 |
| Peak memory | 216456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684420455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.3684420455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.4042008637 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 49743596 ps |
| CPU time | 0.78 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042008637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.4042008637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2807754028 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 38152407 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:31 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807754028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.2807754028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3307886283 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 116222069 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:30 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307886283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3307886283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2320016168 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 105355096 ps |
| CPU time | 0.69 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320016168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.2320016168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1778397894 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 81602574 ps |
| CPU time | 0.68 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778397894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.1778397894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.101261972 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 124994656 ps |
| CPU time | 2.64 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:50 PM UTC 24 |
| Peak memory | 217652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101261972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.101261972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2540707450 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 589757467 ps |
| CPU time | 3.76 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:51 PM UTC 24 |
| Peak memory | 217792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540707450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.2540707450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1650019799 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 95005339 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:38 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650019799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1650019799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1616842034 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 87113841 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:48 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616842034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1616842034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.843752700 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 38748141 ps |
| CPU time | 0.62 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=843752700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.843752700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3760703736 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 63978940 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:38 PM UTC 24 |
| Peak memory | 214280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760703736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3760703736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2290173893 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 495339004 ps |
| CPU time | 3.75 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:41 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290173893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.2290173893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1272157567 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 114016709 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272157567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.1272157567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3674751645 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 324693230 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 01:11:35 PM UTC 24 |
| Finished | Sep 18 01:11:45 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674751645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3674751645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.2502283639 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 40695391 ps |
| CPU time | 0.69 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502283639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.2502283639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.690995105 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 30581580 ps |
| CPU time | 0.67 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690995105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.690995105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.167336664 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 35812083 ps |
| CPU time | 0.68 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=167336664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.167336664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3928222520 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 64659223 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928222520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.3928222520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.911413104 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 39704587 ps |
| CPU time | 0.66 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911413104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.911413104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.266055001 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 68666913 ps |
| CPU time | 0.68 seconds |
| Started | Sep 18 01:12:15 PM UTC 24 |
| Finished | Sep 18 01:12:18 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=266055001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.266055001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2009128962 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 39886158 ps |
| CPU time | 0.65 seconds |
| Started | Sep 18 01:12:16 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009128962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.2009128962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2713156947 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 48550040 ps |
| CPU time | 0.62 seconds |
| Started | Sep 18 01:12:16 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713156947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.2713156947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3315655067 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 47977857 ps |
| CPU time | 0.61 seconds |
| Started | Sep 18 01:12:16 PM UTC 24 |
| Finished | Sep 18 01:12:28 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315655067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.3315655067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.3371873406 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 86390411 ps |
| CPU time | 0.7 seconds |
| Started | Sep 18 01:12:17 PM UTC 24 |
| Finished | Sep 18 01:12:29 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371873406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.3371873406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3109943213 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 122591936 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:11:37 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 228236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109943213 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.3109943213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.872619527 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 297777420 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:11:37 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 216148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872619527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.872619527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.4276205118 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 234402213 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 227000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276205118 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.4276205118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2610606402 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 55928112 ps |
| CPU time | 0.73 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610606402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2610606402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1098747131 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 62212594 ps |
| CPU time | 0.65 seconds |
| Started | Sep 18 01:11:42 PM UTC 24 |
| Finished | Sep 18 01:11:44 PM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098747131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.1098747131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.4236960611 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 69763258 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236960611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.4236960611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.365679945 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 90458848 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:11:39 PM UTC 24 |
| Finished | Sep 18 01:11:45 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=365679945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.365679945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2209014447 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 413584029 ps |
| CPU time | 2.39 seconds |
| Started | Sep 18 01:11:39 PM UTC 24 |
| Finished | Sep 18 01:11:46 PM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209014447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2209014447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2722399779 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 80594044 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:11:47 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 227124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722399779 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.2722399779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.9745150 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 46181688 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=9745150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.9745150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.1163060882 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 29177498 ps |
| CPU time | 0.64 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:11:58 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163060882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.1163060882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.635749831 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 144097826 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:11:47 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635749831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.635749831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3091431716 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 84677738 ps |
| CPU time | 1.99 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 233140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091431716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.3091431716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.4116157711 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 592846387 ps |
| CPU time | 2.42 seconds |
| Started | Sep 18 01:11:45 PM UTC 24 |
| Finished | Sep 18 01:12:00 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116157711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.4116157711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.649286341 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 87415307 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:11:49 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 227056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=649286341 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.649286341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2774312605 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 52379185 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 01:11:48 PM UTC 24 |
| Finished | Sep 18 01:11:53 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774312605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2774312605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3159710300 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 67458214 ps |
| CPU time | 0.65 seconds |
| Started | Sep 18 01:11:48 PM UTC 24 |
| Finished | Sep 18 01:11:53 PM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159710300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.3159710300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2907760652 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 95298348 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:11:48 PM UTC 24 |
| Finished | Sep 18 01:11:54 PM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907760652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2907760652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3247409939 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 98592896 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:11:47 PM UTC 24 |
| Finished | Sep 18 01:11:59 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247409939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.3247409939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1914497295 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 704241073 ps |
| CPU time | 3.56 seconds |
| Started | Sep 18 01:11:48 PM UTC 24 |
| Finished | Sep 18 01:11:56 PM UTC 24 |
| Peak memory | 217840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914497295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1914497295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.1441162161 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 15781313607 ps |
| CPU time | 19.51 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:51:04 PM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441162161 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.1441162161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2025213118 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 24567344860 ps |
| CPU time | 34.71 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:51:19 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025213118 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.2025213118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2351599253 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 176931380 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:46 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351599253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2351599253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.3814886188 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 491018292 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:50:43 PM UTC 24 |
| Finished | Sep 18 12:50:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814886188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.3814886188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.3539832804 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 283766666 ps |
| CPU time | 3.98 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:50 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539832804 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.3539832804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_enable.4210836004 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 65504931 ps |
| CPU time | 0.89 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210836004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.4210836004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.759114603 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 228606852 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=759114603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.759114603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.2689717228 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 283785821 ps |
| CPU time | 2.28 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:50 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689717228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.2689717228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.238848512 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 121183137025 ps |
| CPU time | 238.24 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:54:48 PM UTC 24 |
| Peak memory | 220704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=238848512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.238848512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1025679998 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 114135764096 ps |
| CPU time | 241.67 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:54:52 PM UTC 24 |
| Peak memory | 220744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1025679998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1025679998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.4192822482 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 101102135813 ps |
| CPU time | 172.88 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:53:41 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192822482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.4192822482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.4109551472 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 111209884240 ps |
| CPU time | 188.03 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:53:56 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109551472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.4109551472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3943468978 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 300372420 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943468978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3943468978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.720169700 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 155885865 ps |
| CPU time | 0.81 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720169700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_stall.720169700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.1406530856 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 195583727 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:49 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406530856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.1406530856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.522709030 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 556954052 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522709030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.522709030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2631666187 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 9932175041 ps |
| CPU time | 76.26 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:52:05 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631666187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2631666187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.659569017 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 212991237 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:50:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659569017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_in_err.659569017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3564376707 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 28229929521 ps |
| CPU time | 45.03 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:51:34 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564376707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3564376707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.681449983 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 3907108180 ps |
| CPU time | 5.89 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681449983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.681449983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1197194045 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2274572252 ps |
| CPU time | 16.46 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:51:06 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197194045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1197194045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.2516180186 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 266814774 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516180186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.2516180186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.537804633 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 226197019 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=537804633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.537804633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1838062151 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2963880520 ps |
| CPU time | 21.73 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:51:14 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838062151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1838062151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1142484164 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 3218266036 ps |
| CPU time | 33.42 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:51:26 PM UTC 24 |
| Peak memory | 234868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142484164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.1142484164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1059104427 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 2564154243 ps |
| CPU time | 23.84 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:51:16 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059104427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1059104427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3294701122 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 156757038 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 12:50:48 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3294701122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3294701122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3694730938 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 179559344 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 12:50:49 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694730938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3694730938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1346982888 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 515555873 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 12:50:49 PM UTC 24 |
| Finished | Sep 18 12:50:56 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346982888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1346982888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.271905553 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 170985172 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 12:50:49 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271905553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_out_iso.271905553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.1886499337 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 181766347 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 12:50:49 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886499337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.1886499337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.3382706490 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 178474289 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382706490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.3382706490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2708469210 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 149255257 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708469210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.2708469210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.4042881846 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 169768873 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042881846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.4042881846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.2140874326 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 237892715 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140874326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.2140874326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.3593393490 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 239115912 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 12:50:50 PM UTC 24 |
| Finished | Sep 18 12:50:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593393490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.3593393490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.1179479723 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 263261992 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179479723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.1179479723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.985738914 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 8832475187 ps |
| CPU time | 25.6 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:51:19 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985738914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_pkt_buffer.985738914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.293791724 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 168124600 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:54 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293791724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_pkt_sent.293791724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.1075373049 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 3137951417 ps |
| CPU time | 19.71 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:51:17 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075373049 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.1075373049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3556780110 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 9488850158 ps |
| CPU time | 58.24 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:51:56 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556780110 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.3556780110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.2773664839 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 202221728 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:50:52 PM UTC 24 |
| Finished | Sep 18 12:50:55 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773664839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.2773664839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.1532586549 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 162911680 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:50:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532586549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.1532586549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.3473894458 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 20153882394 ps |
| CPU time | 27.42 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:51:24 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473894458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.3473894458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.1482790377 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 244697387 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:50:55 PM UTC 24 |
| Finished | Sep 18 12:50:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482790377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.1482790377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.1263396602 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 147559309 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:50:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263396602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.1263396602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.2357315129 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 150973489 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:50:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357315129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.2357315129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3476295458 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 213554417 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:00 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476295458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.3476295458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1895758117 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 2773623478 ps |
| CPU time | 26.41 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:25 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895758117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1895758117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.3358224437 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 178706747 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:50:59 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358224437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.3358224437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3882074405 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 172237539 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882074405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3882074405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.2663420142 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 602920627 ps |
| CPU time | 2.65 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:01 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663420142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.2663420142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.748809018 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 1718138607 ps |
| CPU time | 18.35 seconds |
| Started | Sep 18 12:50:57 PM UTC 24 |
| Finished | Sep 18 12:51:17 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748809018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_streaming_out.748809018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.995848912 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 995210709 ps |
| CPU time | 20.39 seconds |
| Started | Sep 18 12:50:45 PM UTC 24 |
| Finished | Sep 18 12:51:07 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=995848912 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.995848912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1554841527 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 37036596 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 12:51:31 PM UTC 24 |
| Finished | Sep 18 12:51:33 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554841527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.1554841527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.1952959434 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 4286325733 ps |
| CPU time | 9.41 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:10 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952959434 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.1952959434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.2945655247 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 16014607303 ps |
| CPU time | 23.14 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:25 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945655247 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.2945655247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.2019156791 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 30773881358 ps |
| CPU time | 42.01 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:43 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019156791 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.2019156791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1366519362 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 172246976 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:04 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366519362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.1366519362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.430396906 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 138443065 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:51:00 PM UTC 24 |
| Finished | Sep 18 12:51:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430396906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_av_overflow.430396906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2832011939 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 183631770 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:51:01 PM UTC 24 |
| Finished | Sep 18 12:51:04 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832011939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.2832011939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.2325643948 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 493357270 ps |
| CPU time | 2.95 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:51:06 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325643948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.2325643948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3549289885 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 433381235 ps |
| CPU time | 2.11 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:51:05 PM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549289885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3549289885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3508116164 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 775106132 ps |
| CPU time | 6.16 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:51:10 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508116164 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3508116164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.2609177793 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 490267781 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:51:05 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609177793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.2609177793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.338476459 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 140452706 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:51:03 PM UTC 24 |
| Finished | Sep 18 12:51:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338476459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_disconnected.338476459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_enable.68553681 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 31024765 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:51:04 PM UTC 24 |
| Finished | Sep 18 12:51:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68553681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.68553681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3259924072 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 766828318 ps |
| CPU time | 3.2 seconds |
| Started | Sep 18 12:51:04 PM UTC 24 |
| Finished | Sep 18 12:51:08 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259924072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.3259924072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.684604204 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 469193578 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:51:06 PM UTC 24 |
| Finished | Sep 18 12:51:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=684604204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.684604204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.1880926357 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 175464077 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:51:06 PM UTC 24 |
| Finished | Sep 18 12:51:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1880926357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.1880926357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.658578822 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 352851535 ps |
| CPU time | 3.62 seconds |
| Started | Sep 18 12:51:06 PM UTC 24 |
| Finished | Sep 18 12:51:11 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658578822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.658578822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.3960800333 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 104202761677 ps |
| CPU time | 209.7 seconds |
| Started | Sep 18 12:51:06 PM UTC 24 |
| Finished | Sep 18 12:54:39 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960800333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.3960800333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.200348158 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 118209030708 ps |
| CPU time | 250.84 seconds |
| Started | Sep 18 12:51:06 PM UTC 24 |
| Finished | Sep 18 12:55:21 PM UTC 24 |
| Peak memory | 219636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=200348158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_hiclk_max.200348158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.3258655684 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 86127964968 ps |
| CPU time | 146.45 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:53:36 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258655684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3258655684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.1661878291 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 80942695101 ps |
| CPU time | 195.11 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:54:25 PM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1661878291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.1661878291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.2576823071 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 100155926891 ps |
| CPU time | 167.07 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:53:57 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576823071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.2576823071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.1447572496 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 194177330 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:51:10 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447572496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.1447572496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.3147946911 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 196731264 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:51:10 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147946911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.3147946911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.763091500 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 208304122 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:51:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763091500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_trans.763091500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.630512101 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 3930246284 ps |
| CPU time | 111.74 seconds |
| Started | Sep 18 12:51:07 PM UTC 24 |
| Finished | Sep 18 12:53:01 PM UTC 24 |
| Peak memory | 230320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=630512101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.630512101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2644932423 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 7363274517 ps |
| CPU time | 83.71 seconds |
| Started | Sep 18 12:51:08 PM UTC 24 |
| Finished | Sep 18 12:52:34 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644932423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2644932423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.1760978681 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 249075089 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:51:08 PM UTC 24 |
| Finished | Sep 18 12:51:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760978681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.1760978681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.126958339 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 32923865346 ps |
| CPU time | 66.23 seconds |
| Started | Sep 18 12:51:08 PM UTC 24 |
| Finished | Sep 18 12:52:16 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126958339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_link_resume.126958339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.4085370814 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 5432927117 ps |
| CPU time | 10.97 seconds |
| Started | Sep 18 12:51:10 PM UTC 24 |
| Finished | Sep 18 12:51:22 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085370814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.4085370814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.3597968228 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 1642729578 ps |
| CPU time | 16.45 seconds |
| Started | Sep 18 12:51:11 PM UTC 24 |
| Finished | Sep 18 12:51:28 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597968228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.3597968228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1563638934 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 233774402 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 12:51:11 PM UTC 24 |
| Finished | Sep 18 12:51:13 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563638934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.1563638934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.2368872265 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 280903292 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:51:11 PM UTC 24 |
| Finished | Sep 18 12:51:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368872265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.2368872265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3715658597 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 2045670435 ps |
| CPU time | 16.87 seconds |
| Started | Sep 18 12:51:12 PM UTC 24 |
| Finished | Sep 18 12:51:30 PM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715658597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.3715658597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.3814151445 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 3525841267 ps |
| CPU time | 36.64 seconds |
| Started | Sep 18 12:51:12 PM UTC 24 |
| Finished | Sep 18 12:51:50 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814151445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.3814151445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3265587113 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 2046696859 ps |
| CPU time | 20.52 seconds |
| Started | Sep 18 12:51:12 PM UTC 24 |
| Finished | Sep 18 12:51:34 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265587113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3265587113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2534605072 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 156288441 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:51:14 PM UTC 24 |
| Finished | Sep 18 12:51:16 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534605072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.2534605072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.488547166 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 145489911 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:51:14 PM UTC 24 |
| Finished | Sep 18 12:51:16 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=488547166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.488547166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2160610575 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 152448586 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:51:17 PM UTC 24 |
| Finished | Sep 18 12:51:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160610575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2160610575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.2236445334 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 167445335 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:51:18 PM UTC 24 |
| Finished | Sep 18 12:51:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236445334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.2236445334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.176128640 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 163503498 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 12:51:18 PM UTC 24 |
| Finished | Sep 18 12:51:20 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176128640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_out_trans_nak.176128640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.3192885434 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 197792744 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:51:18 PM UTC 24 |
| Finished | Sep 18 12:51:20 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192885434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.3192885434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.1947006600 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 220015413 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 12:51:18 PM UTC 24 |
| Finished | Sep 18 12:51:20 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947006600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.1947006600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.3857761334 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 241070262 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:51:19 PM UTC 24 |
| Finished | Sep 18 12:51:21 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857761334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.3857761334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.803424700 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 141357098 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:51:20 PM UTC 24 |
| Finished | Sep 18 12:51:22 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803424700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.803424700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.2966523731 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 5788461347 ps |
| CPU time | 20.58 seconds |
| Started | Sep 18 12:51:20 PM UTC 24 |
| Finished | Sep 18 12:51:42 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966523731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.2966523731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.2292534448 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 156280055 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:51:21 PM UTC 24 |
| Finished | Sep 18 12:51:24 PM UTC 24 |
| Peak memory | 215396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292534448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.2292534448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.1836067 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 209513068 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:51:21 PM UTC 24 |
| Finished | Sep 18 12:51:24 PM UTC 24 |
| Peak memory | 215344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_sent.1836067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.1906703143 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 9326132794 ps |
| CPU time | 65.36 seconds |
| Started | Sep 18 12:51:23 PM UTC 24 |
| Finished | Sep 18 12:52:30 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906703143 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.1906703143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.4217895140 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 5819579252 ps |
| CPU time | 26.49 seconds |
| Started | Sep 18 12:51:23 PM UTC 24 |
| Finished | Sep 18 12:51:50 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217895140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.4217895140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3356323071 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 10351532376 ps |
| CPU time | 186.94 seconds |
| Started | Sep 18 12:51:23 PM UTC 24 |
| Finished | Sep 18 12:54:33 PM UTC 24 |
| Peak memory | 234852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356323071 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3356323071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1039780916 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 269435023 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:51:21 PM UTC 24 |
| Finished | Sep 18 12:51:24 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039780916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.1039780916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.590029357 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 199161313 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:51:21 PM UTC 24 |
| Finished | Sep 18 12:51:24 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590029357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.590029357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.4222515369 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20170342689 ps |
| CPU time | 38.64 seconds |
| Started | Sep 18 12:51:24 PM UTC 24 |
| Finished | Sep 18 12:52:04 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222515369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.4222515369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1187163393 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 179599280 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:51:24 PM UTC 24 |
| Finished | Sep 18 12:51:26 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187163393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.1187163393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.3394083763 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 212552121 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:51:25 PM UTC 24 |
| Finished | Sep 18 12:51:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394083763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.3394083763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2124416161 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 349394443 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 12:51:30 PM UTC 24 |
| Finished | Sep 18 12:51:33 PM UTC 24 |
| Peak memory | 250552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124416161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.2124416161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2590020521 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 488863668 ps |
| CPU time | 2.62 seconds |
| Started | Sep 18 12:51:25 PM UTC 24 |
| Finished | Sep 18 12:51:29 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590020521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2590020521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2861842265 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 288442446 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:51:25 PM UTC 24 |
| Finished | Sep 18 12:51:27 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861842265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2861842265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.493278775 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 182655772 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:51:25 PM UTC 24 |
| Finished | Sep 18 12:51:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493278775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_setup_stage.493278775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.179753635 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 161126507 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:51:26 PM UTC 24 |
| Finished | Sep 18 12:51:29 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=179753635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_setup_trans_ignored.179753635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1127341398 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 223829424 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 12:51:26 PM UTC 24 |
| Finished | Sep 18 12:51:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127341398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1127341398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.3618944399 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 2883566519 ps |
| CPU time | 26.24 seconds |
| Started | Sep 18 12:51:28 PM UTC 24 |
| Finished | Sep 18 12:51:55 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618944399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.3618944399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.2138987696 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 150899282 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:51:28 PM UTC 24 |
| Finished | Sep 18 12:51:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138987696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.2138987696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3283489154 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 174574525 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:51:29 PM UTC 24 |
| Finished | Sep 18 12:51:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283489154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3283489154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.3481754658 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 434772386 ps |
| CPU time | 2.19 seconds |
| Started | Sep 18 12:51:29 PM UTC 24 |
| Finished | Sep 18 12:51:32 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481754658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.3481754658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.1115404572 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 2575299142 ps |
| CPU time | 24.56 seconds |
| Started | Sep 18 12:51:29 PM UTC 24 |
| Finished | Sep 18 12:51:55 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115404572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.1115404572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.1156231180 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 3829123258 ps |
| CPU time | 35.05 seconds |
| Started | Sep 18 12:51:02 PM UTC 24 |
| Finished | Sep 18 12:51:39 PM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156231180 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.1156231180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.3226586700 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 551133225 ps |
| CPU time | 2.62 seconds |
| Started | Sep 18 12:51:30 PM UTC 24 |
| Finished | Sep 18 12:51:34 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3226586700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.3226586700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.522696921 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 52911040 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 12:57:07 PM UTC 24 |
| Finished | Sep 18 12:57:09 PM UTC 24 |
| Peak memory | 215484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=522696921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.522696921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.203345722 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 5304576834 ps |
| CPU time | 15.21 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:56:59 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=203345722 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.203345722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.565084335 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 14122994956 ps |
| CPU time | 22.74 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:57:06 PM UTC 24 |
| Peak memory | 228524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565084335 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.565084335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.879916593 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 26326390314 ps |
| CPU time | 45.58 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:57:30 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=879916593 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.879916593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.950082606 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 148413464 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:56:44 PM UTC 24 |
| Finished | Sep 18 12:56:46 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=950082606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_av_buffer.950082606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.3081512296 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 147621125 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:56:44 PM UTC 24 |
| Finished | Sep 18 12:56:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081512296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.3081512296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.687401241 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 213679669 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:56:44 PM UTC 24 |
| Finished | Sep 18 12:56:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687401241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_data_toggle_clear.687401241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3419788112 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 532395575 ps |
| CPU time | 2.89 seconds |
| Started | Sep 18 12:56:46 PM UTC 24 |
| Finished | Sep 18 12:56:49 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419788112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3419788112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.757819185 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 42753636377 ps |
| CPU time | 84.96 seconds |
| Started | Sep 18 12:56:46 PM UTC 24 |
| Finished | Sep 18 12:58:12 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757819185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_device_address.757819185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.2172828969 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 141140622 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:56:46 PM UTC 24 |
| Finished | Sep 18 12:56:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172828969 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.2172828969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.4029134045 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 530684893 ps |
| CPU time | 2.69 seconds |
| Started | Sep 18 12:56:47 PM UTC 24 |
| Finished | Sep 18 12:56:51 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029134045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.4029134045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.122065236 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 148829742 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:56:47 PM UTC 24 |
| Finished | Sep 18 12:56:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=122065236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_disconnected.122065236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_enable.1691396594 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 128461582 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:56:47 PM UTC 24 |
| Finished | Sep 18 12:56:49 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691396594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.1691396594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.887695994 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 889967604 ps |
| CPU time | 3.63 seconds |
| Started | Sep 18 12:56:47 PM UTC 24 |
| Finished | Sep 18 12:56:52 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887695994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.887695994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.106078637 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 441025394 ps |
| CPU time | 2.32 seconds |
| Started | Sep 18 12:56:48 PM UTC 24 |
| Finished | Sep 18 12:56:52 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=106078637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.106078637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.927306523 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 287776390 ps |
| CPU time | 3.54 seconds |
| Started | Sep 18 12:56:50 PM UTC 24 |
| Finished | Sep 18 12:56:54 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=927306523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_fifo_rst.927306523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3465607163 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 201706843 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:56:51 PM UTC 24 |
| Finished | Sep 18 12:56:54 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465607163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3465607163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.490706134 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 140619291 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:56:51 PM UTC 24 |
| Finished | Sep 18 12:56:54 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490706134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_in_stall.490706134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.1106990935 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 195462571 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:51 PM UTC 24 |
| Finished | Sep 18 12:56:54 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106990935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.1106990935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.1084370924 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 2361475013 ps |
| CPU time | 61.53 seconds |
| Started | Sep 18 12:56:51 PM UTC 24 |
| Finished | Sep 18 12:57:54 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084370924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1084370924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.3703842407 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 9981926049 ps |
| CPU time | 113.25 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:58:48 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703842407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3703842407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.3379253300 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 222700122 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:56:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379253300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.3379253300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.3841202984 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 11805415502 ps |
| CPU time | 21.93 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3841202984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.3841202984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.1280045380 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 3376695410 ps |
| CPU time | 11.36 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:57:05 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280045380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.1280045380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.1683237990 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 4169454556 ps |
| CPU time | 116.33 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:58:51 PM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683237990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.1683237990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.2685299012 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 2207331994 ps |
| CPU time | 17.79 seconds |
| Started | Sep 18 12:56:53 PM UTC 24 |
| Finished | Sep 18 12:57:12 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685299012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.2685299012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3591726841 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 243588305 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:56:54 PM UTC 24 |
| Finished | Sep 18 12:56:57 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591726841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3591726841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.3278184696 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 194633790 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:56:54 PM UTC 24 |
| Finished | Sep 18 12:56:57 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278184696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.3278184696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.2381508454 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 2564436236 ps |
| CPU time | 20.45 seconds |
| Started | Sep 18 12:56:54 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381508454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.2381508454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.3194279044 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 3348981297 ps |
| CPU time | 91.61 seconds |
| Started | Sep 18 12:56:54 PM UTC 24 |
| Finished | Sep 18 12:58:28 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194279044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3194279044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.1270753411 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 1962839329 ps |
| CPU time | 20.85 seconds |
| Started | Sep 18 12:56:56 PM UTC 24 |
| Finished | Sep 18 12:57:18 PM UTC 24 |
| Peak memory | 234500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270753411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.1270753411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3837603529 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 190169897 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:56:56 PM UTC 24 |
| Finished | Sep 18 12:56:58 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837603529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3837603529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.2593945935 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 139315073 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:56:57 PM UTC 24 |
| Finished | Sep 18 12:56:59 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593945935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.2593945935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.1240137960 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 157195457 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:56:57 PM UTC 24 |
| Finished | Sep 18 12:56:59 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240137960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.1240137960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.797419383 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 182424356 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:56:59 PM UTC 24 |
| Finished | Sep 18 12:57:01 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797419383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.797419383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.3153466162 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 148208383 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:56:59 PM UTC 24 |
| Finished | Sep 18 12:57:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153466162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.3153466162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.3089397877 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 162298258 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:56:59 PM UTC 24 |
| Finished | Sep 18 12:57:01 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089397877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.3089397877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.3370531218 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 216591756 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:57:00 PM UTC 24 |
| Finished | Sep 18 12:57:02 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370531218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.3370531218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1403261475 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 146091947 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:57:00 PM UTC 24 |
| Finished | Sep 18 12:57:02 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403261475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1403261475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.2195346150 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 51839824 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 12:57:00 PM UTC 24 |
| Finished | Sep 18 12:57:02 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195346150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.2195346150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.2173644251 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 5817834317 ps |
| CPU time | 18.34 seconds |
| Started | Sep 18 12:57:00 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173644251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.2173644251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.2007598712 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 203257727 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007598712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.2007598712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.385993089 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 191805947 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385993089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_pkt_sent.385993089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.2605152007 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 225276299 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605152007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.2605152007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2286765077 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 194456793 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286765077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2286765077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.1521978578 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 20212383836 ps |
| CPU time | 30.33 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:33 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521978578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.1521978578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.1816651039 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 205512243 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:57:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816651039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.1816651039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.323967515 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 296892805 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:57:03 PM UTC 24 |
| Finished | Sep 18 12:57:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323967515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_rx_full.323967515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.160149897 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 146745422 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:57:03 PM UTC 24 |
| Finished | Sep 18 12:57:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160149897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_setup_stage.160149897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.2017727472 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 147160795 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 12:57:03 PM UTC 24 |
| Finished | Sep 18 12:57:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017727472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.2017727472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.1666380003 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 293042480 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:57:05 PM UTC 24 |
| Finished | Sep 18 12:57:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666380003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.1666380003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.409956859 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 3622276064 ps |
| CPU time | 98.78 seconds |
| Started | Sep 18 12:57:05 PM UTC 24 |
| Finished | Sep 18 12:58:45 PM UTC 24 |
| Peak memory | 228652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409956859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.409956859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.803070437 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 195698772 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:57:05 PM UTC 24 |
| Finished | Sep 18 12:57:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803070437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.803070437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.494835914 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 152881172 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:57:05 PM UTC 24 |
| Finished | Sep 18 12:57:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=494835914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_stall_trans.494835914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.479789028 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 1030383316 ps |
| CPU time | 4.7 seconds |
| Started | Sep 18 12:57:06 PM UTC 24 |
| Finished | Sep 18 12:57:12 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=479789028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_stream_len_max.479789028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.306651166 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 1609120623 ps |
| CPU time | 12.81 seconds |
| Started | Sep 18 12:57:06 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 228212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306651166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_streaming_out.306651166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.2634366453 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 5704856181 ps |
| CPU time | 52.07 seconds |
| Started | Sep 18 12:56:46 PM UTC 24 |
| Finished | Sep 18 12:57:39 PM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634366453 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.2634366453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.3127162123 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 462845979 ps |
| CPU time | 2.12 seconds |
| Started | Sep 18 12:57:06 PM UTC 24 |
| Finished | Sep 18 12:57:10 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3127162123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.3127162123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2705046450 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 559522781 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2705046450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.2705046450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.413449230 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 411129257 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413449230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.413449230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2511013889 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 646135304 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2511013889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2511013889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.2340231764 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 519360495 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:16 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2340231764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.2340231764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.2495986436 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 380268414 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495986436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.2495986436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.761177239 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 481238555 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=761177239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_t x_rx_disruption.761177239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1503436413 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 379447691 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503436413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.1503436413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.4049630877 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 514035499 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4049630877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.4049630877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3871073196 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 283226867 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871073196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.3871073196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.1784880053 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 309192460 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784880053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.1784880053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.906992703 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 544041205 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=906992703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.906992703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.132893421 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 303318615 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132893421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.132893421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.2494765350 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 184356751 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494765350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.2494765350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2828493688 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 445869890 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2828493688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.2828493688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.4269208485 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 563353117 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269208485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.4269208485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3930461061 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 639301209 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3930461061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3930461061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.854620824 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 289438863 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854620824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 108.usbdev_fifo_levels.854620824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2858972552 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 524601450 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:09:15 PM UTC 24 |
| Finished | Sep 18 01:09:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2858972552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.2858972552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2153533551 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 575636876 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2153533551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.2153533551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.2064780329 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 55968790 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064780329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.2064780329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.4052121498 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 4754890336 ps |
| CPU time | 8.11 seconds |
| Started | Sep 18 12:57:07 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052121498 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.4052121498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.21923876 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 30029996120 ps |
| CPU time | 40.53 seconds |
| Started | Sep 18 12:57:07 PM UTC 24 |
| Finished | Sep 18 12:57:49 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21923876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.21923876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.2599867458 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 179948822 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 12:57:07 PM UTC 24 |
| Finished | Sep 18 12:57:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599867458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.2599867458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.2356441147 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 155236445 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:57:08 PM UTC 24 |
| Finished | Sep 18 12:57:11 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356441147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.2356441147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.2907283230 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 389118906 ps |
| CPU time | 2.34 seconds |
| Started | Sep 18 12:57:08 PM UTC 24 |
| Finished | Sep 18 12:57:11 PM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907283230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.2907283230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.211443945 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 863772067 ps |
| CPU time | 3.99 seconds |
| Started | Sep 18 12:57:08 PM UTC 24 |
| Finished | Sep 18 12:57:13 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211443945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.211443945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.1403520838 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 41941064772 ps |
| CPU time | 73.95 seconds |
| Started | Sep 18 12:57:08 PM UTC 24 |
| Finished | Sep 18 12:58:24 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403520838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1403520838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.3463314538 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 2194404981 ps |
| CPU time | 14.06 seconds |
| Started | Sep 18 12:57:08 PM UTC 24 |
| Finished | Sep 18 12:57:23 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463314538 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.3463314538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.3240007576 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 936294609 ps |
| CPU time | 4.64 seconds |
| Started | Sep 18 12:57:10 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240007576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.3240007576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2253923773 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 156506109 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:57:10 PM UTC 24 |
| Finished | Sep 18 12:57:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253923773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2253923773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_enable.1255392390 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 52955654 ps |
| CPU time | 0.78 seconds |
| Started | Sep 18 12:57:10 PM UTC 24 |
| Finished | Sep 18 12:57:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255392390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.1255392390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.645931464 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 787639861 ps |
| CPU time | 3.24 seconds |
| Started | Sep 18 12:57:10 PM UTC 24 |
| Finished | Sep 18 12:57:14 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645931464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.645931464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.181088610 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 508572382 ps |
| CPU time | 4.05 seconds |
| Started | Sep 18 12:57:12 PM UTC 24 |
| Finished | Sep 18 12:57:17 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=181088610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_fifo_rst.181088610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.1148558303 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 220374986 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 12:57:13 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148558303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.1148558303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.559041852 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 159046859 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:57:13 PM UTC 24 |
| Finished | Sep 18 12:57:15 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559041852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_stall.559041852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.1505442636 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 252243896 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:57:13 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505442636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.1505442636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.418941969 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 4162899695 ps |
| CPU time | 115.5 seconds |
| Started | Sep 18 12:57:12 PM UTC 24 |
| Finished | Sep 18 12:59:10 PM UTC 24 |
| Peak memory | 234616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418941969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.418941969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.4120456364 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 14573316101 ps |
| CPU time | 96.94 seconds |
| Started | Sep 18 12:57:13 PM UTC 24 |
| Finished | Sep 18 12:58:52 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120456364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.4120456364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.1838404297 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 225513489 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 12:57:13 PM UTC 24 |
| Finished | Sep 18 12:57:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838404297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.1838404297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.158338126 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 12714348976 ps |
| CPU time | 18.82 seconds |
| Started | Sep 18 12:57:14 PM UTC 24 |
| Finished | Sep 18 12:57:34 PM UTC 24 |
| Peak memory | 218416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158338126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_resume.158338126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.2643457200 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 3431107940 ps |
| CPU time | 7.71 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:57:25 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643457200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.2643457200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.2472771537 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 4344498157 ps |
| CPU time | 30.96 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:57:48 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472771537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.2472771537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.2815927443 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 2147881564 ps |
| CPU time | 21.01 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815927443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.2815927443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.2994055851 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 237213157 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:57:19 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994055851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.2994055851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.2610320032 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 212751066 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:57:19 PM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610320032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.2610320032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.150414377 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 3413308747 ps |
| CPU time | 101.03 seconds |
| Started | Sep 18 12:57:16 PM UTC 24 |
| Finished | Sep 18 12:58:59 PM UTC 24 |
| Peak memory | 235008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150414377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.150414377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.2610485596 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 1953554398 ps |
| CPU time | 24.36 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:43 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610485596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.2610485596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.1961496239 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 2760586153 ps |
| CPU time | 84.05 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:58:44 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961496239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.1961496239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1867007721 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 149350622 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867007721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.1867007721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.2515274865 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 144744339 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515274865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.2515274865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.916055622 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 161852167 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916055622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_out_iso.916055622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2116097613 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 160905938 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116097613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2116097613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.778963266 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 162320821 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:57:18 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=778963266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_out_trans_nak.778963266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.305851993 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 147967554 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:57:20 PM UTC 24 |
| Finished | Sep 18 12:57:22 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305851993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pending_in_trans.305851993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.1599753953 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 227062024 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:57:20 PM UTC 24 |
| Finished | Sep 18 12:57:22 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599753953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.1599753953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.3840192200 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 153273903 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:57:20 PM UTC 24 |
| Finished | Sep 18 12:57:22 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840192200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.3840192200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.1826628941 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 17926399398 ps |
| CPU time | 43.15 seconds |
| Started | Sep 18 12:57:20 PM UTC 24 |
| Finished | Sep 18 12:58:04 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826628941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.1826628941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.1537254523 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 190167689 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:57:21 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537254523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.1537254523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.33927372 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 184956905 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:57:21 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33927372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_pkt_sent.33927372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.3145119363 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 214253360 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:57:21 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145119363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.3145119363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.3572347660 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 225124672 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:57:21 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572347660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.3572347660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.162789099 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 20158394555 ps |
| CPU time | 33.37 seconds |
| Started | Sep 18 12:57:22 PM UTC 24 |
| Finished | Sep 18 12:57:56 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162789099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_resume_link_active.162789099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.1123643461 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 142604006 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 12:57:22 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123643461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.1123643461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.22718209 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 260411179 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:57:22 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22718209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_full.22718209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.2826234180 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 143816063 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:57:22 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826234180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.2826234180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.1299477142 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 216738351 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:57:22 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299477142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.1299477142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.3703546425 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 239704973 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:57:23 PM UTC 24 |
| Finished | Sep 18 12:57:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703546425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.3703546425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.1741374371 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 2864609397 ps |
| CPU time | 23.08 seconds |
| Started | Sep 18 12:57:23 PM UTC 24 |
| Finished | Sep 18 12:57:47 PM UTC 24 |
| Peak memory | 235168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741374371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.1741374371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2790338547 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 157442514 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 12:57:23 PM UTC 24 |
| Finished | Sep 18 12:57:25 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790338547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2790338547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.4231861115 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 166729535 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:57:23 PM UTC 24 |
| Finished | Sep 18 12:57:26 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231861115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.4231861115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.1878573944 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 1243020732 ps |
| CPU time | 4.34 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:30 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878573944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.1878573944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.1583932956 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 2925921051 ps |
| CPU time | 21.23 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:47 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583932956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.1583932956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.1812241373 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 2320137174 ps |
| CPU time | 13.53 seconds |
| Started | Sep 18 12:57:10 PM UTC 24 |
| Finished | Sep 18 12:57:25 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812241373 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.1812241373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.542376204 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 480909023 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:28 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=542376204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_tx _rx_disruption.542376204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1604952336 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 295651850 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604952336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.1604952336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2655405942 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 644736699 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2655405942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2655405942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.340043784 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 549623172 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=340043784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_t x_rx_disruption.340043784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2812134239 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 591335133 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:09:17 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2812134239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2812134239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3575585931 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 411203967 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575585931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3575585931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.755152501 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 160480869 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755152501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 113.usbdev_fifo_levels.755152501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.1345779102 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 509157307 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 216240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1345779102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.1345779102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.229113670 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 155484323 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=229113670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 114.usbdev_fifo_levels.229113670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.1441584930 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 451468458 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1441584930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.1441584930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4051576597 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 492181905 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051576597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.4051576597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1962184910 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 604894354 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1962184910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.1962184910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.64060485 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 168927881 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64060485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.64060485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2849655787 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 270620217 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 01:09:18 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 215400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849655787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.2849655787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.3172913446 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 370730183 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172913446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.3172913446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3468386147 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 171863635 ps |
| CPU time | 0.8 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468386147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.3468386147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.3249649425 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 280305032 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249649425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.3249649425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.4116703352 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 493603084 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4116703352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.4116703352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3546454327 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 271182506 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:09:19 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546454327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.3546454327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.4239359220 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 598365981 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:09:20 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4239359220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.4239359220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2427551299 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 44425332 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 12:57:48 PM UTC 24 |
| Finished | Sep 18 12:57:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427551299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2427551299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.3474587567 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 4978331978 ps |
| CPU time | 8.96 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:35 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474587567 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.3474587567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.3539646083 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 19432975398 ps |
| CPU time | 36.7 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:58:03 PM UTC 24 |
| Peak memory | 217932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539646083 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.3539646083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.1963349613 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 23505994905 ps |
| CPU time | 35.06 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:58:02 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963349613 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.1963349613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.117611689 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 160772750 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:28 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117611689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_av_buffer.117611689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2859468603 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 173555191 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:57:25 PM UTC 24 |
| Finished | Sep 18 12:57:28 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859468603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.2859468603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.1261882980 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 479239881 ps |
| CPU time | 2.49 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:30 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261882980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.1261882980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2341274814 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 24800702552 ps |
| CPU time | 50 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341274814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.2341274814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.1940127233 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 312227964 ps |
| CPU time | 5.65 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:34 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940127233 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.1940127233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.3756893282 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 784555796 ps |
| CPU time | 4.01 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756893282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.3756893282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.4116380348 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 141699586 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:29 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116380348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.4116380348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_enable.2186855567 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 62162110 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 12:57:28 PM UTC 24 |
| Finished | Sep 18 12:57:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186855567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.2186855567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.2885424134 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 913533855 ps |
| CPU time | 2.85 seconds |
| Started | Sep 18 12:57:28 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885424134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2885424134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.776669807 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 287132096 ps |
| CPU time | 2.44 seconds |
| Started | Sep 18 12:57:29 PM UTC 24 |
| Finished | Sep 18 12:57:32 PM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=776669807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_fifo_rst.776669807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.3181604179 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 209553025 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 12:57:30 PM UTC 24 |
| Finished | Sep 18 12:57:33 PM UTC 24 |
| Peak memory | 225528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181604179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3181604179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.1316314126 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 160589313 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:57:31 PM UTC 24 |
| Finished | Sep 18 12:57:34 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316314126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_stall.1316314126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.2792883694 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 191606352 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:57:31 PM UTC 24 |
| Finished | Sep 18 12:57:34 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792883694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.2792883694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.1884310258 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 4958677117 ps |
| CPU time | 137.61 seconds |
| Started | Sep 18 12:57:30 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 230148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884310258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.1884310258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.1861132259 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 3586763282 ps |
| CPU time | 27.03 seconds |
| Started | Sep 18 12:57:31 PM UTC 24 |
| Finished | Sep 18 12:58:00 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861132259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.1861132259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.3719524415 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 228584221 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 12:57:31 PM UTC 24 |
| Finished | Sep 18 12:57:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719524415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.3719524415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.3403374998 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 12357649515 ps |
| CPU time | 23.03 seconds |
| Started | Sep 18 12:57:33 PM UTC 24 |
| Finished | Sep 18 12:57:57 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403374998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.3403374998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.2175950490 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 10942348144 ps |
| CPU time | 16.75 seconds |
| Started | Sep 18 12:57:33 PM UTC 24 |
| Finished | Sep 18 12:57:51 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175950490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.2175950490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.2155643480 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 3188182137 ps |
| CPU time | 25.77 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:58:01 PM UTC 24 |
| Peak memory | 234800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155643480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.2155643480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.42123550 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 239619047 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:57:36 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=42123550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.42123550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3267625630 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 200931112 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:57:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267625630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3267625630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.429214404 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 3428779730 ps |
| CPU time | 38.19 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:58:14 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=429214404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.429214404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.1139557261 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 2726836792 ps |
| CPU time | 26.43 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:58:02 PM UTC 24 |
| Peak memory | 235264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139557261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.1139557261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.1161333921 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 1809357370 ps |
| CPU time | 19.56 seconds |
| Started | Sep 18 12:57:34 PM UTC 24 |
| Finished | Sep 18 12:57:55 PM UTC 24 |
| Peak memory | 235056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161333921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.1161333921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.3847565242 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 168611913 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:57:35 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847565242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.3847565242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1679845347 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 170294220 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:57:36 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679845347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1679845347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1923085386 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 231641287 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:57:36 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923085386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1923085386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.1483196027 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 162937053 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 12:57:36 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483196027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.1483196027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.2388454883 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 249431768 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:57:36 PM UTC 24 |
| Finished | Sep 18 12:57:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388454883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.2388454883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.3077871317 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 262907890 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:57:37 PM UTC 24 |
| Finished | Sep 18 12:57:40 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077871317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.3077871317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.351133410 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 220530217 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:57:37 PM UTC 24 |
| Finished | Sep 18 12:57:40 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351133410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.351133410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2917275221 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 224153309 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:57:38 PM UTC 24 |
| Finished | Sep 18 12:57:41 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917275221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2917275221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.1625834126 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 139505999 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:57:42 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625834126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1625834126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2012295332 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 42581037 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:57:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012295332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2012295332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.2358141555 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 8284119728 ps |
| CPU time | 24.84 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358141555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.2358141555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1446043193 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 177939737 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:57:42 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446043193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1446043193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.602307469 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 233075546 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:57:42 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602307469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_pkt_sent.602307469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.3511221942 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 237429912 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:57:40 PM UTC 24 |
| Finished | Sep 18 12:57:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511221942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.3511221942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.4187519855 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 201779635 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:57:41 PM UTC 24 |
| Finished | Sep 18 12:57:44 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187519855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.4187519855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.519760515 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 20152615807 ps |
| CPU time | 29.52 seconds |
| Started | Sep 18 12:57:41 PM UTC 24 |
| Finished | Sep 18 12:58:12 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=519760515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_resume_link_active.519760515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.407226759 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 218243362 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:57:41 PM UTC 24 |
| Finished | Sep 18 12:57:44 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407226759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_rx_crc_err.407226759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.1237951234 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 373679207 ps |
| CPU time | 2.12 seconds |
| Started | Sep 18 12:57:42 PM UTC 24 |
| Finished | Sep 18 12:57:45 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237951234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.1237951234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.737599966 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 159290171 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:57:42 PM UTC 24 |
| Finished | Sep 18 12:57:45 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737599966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_setup_stage.737599966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.153339517 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 151593329 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 12:57:42 PM UTC 24 |
| Finished | Sep 18 12:57:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153339517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_setup_trans_ignored.153339517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.3301521213 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 197999666 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:57:44 PM UTC 24 |
| Finished | Sep 18 12:57:47 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301521213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.3301521213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.860674373 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 3416496267 ps |
| CPU time | 88.62 seconds |
| Started | Sep 18 12:57:44 PM UTC 24 |
| Finished | Sep 18 12:59:15 PM UTC 24 |
| Peak memory | 234928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860674373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.860674373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.2188663177 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 146369194 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:57:44 PM UTC 24 |
| Finished | Sep 18 12:57:46 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188663177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2188663177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.3108331934 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 209701044 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:57:45 PM UTC 24 |
| Finished | Sep 18 12:57:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108331934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.3108331934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.214626616 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 468902427 ps |
| CPU time | 2.74 seconds |
| Started | Sep 18 12:57:45 PM UTC 24 |
| Finished | Sep 18 12:57:49 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214626616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_stream_len_max.214626616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.3524142229 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 3933050401 ps |
| CPU time | 37.98 seconds |
| Started | Sep 18 12:57:45 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524142229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.3524142229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1677224084 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 2882317737 ps |
| CPU time | 21.1 seconds |
| Started | Sep 18 12:57:27 PM UTC 24 |
| Finished | Sep 18 12:57:49 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677224084 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1677224084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.1140032845 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 644652947 ps |
| CPU time | 3.14 seconds |
| Started | Sep 18 12:57:47 PM UTC 24 |
| Finished | Sep 18 12:57:52 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1140032845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.1140032845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.3920512626 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 604818121 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:09:21 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3920512626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.3920512626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1286782945 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 180897961 ps |
| CPU time | 0.81 seconds |
| Started | Sep 18 01:09:22 PM UTC 24 |
| Finished | Sep 18 01:09:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286782945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1286782945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.1122260727 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 246901244 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:09:22 PM UTC 24 |
| Finished | Sep 18 01:09:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122260727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.1122260727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.4186857772 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 536567080 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:09:22 PM UTC 24 |
| Finished | Sep 18 01:11:05 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4186857772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.4186857772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.3464569392 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 384345077 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:09:23 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464569392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.3464569392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.480505105 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 253452592 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 01:09:23 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480505105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 122.usbdev_fifo_levels.480505105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.1396298284 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 559346168 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:09:24 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1396298284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.1396298284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.633948646 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 162555550 ps |
| CPU time | 0.83 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=633948646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.633948646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.403358917 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 526978792 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=403358917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_t x_rx_disruption.403358917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.4276315269 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 311684318 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276315269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.4276315269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3779605846 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 273196655 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779605846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.3779605846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2214824823 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 595689610 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2214824823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.2214824823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.4197160984 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 256108402 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197160984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.4197160984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.418264792 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 589714876 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=418264792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.418264792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2385556461 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 146733315 ps |
| CPU time | 0.78 seconds |
| Started | Sep 18 01:09:25 PM UTC 24 |
| Finished | Sep 18 01:09:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385556461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2385556461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.678470495 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 641305009 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=678470495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_t x_rx_disruption.678470495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.347002038 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 262998773 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=347002038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.347002038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.3259746493 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 147591334 ps |
| CPU time | 0.84 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259746493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.3259746493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.532429170 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 601702379 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=532429170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_t x_rx_disruption.532429170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3112452266 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 288171158 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112452266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3112452266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.1455602761 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 152793736 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:09:29 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455602761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.1455602761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.2846336564 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 61047811 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:58:09 PM UTC 24 |
| Finished | Sep 18 12:58:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846336564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.2846336564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.1171480420 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 12280507833 ps |
| CPU time | 19.54 seconds |
| Started | Sep 18 12:57:48 PM UTC 24 |
| Finished | Sep 18 12:58:08 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171480420 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.1171480420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3791205589 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 16204865440 ps |
| CPU time | 28.47 seconds |
| Started | Sep 18 12:57:48 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791205589 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3791205589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.3713410800 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 29714151586 ps |
| CPU time | 44.52 seconds |
| Started | Sep 18 12:57:48 PM UTC 24 |
| Finished | Sep 18 12:58:34 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713410800 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.3713410800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.1603511776 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 173453464 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:57:48 PM UTC 24 |
| Finished | Sep 18 12:57:50 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603511776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.1603511776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.2728807445 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 169046632 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:57:49 PM UTC 24 |
| Finished | Sep 18 12:57:52 PM UTC 24 |
| Peak memory | 215316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728807445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.2728807445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2881972618 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 223461427 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:57:49 PM UTC 24 |
| Finished | Sep 18 12:57:52 PM UTC 24 |
| Peak memory | 215268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881972618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2881972618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.804238925 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 649098562 ps |
| CPU time | 3.9 seconds |
| Started | Sep 18 12:57:49 PM UTC 24 |
| Finished | Sep 18 12:57:54 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804238925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.804238925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.932817701 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 17420145527 ps |
| CPU time | 36.19 seconds |
| Started | Sep 18 12:57:49 PM UTC 24 |
| Finished | Sep 18 12:58:27 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932817701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.932817701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.1818589939 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 1041442464 ps |
| CPU time | 20.49 seconds |
| Started | Sep 18 12:57:50 PM UTC 24 |
| Finished | Sep 18 12:58:11 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818589939 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1818589939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1285799643 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 505313193 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 12:57:51 PM UTC 24 |
| Finished | Sep 18 12:57:54 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285799643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1285799643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.1522844924 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 164232728 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:57:51 PM UTC 24 |
| Finished | Sep 18 12:57:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522844924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.1522844924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_enable.4137479301 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 120966074 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:57:51 PM UTC 24 |
| Finished | Sep 18 12:57:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137479301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.4137479301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.2887899528 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 989399985 ps |
| CPU time | 3.84 seconds |
| Started | Sep 18 12:57:51 PM UTC 24 |
| Finished | Sep 18 12:57:56 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887899528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2887899528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.4273569149 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 359632994 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 12:57:52 PM UTC 24 |
| Finished | Sep 18 12:57:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273569149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.4273569149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.3587860166 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 262799451 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:57:52 PM UTC 24 |
| Finished | Sep 18 12:57:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587860166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.3587860166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.3040995595 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 276171713 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 12:57:52 PM UTC 24 |
| Finished | Sep 18 12:57:56 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040995595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.3040995595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.4245694109 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 159946632 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:57:55 PM UTC 24 |
| Finished | Sep 18 12:57:58 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245694109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.4245694109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.4051153852 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 183353334 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:57:55 PM UTC 24 |
| Finished | Sep 18 12:57:58 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051153852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.4051153852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2372023564 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 179142194 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:57:55 PM UTC 24 |
| Finished | Sep 18 12:57:57 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372023564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2372023564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.1836360748 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 4045024840 ps |
| CPU time | 38.04 seconds |
| Started | Sep 18 12:57:53 PM UTC 24 |
| Finished | Sep 18 12:58:32 PM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836360748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1836360748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.2800170581 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 5245873803 ps |
| CPU time | 57.93 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:58:57 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800170581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.2800170581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.413228063 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 213754922 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:58:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413228063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_in_err.413228063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.3597642126 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 8120101707 ps |
| CPU time | 14.81 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:58:13 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597642126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.3597642126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.276942018 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 3780324621 ps |
| CPU time | 6.79 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:58:05 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=276942018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_suspend.276942018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.1705788572 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 4692386896 ps |
| CPU time | 120.88 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705788572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.1705788572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.1023207864 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 3003519773 ps |
| CPU time | 80.83 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:59:20 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023207864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.1023207864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.819549615 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 282132457 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:57:57 PM UTC 24 |
| Finished | Sep 18 12:58:00 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819549615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.819549615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.447354805 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 190509516 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 12:57:58 PM UTC 24 |
| Finished | Sep 18 12:58:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447354805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.447354805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.2752599579 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 2528231911 ps |
| CPU time | 69.48 seconds |
| Started | Sep 18 12:57:58 PM UTC 24 |
| Finished | Sep 18 12:59:09 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752599579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.2752599579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.2059207587 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 3746970283 ps |
| CPU time | 31.47 seconds |
| Started | Sep 18 12:57:58 PM UTC 24 |
| Finished | Sep 18 12:58:31 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059207587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.2059207587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.4205429642 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 4012378191 ps |
| CPU time | 115.12 seconds |
| Started | Sep 18 12:57:59 PM UTC 24 |
| Finished | Sep 18 12:59:57 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205429642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.4205429642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.1121655043 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 182897656 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:57:59 PM UTC 24 |
| Finished | Sep 18 12:58:02 PM UTC 24 |
| Peak memory | 217724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121655043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.1121655043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.3709776882 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 181759114 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:57:59 PM UTC 24 |
| Finished | Sep 18 12:58:01 PM UTC 24 |
| Peak memory | 215168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709776882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.3709776882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.1011887788 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 297711794 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:57:59 PM UTC 24 |
| Finished | Sep 18 12:58:02 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011887788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.1011887788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.3565168832 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 218444714 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:58:01 PM UTC 24 |
| Finished | Sep 18 12:58:04 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565168832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.3565168832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.144296508 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 160855055 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:58:01 PM UTC 24 |
| Finished | Sep 18 12:58:04 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144296508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_out_stall.144296508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.2542968161 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 137602740 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:58:01 PM UTC 24 |
| Finished | Sep 18 12:58:04 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542968161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.2542968161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.2524866840 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 157063305 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 12:58:01 PM UTC 24 |
| Finished | Sep 18 12:58:03 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524866840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.2524866840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.1840581131 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 248580679 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840581131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.1840581131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.3039601692 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 150632643 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039601692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.3039601692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.4251953172 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 43274834 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:05 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4251953172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.4251953172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2546371122 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 19069566482 ps |
| CPU time | 47.73 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:53 PM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546371122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2546371122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.2739532744 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 169542714 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739532744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.2739532744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.3515899948 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 173535440 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515899948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.3515899948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.1859492231 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 167610360 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:58:03 PM UTC 24 |
| Finished | Sep 18 12:58:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859492231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.1859492231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.652401754 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 181858737 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:58:05 PM UTC 24 |
| Finished | Sep 18 12:58:07 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652401754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.652401754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.2185713702 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 20159552030 ps |
| CPU time | 26.65 seconds |
| Started | Sep 18 12:58:05 PM UTC 24 |
| Finished | Sep 18 12:58:33 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185713702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.2185713702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.2294595291 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 133802541 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:58:05 PM UTC 24 |
| Finished | Sep 18 12:58:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294595291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.2294595291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.2456329803 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 253637432 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 12:58:05 PM UTC 24 |
| Finished | Sep 18 12:58:08 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456329803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.2456329803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.2866214315 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 201889915 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:58:05 PM UTC 24 |
| Finished | Sep 18 12:58:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866214315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.2866214315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.1757806494 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 155081874 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757806494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.1757806494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.156376175 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 260765579 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156376175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.156376175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.4032379457 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 2752145875 ps |
| CPU time | 26 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:35 PM UTC 24 |
| Peak memory | 234996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032379457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.4032379457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.845705014 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 159994983 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845705014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.845705014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.2329544974 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 175916492 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:10 PM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329544974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.2329544974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.773189162 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 1030558242 ps |
| CPU time | 4.87 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:13 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773189162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_stream_len_max.773189162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1867823845 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 1844832171 ps |
| CPU time | 16.01 seconds |
| Started | Sep 18 12:58:07 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867823845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1867823845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.1652804442 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 1184194733 ps |
| CPU time | 24.1 seconds |
| Started | Sep 18 12:57:51 PM UTC 24 |
| Finished | Sep 18 12:58:16 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652804442 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.1652804442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.3247179605 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 663869821 ps |
| CPU time | 3.26 seconds |
| Started | Sep 18 12:58:08 PM UTC 24 |
| Finished | Sep 18 12:58:12 PM UTC 24 |
| Peak memory | 217552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3247179605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.3247179605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.4166025288 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 221652672 ps |
| CPU time | 0.85 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166025288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.4166025288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.303639423 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 623677783 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=303639423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_t x_rx_disruption.303639423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2942616478 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 318522739 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942616478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.2942616478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.4099700348 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 721878998 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:44 PM UTC 24 |
| Peak memory | 215092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4099700348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.4099700348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.2037533298 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 483480112 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037533298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.2037533298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.2370602846 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 269914568 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370602846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.2370602846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.882825477 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 688335218 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=882825477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_t x_rx_disruption.882825477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3155811721 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 158192588 ps |
| CPU time | 0.84 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155811721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3155811721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.1158014104 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 522600930 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1158014104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.1158014104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.328016633 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 539261337 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:09:31 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=328016633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.328016633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.1056057533 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 514180414 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:09:33 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1056057533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.1056057533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.777920574 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 561918056 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:09:34 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=777920574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_t x_rx_disruption.777920574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1462338632 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 374397180 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:09:35 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462338632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1462338632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.661492160 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 151320107 ps |
| CPU time | 0.76 seconds |
| Started | Sep 18 01:09:35 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661492160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 139.usbdev_fifo_levels.661492160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.3209703731 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 511224288 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:09:35 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3209703731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.3209703731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3337035646 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 68676869 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:58:30 PM UTC 24 |
| Finished | Sep 18 12:58:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337035646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3337035646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3701250860 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 6849394740 ps |
| CPU time | 10.79 seconds |
| Started | Sep 18 12:58:09 PM UTC 24 |
| Finished | Sep 18 12:58:21 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701250860 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3701250860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2685735734 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 14318208451 ps |
| CPU time | 20.65 seconds |
| Started | Sep 18 12:58:09 PM UTC 24 |
| Finished | Sep 18 12:58:31 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685735734 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2685735734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.1586403323 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 31075959164 ps |
| CPU time | 38.88 seconds |
| Started | Sep 18 12:58:09 PM UTC 24 |
| Finished | Sep 18 12:58:49 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586403323 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.1586403323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.1451731128 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 180672883 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:58:10 PM UTC 24 |
| Finished | Sep 18 12:58:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451731128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.1451731128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.1335147978 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 192678244 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:58:10 PM UTC 24 |
| Finished | Sep 18 12:58:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335147978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.1335147978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.1089162171 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 649809230 ps |
| CPU time | 2.67 seconds |
| Started | Sep 18 12:58:10 PM UTC 24 |
| Finished | Sep 18 12:58:14 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089162171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.1089162171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.867896693 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 1167715212 ps |
| CPU time | 5.23 seconds |
| Started | Sep 18 12:58:12 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=867896693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.867896693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1905285932 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 33216780196 ps |
| CPU time | 67.56 seconds |
| Started | Sep 18 12:58:12 PM UTC 24 |
| Finished | Sep 18 12:59:21 PM UTC 24 |
| Peak memory | 218412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905285932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1905285932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.263345485 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 5212277476 ps |
| CPU time | 49.2 seconds |
| Started | Sep 18 12:58:12 PM UTC 24 |
| Finished | Sep 18 12:59:03 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=263345485 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.263345485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.3589728609 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 421901232 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 12:58:12 PM UTC 24 |
| Finished | Sep 18 12:58:15 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589728609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.3589728609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3253482240 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 143309003 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:17 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253482240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3253482240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_enable.2559900979 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 58820372 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:16 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559900979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.2559900979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.2007156209 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 859520452 ps |
| CPU time | 3.63 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:19 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007156209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.2007156209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.255870425 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 243790517 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:17 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=255870425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.255870425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.980110716 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 261930810 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:17 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=980110716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_fifo_levels.980110716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.3956337469 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 255069920 ps |
| CPU time | 2.44 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956337469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.3956337469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.1332786809 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 250875123 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:17 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332786809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.1332786809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.3697069024 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 144667403 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:17 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697069024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.3697069024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3119823995 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 185826270 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:58:16 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119823995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3119823995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.3275053363 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 4278219315 ps |
| CPU time | 37.19 seconds |
| Started | Sep 18 12:58:14 PM UTC 24 |
| Finished | Sep 18 12:58:53 PM UTC 24 |
| Peak memory | 235020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275053363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.3275053363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.3612187100 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 11943696354 ps |
| CPU time | 83.06 seconds |
| Started | Sep 18 12:58:16 PM UTC 24 |
| Finished | Sep 18 12:59:41 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612187100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.3612187100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.1250687367 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 198979749 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 12:58:16 PM UTC 24 |
| Finished | Sep 18 12:58:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250687367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.1250687367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.4151814146 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 30440748411 ps |
| CPU time | 55.19 seconds |
| Started | Sep 18 12:58:17 PM UTC 24 |
| Finished | Sep 18 12:59:14 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151814146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.4151814146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.4033429779 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 9577836730 ps |
| CPU time | 17.63 seconds |
| Started | Sep 18 12:58:17 PM UTC 24 |
| Finished | Sep 18 12:58:36 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033429779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.4033429779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.2708506153 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 4272326945 ps |
| CPU time | 31.76 seconds |
| Started | Sep 18 12:58:17 PM UTC 24 |
| Finished | Sep 18 12:58:50 PM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708506153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.2708506153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.151198378 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 3952143476 ps |
| CPU time | 32.26 seconds |
| Started | Sep 18 12:58:17 PM UTC 24 |
| Finished | Sep 18 12:58:51 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151198378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.151198378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.2816468138 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 246844631 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 12:58:17 PM UTC 24 |
| Finished | Sep 18 12:58:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816468138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.2816468138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.2405802234 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 208026156 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:58:22 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405802234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.2405802234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.925328931 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 3364687534 ps |
| CPU time | 87.11 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:59:48 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925328931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.925328931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.2560051632 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 2255344729 ps |
| CPU time | 29.83 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:58:50 PM UTC 24 |
| Peak memory | 230320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560051632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.2560051632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.974980154 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 2376779915 ps |
| CPU time | 67.82 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:59:29 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=974980154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.974980154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.34088833 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 152669956 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:58:22 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34088833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.34088833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.3695625707 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 154559082 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:58:19 PM UTC 24 |
| Finished | Sep 18 12:58:22 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695625707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.3695625707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.4022413001 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 189666692 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:58:21 PM UTC 24 |
| Finished | Sep 18 12:58:24 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022413001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.4022413001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.2480145809 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 162467272 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:58:21 PM UTC 24 |
| Finished | Sep 18 12:58:24 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480145809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.2480145809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2251511913 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 171761742 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:58:21 PM UTC 24 |
| Finished | Sep 18 12:58:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251511913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2251511913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.3972180217 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 184710620 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972180217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.3972180217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.871182685 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 222485637 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=871182685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.871182685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3211795668 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 139566220 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211795668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3211795668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.3375624308 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 42476561 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375624308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.3375624308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.1563098042 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 21338729443 ps |
| CPU time | 61.52 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563098042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.1563098042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.1424568674 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 169121086 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:58:23 PM UTC 24 |
| Finished | Sep 18 12:58:25 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424568674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.1424568674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.2889629466 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 171165354 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889629466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.2889629466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.845930285 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 153342080 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845930285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_random_length_in_transaction.845930285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.3460601753 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 160686273 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460601753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.3460601753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.3197540367 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 20160980348 ps |
| CPU time | 31.54 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:59 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197540367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.3197540367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.3662465947 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 185851648 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662465947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.3662465947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.3868216130 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 359080244 ps |
| CPU time | 2.15 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:30 PM UTC 24 |
| Peak memory | 217676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868216130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.3868216130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.1043597473 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 168110853 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043597473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.1043597473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.3270858964 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 155514114 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270858964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.3270858964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.2422989036 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 248060175 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422989036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.2422989036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.626603581 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 2600315024 ps |
| CPU time | 75.26 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:59:44 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626603581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.626603581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.2605805930 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 203363966 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 12:58:26 PM UTC 24 |
| Finished | Sep 18 12:58:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605805930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.2605805930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.2648950070 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 155063338 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 12:58:28 PM UTC 24 |
| Finished | Sep 18 12:58:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648950070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.2648950070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.408884078 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 1318054135 ps |
| CPU time | 4.33 seconds |
| Started | Sep 18 12:58:29 PM UTC 24 |
| Finished | Sep 18 12:58:35 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408884078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_stream_len_max.408884078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.76009771 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 1812436771 ps |
| CPU time | 48.6 seconds |
| Started | Sep 18 12:58:28 PM UTC 24 |
| Finished | Sep 18 12:59:18 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76009771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_streaming_out.76009771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.703797822 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 1084703177 ps |
| CPU time | 8.75 seconds |
| Started | Sep 18 12:58:12 PM UTC 24 |
| Finished | Sep 18 12:58:22 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=703797822 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.703797822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.2290732539 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 643377383 ps |
| CPU time | 3.15 seconds |
| Started | Sep 18 12:58:29 PM UTC 24 |
| Finished | Sep 18 12:58:33 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2290732539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.2290732539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.1083320161 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 178989616 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:09:35 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083320161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.1083320161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.257039724 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 253694002 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:09:35 PM UTC 24 |
| Finished | Sep 18 01:09:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=257039724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 140.usbdev_fifo_levels.257039724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.2382670535 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 494950024 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:09:38 PM UTC 24 |
| Finished | Sep 18 01:09:44 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2382670535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.2382670535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.3253995288 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 650761642 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:09:38 PM UTC 24 |
| Finished | Sep 18 01:09:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253995288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.3253995288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.2415609153 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 257238889 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415609153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.2415609153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.2909292193 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 448729125 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:10:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2909292193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.2909292193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.1927698026 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 185920701 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927698026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.1927698026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.3523647163 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 532093235 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3523647163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.3523647163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.3182912391 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 301932522 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182912391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.3182912391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.3814307437 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 481103455 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 214688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3814307437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.3814307437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.4195168276 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 429796818 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 217204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195168276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.4195168276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.1510122032 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 624868951 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1510122032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.1510122032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.2838578042 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 370896616 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838578042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.2838578042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.3376119888 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 269857831 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376119888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.3376119888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2468597175 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 665661549 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:44 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2468597175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2468597175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.4038625846 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 333026464 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:09:40 PM UTC 24 |
| Finished | Sep 18 01:09:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038625846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.4038625846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.1757965844 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 229585488 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:09:42 PM UTC 24 |
| Finished | Sep 18 01:10:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757965844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.1757965844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2834793753 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 500681823 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:09:43 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2834793753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2834793753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.2421519094 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 391520551 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:09:43 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421519094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.2421519094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3958780062 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 228989537 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:09:44 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958780062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3958780062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1881227293 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 580705339 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:09:44 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1881227293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1881227293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.1709706708 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 269532555 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:09:44 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709706708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.1709706708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.4131622762 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 642685624 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:09:44 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4131622762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.4131622762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.2255576150 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 276254668 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255576150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.2255576150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.2945754969 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 609834581 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2945754969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.2945754969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.3229969348 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 55731027 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:58:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229969348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.3229969348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.962816635 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 5665740189 ps |
| CPU time | 10.05 seconds |
| Started | Sep 18 12:58:30 PM UTC 24 |
| Finished | Sep 18 12:58:41 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962816635 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.962816635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.3389475189 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 19869629298 ps |
| CPU time | 25.73 seconds |
| Started | Sep 18 12:58:30 PM UTC 24 |
| Finished | Sep 18 12:58:57 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389475189 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.3389475189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.1896000504 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 24065551222 ps |
| CPU time | 36.16 seconds |
| Started | Sep 18 12:58:30 PM UTC 24 |
| Finished | Sep 18 12:59:07 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896000504 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.1896000504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.2242970306 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 159713044 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:58:30 PM UTC 24 |
| Finished | Sep 18 12:58:32 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242970306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.2242970306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.1837005869 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 157134209 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:58:31 PM UTC 24 |
| Finished | Sep 18 12:58:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837005869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.1837005869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.3305025500 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 415360495 ps |
| CPU time | 2.15 seconds |
| Started | Sep 18 12:58:31 PM UTC 24 |
| Finished | Sep 18 12:58:34 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305025500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.3305025500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3468776769 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 296506648 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 12:58:31 PM UTC 24 |
| Finished | Sep 18 12:58:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468776769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3468776769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1093023768 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 25458743909 ps |
| CPU time | 53.46 seconds |
| Started | Sep 18 12:58:32 PM UTC 24 |
| Finished | Sep 18 12:59:28 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093023768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1093023768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.2685170445 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 845707718 ps |
| CPU time | 6.82 seconds |
| Started | Sep 18 12:58:33 PM UTC 24 |
| Finished | Sep 18 12:58:40 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685170445 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.2685170445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.2682390818 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 916489611 ps |
| CPU time | 3.66 seconds |
| Started | Sep 18 12:58:33 PM UTC 24 |
| Finished | Sep 18 12:58:37 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682390818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.2682390818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.1251125712 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 143680053 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251125712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.1251125712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3118703785 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 60501003 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118703785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3118703785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.2812524254 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 903620093 ps |
| CPU time | 3.83 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:39 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812524254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.2812524254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.673496670 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 668026287 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:37 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=673496670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.673496670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.1907781468 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 280503281 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 12:58:34 PM UTC 24 |
| Finished | Sep 18 12:58:38 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907781468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.1907781468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.2403263082 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 185153108 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 12:58:36 PM UTC 24 |
| Finished | Sep 18 12:58:39 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403263082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2403263082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.567454883 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 203978926 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:58:36 PM UTC 24 |
| Finished | Sep 18 12:58:38 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567454883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_stall.567454883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.3914027546 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 240626564 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:58:36 PM UTC 24 |
| Finished | Sep 18 12:58:39 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914027546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.3914027546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.589269071 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 3609147603 ps |
| CPU time | 39.63 seconds |
| Started | Sep 18 12:58:36 PM UTC 24 |
| Finished | Sep 18 12:59:17 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589269071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.589269071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2607810738 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 11667465568 ps |
| CPU time | 98.33 seconds |
| Started | Sep 18 12:58:36 PM UTC 24 |
| Finished | Sep 18 01:00:16 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607810738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2607810738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.3125176684 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 215508863 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:58:37 PM UTC 24 |
| Finished | Sep 18 12:58:40 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125176684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.3125176684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.4102180800 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 30470978051 ps |
| CPU time | 61.71 seconds |
| Started | Sep 18 12:58:37 PM UTC 24 |
| Finished | Sep 18 12:59:41 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102180800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.4102180800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.1147606039 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 10419342122 ps |
| CPU time | 21.05 seconds |
| Started | Sep 18 12:58:37 PM UTC 24 |
| Finished | Sep 18 12:59:00 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147606039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.1147606039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.3568567650 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 4083216102 ps |
| CPU time | 108.48 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 01:00:30 PM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568567650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.3568567650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.3664453883 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 2364163470 ps |
| CPU time | 25.59 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:59:06 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664453883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3664453883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.1251228622 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 268812459 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:58:41 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251228622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.1251228622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.2975375965 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 204059974 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:58:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975375965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.2975375965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.3953940261 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 2186920930 ps |
| CPU time | 65.13 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:59:46 PM UTC 24 |
| Peak memory | 230424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953940261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.3953940261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.560288305 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 2582750964 ps |
| CPU time | 22.95 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:59:03 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560288305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.560288305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.2746837869 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 195232270 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:58:39 PM UTC 24 |
| Finished | Sep 18 12:58:42 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746837869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.2746837869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.79114344 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 139533834 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 12:58:41 PM UTC 24 |
| Finished | Sep 18 12:58:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=79114344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.79114344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.4087912833 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 199073788 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:58:41 PM UTC 24 |
| Finished | Sep 18 12:58:43 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087912833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.4087912833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.301033901 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 146072263 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:58:42 PM UTC 24 |
| Finished | Sep 18 12:58:44 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301033901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_out_stall.301033901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.565646385 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 188362764 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:58:42 PM UTC 24 |
| Finished | Sep 18 12:58:44 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565646385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_out_trans_nak.565646385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2293900519 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 151450819 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:58:42 PM UTC 24 |
| Finished | Sep 18 12:58:44 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293900519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2293900519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.4276491565 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 186240109 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:58:43 PM UTC 24 |
| Finished | Sep 18 12:58:46 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276491565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.4276491565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.3308598405 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 140096691 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:58:43 PM UTC 24 |
| Finished | Sep 18 12:58:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308598405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.3308598405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.158696033 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 33133792 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:58:43 PM UTC 24 |
| Finished | Sep 18 12:58:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158696033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_phy_pins_sense.158696033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.2620631130 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 18685285088 ps |
| CPU time | 51.56 seconds |
| Started | Sep 18 12:58:45 PM UTC 24 |
| Finished | Sep 18 12:59:38 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620631130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.2620631130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.17547850 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 167126814 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:58:45 PM UTC 24 |
| Finished | Sep 18 12:58:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17547850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_received.17547850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.3687524302 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 221515573 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:58:45 PM UTC 24 |
| Finished | Sep 18 12:58:47 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687524302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.3687524302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.1165165496 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 205130588 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:58:45 PM UTC 24 |
| Finished | Sep 18 12:58:47 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165165496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.1165165496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.4038478232 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 165167122 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:58:45 PM UTC 24 |
| Finished | Sep 18 12:58:47 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038478232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.4038478232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.3532291034 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 20158741576 ps |
| CPU time | 30.45 seconds |
| Started | Sep 18 12:58:46 PM UTC 24 |
| Finished | Sep 18 12:59:18 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532291034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.3532291034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.2559778679 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 176777890 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:58:46 PM UTC 24 |
| Finished | Sep 18 12:58:49 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559778679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.2559778679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2100100516 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 396572655 ps |
| CPU time | 2.71 seconds |
| Started | Sep 18 12:58:46 PM UTC 24 |
| Finished | Sep 18 12:58:50 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100100516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2100100516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.3515259732 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 148501232 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:58:46 PM UTC 24 |
| Finished | Sep 18 12:58:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515259732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.3515259732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.3619309484 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 151236810 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:58:47 PM UTC 24 |
| Finished | Sep 18 12:58:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619309484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.3619309484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.1915856367 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 265551638 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:58:48 PM UTC 24 |
| Finished | Sep 18 12:58:50 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915856367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.1915856367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.2717959927 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 3677071748 ps |
| CPU time | 98.19 seconds |
| Started | Sep 18 12:58:48 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 234720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717959927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.2717959927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.1510309487 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 188826966 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:58:48 PM UTC 24 |
| Finished | Sep 18 12:58:50 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510309487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.1510309487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.1428621836 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 208627371 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:58:49 PM UTC 24 |
| Finished | Sep 18 12:58:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428621836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.1428621836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.2644253000 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 517564444 ps |
| CPU time | 2.63 seconds |
| Started | Sep 18 12:58:49 PM UTC 24 |
| Finished | Sep 18 12:58:53 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644253000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.2644253000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.1639212506 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 2504039354 ps |
| CPU time | 69.85 seconds |
| Started | Sep 18 12:58:49 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639212506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.1639212506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.2108525138 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 7727112695 ps |
| CPU time | 48.01 seconds |
| Started | Sep 18 12:58:33 PM UTC 24 |
| Finished | Sep 18 12:59:22 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108525138 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.2108525138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.2076981059 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 599250707 ps |
| CPU time | 3.04 seconds |
| Started | Sep 18 12:58:49 PM UTC 24 |
| Finished | Sep 18 12:58:54 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2076981059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.2076981059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.2021251104 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 209411249 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021251104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.2021251104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.2844686677 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 260177376 ps |
| CPU time | 0.95 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844686677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.2844686677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1560052823 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 523343032 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1560052823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1560052823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.1395170149 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 257598960 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:58 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395170149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.1395170149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.239226534 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 284149085 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239226534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 151.usbdev_fifo_levels.239226534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.475265041 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 470352162 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=475265041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_t x_rx_disruption.475265041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.1007889930 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 148012985 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007889930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.1007889930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.1149348228 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 600453073 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:09:45 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1149348228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.1149348228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.3036016622 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 534577616 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:09:46 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3036016622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.3036016622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2065679282 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 292493399 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:09:46 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065679282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2065679282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.2765820266 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 515117523 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:09:47 PM UTC 24 |
| Finished | Sep 18 01:10:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2765820266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.2765820266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2807823278 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 266805660 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:53 PM UTC 24 |
| Finished | Sep 18 01:09:58 PM UTC 24 |
| Peak memory | 215200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807823278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.2807823278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.2042661449 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 523355586 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:09:53 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2042661449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.2042661449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2358595651 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 363161368 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:09:53 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358595651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.2358595651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.822014248 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 163317221 ps |
| CPU time | 0.75 seconds |
| Started | Sep 18 01:09:53 PM UTC 24 |
| Finished | Sep 18 01:09:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822014248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 157.usbdev_fifo_levels.822014248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.1082024992 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 471892957 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:09:54 PM UTC 24 |
| Finished | Sep 18 01:10:03 PM UTC 24 |
| Peak memory | 215460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1082024992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.1082024992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3329196627 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 588506353 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:09:55 PM UTC 24 |
| Finished | Sep 18 01:10:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3329196627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3329196627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.1230025510 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 297374358 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:09:56 PM UTC 24 |
| Finished | Sep 18 01:09:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230025510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 159.usbdev_fifo_levels.1230025510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.1526445974 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 577387182 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:09:59 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1526445974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.1526445974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.4024400051 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 47509595 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:59:12 PM UTC 24 |
| Finished | Sep 18 12:59:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024400051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.4024400051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.1632790481 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 12122508474 ps |
| CPU time | 15.4 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:59:08 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632790481 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.1632790481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.4007606527 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 14807581298 ps |
| CPU time | 23.28 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007606527 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.4007606527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.2379093921 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 26348850343 ps |
| CPU time | 46.08 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:59:39 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379093921 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.2379093921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.1534530893 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 161728589 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:58:54 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534530893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.1534530893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.699995806 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 143708937 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 12:58:51 PM UTC 24 |
| Finished | Sep 18 12:58:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699995806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_bitstuff_err.699995806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.812192669 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 374343194 ps |
| CPU time | 2.3 seconds |
| Started | Sep 18 12:58:53 PM UTC 24 |
| Finished | Sep 18 12:58:56 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=812192669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_data_toggle_clear.812192669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.2010790408 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 560056194 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 12:58:53 PM UTC 24 |
| Finished | Sep 18 12:58:57 PM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010790408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.2010790408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.517456592 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 1023672132 ps |
| CPU time | 21.61 seconds |
| Started | Sep 18 12:58:53 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=517456592 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.517456592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.141755007 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 970378307 ps |
| CPU time | 4.17 seconds |
| Started | Sep 18 12:58:55 PM UTC 24 |
| Finished | Sep 18 12:59:01 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141755007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.141755007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.2598074205 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 146040590 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:58:55 PM UTC 24 |
| Finished | Sep 18 12:58:58 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598074205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.2598074205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1515147230 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 38311920 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 12:58:55 PM UTC 24 |
| Finished | Sep 18 12:58:57 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515147230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1515147230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.1391958896 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 957872194 ps |
| CPU time | 3.58 seconds |
| Started | Sep 18 12:58:55 PM UTC 24 |
| Finished | Sep 18 12:59:00 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391958896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1391958896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.3545601009 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 390359984 ps |
| CPU time | 2.49 seconds |
| Started | Sep 18 12:58:56 PM UTC 24 |
| Finished | Sep 18 12:58:59 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545601009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.3545601009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.2991017596 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 274802379 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 12:58:56 PM UTC 24 |
| Finished | Sep 18 12:58:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991017596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.2991017596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.1546720856 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 279689172 ps |
| CPU time | 2.49 seconds |
| Started | Sep 18 12:58:56 PM UTC 24 |
| Finished | Sep 18 12:58:59 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546720856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.1546720856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.1572661128 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 231353817 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:58:58 PM UTC 24 |
| Finished | Sep 18 12:59:01 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572661128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.1572661128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.1518484525 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 139401815 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:58:58 PM UTC 24 |
| Finished | Sep 18 12:59:00 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518484525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.1518484525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1917822056 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 262090867 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:58:58 PM UTC 24 |
| Finished | Sep 18 12:59:01 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917822056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1917822056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.929467844 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 4268614137 ps |
| CPU time | 111.49 seconds |
| Started | Sep 18 12:58:57 PM UTC 24 |
| Finished | Sep 18 01:00:50 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=929467844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.929467844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.1317360847 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 8313771381 ps |
| CPU time | 105.35 seconds |
| Started | Sep 18 12:58:58 PM UTC 24 |
| Finished | Sep 18 01:00:46 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317360847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1317360847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.5878391 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 236961476 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:58:58 PM UTC 24 |
| Finished | Sep 18 12:59:01 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5878391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_link_in_err.5878391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.106793730 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 29829312740 ps |
| CPU time | 54.13 seconds |
| Started | Sep 18 12:59:00 PM UTC 24 |
| Finished | Sep 18 12:59:55 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106793730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.106793730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.2906679686 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 5045882902 ps |
| CPU time | 9.17 seconds |
| Started | Sep 18 12:59:00 PM UTC 24 |
| Finished | Sep 18 12:59:10 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906679686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.2906679686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.2398354957 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 3238324609 ps |
| CPU time | 24.55 seconds |
| Started | Sep 18 12:59:00 PM UTC 24 |
| Finished | Sep 18 12:59:25 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398354957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.2398354957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.292341540 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 3104059037 ps |
| CPU time | 31.64 seconds |
| Started | Sep 18 12:59:00 PM UTC 24 |
| Finished | Sep 18 12:59:33 PM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=292341540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.292341540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.1197287591 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 285462887 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 12:59:01 PM UTC 24 |
| Finished | Sep 18 12:59:04 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197287591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.1197287591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.1239396715 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 201872980 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:59:01 PM UTC 24 |
| Finished | Sep 18 12:59:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239396715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.1239396715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.2976130327 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 1941489103 ps |
| CPU time | 48.85 seconds |
| Started | Sep 18 12:59:01 PM UTC 24 |
| Finished | Sep 18 12:59:52 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976130327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.2976130327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.3142457738 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 158968847 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:59:01 PM UTC 24 |
| Finished | Sep 18 12:59:04 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142457738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.3142457738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.4222674997 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 148404265 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:02 PM UTC 24 |
| Finished | Sep 18 12:59:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222674997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.4222674997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.1873820295 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 238830148 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 12:59:03 PM UTC 24 |
| Finished | Sep 18 12:59:05 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873820295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.1873820295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.3373989058 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 213581230 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:03 PM UTC 24 |
| Finished | Sep 18 12:59:05 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373989058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.3373989058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.773724364 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 183364476 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:59:04 PM UTC 24 |
| Finished | Sep 18 12:59:06 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773724364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_out_stall.773724364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.3759945114 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 192407208 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:59:04 PM UTC 24 |
| Finished | Sep 18 12:59:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759945114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.3759945114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.1620288404 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 163753889 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:59:05 PM UTC 24 |
| Finished | Sep 18 12:59:08 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620288404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.1620288404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.2001475460 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 235984197 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:59:05 PM UTC 24 |
| Finished | Sep 18 12:59:08 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001475460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.2001475460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.823056242 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 145472937 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:59:05 PM UTC 24 |
| Finished | Sep 18 12:59:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823056242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.823056242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.698971560 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 44637011 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 12:59:05 PM UTC 24 |
| Finished | Sep 18 12:59:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698971560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_phy_pins_sense.698971560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.3260690421 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 14567184634 ps |
| CPU time | 37.87 seconds |
| Started | Sep 18 12:59:07 PM UTC 24 |
| Finished | Sep 18 12:59:46 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260690421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.3260690421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.3618895685 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 148741443 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:59:07 PM UTC 24 |
| Finished | Sep 18 12:59:09 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618895685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.3618895685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3783001462 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 173512498 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:07 PM UTC 24 |
| Finished | Sep 18 12:59:09 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783001462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3783001462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.1989484985 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 251980185 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 12:59:07 PM UTC 24 |
| Finished | Sep 18 12:59:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989484985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.1989484985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.1563508285 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 188766597 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:59:07 PM UTC 24 |
| Finished | Sep 18 12:59:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563508285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1563508285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.1539415793 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 20149884907 ps |
| CPU time | 34.59 seconds |
| Started | Sep 18 12:59:08 PM UTC 24 |
| Finished | Sep 18 12:59:45 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539415793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.1539415793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.2327913973 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 178061044 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:59:09 PM UTC 24 |
| Finished | Sep 18 12:59:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327913973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.2327913973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1586902826 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 333063759 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 12:59:09 PM UTC 24 |
| Finished | Sep 18 12:59:12 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586902826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1586902826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.979793077 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 157958371 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:59:09 PM UTC 24 |
| Finished | Sep 18 12:59:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=979793077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.979793077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.571935832 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 226528515 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:59:09 PM UTC 24 |
| Finished | Sep 18 12:59:11 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571935832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_setup_trans_ignored.571935832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.2262383061 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 217457217 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:59:09 PM UTC 24 |
| Finished | Sep 18 12:59:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262383061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.2262383061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.1254177450 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 2940275856 ps |
| CPU time | 78.51 seconds |
| Started | Sep 18 12:59:10 PM UTC 24 |
| Finished | Sep 18 01:00:30 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254177450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1254177450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.1203157003 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 190314053 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:59:10 PM UTC 24 |
| Finished | Sep 18 12:59:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203157003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.1203157003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.2570673586 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 152358126 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:59:10 PM UTC 24 |
| Finished | Sep 18 12:59:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570673586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.2570673586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.2014457153 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 1267315993 ps |
| CPU time | 5.87 seconds |
| Started | Sep 18 12:59:12 PM UTC 24 |
| Finished | Sep 18 12:59:19 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014457153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.2014457153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3717277031 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 1933451499 ps |
| CPU time | 14.72 seconds |
| Started | Sep 18 12:59:10 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717277031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3717277031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.525003202 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 7063650288 ps |
| CPU time | 43 seconds |
| Started | Sep 18 12:58:53 PM UTC 24 |
| Finished | Sep 18 12:59:38 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525003202 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.525003202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.3479274777 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 625387215 ps |
| CPU time | 3.11 seconds |
| Started | Sep 18 12:59:12 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3479274777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.3479274777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1279387631 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 159659091 ps |
| CPU time | 0.81 seconds |
| Started | Sep 18 01:09:59 PM UTC 24 |
| Finished | Sep 18 01:10:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279387631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1279387631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.3661012043 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 536375248 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:09:59 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3661012043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.3661012043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.2530727795 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 602692232 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:09:59 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2530727795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.2530727795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.2120229842 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 547846914 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2120229842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.2120229842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.2102858989 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 627105504 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2102858989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.2102858989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3519185232 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 641882915 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519185232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.3519185232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.572130954 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 625780597 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=572130954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_t x_rx_disruption.572130954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.141371112 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 321630797 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=141371112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.141371112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.2642474933 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 490517021 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2642474933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.2642474933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.3055765417 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 311539391 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055765417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.3055765417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2291440844 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 535619577 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2291440844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2291440844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2409801183 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 355331606 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409801183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2409801183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.2578717070 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 486267406 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2578717070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.2578717070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.3116310702 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 620217576 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3116310702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.3116310702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.940485125 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 521173165 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=940485125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_t x_rx_disruption.940485125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.1474507102 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 44061202 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 12:59:33 PM UTC 24 |
| Finished | Sep 18 12:59:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474507102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.1474507102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.1042415483 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 4396249456 ps |
| CPU time | 9.21 seconds |
| Started | Sep 18 12:59:12 PM UTC 24 |
| Finished | Sep 18 12:59:22 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042415483 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.1042415483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.3136841957 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 20839802101 ps |
| CPU time | 30.22 seconds |
| Started | Sep 18 12:59:12 PM UTC 24 |
| Finished | Sep 18 12:59:43 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136841957 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3136841957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.129519945 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 29744680685 ps |
| CPU time | 47.21 seconds |
| Started | Sep 18 12:59:13 PM UTC 24 |
| Finished | Sep 18 01:00:02 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129519945 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.129519945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.1411091091 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 183828653 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:59:13 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411091091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.1411091091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.2287400839 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 169669029 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:13 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287400839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.2287400839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.3813126748 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 308978160 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 12:59:13 PM UTC 24 |
| Finished | Sep 18 12:59:16 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813126748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.3813126748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.1057302881 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 718648496 ps |
| CPU time | 2.92 seconds |
| Started | Sep 18 12:59:15 PM UTC 24 |
| Finished | Sep 18 12:59:19 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057302881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.1057302881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.1379920696 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 24125190778 ps |
| CPU time | 45.13 seconds |
| Started | Sep 18 12:59:15 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379920696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.1379920696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.1622056537 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 1174024979 ps |
| CPU time | 26.95 seconds |
| Started | Sep 18 12:59:15 PM UTC 24 |
| Finished | Sep 18 12:59:43 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622056537 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.1622056537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.2235097637 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 937829860 ps |
| CPU time | 3.27 seconds |
| Started | Sep 18 12:59:17 PM UTC 24 |
| Finished | Sep 18 12:59:22 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235097637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.2235097637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.901625708 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 195697097 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:59:17 PM UTC 24 |
| Finished | Sep 18 12:59:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901625708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_disconnected.901625708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_enable.324099347 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 108438471 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:59:17 PM UTC 24 |
| Finished | Sep 18 12:59:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324099347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_enable.324099347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2318614589 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 816019305 ps |
| CPU time | 3.23 seconds |
| Started | Sep 18 12:59:17 PM UTC 24 |
| Finished | Sep 18 12:59:22 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318614589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2318614589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.1737258651 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 196116956 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:59:18 PM UTC 24 |
| Finished | Sep 18 12:59:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737258651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.1737258651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.3707054995 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 283987553 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 12:59:18 PM UTC 24 |
| Finished | Sep 18 12:59:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707054995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.3707054995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2943734414 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 338183384 ps |
| CPU time | 2.75 seconds |
| Started | Sep 18 12:59:19 PM UTC 24 |
| Finished | Sep 18 12:59:23 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943734414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2943734414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.447878603 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 221042219 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 12:59:19 PM UTC 24 |
| Finished | Sep 18 12:59:22 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447878603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.447878603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.2237121214 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 160768578 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:59:19 PM UTC 24 |
| Finished | Sep 18 12:59:21 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237121214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.2237121214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.1330865216 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 198871295 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:59:20 PM UTC 24 |
| Finished | Sep 18 12:59:23 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330865216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.1330865216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.2472042993 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 4789765694 ps |
| CPU time | 129.32 seconds |
| Started | Sep 18 12:59:19 PM UTC 24 |
| Finished | Sep 18 01:01:31 PM UTC 24 |
| Peak memory | 235020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472042993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.2472042993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.399274934 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 7974252764 ps |
| CPU time | 51.93 seconds |
| Started | Sep 18 12:59:20 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=399274934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.399274934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.2456048505 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 162998151 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:59:20 PM UTC 24 |
| Finished | Sep 18 12:59:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456048505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.2456048505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2045432622 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 31777991536 ps |
| CPU time | 52.19 seconds |
| Started | Sep 18 12:59:21 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045432622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2045432622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.562673479 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 9462803620 ps |
| CPU time | 12.97 seconds |
| Started | Sep 18 12:59:22 PM UTC 24 |
| Finished | Sep 18 12:59:36 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562673479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_suspend.562673479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.3109515888 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 3441357583 ps |
| CPU time | 30.47 seconds |
| Started | Sep 18 12:59:22 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109515888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.3109515888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.1318984110 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 1645568422 ps |
| CPU time | 46.17 seconds |
| Started | Sep 18 12:59:22 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 228244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318984110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.1318984110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.295222935 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 343735605 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 12:59:22 PM UTC 24 |
| Finished | Sep 18 12:59:25 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=295222935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.295222935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.4133121834 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 218533881 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:59:22 PM UTC 24 |
| Finished | Sep 18 12:59:25 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133121834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.4133121834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.3280345505 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 2352842769 ps |
| CPU time | 29.71 seconds |
| Started | Sep 18 12:59:23 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280345505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.3280345505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.162298108 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 2495678705 ps |
| CPU time | 20.58 seconds |
| Started | Sep 18 12:59:23 PM UTC 24 |
| Finished | Sep 18 12:59:44 PM UTC 24 |
| Peak memory | 230820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=162298108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.162298108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.3213486721 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 180959150 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213486721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.3213486721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.668479088 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 172038653 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668479088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.668479088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.2283925765 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 231159766 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:27 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283925765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.2283925765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.85484062 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 192262334 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:27 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85484062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_iso.85484062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.3812261813 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 185043845 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3812261813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.3812261813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.1537192881 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 215397120 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:27 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537192881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.1537192881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3120303854 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 147459162 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 12:59:24 PM UTC 24 |
| Finished | Sep 18 12:59:26 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120303854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3120303854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.2888069400 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 231380835 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:59:26 PM UTC 24 |
| Finished | Sep 18 12:59:29 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888069400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.2888069400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.699048629 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 144815752 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:59:26 PM UTC 24 |
| Finished | Sep 18 12:59:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699048629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.699048629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.2665880227 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 44300492 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:59:27 PM UTC 24 |
| Finished | Sep 18 12:59:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665880227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.2665880227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.1687476532 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 9958416795 ps |
| CPU time | 28.39 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:59 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687476532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.1687476532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2546911038 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 167800634 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546911038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2546911038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.2929828355 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 234101305 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929828355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.2929828355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.2732532807 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 207768404 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732532807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.2732532807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.142852760 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 183116165 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142852760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.142852760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.4259625432 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 20186535820 ps |
| CPU time | 27.86 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:59 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259625432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.4259625432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.2997386152 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 182082681 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997386152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.2997386152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2727975540 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 276554214 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727975540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2727975540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.3738240503 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 151713370 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:59:29 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738240503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.3738240503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.3687681277 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 184801756 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:59:30 PM UTC 24 |
| Finished | Sep 18 12:59:32 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687681277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.3687681277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.3949106831 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 232918800 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:59:31 PM UTC 24 |
| Finished | Sep 18 12:59:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949106831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.3949106831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.870213329 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 3242008244 ps |
| CPU time | 92.89 seconds |
| Started | Sep 18 12:59:31 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=870213329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.870213329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.1496210685 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 214304582 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:59:31 PM UTC 24 |
| Finished | Sep 18 12:59:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496210685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1496210685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.300252234 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 157702469 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:59:31 PM UTC 24 |
| Finished | Sep 18 12:59:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300252234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_stall_trans.300252234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.1108654644 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 1232472883 ps |
| CPU time | 5.76 seconds |
| Started | Sep 18 12:59:33 PM UTC 24 |
| Finished | Sep 18 12:59:40 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108654644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.1108654644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.1722340641 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 2396645454 ps |
| CPU time | 21.76 seconds |
| Started | Sep 18 12:59:33 PM UTC 24 |
| Finished | Sep 18 12:59:57 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722340641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.1722340641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.2303946157 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 161703148 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:59:16 PM UTC 24 |
| Finished | Sep 18 12:59:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303946157 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.2303946157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.2715363521 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 532242310 ps |
| CPU time | 2.79 seconds |
| Started | Sep 18 12:59:33 PM UTC 24 |
| Finished | Sep 18 12:59:37 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2715363521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.2715363521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.835396439 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 472245456 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=835396439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_t x_rx_disruption.835396439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.1832731685 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 812573791 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832731685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1832731685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.3520687638 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 506734476 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3520687638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.3520687638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.2275940196 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 496698723 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:10:01 PM UTC 24 |
| Finished | Sep 18 01:10:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275940196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.2275940196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.3071304561 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 505051940 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:10:02 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3071304561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.3071304561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.1048959413 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 460045892 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:10:03 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1048959413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.1048959413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2728933658 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 627428364 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:04 PM UTC 24 |
| Finished | Sep 18 01:10:20 PM UTC 24 |
| Peak memory | 215344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728933658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.2728933658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.3440814593 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 538827198 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:04 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3440814593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.3440814593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.4066818242 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 548849198 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066818242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.4066818242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.533402450 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 612902486 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=533402450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_t x_rx_disruption.533402450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.3128527234 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 644405495 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128527234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.3128527234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.3329046974 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 627298090 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3329046974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.3329046974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.3066741749 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 156474605 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066741749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.3066741749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.1097209107 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 540935509 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:10:05 PM UTC 24 |
| Finished | Sep 18 01:10:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1097209107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.1097209107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.3359809353 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 38697266 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 12:59:57 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359809353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.3359809353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.3030871869 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 7394573809 ps |
| CPU time | 20.58 seconds |
| Started | Sep 18 12:59:33 PM UTC 24 |
| Finished | Sep 18 12:59:56 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030871869 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.3030871869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.1714948781 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 21060915421 ps |
| CPU time | 34.17 seconds |
| Started | Sep 18 12:59:34 PM UTC 24 |
| Finished | Sep 18 01:00:09 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714948781 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.1714948781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.1302352386 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 24688397461 ps |
| CPU time | 37.51 seconds |
| Started | Sep 18 12:59:34 PM UTC 24 |
| Finished | Sep 18 01:00:13 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302352386 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.1302352386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.1616127819 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 215353798 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:59:35 PM UTC 24 |
| Finished | Sep 18 12:59:38 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616127819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.1616127819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.1049447961 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 159055873 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:59:35 PM UTC 24 |
| Finished | Sep 18 12:59:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049447961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.1049447961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.748983573 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 451518609 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 12:59:35 PM UTC 24 |
| Finished | Sep 18 12:59:39 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748983573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_data_toggle_clear.748983573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.576513903 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 1092594337 ps |
| CPU time | 5.13 seconds |
| Started | Sep 18 12:59:35 PM UTC 24 |
| Finished | Sep 18 12:59:41 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576513903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.576513903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.4064405315 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 23480031215 ps |
| CPU time | 47.27 seconds |
| Started | Sep 18 12:59:36 PM UTC 24 |
| Finished | Sep 18 01:00:25 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064405315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.4064405315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.2840719487 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 4324272043 ps |
| CPU time | 25.43 seconds |
| Started | Sep 18 12:59:36 PM UTC 24 |
| Finished | Sep 18 01:00:03 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840719487 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2840719487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.1348075312 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 647352245 ps |
| CPU time | 3.4 seconds |
| Started | Sep 18 12:59:39 PM UTC 24 |
| Finished | Sep 18 12:59:44 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348075312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.1348075312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.1035209285 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 135897300 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:59:39 PM UTC 24 |
| Finished | Sep 18 12:59:42 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035209285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.1035209285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3114977210 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 37602357 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:59:39 PM UTC 24 |
| Finished | Sep 18 12:59:41 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114977210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3114977210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.3263606669 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 806219349 ps |
| CPU time | 3.66 seconds |
| Started | Sep 18 12:59:40 PM UTC 24 |
| Finished | Sep 18 12:59:44 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263606669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3263606669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.3850091216 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 184761965 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 12:59:40 PM UTC 24 |
| Finished | Sep 18 12:59:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850091216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.3850091216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.1089380940 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 537749514 ps |
| CPU time | 4.29 seconds |
| Started | Sep 18 12:59:41 PM UTC 24 |
| Finished | Sep 18 12:59:46 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089380940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.1089380940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.600531625 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 285746389 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 12:59:45 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=600531625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.600531625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.1226454054 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 144625977 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 12:59:45 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226454054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.1226454054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.29223213 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 230961872 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 12:59:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29223213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_in_trans.29223213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.2493534242 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 2107551546 ps |
| CPU time | 19.86 seconds |
| Started | Sep 18 12:59:41 PM UTC 24 |
| Finished | Sep 18 01:00:02 PM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493534242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.2493534242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2561937676 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 8401442303 ps |
| CPU time | 55.79 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 01:00:40 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561937676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2561937676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.3588908273 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 226874962 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 12:59:45 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588908273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.3588908273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.3658512203 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 10698893480 ps |
| CPU time | 16.46 seconds |
| Started | Sep 18 12:59:42 PM UTC 24 |
| Finished | Sep 18 01:00:00 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658512203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.3658512203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.2121547540 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 4176699866 ps |
| CPU time | 7.82 seconds |
| Started | Sep 18 12:59:44 PM UTC 24 |
| Finished | Sep 18 12:59:52 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121547540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.2121547540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.146368336 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 3400554128 ps |
| CPU time | 33.5 seconds |
| Started | Sep 18 12:59:44 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146368336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.146368336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.2794269795 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 2685287140 ps |
| CPU time | 72.83 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 01:01:00 PM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794269795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.2794269795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.2016863396 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 246112667 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 12:59:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016863396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.2016863396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.1660675222 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 218338168 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 12:59:48 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660675222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.1660675222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.632987596 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 3104892894 ps |
| CPU time | 29.64 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 01:00:17 PM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=632987596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.632987596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.885567087 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 1783034913 ps |
| CPU time | 43.17 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 01:00:30 PM UTC 24 |
| Peak memory | 228188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=885567087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.885567087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.955801518 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 150025180 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:59:45 PM UTC 24 |
| Finished | Sep 18 12:59:48 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=955801518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.955801518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.45902411 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 165457298 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45902411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.45902411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3509962720 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 235517690 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509962720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3509962720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.3380131616 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 154614953 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380131616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.3380131616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.4112247329 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 178238070 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112247329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.4112247329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.3511186361 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 192350730 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511186361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.3511186361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.2254191913 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 263413727 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:59:47 PM UTC 24 |
| Finished | Sep 18 12:59:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254191913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2254191913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.3548439881 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 161026010 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:59:50 PM UTC 24 |
| Finished | Sep 18 12:59:53 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548439881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.3548439881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.3522725948 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 81675600 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 12:59:50 PM UTC 24 |
| Finished | Sep 18 12:59:53 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522725948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.3522725948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3425556762 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 16532217290 ps |
| CPU time | 49.89 seconds |
| Started | Sep 18 12:59:50 PM UTC 24 |
| Finished | Sep 18 01:00:42 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425556762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3425556762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.3880303789 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 163149968 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:59:50 PM UTC 24 |
| Finished | Sep 18 12:59:53 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880303789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.3880303789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.1387982818 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 173243870 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387982818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.1387982818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.866388548 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 229875762 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866388548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_random_length_in_transaction.866388548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2084438225 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 189266007 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084438225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2084438225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.660718156 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 20161880181 ps |
| CPU time | 27.84 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660718156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_resume_link_active.660718156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.3981956039 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 140444252 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981956039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.3981956039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.3564341424 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 281876405 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:55 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564341424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.3564341424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.718767469 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 164822181 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718767469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_setup_stage.718767469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.2838553688 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 140920612 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:59:52 PM UTC 24 |
| Finished | Sep 18 12:59:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838553688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.2838553688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.2773661863 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 209020063 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:59:53 PM UTC 24 |
| Finished | Sep 18 12:59:56 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773661863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.2773661863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.322352821 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 2462504252 ps |
| CPU time | 22.68 seconds |
| Started | Sep 18 12:59:53 PM UTC 24 |
| Finished | Sep 18 01:00:17 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=322352821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.322352821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.4048674841 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 159473882 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:59:53 PM UTC 24 |
| Finished | Sep 18 12:59:56 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048674841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.4048674841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.3203512931 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 210760402 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:59:53 PM UTC 24 |
| Finished | Sep 18 12:59:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203512931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.3203512931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.4135548782 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 407467037 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 12:59:58 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135548782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.4135548782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1766551359 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 2189979020 ps |
| CPU time | 16.39 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 01:00:13 PM UTC 24 |
| Peak memory | 228704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766551359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1766551359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.2032877376 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 5002773980 ps |
| CPU time | 31.48 seconds |
| Started | Sep 18 12:59:37 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032877376 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.2032877376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.4269017817 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 480758187 ps |
| CPU time | 2.6 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 12:59:59 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4269017817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.4269017817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.2125782544 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 294103582 ps |
| CPU time | 0.95 seconds |
| Started | Sep 18 01:10:08 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125782544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2125782544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.125484474 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 553467902 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=125484474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_t x_rx_disruption.125484474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1395689198 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 465992577 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395689198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1395689198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.2764290719 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 549632875 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2764290719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.2764290719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.3491012495 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 171157538 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491012495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.3491012495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.1214408731 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 448374901 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1214408731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.1214408731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.2328711674 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 532207023 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2328711674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.2328711674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.1803897683 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 502341250 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803897683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.1803897683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.2627850032 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 566228459 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2627850032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.2627850032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.878652833 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 286678707 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:10:10 PM UTC 24 |
| Finished | Sep 18 01:10:13 PM UTC 24 |
| Peak memory | 215376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878652833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.878652833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.2380291382 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 572011659 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:13 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380291382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.2380291382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.2370529526 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 234730542 ps |
| CPU time | 0.91 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370529526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.2370529526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.1674452180 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 499426689 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1674452180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.1674452180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.655032243 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 536031591 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=655032243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.655032243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.2020813119 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 568848950 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:18 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2020813119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.2020813119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.1418430957 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 55443843 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:00:13 PM UTC 24 |
| Finished | Sep 18 01:00:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418430957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.1418430957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.4059807199 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 11118808578 ps |
| CPU time | 14.69 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 01:00:11 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059807199 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.4059807199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.3705067799 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 19726028273 ps |
| CPU time | 23.52 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 01:00:20 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705067799 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.3705067799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.1811181243 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 25305612555 ps |
| CPU time | 36.73 seconds |
| Started | Sep 18 12:59:55 PM UTC 24 |
| Finished | Sep 18 01:00:34 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811181243 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.1811181243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.136944468 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 150656411 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 12:59:59 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=136944468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_av_buffer.136944468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.272184704 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 145630451 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 12:59:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272184704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_bitstuff_err.272184704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.443862291 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 294532355 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:00:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443862291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_data_toggle_clear.443862291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2989228325 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 871599199 ps |
| CPU time | 3.2 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989228325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2989228325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.668431378 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 34306279678 ps |
| CPU time | 62.67 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:01:01 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668431378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_device_address.668431378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.1444303256 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 649236639 ps |
| CPU time | 4.67 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:00:03 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444303256 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.1444303256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.1620013319 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 606284523 ps |
| CPU time | 1.98 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:00:00 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620013319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.1620013319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.767451836 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 148486806 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:59:59 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767451836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_disconnected.767451836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_enable.1218835332 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 70666605 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 12:59:59 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218835332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.1218835332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3417908997 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 812976187 ps |
| CPU time | 3.22 seconds |
| Started | Sep 18 12:59:59 PM UTC 24 |
| Finished | Sep 18 01:00:03 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417908997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3417908997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.230394492 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 294853968 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:59:59 PM UTC 24 |
| Finished | Sep 18 01:00:02 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230394492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.230394492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.1461734317 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 264755244 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:59:59 PM UTC 24 |
| Finished | Sep 18 01:00:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461734317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.1461734317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.825658261 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 438499880 ps |
| CPU time | 3.05 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:00:05 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825658261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_fifo_rst.825658261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.3832942015 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 170270324 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:00:07 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832942015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.3832942015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.64129619 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 160324698 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:00:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64129619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_in_stall.64129619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.4090467402 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 224133340 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:00:08 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090467402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.4090467402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.1090609272 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 3766961235 ps |
| CPU time | 99.56 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:01:47 PM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090609272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.1090609272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.4171892828 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 10973133502 ps |
| CPU time | 77.32 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:01:24 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171892828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.4171892828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.3980041571 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 281640537 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:00:01 PM UTC 24 |
| Finished | Sep 18 01:00:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980041571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.3980041571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.3300843280 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 9201006493 ps |
| CPU time | 13.86 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300843280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.3300843280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.3420685775 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 9778883838 ps |
| CPU time | 13.97 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420685775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.3420685775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.932630171 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 2627783290 ps |
| CPU time | 71.39 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:01:19 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932630171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.932630171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.1312404868 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 2653432120 ps |
| CPU time | 80.27 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:01:28 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312404868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.1312404868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.3423555202 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 268202887 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:09 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423555202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.3423555202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.1659211119 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 190962543 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:08 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659211119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.1659211119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1872092068 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 3000753729 ps |
| CPU time | 79.16 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:01:27 PM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872092068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1872092068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.2960286992 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 1556505043 ps |
| CPU time | 11.22 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960286992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.2960286992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.1850985107 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 157416900 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:00:03 PM UTC 24 |
| Finished | Sep 18 01:00:08 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850985107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.1850985107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.3539434715 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 155267013 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539434715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3539434715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.3687528625 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 202902256 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:11 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687528625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.3687528625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3926087884 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 188363951 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926087884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3926087884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.1657793144 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 171404547 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657793144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.1657793144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.316640389 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 182635748 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316640389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pending_in_trans.316640389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.3821219085 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 295086894 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:00:08 PM UTC 24 |
| Finished | Sep 18 01:00:10 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821219085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.3821219085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.323712448 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 145579452 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:00:09 PM UTC 24 |
| Finished | Sep 18 01:00:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323712448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.323712448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2108851577 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 35914817 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:00:09 PM UTC 24 |
| Finished | Sep 18 01:00:11 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108851577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2108851577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.1149426684 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 18775115368 ps |
| CPU time | 56.07 seconds |
| Started | Sep 18 01:00:09 PM UTC 24 |
| Finished | Sep 18 01:01:07 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149426684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.1149426684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3024704989 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 180460834 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:09 PM UTC 24 |
| Finished | Sep 18 01:00:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024704989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3024704989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.2247597893 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 232635008 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:00:09 PM UTC 24 |
| Finished | Sep 18 01:00:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247597893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.2247597893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.1650234076 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 216643250 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:00:10 PM UTC 24 |
| Finished | Sep 18 01:00:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650234076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.1650234076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.586133892 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 172073352 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586133892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.586133892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.856939099 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 20205785884 ps |
| CPU time | 26.69 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:39 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856939099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.856939099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.1540679574 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 166014882 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1540679574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.1540679574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.1649802070 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 363187102 ps |
| CPU time | 2.16 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649802070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.1649802070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.1676377074 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 148160300 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676377074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.1676377074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.4244231635 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 154518865 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244231635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.4244231635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.1975999666 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 249692516 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975999666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.1975999666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.394330713 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 2814616434 ps |
| CPU time | 82.14 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:01:36 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394330713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.394330713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.4206903635 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 220013581 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:00:11 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206903635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.4206903635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.3515776650 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 185848604 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:00:12 PM UTC 24 |
| Finished | Sep 18 01:00:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515776650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.3515776650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.2828940087 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 515270289 ps |
| CPU time | 2.14 seconds |
| Started | Sep 18 01:00:13 PM UTC 24 |
| Finished | Sep 18 01:00:16 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828940087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.2828940087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.2846605586 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 3767617255 ps |
| CPU time | 27.02 seconds |
| Started | Sep 18 01:00:13 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846605586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.2846605586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.472932820 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 2449692151 ps |
| CPU time | 20.78 seconds |
| Started | Sep 18 12:59:57 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=472932820 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.472932820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1485796829 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 462072739 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:00:13 PM UTC 24 |
| Finished | Sep 18 01:00:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1485796829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.1485796829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.59292014 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 611141753 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:17 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=59292014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.59292014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.3575479459 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 486399388 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3575479459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.3575479459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.1680740329 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 400394839 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:18 PM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680740329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.1680740329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.622587686 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 455061465 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=622587686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_t x_rx_disruption.622587686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.1972376351 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 166463916 ps |
| CPU time | 0.81 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972376351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.1972376351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2523699309 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 581421222 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2523699309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2523699309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.1947931565 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 602010813 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:15 PM UTC 24 |
| Finished | Sep 18 01:10:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1947931565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.1947931565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.854877746 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 188869244 ps |
| CPU time | 0.83 seconds |
| Started | Sep 18 01:10:16 PM UTC 24 |
| Finished | Sep 18 01:10:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854877746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.854877746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.3275816549 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 546987760 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:17 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3275816549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.3275816549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.1614799513 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 284461356 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:10:17 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1614799513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.1614799513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.646515640 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 437632171 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:10:18 PM UTC 24 |
| Finished | Sep 18 01:10:31 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=646515640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.646515640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.980574973 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 663070330 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=980574973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_t x_rx_disruption.980574973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.4267652177 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 404432810 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267652177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.4267652177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.81519806 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 520578065 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=81519806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_tx _rx_disruption.81519806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.4255541025 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 664211166 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255541025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.4255541025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3040046307 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 457400704 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3040046307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3040046307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.3723574120 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 273428349 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723574120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.3723574120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.859056080 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 448427109 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=859056080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_t x_rx_disruption.859056080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.2297346120 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 39189591 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 12:52:16 PM UTC 24 |
| Finished | Sep 18 12:52:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297346120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.2297346120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.2338320872 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 12142551536 ps |
| CPU time | 22.46 seconds |
| Started | Sep 18 12:51:31 PM UTC 24 |
| Finished | Sep 18 12:51:55 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338320872 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.2338320872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3828493462 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 15077439380 ps |
| CPU time | 26.39 seconds |
| Started | Sep 18 12:51:32 PM UTC 24 |
| Finished | Sep 18 12:52:00 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828493462 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.3828493462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.3047500090 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 24891392290 ps |
| CPU time | 44.55 seconds |
| Started | Sep 18 12:51:32 PM UTC 24 |
| Finished | Sep 18 12:52:19 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047500090 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.3047500090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.455997996 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 144232084 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:51:33 PM UTC 24 |
| Finished | Sep 18 12:51:35 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455997996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_buffer.455997996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.1673605606 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 195133566 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:51:34 PM UTC 24 |
| Finished | Sep 18 12:51:36 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673605606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.1673605606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.443285750 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 134379504 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 12:51:34 PM UTC 24 |
| Finished | Sep 18 12:51:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443285750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_av_overflow.443285750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1232068215 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 195765350 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:51:35 PM UTC 24 |
| Finished | Sep 18 12:51:37 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232068215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1232068215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.4236103062 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 435566495 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 12:51:35 PM UTC 24 |
| Finished | Sep 18 12:51:38 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236103062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.4236103062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1217388579 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 3755698463 ps |
| CPU time | 25.57 seconds |
| Started | Sep 18 12:51:35 PM UTC 24 |
| Finished | Sep 18 12:52:02 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217388579 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1217388579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.2148753128 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 557386862 ps |
| CPU time | 2.67 seconds |
| Started | Sep 18 12:51:37 PM UTC 24 |
| Finished | Sep 18 12:51:41 PM UTC 24 |
| Peak memory | 217632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148753128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.2148753128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.3170786582 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 149728571 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:51:37 PM UTC 24 |
| Finished | Sep 18 12:51:40 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170786582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.3170786582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_enable.3026928034 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 41281145 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 12:51:38 PM UTC 24 |
| Finished | Sep 18 12:51:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026928034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.3026928034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1148550485 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 903122428 ps |
| CPU time | 3.26 seconds |
| Started | Sep 18 12:51:40 PM UTC 24 |
| Finished | Sep 18 12:51:44 PM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148550485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.1148550485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1225790546 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 550539599 ps |
| CPU time | 2.6 seconds |
| Started | Sep 18 12:51:40 PM UTC 24 |
| Finished | Sep 18 12:51:43 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225790546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.1225790546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.3973523464 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 260912276 ps |
| CPU time | 3.53 seconds |
| Started | Sep 18 12:51:41 PM UTC 24 |
| Finished | Sep 18 12:51:45 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973523464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.3973523464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.3175349322 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 92169910680 ps |
| CPU time | 195.83 seconds |
| Started | Sep 18 12:51:41 PM UTC 24 |
| Finished | Sep 18 12:55:00 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175349322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.3175349322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.3188743453 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 86243388574 ps |
| CPU time | 154.82 seconds |
| Started | Sep 18 12:51:42 PM UTC 24 |
| Finished | Sep 18 12:54:19 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3188743453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.3188743453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.3411484214 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 87113394632 ps |
| CPU time | 187.56 seconds |
| Started | Sep 18 12:51:42 PM UTC 24 |
| Finished | Sep 18 12:54:52 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411484214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.3411484214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.822718970 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 104961657023 ps |
| CPU time | 194.98 seconds |
| Started | Sep 18 12:51:43 PM UTC 24 |
| Finished | Sep 18 12:55:02 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=822718970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.822718970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.1714270453 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 121244368286 ps |
| CPU time | 258.43 seconds |
| Started | Sep 18 12:51:43 PM UTC 24 |
| Finished | Sep 18 12:56:05 PM UTC 24 |
| Peak memory | 220840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714270453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.1714270453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.2366536442 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 235015558 ps |
| CPU time | 2.16 seconds |
| Started | Sep 18 12:51:45 PM UTC 24 |
| Finished | Sep 18 12:51:48 PM UTC 24 |
| Peak memory | 228204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366536442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.2366536442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.4248582836 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 139785298 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:51:45 PM UTC 24 |
| Finished | Sep 18 12:51:47 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248582836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.4248582836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.1975942148 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 173428842 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 12:51:45 PM UTC 24 |
| Finished | Sep 18 12:51:47 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975942148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.1975942148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.4028403961 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 4580625068 ps |
| CPU time | 49.26 seconds |
| Started | Sep 18 12:51:45 PM UTC 24 |
| Finished | Sep 18 12:52:35 PM UTC 24 |
| Peak memory | 234976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028403961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.4028403961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.106971258 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 10111174791 ps |
| CPU time | 116.69 seconds |
| Started | Sep 18 12:51:46 PM UTC 24 |
| Finished | Sep 18 12:53:45 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=106971258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.106971258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.873099632 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 239000715 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 12:51:48 PM UTC 24 |
| Finished | Sep 18 12:51:51 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873099632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_in_err.873099632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.3215333453 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 26196700811 ps |
| CPU time | 43.87 seconds |
| Started | Sep 18 12:51:48 PM UTC 24 |
| Finished | Sep 18 12:52:33 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215333453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.3215333453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.4024657129 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 5846745816 ps |
| CPU time | 14.91 seconds |
| Started | Sep 18 12:51:49 PM UTC 24 |
| Finished | Sep 18 12:52:05 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024657129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.4024657129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.1509603526 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 3767129560 ps |
| CPU time | 33.72 seconds |
| Started | Sep 18 12:51:52 PM UTC 24 |
| Finished | Sep 18 12:52:27 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509603526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.1509603526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.3381271947 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 4217783855 ps |
| CPU time | 120.87 seconds |
| Started | Sep 18 12:51:52 PM UTC 24 |
| Finished | Sep 18 12:53:55 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381271947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.3381271947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3060801428 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 251621265 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 12:51:52 PM UTC 24 |
| Finished | Sep 18 12:51:54 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060801428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.3060801428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.1361398226 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 247728579 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 12:51:52 PM UTC 24 |
| Finished | Sep 18 12:51:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361398226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.1361398226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.2621241518 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 1966244995 ps |
| CPU time | 16.26 seconds |
| Started | Sep 18 12:51:53 PM UTC 24 |
| Finished | Sep 18 12:52:10 PM UTC 24 |
| Peak memory | 234672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621241518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.2621241518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.1734788369 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 1876530579 ps |
| CPU time | 15.81 seconds |
| Started | Sep 18 12:51:53 PM UTC 24 |
| Finished | Sep 18 12:52:10 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734788369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.1734788369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.447699658 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 2530202926 ps |
| CPU time | 17.22 seconds |
| Started | Sep 18 12:51:55 PM UTC 24 |
| Finished | Sep 18 12:52:14 PM UTC 24 |
| Peak memory | 218424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447699658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.447699658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.886715612 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 176637807 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:51:55 PM UTC 24 |
| Finished | Sep 18 12:51:58 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886715612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.886715612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.1299043107 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 164129962 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:51:55 PM UTC 24 |
| Finished | Sep 18 12:51:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299043107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.1299043107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2776207000 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 194818233 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:51:57 PM UTC 24 |
| Finished | Sep 18 12:51:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776207000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2776207000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2365911766 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 222791836 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:51:57 PM UTC 24 |
| Finished | Sep 18 12:51:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365911766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2365911766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.395072247 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 184610981 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:51:57 PM UTC 24 |
| Finished | Sep 18 12:51:59 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395072247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_out_stall.395072247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.105785189 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 195010978 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:51:59 PM UTC 24 |
| Finished | Sep 18 12:52:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105785189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_out_trans_nak.105785189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.34219777 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 147333539 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:51:59 PM UTC 24 |
| Finished | Sep 18 12:52:01 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=34219777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.34219777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.230726418 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 215422460 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 12:52:00 PM UTC 24 |
| Finished | Sep 18 12:52:02 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230726418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.230726418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.4170156686 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 260397703 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 12:52:00 PM UTC 24 |
| Finished | Sep 18 12:52:03 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170156686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.4170156686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.594564572 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 157112546 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:52:00 PM UTC 24 |
| Finished | Sep 18 12:52:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594564572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.594564572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3310263260 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 94412245 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 12:52:01 PM UTC 24 |
| Finished | Sep 18 12:52:03 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310263260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3310263260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2143590267 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 17170169040 ps |
| CPU time | 50.44 seconds |
| Started | Sep 18 12:52:02 PM UTC 24 |
| Finished | Sep 18 12:52:54 PM UTC 24 |
| Peak memory | 232544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143590267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2143590267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.3106053888 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 199200645 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:52:02 PM UTC 24 |
| Finished | Sep 18 12:52:05 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106053888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.3106053888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.2607920867 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 220468161 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:52:03 PM UTC 24 |
| Finished | Sep 18 12:52:06 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607920867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.2607920867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.2615729202 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 6928531280 ps |
| CPU time | 34.17 seconds |
| Started | Sep 18 12:52:04 PM UTC 24 |
| Finished | Sep 18 12:52:40 PM UTC 24 |
| Peak memory | 232504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615729202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.2615729202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.634005401 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 10078020064 ps |
| CPU time | 189.7 seconds |
| Started | Sep 18 12:52:04 PM UTC 24 |
| Finished | Sep 18 12:55:17 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=634005401 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.634005401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2140339601 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 207279961 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 12:52:03 PM UTC 24 |
| Finished | Sep 18 12:52:06 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140339601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.2140339601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.340989717 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 177872780 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:52:03 PM UTC 24 |
| Finished | Sep 18 12:52:06 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340989717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.340989717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.656376283 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 20147916602 ps |
| CPU time | 58.95 seconds |
| Started | Sep 18 12:52:06 PM UTC 24 |
| Finished | Sep 18 12:53:06 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656376283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_resume_link_active.656376283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.1455788509 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 139536943 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:52:06 PM UTC 24 |
| Finished | Sep 18 12:52:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455788509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.1455788509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.1376951628 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 390770263 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 12:52:06 PM UTC 24 |
| Finished | Sep 18 12:52:09 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376951628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.1376951628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.538985168 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 200086618 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:52:07 PM UTC 24 |
| Finished | Sep 18 12:52:09 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=538985168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_pid_err.538985168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1666093603 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 489078725 ps |
| CPU time | 2.48 seconds |
| Started | Sep 18 12:52:15 PM UTC 24 |
| Finished | Sep 18 12:52:18 PM UTC 24 |
| Peak memory | 252072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666093603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1666093603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.3618841079 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 403706013 ps |
| CPU time | 2.57 seconds |
| Started | Sep 18 12:52:07 PM UTC 24 |
| Finished | Sep 18 12:52:11 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618841079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.3618841079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.2585672641 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 307402930 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:52:07 PM UTC 24 |
| Finished | Sep 18 12:52:09 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585672641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.2585672641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.596822962 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 168860727 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:52:09 PM UTC 24 |
| Finished | Sep 18 12:52:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596822962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_setup_stage.596822962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1173572782 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 201640774 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:52:11 PM UTC 24 |
| Finished | Sep 18 12:52:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173572782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1173572782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3182900564 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 260816261 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 12:52:11 PM UTC 24 |
| Finished | Sep 18 12:52:14 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182900564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3182900564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.2677257160 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 3058960969 ps |
| CPU time | 91.35 seconds |
| Started | Sep 18 12:52:11 PM UTC 24 |
| Finished | Sep 18 12:53:44 PM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677257160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2677257160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.1499844211 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 182144579 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:52:11 PM UTC 24 |
| Finished | Sep 18 12:52:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499844211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.1499844211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.585220832 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 170313563 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:52:12 PM UTC 24 |
| Finished | Sep 18 12:52:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=585220832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_stall_trans.585220832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.2407356313 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 969929931 ps |
| CPU time | 4.6 seconds |
| Started | Sep 18 12:52:12 PM UTC 24 |
| Finished | Sep 18 12:52:18 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407356313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.2407356313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.1030637117 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 2745536565 ps |
| CPU time | 66.34 seconds |
| Started | Sep 18 12:52:12 PM UTC 24 |
| Finished | Sep 18 12:53:20 PM UTC 24 |
| Peak memory | 228720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030637117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.1030637117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.2212248056 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 8973232969 ps |
| CPU time | 60.12 seconds |
| Started | Sep 18 12:52:14 PM UTC 24 |
| Finished | Sep 18 12:53:16 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212248056 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.2212248056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1004033507 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 1433239420 ps |
| CPU time | 36.24 seconds |
| Started | Sep 18 12:51:36 PM UTC 24 |
| Finished | Sep 18 12:52:14 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004033507 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.1004033507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.2995927329 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 560233949 ps |
| CPU time | 2.86 seconds |
| Started | Sep 18 12:52:14 PM UTC 24 |
| Finished | Sep 18 12:52:18 PM UTC 24 |
| Peak memory | 217628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2995927329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.2995927329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.1787323578 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 29954709 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 01:00:27 PM UTC 24 |
| Finished | Sep 18 01:00:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787323578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.1787323578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.2978638200 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 6015623926 ps |
| CPU time | 8.23 seconds |
| Started | Sep 18 01:00:13 PM UTC 24 |
| Finished | Sep 18 01:00:22 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978638200 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.2978638200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.4134450890 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 18511426045 ps |
| CPU time | 27.97 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:43 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134450890 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.4134450890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.1229698212 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 24327826577 ps |
| CPU time | 39.37 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:55 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229698212 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.1229698212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.4121561504 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 153035646 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:17 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121561504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.4121561504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.2639382734 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 172677983 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:17 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639382734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.2639382734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.2884718035 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 201959200 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:17 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884718035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.2884718035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1484418795 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 514179760 ps |
| CPU time | 2.46 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:00:18 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484418795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1484418795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.2884129143 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 30236602236 ps |
| CPU time | 55.55 seconds |
| Started | Sep 18 01:00:14 PM UTC 24 |
| Finished | Sep 18 01:01:12 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884129143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.2884129143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1529147149 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 749433939 ps |
| CPU time | 15.88 seconds |
| Started | Sep 18 01:00:15 PM UTC 24 |
| Finished | Sep 18 01:00:32 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529147149 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1529147149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.2754658454 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 639733975 ps |
| CPU time | 2.23 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754658454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.2754658454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.3895541847 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 198566922 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:18 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895541847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.3895541847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_enable.4286352658 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 58310504 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:18 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286352658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.4286352658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.234304359 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 908590200 ps |
| CPU time | 3.73 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234304359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.234304359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.573626497 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 433850509 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=573626497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.573626497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.739144559 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 324890385 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 01:00:16 PM UTC 24 |
| Finished | Sep 18 01:00:19 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739144559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_fifo_levels.739144559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.2253423051 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 503440362 ps |
| CPU time | 4.67 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253423051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.2253423051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.3129650477 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 243323984 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129650477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.3129650477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.3681703398 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 144790583 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:20 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681703398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.3681703398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.2233310060 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 212527144 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:20 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233310060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.2233310060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.3874185768 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 2615727349 ps |
| CPU time | 22.19 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874185768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.3874185768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.1488397179 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 11659698860 ps |
| CPU time | 80.17 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:01:40 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488397179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.1488397179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.3029650834 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 230461698 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:00:18 PM UTC 24 |
| Finished | Sep 18 01:00:21 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029650834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.3029650834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.663623608 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 32105785501 ps |
| CPU time | 64.8 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:01:27 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663623608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_link_resume.663623608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.3727766984 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 3571390397 ps |
| CPU time | 5.41 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:00:27 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727766984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.3727766984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.3758480923 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 3444787482 ps |
| CPU time | 96.88 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758480923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.3758480923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.1053100164 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 2553488952 ps |
| CPU time | 19.49 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053100164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.1053100164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.2909581200 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 276881578 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:00:23 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909581200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2909581200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.3848388552 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 200655475 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:00:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848388552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.3848388552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.4000711613 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 3099824462 ps |
| CPU time | 86.87 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:01:49 PM UTC 24 |
| Peak memory | 230644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000711613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.4000711613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.3005725539 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 2743430043 ps |
| CPU time | 25.3 seconds |
| Started | Sep 18 01:00:20 PM UTC 24 |
| Finished | Sep 18 01:00:47 PM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005725539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.3005725539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2200768669 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 180178534 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:00:21 PM UTC 24 |
| Finished | Sep 18 01:00:23 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2200768669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2200768669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.108422766 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 165154748 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:00:21 PM UTC 24 |
| Finished | Sep 18 01:00:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108422766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.108422766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.531094527 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 202371544 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:25 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531094527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_nak_trans.531094527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.1187363441 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 213829454 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187363441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.1187363441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2302499464 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 170217868 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302499464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.2302499464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.692658544 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 155298143 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692658544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_out_trans_nak.692658544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.1919978755 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 193698042 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:25 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919978755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.1919978755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.595455611 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 269333563 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:25 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=595455611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.595455611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2879245229 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 153732004 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879245229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2879245229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.2930622762 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 40140130 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:24 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930622762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.2930622762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.3604257551 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 7031227786 ps |
| CPU time | 21.99 seconds |
| Started | Sep 18 01:00:22 PM UTC 24 |
| Finished | Sep 18 01:00:46 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604257551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.3604257551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.1946727225 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 171064028 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:00:24 PM UTC 24 |
| Finished | Sep 18 01:00:26 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946727225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.1946727225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.3574934545 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 229252674 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:00:24 PM UTC 24 |
| Finished | Sep 18 01:00:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574934545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.3574934545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.2732622886 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 236003877 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:00:24 PM UTC 24 |
| Finished | Sep 18 01:00:26 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732622886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.2732622886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.535414391 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 261032126 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:00:24 PM UTC 24 |
| Finished | Sep 18 01:00:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535414391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.535414391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.436863122 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 171509868 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436863122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_rx_crc_err.436863122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.2435206853 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 251259160 ps |
| CPU time | 1.96 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435206853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.2435206853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.3617014010 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 146005805 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617014010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.3617014010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.1763005883 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 147056867 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763005883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.1763005883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.2446260304 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 261923207 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446260304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.2446260304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.2184419711 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 3053753032 ps |
| CPU time | 28.53 seconds |
| Started | Sep 18 01:00:25 PM UTC 24 |
| Finished | Sep 18 01:00:55 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184419711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2184419711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1564588709 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 179924906 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:00:26 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564588709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.1564588709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.3180424541 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 156802165 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:26 PM UTC 24 |
| Finished | Sep 18 01:00:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180424541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.3180424541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.3929389390 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 878064668 ps |
| CPU time | 3.13 seconds |
| Started | Sep 18 01:00:27 PM UTC 24 |
| Finished | Sep 18 01:00:31 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929389390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.3929389390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.3388283408 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 2599458059 ps |
| CPU time | 66.35 seconds |
| Started | Sep 18 01:00:27 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388283408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.3388283408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.2913542750 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 4340242345 ps |
| CPU time | 28.13 seconds |
| Started | Sep 18 01:00:15 PM UTC 24 |
| Finished | Sep 18 01:00:44 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913542750 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.2913542750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.3241463057 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 507052278 ps |
| CPU time | 2.53 seconds |
| Started | Sep 18 01:00:27 PM UTC 24 |
| Finished | Sep 18 01:00:31 PM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3241463057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.3241463057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.3802418925 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 564288317 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3802418925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.3802418925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.2676502928 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 614653307 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2676502928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.2676502928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.3299796410 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 443035804 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3299796410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.3299796410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.211376329 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 610691796 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:20 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=211376329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_t x_rx_disruption.211376329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.848731068 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 580848980 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=848731068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_t x_rx_disruption.848731068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.3243220152 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 508338258 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3243220152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.3243220152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3199306342 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 539392684 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3199306342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3199306342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.2066548401 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 545883742 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2066548401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.2066548401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1917454500 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 516816558 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1917454500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1917454500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.3659793315 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 537327502 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:21 PM UTC 24 |
| Finished | Sep 18 01:10:24 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659793315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.3659793315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.2590972988 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 38931836 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:00:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590972988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.2590972988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.2334708014 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 5963109343 ps |
| CPU time | 13.25 seconds |
| Started | Sep 18 01:00:28 PM UTC 24 |
| Finished | Sep 18 01:00:42 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334708014 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.2334708014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.2084183796 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 14250738183 ps |
| CPU time | 21.16 seconds |
| Started | Sep 18 01:00:28 PM UTC 24 |
| Finished | Sep 18 01:00:50 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084183796 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.2084183796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3658093658 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 24777460661 ps |
| CPU time | 42.2 seconds |
| Started | Sep 18 01:00:28 PM UTC 24 |
| Finished | Sep 18 01:01:11 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658093658 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3658093658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.2056019305 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 182770663 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056019305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.2056019305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.3180148102 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 164919677 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:32 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180148102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.3180148102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.3305205387 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 554715002 ps |
| CPU time | 2.98 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:34 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305205387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.3305205387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.2850845440 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 1216921319 ps |
| CPU time | 5.85 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:36 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850845440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.2850845440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.250976067 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 24882765613 ps |
| CPU time | 39.4 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:01:10 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250976067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_device_address.250976067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.1563730244 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 5620003288 ps |
| CPU time | 35.22 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563730244 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1563730244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.4256184449 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 747914653 ps |
| CPU time | 2.31 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:33 PM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256184449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.4256184449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.3170010066 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 143041739 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:00:31 PM UTC 24 |
| Finished | Sep 18 01:00:33 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170010066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.3170010066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_enable.3970553414 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 44376905 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:00:31 PM UTC 24 |
| Finished | Sep 18 01:00:33 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970553414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.3970553414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.2255717502 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 1007587545 ps |
| CPU time | 4.4 seconds |
| Started | Sep 18 01:00:31 PM UTC 24 |
| Finished | Sep 18 01:00:36 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255717502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.2255717502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.932692628 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 501923171 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 01:00:31 PM UTC 24 |
| Finished | Sep 18 01:00:34 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932692628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.932692628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.930750246 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 157409210 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:00:32 PM UTC 24 |
| Finished | Sep 18 01:00:35 PM UTC 24 |
| Peak memory | 215572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930750246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_fifo_levels.930750246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.3818444278 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 406342655 ps |
| CPU time | 3.12 seconds |
| Started | Sep 18 01:00:33 PM UTC 24 |
| Finished | Sep 18 01:00:37 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818444278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.3818444278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.4200884690 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 190986468 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:00:33 PM UTC 24 |
| Finished | Sep 18 01:00:35 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200884690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.4200884690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.1013768468 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 142711786 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:00:33 PM UTC 24 |
| Finished | Sep 18 01:00:35 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013768468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.1013768468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.461257295 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 214852236 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:00:33 PM UTC 24 |
| Finished | Sep 18 01:00:36 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461257295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_trans.461257295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3161557947 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 3357519178 ps |
| CPU time | 87.72 seconds |
| Started | Sep 18 01:00:33 PM UTC 24 |
| Finished | Sep 18 01:02:02 PM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161557947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3161557947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.579469101 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 10224648810 ps |
| CPU time | 65.06 seconds |
| Started | Sep 18 01:00:34 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579469101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.579469101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.72910979 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 240765019 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:00:34 PM UTC 24 |
| Finished | Sep 18 01:00:36 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=72910979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_link_in_err.72910979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.760224758 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 13510996783 ps |
| CPU time | 31.98 seconds |
| Started | Sep 18 01:00:34 PM UTC 24 |
| Finished | Sep 18 01:01:07 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760224758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_resume.760224758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.798819958 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 4329044735 ps |
| CPU time | 8.67 seconds |
| Started | Sep 18 01:00:35 PM UTC 24 |
| Finished | Sep 18 01:00:45 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798819958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.798819958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.3881814476 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 2746251667 ps |
| CPU time | 73.71 seconds |
| Started | Sep 18 01:00:35 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 230644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881814476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3881814476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.3209650652 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 2337555270 ps |
| CPU time | 59.89 seconds |
| Started | Sep 18 01:00:36 PM UTC 24 |
| Finished | Sep 18 01:01:37 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209650652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.3209650652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2622699263 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 254665157 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:00:36 PM UTC 24 |
| Finished | Sep 18 01:00:38 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622699263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2622699263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.4059045353 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 191892655 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:00:37 PM UTC 24 |
| Finished | Sep 18 01:00:39 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059045353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.4059045353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.3768061776 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 2644794338 ps |
| CPU time | 66.8 seconds |
| Started | Sep 18 01:00:37 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 235108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768061776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.3768061776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.1332524365 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 3887600406 ps |
| CPU time | 31.53 seconds |
| Started | Sep 18 01:00:37 PM UTC 24 |
| Finished | Sep 18 01:01:10 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332524365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.1332524365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.3252690596 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 157271524 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:37 PM UTC 24 |
| Finished | Sep 18 01:00:39 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252690596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.3252690596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1987749901 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 151139931 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:00:37 PM UTC 24 |
| Finished | Sep 18 01:00:40 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987749901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.1987749901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.2844354633 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 207215815 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:00:38 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844354633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.2844354633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.1103032106 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 196727770 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:00:39 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 215168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103032106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.1103032106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.2466471050 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 157328135 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:00:39 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466471050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.2466471050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2676703218 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 169118302 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:00:39 PM UTC 24 |
| Finished | Sep 18 01:00:41 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676703218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.2676703218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.641851528 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 165761808 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:00:40 PM UTC 24 |
| Finished | Sep 18 01:00:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=641851528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.641851528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.3800566167 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 202477266 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:00:40 PM UTC 24 |
| Finished | Sep 18 01:00:43 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3800566167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.3800566167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.561272258 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 159346465 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:00:40 PM UTC 24 |
| Finished | Sep 18 01:00:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561272258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.561272258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.274962344 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 82372880 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:00:40 PM UTC 24 |
| Finished | Sep 18 01:00:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=274962344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_phy_pins_sense.274962344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.1007509657 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 18455601197 ps |
| CPU time | 51.56 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007509657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.1007509657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.2265269993 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 174321490 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265269993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.2265269993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.2309772872 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 202047077 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:44 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309772872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.2309772872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.3640539360 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 250260667 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640539360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.3640539360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.3902602958 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 166315521 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:44 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902602958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.3902602958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1153104293 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 176805046 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:44 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153104293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.1153104293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.4032215061 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 337180998 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:00:42 PM UTC 24 |
| Finished | Sep 18 01:00:45 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032215061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.4032215061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.2369660161 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 151772408 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:00:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369660161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.2369660161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3072989493 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 214136125 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:00:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072989493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3072989493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.4237823741 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 280258842 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:00:47 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237823741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.4237823741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.3756249217 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 1867686370 ps |
| CPU time | 23.11 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:01:09 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756249217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.3756249217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.498491723 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 208443442 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:00:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498491723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.498491723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.2432427883 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 176052121 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:00:46 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432427883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.2432427883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2580175085 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 866464380 ps |
| CPU time | 4.15 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:00:51 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580175085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2580175085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.3876928633 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 2844027351 ps |
| CPU time | 73.68 seconds |
| Started | Sep 18 01:00:44 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876928633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.3876928633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.385415744 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 610139850 ps |
| CPU time | 5.57 seconds |
| Started | Sep 18 01:00:29 PM UTC 24 |
| Finished | Sep 18 01:00:36 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385415744 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.385415744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.571479406 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 609190269 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:00:49 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=571479406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.571479406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.1975863205 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 647568001 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:23 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1975863205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.1975863205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.2031613976 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 521734516 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:23 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2031613976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.2031613976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.1438125527 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 537650231 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1438125527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.1438125527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.4076908846 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 540628698 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4076908846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.4076908846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3914671009 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 552528263 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3914671009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3914671009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.3821482861 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 504851779 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3821482861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.3821482861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.2248710520 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 560640278 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2248710520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.2248710520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.2518125500 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 575369885 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2518125500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.2518125500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.2274074433 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 533751978 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2274074433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.2274074433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.2478896413 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 485279532 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2478896413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.2478896413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1801696508 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 122716082 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:01:06 PM UTC 24 |
| Finished | Sep 18 01:01:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801696508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1801696508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.1659931537 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 10266280030 ps |
| CPU time | 19.04 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659931537 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.1659931537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1384359675 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 13805675708 ps |
| CPU time | 29.42 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:01:17 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384359675 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1384359675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3759321759 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 25858467395 ps |
| CPU time | 34.07 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:01:21 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759321759 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.3759321759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.262634188 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 177023673 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:00:46 PM UTC 24 |
| Finished | Sep 18 01:00:49 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=262634188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_av_buffer.262634188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.1754118006 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 156047717 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:50 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754118006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.1754118006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.1093230363 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 530420451 ps |
| CPU time | 2.99 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:52 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093230363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.1093230363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.563783590 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 819431062 ps |
| CPU time | 4.5 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:53 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563783590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.563783590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.1994391518 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 41019881682 ps |
| CPU time | 71.67 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:02:01 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994391518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.1994391518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.1407543305 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 1263111598 ps |
| CPU time | 30.67 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:01:20 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407543305 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.1407543305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.3607712672 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 656400519 ps |
| CPU time | 3.1 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:52 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607712672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.3607712672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.3152871662 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 152936198 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:51 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152871662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.3152871662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_enable.1590581330 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 33367060 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:00:50 PM UTC 24 |
| Finished | Sep 18 01:00:52 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590581330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.1590581330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.600405158 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 951389375 ps |
| CPU time | 3.67 seconds |
| Started | Sep 18 01:00:50 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600405158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.600405158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.2320508489 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 279960088 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 01:00:50 PM UTC 24 |
| Finished | Sep 18 01:00:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320508489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.2320508489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.2249693190 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 180657433 ps |
| CPU time | 3.16 seconds |
| Started | Sep 18 01:00:50 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249693190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.2249693190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.270327912 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 219419841 ps |
| CPU time | 1.98 seconds |
| Started | Sep 18 01:00:51 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270327912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.270327912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.4023081380 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 147693804 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:00:51 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4023081380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.4023081380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.13344452 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 198531429 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:00:51 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13344452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_in_trans.13344452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.2209520880 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 4237412433 ps |
| CPU time | 42.48 seconds |
| Started | Sep 18 01:00:51 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209520880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.2209520880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.1496771429 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 10074534428 ps |
| CPU time | 69.2 seconds |
| Started | Sep 18 01:00:53 PM UTC 24 |
| Finished | Sep 18 01:02:04 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496771429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.1496771429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.2520705239 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 191077996 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:00:53 PM UTC 24 |
| Finished | Sep 18 01:00:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520705239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.2520705239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.965209266 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 13173731242 ps |
| CPU time | 20.92 seconds |
| Started | Sep 18 01:00:53 PM UTC 24 |
| Finished | Sep 18 01:01:15 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965209266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_resume.965209266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.1799873797 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 9833057011 ps |
| CPU time | 24.08 seconds |
| Started | Sep 18 01:00:53 PM UTC 24 |
| Finished | Sep 18 01:01:18 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799873797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.1799873797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.1446112552 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 5061301633 ps |
| CPU time | 47.07 seconds |
| Started | Sep 18 01:00:54 PM UTC 24 |
| Finished | Sep 18 01:01:43 PM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446112552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1446112552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.564032364 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 1499453231 ps |
| CPU time | 40.83 seconds |
| Started | Sep 18 01:00:54 PM UTC 24 |
| Finished | Sep 18 01:01:37 PM UTC 24 |
| Peak memory | 228320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=564032364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.564032364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.2486988507 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 241226569 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 01:00:54 PM UTC 24 |
| Finished | Sep 18 01:00:57 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486988507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.2486988507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.1467524176 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 192666283 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:00:54 PM UTC 24 |
| Finished | Sep 18 01:00:57 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467524176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.1467524176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1609475154 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 2497128711 ps |
| CPU time | 27.83 seconds |
| Started | Sep 18 01:00:54 PM UTC 24 |
| Finished | Sep 18 01:01:24 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609475154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1609475154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.4145781186 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 2487842436 ps |
| CPU time | 28.06 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:01:25 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145781186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.4145781186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.589101963 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 154564135 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:00:58 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589101963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.589101963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.271587979 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 196180106 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:00:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271587979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.271587979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2840711965 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 196561409 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:00:59 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840711965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2840711965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.2924490826 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 157502751 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:00:59 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924490826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.2924490826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.3675057753 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 181450016 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:56 PM UTC 24 |
| Finished | Sep 18 01:00:58 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675057753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.3675057753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1261786344 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 169356704 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:00:57 PM UTC 24 |
| Finished | Sep 18 01:01:00 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261786344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1261786344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2404313351 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 167982847 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:00:57 PM UTC 24 |
| Finished | Sep 18 01:01:00 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404313351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2404313351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.1814299624 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 248824509 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:00:59 PM UTC 24 |
| Finished | Sep 18 01:01:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814299624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.1814299624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.195313161 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 173430046 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:00:59 PM UTC 24 |
| Finished | Sep 18 01:01:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195313161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.195313161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.253284080 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 40947108 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:00:59 PM UTC 24 |
| Finished | Sep 18 01:01:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253284080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_phy_pins_sense.253284080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.3702774039 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 7727632342 ps |
| CPU time | 21.55 seconds |
| Started | Sep 18 01:01:00 PM UTC 24 |
| Finished | Sep 18 01:01:23 PM UTC 24 |
| Peak memory | 232424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702774039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.3702774039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.3558127394 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 257915489 ps |
| CPU time | 1.89 seconds |
| Started | Sep 18 01:01:00 PM UTC 24 |
| Finished | Sep 18 01:01:03 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558127394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.3558127394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.1392784925 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 321423965 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:01:00 PM UTC 24 |
| Finished | Sep 18 01:01:02 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392784925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.1392784925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3982075278 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 180943534 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:01:01 PM UTC 24 |
| Finished | Sep 18 01:01:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982075278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3982075278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2674764386 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 208394420 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:01:01 PM UTC 24 |
| Finished | Sep 18 01:01:04 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674764386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2674764386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.172045019 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 183097553 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:01:01 PM UTC 24 |
| Finished | Sep 18 01:01:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172045019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_rx_crc_err.172045019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.3088543641 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 257630923 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:01:02 PM UTC 24 |
| Finished | Sep 18 01:01:04 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088543641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.3088543641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.2504407605 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 152998598 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:01:03 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 215444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504407605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.2504407605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.438153028 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 170581545 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:01:03 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438153028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.438153028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.3861816246 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 245183645 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:01:04 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 215444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861816246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.3861816246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.1624776924 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 1628171192 ps |
| CPU time | 40.2 seconds |
| Started | Sep 18 01:01:04 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 234748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624776924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.1624776924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.1803741921 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 195837812 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:01:04 PM UTC 24 |
| Finished | Sep 18 01:01:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803741921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.1803741921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.1483875753 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 154852131 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:01:05 PM UTC 24 |
| Finished | Sep 18 01:01:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483875753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.1483875753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.4169229345 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 1292058166 ps |
| CPU time | 5.47 seconds |
| Started | Sep 18 01:01:05 PM UTC 24 |
| Finished | Sep 18 01:01:12 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169229345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.4169229345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.2475805636 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 2363913233 ps |
| CPU time | 62.86 seconds |
| Started | Sep 18 01:01:05 PM UTC 24 |
| Finished | Sep 18 01:02:09 PM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475805636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.2475805636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.1460946596 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 612409033 ps |
| CPU time | 4.77 seconds |
| Started | Sep 18 01:00:48 PM UTC 24 |
| Finished | Sep 18 01:00:54 PM UTC 24 |
| Peak memory | 217852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460946596 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.1460946596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.2348691298 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 581667111 ps |
| CPU time | 2.91 seconds |
| Started | Sep 18 01:01:05 PM UTC 24 |
| Finished | Sep 18 01:01:09 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2348691298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.2348691298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.232134516 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 531305742 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=232134516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_t x_rx_disruption.232134516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.1650922889 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 562895897 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1650922889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.1650922889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.3142047914 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 608705646 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3142047914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.3142047914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.4214669616 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 442837550 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4214669616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.4214669616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1474418986 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 601844023 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1474418986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1474418986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.1046137158 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 543680122 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1046137158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.1046137158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.2726483836 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 558878710 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2726483836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.2726483836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.2092602823 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 657265153 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2092602823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.2092602823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.2073094716 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 590188566 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:10:25 PM UTC 24 |
| Finished | Sep 18 01:10:29 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2073094716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.2073094716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.204839676 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 613916697 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:10:27 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=204839676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_t x_rx_disruption.204839676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.2422143549 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 45462536 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422143549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.2422143549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.3976066344 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 10154539256 ps |
| CPU time | 19.86 seconds |
| Started | Sep 18 01:01:08 PM UTC 24 |
| Finished | Sep 18 01:01:29 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976066344 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.3976066344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.808868918 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 20260790807 ps |
| CPU time | 31.65 seconds |
| Started | Sep 18 01:01:08 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=808868918 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.808868918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.1485345194 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 26141838384 ps |
| CPU time | 37.22 seconds |
| Started | Sep 18 01:01:08 PM UTC 24 |
| Finished | Sep 18 01:01:47 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485345194 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.1485345194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.4253525955 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 152026097 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 01:01:08 PM UTC 24 |
| Finished | Sep 18 01:01:10 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253525955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.4253525955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.865666928 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 148593605 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:01:09 PM UTC 24 |
| Finished | Sep 18 01:01:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=865666928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_bitstuff_err.865666928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.752800479 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 440070495 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:01:09 PM UTC 24 |
| Finished | Sep 18 01:01:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752800479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_data_toggle_clear.752800479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.1386867994 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 898097718 ps |
| CPU time | 4.32 seconds |
| Started | Sep 18 01:01:09 PM UTC 24 |
| Finished | Sep 18 01:01:14 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386867994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.1386867994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.2980693447 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 32596115007 ps |
| CPU time | 60.55 seconds |
| Started | Sep 18 01:01:09 PM UTC 24 |
| Finished | Sep 18 01:02:11 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980693447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.2980693447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.1291997444 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 2907556699 ps |
| CPU time | 20.7 seconds |
| Started | Sep 18 01:01:10 PM UTC 24 |
| Finished | Sep 18 01:01:32 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291997444 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.1291997444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.1797245769 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 642250897 ps |
| CPU time | 2.97 seconds |
| Started | Sep 18 01:01:10 PM UTC 24 |
| Finished | Sep 18 01:01:14 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797245769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.1797245769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.4005648012 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 157904192 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:01:10 PM UTC 24 |
| Finished | Sep 18 01:01:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005648012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.4005648012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_enable.3005595843 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 101723524 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:01:12 PM UTC 24 |
| Finished | Sep 18 01:01:15 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005595843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.3005595843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.2159754392 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 882975539 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 01:01:12 PM UTC 24 |
| Finished | Sep 18 01:01:16 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159754392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.2159754392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.1329311898 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 552911787 ps |
| CPU time | 2.76 seconds |
| Started | Sep 18 01:01:12 PM UTC 24 |
| Finished | Sep 18 01:01:16 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329311898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.1329311898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.174188133 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 272592682 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:01:12 PM UTC 24 |
| Finished | Sep 18 01:01:15 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174188133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_fifo_levels.174188133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1326172163 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 267663387 ps |
| CPU time | 2.73 seconds |
| Started | Sep 18 01:01:12 PM UTC 24 |
| Finished | Sep 18 01:01:16 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326172163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1326172163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.5960047 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 161369621 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:01:14 PM UTC 24 |
| Finished | Sep 18 01:01:16 PM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=5960047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.5960047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.316493629 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 150715870 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:14 PM UTC 24 |
| Finished | Sep 18 01:01:16 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316493629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_stall.316493629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.1242954102 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 261040697 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:01:14 PM UTC 24 |
| Finished | Sep 18 01:01:17 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242954102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.1242954102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.3447359167 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 4727679209 ps |
| CPU time | 132.19 seconds |
| Started | Sep 18 01:01:14 PM UTC 24 |
| Finished | Sep 18 01:03:29 PM UTC 24 |
| Peak memory | 230948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447359167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3447359167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3707567113 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 10694557689 ps |
| CPU time | 121.91 seconds |
| Started | Sep 18 01:01:15 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707567113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3707567113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.695397268 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 219847881 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:01:15 PM UTC 24 |
| Finished | Sep 18 01:01:18 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695397268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_in_err.695397268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.3781516121 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 23844480438 ps |
| CPU time | 47.94 seconds |
| Started | Sep 18 01:01:15 PM UTC 24 |
| Finished | Sep 18 01:02:05 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781516121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.3781516121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.3194720878 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 10817468418 ps |
| CPU time | 23.67 seconds |
| Started | Sep 18 01:01:17 PM UTC 24 |
| Finished | Sep 18 01:01:43 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194720878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.3194720878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.1895946196 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 3616744643 ps |
| CPU time | 91.67 seconds |
| Started | Sep 18 01:01:17 PM UTC 24 |
| Finished | Sep 18 01:02:51 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895946196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.1895946196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.787524210 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 2737125553 ps |
| CPU time | 26.3 seconds |
| Started | Sep 18 01:01:17 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787524210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.787524210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.2287910970 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 253119780 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:01:17 PM UTC 24 |
| Finished | Sep 18 01:01:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287910970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.2287910970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.2186956315 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 185305141 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:01:17 PM UTC 24 |
| Finished | Sep 18 01:01:21 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186956315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2186956315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.661529570 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 3219536932 ps |
| CPU time | 84.78 seconds |
| Started | Sep 18 01:01:18 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661529570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.661529570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3497280559 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 1863618138 ps |
| CPU time | 49.63 seconds |
| Started | Sep 18 01:01:18 PM UTC 24 |
| Finished | Sep 18 01:02:10 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497280559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3497280559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.357819188 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 158038447 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:01:18 PM UTC 24 |
| Finished | Sep 18 01:01:21 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357819188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.357819188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.3540295157 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 235301289 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:01:18 PM UTC 24 |
| Finished | Sep 18 01:01:22 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540295157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.3540295157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.4050764379 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 211771671 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:01:19 PM UTC 24 |
| Finished | Sep 18 01:01:22 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050764379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.4050764379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.3360522801 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 197155704 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:01:20 PM UTC 24 |
| Finished | Sep 18 01:01:22 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360522801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.3360522801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.4203443383 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 189967197 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:01:21 PM UTC 24 |
| Finished | Sep 18 01:01:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203443383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.4203443383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.3456564153 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 209890117 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:01:21 PM UTC 24 |
| Finished | Sep 18 01:01:23 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456564153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.3456564153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.462105801 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 156829897 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:01:22 PM UTC 24 |
| Finished | Sep 18 01:01:25 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462105801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pending_in_trans.462105801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.201761067 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 249694026 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:01:22 PM UTC 24 |
| Finished | Sep 18 01:01:25 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=201761067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.201761067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.1920160954 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 169869917 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:01:22 PM UTC 24 |
| Finished | Sep 18 01:01:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920160954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.1920160954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.1441067458 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 39033544 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:01:22 PM UTC 24 |
| Finished | Sep 18 01:01:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441067458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.1441067458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.2179455788 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 14620574904 ps |
| CPU time | 42.62 seconds |
| Started | Sep 18 01:01:22 PM UTC 24 |
| Finished | Sep 18 01:02:07 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179455788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.2179455788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3735726837 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 159223881 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:01:24 PM UTC 24 |
| Finished | Sep 18 01:01:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735726837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3735726837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2526908298 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 231968757 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:01:24 PM UTC 24 |
| Finished | Sep 18 01:01:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526908298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.2526908298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1959863208 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 199036714 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:01:24 PM UTC 24 |
| Finished | Sep 18 01:01:26 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959863208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1959863208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.3918098927 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 187933933 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:01:24 PM UTC 24 |
| Finished | Sep 18 01:01:27 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918098927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.3918098927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.2527988050 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 140945389 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:01:24 PM UTC 24 |
| Finished | Sep 18 01:01:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527988050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.2527988050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.551137346 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 381738575 ps |
| CPU time | 2.08 seconds |
| Started | Sep 18 01:01:25 PM UTC 24 |
| Finished | Sep 18 01:01:29 PM UTC 24 |
| Peak memory | 217520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551137346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_rx_full.551137346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.1622904827 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 154321370 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:01:25 PM UTC 24 |
| Finished | Sep 18 01:01:28 PM UTC 24 |
| Peak memory | 215352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622904827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.1622904827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.1566455949 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 157016316 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:01:26 PM UTC 24 |
| Finished | Sep 18 01:01:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566455949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.1566455949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.1022818463 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 224754824 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:01:26 PM UTC 24 |
| Finished | Sep 18 01:01:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022818463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.1022818463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2299334910 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 3004692886 ps |
| CPU time | 27.89 seconds |
| Started | Sep 18 01:01:26 PM UTC 24 |
| Finished | Sep 18 01:01:55 PM UTC 24 |
| Peak memory | 235080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299334910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2299334910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.4057687760 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 178518923 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057687760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.4057687760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.3130085304 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 185233740 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130085304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.3130085304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.743214787 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 733487496 ps |
| CPU time | 2.72 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:31 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743214787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_stream_len_max.743214787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.386900160 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 2606177176 ps |
| CPU time | 24.48 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 230688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386900160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_streaming_out.386900160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.1389817126 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 942225770 ps |
| CPU time | 21.53 seconds |
| Started | Sep 18 01:01:10 PM UTC 24 |
| Finished | Sep 18 01:01:33 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389817126 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.1389817126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2013652372 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 624366326 ps |
| CPU time | 3.12 seconds |
| Started | Sep 18 01:01:27 PM UTC 24 |
| Finished | Sep 18 01:01:32 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2013652372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2013652372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.2350023295 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 623326192 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:10:27 PM UTC 24 |
| Finished | Sep 18 01:10:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350023295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.2350023295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.2608927540 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 692877699 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2608927540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.2608927540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.2585330102 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 586779740 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585330102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.2585330102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.269181716 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 520079486 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=269181716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_t x_rx_disruption.269181716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.3626146584 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 508803371 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3626146584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.3626146584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.1606748558 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 499912616 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1606748558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.1606748558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.1628033887 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 470469683 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:10:30 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1628033887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.1628033887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.378520562 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 526782235 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=378520562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_t x_rx_disruption.378520562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.2581518977 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 530696267 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2581518977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.2581518977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.341678638 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 512445186 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341678638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_t x_rx_disruption.341678638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.3723891915 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 37844596 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:01:46 PM UTC 24 |
| Finished | Sep 18 01:01:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723891915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.3723891915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.1759328167 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 11905943277 ps |
| CPU time | 22.43 seconds |
| Started | Sep 18 01:01:29 PM UTC 24 |
| Finished | Sep 18 01:01:52 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759328167 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.1759328167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.2978170612 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 19105464854 ps |
| CPU time | 29.65 seconds |
| Started | Sep 18 01:01:29 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978170612 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.2978170612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1381661980 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 25940248093 ps |
| CPU time | 40.7 seconds |
| Started | Sep 18 01:01:29 PM UTC 24 |
| Finished | Sep 18 01:02:11 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381661980 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1381661980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.2624192746 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 183392528 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:01:29 PM UTC 24 |
| Finished | Sep 18 01:01:31 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624192746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.2624192746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1716965340 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 156049882 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:01:29 PM UTC 24 |
| Finished | Sep 18 01:01:31 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716965340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.1716965340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.2419017818 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 455352676 ps |
| CPU time | 2.75 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419017818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.2419017818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.1056015002 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 761218175 ps |
| CPU time | 3.5 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056015002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.1056015002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.2454260907 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 30377455097 ps |
| CPU time | 57.92 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454260907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2454260907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.3138430954 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 2011102324 ps |
| CPU time | 19.18 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138430954 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.3138430954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.1526229172 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 807199855 ps |
| CPU time | 3.9 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:01:36 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526229172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.1526229172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.371491471 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 141787974 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:01:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371491471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_disconnected.371491471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1797689756 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 39324706 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:01:32 PM UTC 24 |
| Finished | Sep 18 01:01:35 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797689756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1797689756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.980160999 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 838261400 ps |
| CPU time | 2.99 seconds |
| Started | Sep 18 01:01:32 PM UTC 24 |
| Finished | Sep 18 01:01:37 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=980160999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.980160999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.3004162449 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 570380262 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 01:01:32 PM UTC 24 |
| Finished | Sep 18 01:01:36 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004162449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.3004162449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.752456535 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 286379988 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:01:32 PM UTC 24 |
| Finished | Sep 18 01:01:36 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752456535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_fifo_levels.752456535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.1249689857 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 364769205 ps |
| CPU time | 2.97 seconds |
| Started | Sep 18 01:01:32 PM UTC 24 |
| Finished | Sep 18 01:01:37 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249689857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.1249689857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.2718005618 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 198434150 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:01:34 PM UTC 24 |
| Finished | Sep 18 01:01:37 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718005618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2718005618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.2744518546 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 152751822 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:01:35 PM UTC 24 |
| Finished | Sep 18 01:01:38 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744518546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.2744518546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2499753515 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 185306440 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:40 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499753515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.2499753515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.1242402046 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 3891693677 ps |
| CPU time | 39.44 seconds |
| Started | Sep 18 01:01:34 PM UTC 24 |
| Finished | Sep 18 01:02:15 PM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242402046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.1242402046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.912920186 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 6291641757 ps |
| CPU time | 39.3 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:02:18 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=912920186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.912920186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.797609662 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 171414722 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797609662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.797609662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.699230484 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 7526558594 ps |
| CPU time | 11.27 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:50 PM UTC 24 |
| Peak memory | 228296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699230484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_resume.699230484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.1275972351 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 10887010648 ps |
| CPU time | 19.2 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:58 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275972351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.1275972351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.1367163085 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 2434449510 ps |
| CPU time | 19.93 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 230708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367163085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.1367163085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.4053868008 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 1891700717 ps |
| CPU time | 14.12 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 234748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053868008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.4053868008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1860631063 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 240852139 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860631063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1860631063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.3926608686 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 220759093 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:01:40 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926608686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.3926608686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.3850265603 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 2669676351 ps |
| CPU time | 26.72 seconds |
| Started | Sep 18 01:01:37 PM UTC 24 |
| Finished | Sep 18 01:02:06 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850265603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.3850265603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.575049125 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 2485309186 ps |
| CPU time | 20.9 seconds |
| Started | Sep 18 01:01:38 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=575049125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.575049125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.3312918381 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 154955372 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:01:39 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312918381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.3312918381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2182507696 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 148518183 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:01:39 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182507696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2182507696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.32004212 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 204726197 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:39 PM UTC 24 |
| Finished | Sep 18 01:01:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32004212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_iso.32004212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.573598147 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 182952442 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:01:39 PM UTC 24 |
| Finished | Sep 18 01:01:41 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573598147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_out_stall.573598147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.2672472836 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 150527230 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:01:40 PM UTC 24 |
| Finished | Sep 18 01:01:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672472836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.2672472836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.4222973883 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 156435459 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:01:40 PM UTC 24 |
| Finished | Sep 18 01:01:43 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222973883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.4222973883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.4154306346 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 190978804 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154306346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.4154306346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.2021541193 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 143256990 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:44 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021541193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.2021541193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.1922515510 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 35876391 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:44 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922515510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.1922515510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.1798569866 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 14201447319 ps |
| CPU time | 40.7 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:02:24 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798569866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.1798569866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.3166588752 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 168111489 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166588752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.3166588752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.507567528 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 248402470 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:44 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=507567528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_pkt_sent.507567528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.3390392669 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 194031535 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390392669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.3390392669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.1383896810 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 174245260 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383896810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1383896810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.288107407 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 149511924 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288107407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_rx_crc_err.288107407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.2262712765 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 295050922 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:01:42 PM UTC 24 |
| Finished | Sep 18 01:01:45 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262712765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.2262712765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.3326864440 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 154027823 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:01:44 PM UTC 24 |
| Finished | Sep 18 01:01:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326864440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.3326864440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.2642266225 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 161409789 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:01:44 PM UTC 24 |
| Finished | Sep 18 01:01:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642266225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.2642266225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2567324679 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 245282718 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:01:44 PM UTC 24 |
| Finished | Sep 18 01:01:47 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567324679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2567324679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1442772954 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 2546875709 ps |
| CPU time | 70.62 seconds |
| Started | Sep 18 01:01:44 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 230628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442772954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1442772954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.1158905299 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 173162668 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:01:45 PM UTC 24 |
| Finished | Sep 18 01:01:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158905299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.1158905299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.1811067178 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 191780518 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:01:45 PM UTC 24 |
| Finished | Sep 18 01:01:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811067178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.1811067178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.1110777764 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 205792724 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:01:45 PM UTC 24 |
| Finished | Sep 18 01:01:48 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110777764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.1110777764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.168930114 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 2057219902 ps |
| CPU time | 16.22 seconds |
| Started | Sep 18 01:01:45 PM UTC 24 |
| Finished | Sep 18 01:02:03 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168930114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_streaming_out.168930114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.1442344579 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 6344438063 ps |
| CPU time | 38.87 seconds |
| Started | Sep 18 01:01:31 PM UTC 24 |
| Finished | Sep 18 01:02:11 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442344579 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.1442344579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1302895813 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 478702457 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:01:45 PM UTC 24 |
| Finished | Sep 18 01:01:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1302895813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1302895813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.2998275167 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 480227130 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2998275167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.2998275167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.366719985 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 639816664 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=366719985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_t x_rx_disruption.366719985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.1455589190 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 622161508 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1455589190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.1455589190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.1355835258 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 439629740 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1355835258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.1355835258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2652858165 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 554786129 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2652858165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2652858165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.582196165 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 681905167 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:35 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=582196165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_t x_rx_disruption.582196165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.3941629045 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 619248175 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:35 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3941629045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.3941629045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.2307102518 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 630174974 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:33 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2307102518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.2307102518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.2312659853 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 447452071 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:33 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2312659853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.2312659853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.407856885 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 468374206 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=407856885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_t x_rx_disruption.407856885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.3423608660 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 42913750 ps |
| CPU time | 0.95 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423608660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.3423608660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.493357031 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 10533182102 ps |
| CPU time | 21.55 seconds |
| Started | Sep 18 01:01:46 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=493357031 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.493357031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.3559182519 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 16026380311 ps |
| CPU time | 21.95 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:02:10 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559182519 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.3559182519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.2363469409 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 28983758906 ps |
| CPU time | 40.12 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:02:29 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363469409 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.2363469409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.1488243732 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 228797334 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:01:50 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488243732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.1488243732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.2807361664 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 150732838 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:01:49 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807361664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.2807361664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.123077098 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 289707199 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:01:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=123077098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.123077098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.4118933454 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 837139536 ps |
| CPU time | 3.07 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118933454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.4118933454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.694738364 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 20069576859 ps |
| CPU time | 36.93 seconds |
| Started | Sep 18 01:01:47 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 218468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694738364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_device_address.694738364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.3734057744 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 730959159 ps |
| CPU time | 5.25 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:55 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734057744 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.3734057744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.2531618558 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 573271426 ps |
| CPU time | 3.02 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531618558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.2531618558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.1682618637 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 140283054 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682618637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.1682618637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_enable.3713591805 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 35467341 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713591805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.3713591805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.3050309861 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 871627085 ps |
| CPU time | 2.53 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050309861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.3050309861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.2040411200 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 203225451 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040411200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.2040411200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2208425050 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 255381119 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:01:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208425050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.2208425050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.761060126 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 286893249 ps |
| CPU time | 2.54 seconds |
| Started | Sep 18 01:01:51 PM UTC 24 |
| Finished | Sep 18 01:01:54 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761060126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_fifo_rst.761060126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.2799679565 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 224416258 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:01:51 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799679565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.2799679565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.3082217310 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 141430157 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:01:51 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082217310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.3082217310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.1982451008 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 193161817 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:01:51 PM UTC 24 |
| Finished | Sep 18 01:01:53 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982451008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.1982451008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.320110345 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 4668411092 ps |
| CPU time | 121.64 seconds |
| Started | Sep 18 01:01:51 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 230612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320110345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.320110345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.3732597458 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 7582967449 ps |
| CPU time | 52.35 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732597458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3732597458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.4165949350 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 200471669 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:01:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165949350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.4165949350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.743552170 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 29103892714 ps |
| CPU time | 47.71 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:02:41 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743552170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_link_resume.743552170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.2116761048 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 8867927870 ps |
| CPU time | 12.67 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:02:06 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116761048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.2116761048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.764808020 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 3384601975 ps |
| CPU time | 38.89 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:02:33 PM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764808020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.764808020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.3796699396 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 3890785458 ps |
| CPU time | 107.59 seconds |
| Started | Sep 18 01:01:52 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 228444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796699396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.3796699396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.1117147438 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 242383440 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:57 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117147438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.1117147438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.1245493284 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 192679817 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245493284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.1245493284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3763905633 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 2726166291 ps |
| CPU time | 19.84 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:02:15 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763905633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3763905633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.2145768232 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 157518888 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145768232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.2145768232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.3871132175 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 150407745 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871132175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.3871132175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2253254756 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 218217065 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253254756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2253254756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.488877657 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 178047173 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=488877657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_out_iso.488877657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.4174261003 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 160156849 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174261003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.4174261003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.2558018768 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 197519219 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:01:54 PM UTC 24 |
| Finished | Sep 18 01:01:56 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558018768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.2558018768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.3782952649 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 211218374 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:01:55 PM UTC 24 |
| Finished | Sep 18 01:01:58 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782952649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.3782952649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.2587106743 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 206077955 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:01:55 PM UTC 24 |
| Finished | Sep 18 01:01:58 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587106743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.2587106743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.689492125 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 155948559 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:01:57 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689492125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.689492125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.2861186957 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 25653843 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:01:57 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861186957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2861186957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.490943502 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 20043840941 ps |
| CPU time | 56.23 seconds |
| Started | Sep 18 01:01:57 PM UTC 24 |
| Finished | Sep 18 01:02:54 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490943502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.490943502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.3549863544 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 158910437 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:01:57 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549863544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.3549863544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.2868308314 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 202744696 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:01:57 PM UTC 24 |
| Finished | Sep 18 01:01:59 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868308314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.2868308314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3026970484 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 187252783 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:01:58 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026970484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3026970484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.1007221292 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 173588282 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:01:58 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007221292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.1007221292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.3342459039 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 155349113 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:01:58 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342459039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.3342459039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.898907186 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 255176569 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:01:58 PM UTC 24 |
| Finished | Sep 18 01:02:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898907186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_rx_full.898907186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.1790697905 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 194906326 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:01:58 PM UTC 24 |
| Finished | Sep 18 01:02:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790697905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.1790697905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.2895493855 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 169804120 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895493855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.2895493855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.672583209 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 210817148 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:02 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=672583209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.672583209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1326735596 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 2517658691 ps |
| CPU time | 68.85 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:03:10 PM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326735596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1326735596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.3825247441 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 172733418 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825247441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.3825247441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.156246397 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 144111809 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156246397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_stall_trans.156246397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.617703124 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 806198152 ps |
| CPU time | 2.61 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:04 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617703124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.617703124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.3705593764 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 3999118492 ps |
| CPU time | 102.87 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 230412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705593764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.3705593764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.2595217677 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 1028367840 ps |
| CPU time | 21.33 seconds |
| Started | Sep 18 01:01:49 PM UTC 24 |
| Finished | Sep 18 01:02:11 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595217677 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.2595217677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.42876030 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 526389341 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:02:00 PM UTC 24 |
| Finished | Sep 18 01:02:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42876030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_tx_ rx_disruption.42876030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.2878892097 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 596703425 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2878892097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.2878892097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.1006384942 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 473918309 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:10:31 PM UTC 24 |
| Finished | Sep 18 01:10:33 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1006384942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.1006384942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.1146708198 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 557561279 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1146708198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.1146708198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.2556596302 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 529354407 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2556596302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.2556596302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.1604124099 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 522187521 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1604124099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.1604124099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.1905612678 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 534248169 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1905612678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.1905612678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.796424791 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 484251716 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=796424791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.796424791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.3533639697 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 508663489 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3533639697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.3533639697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.2778980891 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 498150255 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2778980891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.2778980891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.1620022178 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 690877551 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1620022178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.1620022178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.1956530363 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 52277362 ps |
| CPU time | 0.76 seconds |
| Started | Sep 18 01:02:15 PM UTC 24 |
| Finished | Sep 18 01:02:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956530363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.1956530363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.894845715 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 6202748707 ps |
| CPU time | 10.47 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:13 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894845715 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.894845715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.1813631263 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 14097434738 ps |
| CPU time | 16.78 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:20 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813631263 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.1813631263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2632493065 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 24078068865 ps |
| CPU time | 36.69 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:40 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632493065 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.2632493065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3854376938 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 179290476 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854376938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3854376938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.1114373297 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 153243345 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:04 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114373297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.1114373297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.1972837508 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 323371732 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:05 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972837508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.1972837508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.820527765 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 1026368113 ps |
| CPU time | 3.69 seconds |
| Started | Sep 18 01:02:02 PM UTC 24 |
| Finished | Sep 18 01:02:07 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=820527765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.820527765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.433901293 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 15195900672 ps |
| CPU time | 24.82 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433901293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_device_address.433901293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.2507327584 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 7132382088 ps |
| CPU time | 43.69 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:49 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507327584 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.2507327584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.1941432444 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 1124289623 ps |
| CPU time | 2.89 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941432444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.1941432444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.1068317644 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 165735963 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:07 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1068317644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.1068317644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_enable.1492834746 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 54334628 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492834746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.1492834746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2173525894 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 1179842715 ps |
| CPU time | 3.55 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:09 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173525894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.2173525894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1546500693 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 455525116 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:07 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546500693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1546500693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.3312438702 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 151215971 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 215432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312438702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.3312438702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3165179697 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 401701993 ps |
| CPU time | 3.12 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:10 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165179697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3165179697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.3736711846 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 236108214 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736711846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.3736711846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3226759777 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 139068038 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226759777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3226759777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2824033351 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 208291865 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:08 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824033351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.2824033351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.1879676764 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 2669739870 ps |
| CPU time | 18.85 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879676764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.1879676764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.207265973 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 5921157104 ps |
| CPU time | 66.94 seconds |
| Started | Sep 18 01:02:06 PM UTC 24 |
| Finished | Sep 18 01:03:15 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207265973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.207265973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.1780275214 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 198242845 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:02:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780275214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.1780275214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.3003187280 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 12795460925 ps |
| CPU time | 21.62 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003187280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.3003187280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.1292356449 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 9052924805 ps |
| CPU time | 13.76 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292356449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.1292356449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.51854090 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 3606824532 ps |
| CPU time | 95.96 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 230432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51854090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.51854090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.2308636937 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 3918711538 ps |
| CPU time | 38.88 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308636937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.2308636937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.4030720146 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 257071198 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:02:07 PM UTC 24 |
| Finished | Sep 18 01:02:10 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030720146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.4030720146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.4014020347 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 188666322 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:02:09 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014020347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.4014020347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.1225919483 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 2467246732 ps |
| CPU time | 22.41 seconds |
| Started | Sep 18 01:02:09 PM UTC 24 |
| Finished | Sep 18 01:02:33 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225919483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.1225919483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.2990262281 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 154341202 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990262281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.2990262281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.789131051 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 158766691 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789131051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.789131051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.2673208616 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 196494345 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673208616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.2673208616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.1118813919 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 202819850 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118813919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.1118813919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.259774355 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 195313388 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259774355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_out_stall.259774355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3316083778 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 151590043 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316083778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3316083778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.1168530978 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 195979465 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:02:10 PM UTC 24 |
| Finished | Sep 18 01:02:12 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168530978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.1168530978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3577952247 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 227906294 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:14 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577952247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3577952247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.2340889454 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 147527297 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:13 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340889454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.2340889454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1246514133 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 33528386 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:13 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246514133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1246514133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.3376895934 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 11608625120 ps |
| CPU time | 30.03 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:43 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376895934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.3376895934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3982621129 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 164430340 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:13 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982621129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3982621129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.3039745792 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 171354335 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:02:11 PM UTC 24 |
| Finished | Sep 18 01:02:13 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039745792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.3039745792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.1855397808 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 202211774 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855397808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.1855397808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.1047003726 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 179435576 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047003726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.1047003726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2973208135 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 174717456 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:15 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973208135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2973208135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.1251173914 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 366276144 ps |
| CPU time | 2.19 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:17 PM UTC 24 |
| Peak memory | 217676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251173914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.1251173914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.1759313764 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 152042261 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759313764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.1759313764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.1217549467 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 150927654 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:02:13 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217549467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.1217549467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.723570553 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 278972338 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723570553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.723570553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.886304047 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 1654260230 ps |
| CPU time | 17.66 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:32 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886304047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.886304047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.1900826232 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 147774929 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900826232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1900826232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.4105566541 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 169595014 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105566541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.4105566541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.2376813098 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 945759448 ps |
| CPU time | 2.59 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:17 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376813098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.2376813098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.2895943653 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 2738776573 ps |
| CPU time | 20.91 seconds |
| Started | Sep 18 01:02:14 PM UTC 24 |
| Finished | Sep 18 01:02:36 PM UTC 24 |
| Peak memory | 234808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895943653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.2895943653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.784396149 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 3156046858 ps |
| CPU time | 21.03 seconds |
| Started | Sep 18 01:02:04 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=784396149 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.784396149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2031484578 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 592045789 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:02:15 PM UTC 24 |
| Finished | Sep 18 01:02:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2031484578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2031484578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.3465816730 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 606090264 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:10:32 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3465816730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.3465816730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.552928189 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 614411389 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:10:33 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=552928189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_t x_rx_disruption.552928189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.3214655597 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 544346838 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:10:33 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3214655597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.3214655597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.3877166845 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 482723996 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3877166845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.3877166845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.941016874 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 530300511 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=941016874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_t x_rx_disruption.941016874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.276022207 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 543818683 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=276022207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_t x_rx_disruption.276022207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.2705470318 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 576740613 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2705470318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.2705470318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2836219798 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 488883102 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2836219798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2836219798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.1249996424 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 576198381 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1249996424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.1249996424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.1080744512 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 462940115 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1080744512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.1080744512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.3580314689 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 27079788 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:35 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580314689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.3580314689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.2873549806 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 10302684554 ps |
| CPU time | 17.07 seconds |
| Started | Sep 18 01:02:15 PM UTC 24 |
| Finished | Sep 18 01:02:34 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873549806 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.2873549806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.814216084 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 16269431127 ps |
| CPU time | 26.24 seconds |
| Started | Sep 18 01:02:15 PM UTC 24 |
| Finished | Sep 18 01:02:43 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=814216084 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.814216084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.1565777220 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 25111049548 ps |
| CPU time | 42.15 seconds |
| Started | Sep 18 01:02:15 PM UTC 24 |
| Finished | Sep 18 01:02:59 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565777220 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.1565777220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.714010077 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 198500278 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:19 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714010077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_av_buffer.714010077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.1114300149 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 150393023 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114300149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.1114300149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.492256776 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 145674101 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=492256776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_data_toggle_clear.492256776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.3355184849 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 566720287 ps |
| CPU time | 3.34 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355184849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3355184849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.1669691049 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 48558990258 ps |
| CPU time | 85.77 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669691049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.1669691049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.580771707 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 4319780163 ps |
| CPU time | 28.53 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:47 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=580771707 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.580771707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.2670374996 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 512371755 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:20 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670374996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.2670374996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.939142186 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 159215546 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939142186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_disconnected.939142186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_enable.219545213 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 41006412 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:02:18 PM UTC 24 |
| Finished | Sep 18 01:02:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219545213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.219545213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2515349886 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 703689401 ps |
| CPU time | 2.39 seconds |
| Started | Sep 18 01:02:18 PM UTC 24 |
| Finished | Sep 18 01:02:21 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515349886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2515349886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.3609157701 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 550546236 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:02:19 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609157701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.3609157701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.3634379403 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 262229097 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 01:02:19 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634379403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.3634379403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.3738933266 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 256159086 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 01:02:19 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738933266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.3738933266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.510924816 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 227422775 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:02:19 PM UTC 24 |
| Finished | Sep 18 01:02:22 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510924816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.510924816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.833787935 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 146319671 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:02:23 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833787935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_stall.833787935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.2154951665 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 190520518 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:02:23 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154951665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.2154951665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.1789210790 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 4887635621 ps |
| CPU time | 48.53 seconds |
| Started | Sep 18 01:02:19 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789210790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.1789210790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.4239069602 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 9184790030 ps |
| CPU time | 67.56 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239069602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.4239069602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.1778664969 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 234190541 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:02:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778664969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.1778664969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.394357448 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 26513830388 ps |
| CPU time | 51.51 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:03:14 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394357448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_link_resume.394357448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.638384358 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 4564366635 ps |
| CPU time | 11.41 seconds |
| Started | Sep 18 01:02:21 PM UTC 24 |
| Finished | Sep 18 01:02:33 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638384358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_suspend.638384358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.2899616944 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 3990369672 ps |
| CPU time | 48.24 seconds |
| Started | Sep 18 01:02:22 PM UTC 24 |
| Finished | Sep 18 01:03:12 PM UTC 24 |
| Peak memory | 230500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899616944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.2899616944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.2410361140 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 1858462812 ps |
| CPU time | 50.34 seconds |
| Started | Sep 18 01:02:22 PM UTC 24 |
| Finished | Sep 18 01:03:14 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410361140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2410361140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.4032089170 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 237067792 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:02:22 PM UTC 24 |
| Finished | Sep 18 01:02:25 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032089170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.4032089170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.1830189921 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 201533366 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:02:23 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830189921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.1830189921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.510741268 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 2631786065 ps |
| CPU time | 23.94 seconds |
| Started | Sep 18 01:02:23 PM UTC 24 |
| Finished | Sep 18 01:02:49 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510741268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.510741268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.3986647827 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 182674775 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986647827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.3986647827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.4127850269 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 146390549 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127850269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.4127850269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3121401151 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 183818687 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121401151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.3121401151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.4057513584 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 154623838 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057513584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.4057513584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.2623436442 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 194834193 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623436442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.2623436442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.3034842726 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 178185891 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:02:24 PM UTC 24 |
| Finished | Sep 18 01:02:26 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034842726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.3034842726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.4026450752 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 149876033 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:02:25 PM UTC 24 |
| Finished | Sep 18 01:02:28 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026450752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.4026450752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.3470176996 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 215941463 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:02:25 PM UTC 24 |
| Finished | Sep 18 01:02:28 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470176996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3470176996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.1145901289 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 141476196 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:02:29 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145901289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.1145901289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.3849510362 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 35115384 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:02:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849510362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.3849510362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.921817691 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 13320861882 ps |
| CPU time | 40.83 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:03:10 PM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921817691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_pkt_buffer.921817691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.2586154288 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 148845511 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:02:29 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586154288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.2586154288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.1967625332 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 181797704 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967625332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.1967625332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.375206453 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 278030824 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:02:27 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375206453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.375206453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.2936695203 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 189872984 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:02:28 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936695203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.2936695203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.4249564896 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 235225964 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:02:28 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249564896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.4249564896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.424817838 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 372530835 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 01:02:28 PM UTC 24 |
| Finished | Sep 18 01:02:31 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424817838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_rx_full.424817838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.3494113951 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 153421495 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:02:28 PM UTC 24 |
| Finished | Sep 18 01:02:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494113951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.3494113951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3106398404 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 191585847 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:02:29 PM UTC 24 |
| Finished | Sep 18 01:02:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106398404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3106398404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.588189020 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 261451807 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:02:29 PM UTC 24 |
| Finished | Sep 18 01:02:31 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588189020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.588189020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.2061098511 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 2069595805 ps |
| CPU time | 24.22 seconds |
| Started | Sep 18 01:02:30 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 228152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061098511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.2061098511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.2100734176 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 189602411 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:02:30 PM UTC 24 |
| Finished | Sep 18 01:02:33 PM UTC 24 |
| Peak memory | 215292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100734176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2100734176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.833636761 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 163618114 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:02:30 PM UTC 24 |
| Finished | Sep 18 01:02:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833636761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_stall_trans.833636761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3899789931 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 1150217749 ps |
| CPU time | 3.2 seconds |
| Started | Sep 18 01:02:30 PM UTC 24 |
| Finished | Sep 18 01:02:35 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899789931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3899789931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.4004082342 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 3418409934 ps |
| CPU time | 32.44 seconds |
| Started | Sep 18 01:02:30 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 228220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004082342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.4004082342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.306367887 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 3172329177 ps |
| CPU time | 22.84 seconds |
| Started | Sep 18 01:02:17 PM UTC 24 |
| Finished | Sep 18 01:02:41 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306367887 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.306367887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3547939012 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 492151700 ps |
| CPU time | 2.3 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:36 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3547939012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3547939012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.2205522692 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 648927960 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2205522692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.2205522692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.2215680712 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 500159391 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2215680712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.2215680712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.586446517 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 441135096 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=586446517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_t x_rx_disruption.586446517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.1083915280 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 621536502 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1083915280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.1083915280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.168232353 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 609906122 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=168232353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_t x_rx_disruption.168232353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.3048069386 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 536068472 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048069386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.3048069386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.4237834663 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 525655561 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:10:34 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4237834663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.4237834663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.3230948800 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 585740434 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:10:35 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3230948800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.3230948800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.3078880584 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 436053570 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:10:35 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3078880584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.3078880584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.2392725777 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 518252050 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:35 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2392725777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.2392725777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.967426991 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 31657841 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:02:49 PM UTC 24 |
| Finished | Sep 18 01:02:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=967426991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.967426991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1873111485 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 9888676188 ps |
| CPU time | 13.42 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:47 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873111485 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1873111485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.1281492834 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 19130642660 ps |
| CPU time | 30.28 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281492834 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1281492834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.1212918438 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 28777396170 ps |
| CPU time | 37.02 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:03:11 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212918438 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.1212918438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.423945280 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 165984549 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:35 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423945280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_av_buffer.423945280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3205434971 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 242636726 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:35 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205434971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3205434971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.3737350832 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 437721577 ps |
| CPU time | 2.63 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:37 PM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737350832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.3737350832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1017968839 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 378486108 ps |
| CPU time | 2.26 seconds |
| Started | Sep 18 01:02:33 PM UTC 24 |
| Finished | Sep 18 01:02:36 PM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017968839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1017968839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.3816754019 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 23431175600 ps |
| CPU time | 44.41 seconds |
| Started | Sep 18 01:02:34 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816754019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.3816754019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.2128001925 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 5262999226 ps |
| CPU time | 45.91 seconds |
| Started | Sep 18 01:02:34 PM UTC 24 |
| Finished | Sep 18 01:03:22 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128001925 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.2128001925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.4027202369 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 612790447 ps |
| CPU time | 3.09 seconds |
| Started | Sep 18 01:02:34 PM UTC 24 |
| Finished | Sep 18 01:02:38 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027202369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.4027202369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.4218066973 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 144787189 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:02:35 PM UTC 24 |
| Finished | Sep 18 01:02:37 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218066973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.4218066973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_enable.2289942534 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 34450056 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:02:35 PM UTC 24 |
| Finished | Sep 18 01:02:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289942534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.2289942534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.1582661464 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 931112505 ps |
| CPU time | 2.85 seconds |
| Started | Sep 18 01:02:35 PM UTC 24 |
| Finished | Sep 18 01:02:38 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1582661464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.1582661464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1792207123 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 334571992 ps |
| CPU time | 2.28 seconds |
| Started | Sep 18 01:02:36 PM UTC 24 |
| Finished | Sep 18 01:02:39 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792207123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1792207123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3153568930 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 230392707 ps |
| CPU time | 3.61 seconds |
| Started | Sep 18 01:02:36 PM UTC 24 |
| Finished | Sep 18 01:02:41 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153568930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3153568930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.2173699273 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 232204821 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 01:02:36 PM UTC 24 |
| Finished | Sep 18 01:02:39 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173699273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.2173699273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3889845162 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 143424668 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:02:40 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889845162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3889845162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1482231636 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 220818540 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:02:40 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482231636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1482231636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1565890699 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 4097038439 ps |
| CPU time | 108.01 seconds |
| Started | Sep 18 01:02:36 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565890699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1565890699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.2013862267 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 13118979366 ps |
| CPU time | 89.16 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:04:09 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013862267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.2013862267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.40436859 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 207466905 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:02:40 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40436859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_link_in_err.40436859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.3617556113 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 28547315188 ps |
| CPU time | 54.11 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:03:33 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617556113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.3617556113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.3740900683 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 9661662395 ps |
| CPU time | 21.69 seconds |
| Started | Sep 18 01:02:38 PM UTC 24 |
| Finished | Sep 18 01:03:01 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740900683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.3740900683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.3049344609 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 3265113423 ps |
| CPU time | 29.4 seconds |
| Started | Sep 18 01:02:39 PM UTC 24 |
| Finished | Sep 18 01:03:10 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049344609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.3049344609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.3728768051 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 2230992617 ps |
| CPU time | 17.64 seconds |
| Started | Sep 18 01:02:39 PM UTC 24 |
| Finished | Sep 18 01:02:58 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728768051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.3728768051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3344489996 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 252404619 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:02:39 PM UTC 24 |
| Finished | Sep 18 01:02:42 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344489996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3344489996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.2534768207 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 189409720 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:02:41 PM UTC 24 |
| Finished | Sep 18 01:02:43 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534768207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.2534768207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.1223464376 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 2477523396 ps |
| CPU time | 17.93 seconds |
| Started | Sep 18 01:02:41 PM UTC 24 |
| Finished | Sep 18 01:03:00 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223464376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.1223464376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.1276816120 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 151488945 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:02:41 PM UTC 24 |
| Finished | Sep 18 01:02:43 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1276816120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.1276816120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.2939152894 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 174690255 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:02:41 PM UTC 24 |
| Finished | Sep 18 01:02:43 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939152894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.2939152894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.644015478 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 173948949 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644015478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_nak_trans.644015478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.1203276356 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 257996293 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203276356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.1203276356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.3475156351 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 219882453 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475156351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.3475156351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.451493600 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 178001054 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451493600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_out_trans_nak.451493600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.4201648763 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 165922644 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201648763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.4201648763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.3250087450 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 180250288 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:02:42 PM UTC 24 |
| Finished | Sep 18 01:02:45 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250087450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.3250087450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.3210865378 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 159451067 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:02:44 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210865378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.3210865378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.471845864 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 39728581 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:02:44 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471845864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_phy_pins_sense.471845864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.167203392 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 13624588418 ps |
| CPU time | 34.72 seconds |
| Started | Sep 18 01:02:44 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 232608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167203392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_pkt_buffer.167203392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.2754497350 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 188780149 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:02:44 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754497350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.2754497350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.3477068163 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 192940034 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:02:44 PM UTC 24 |
| Finished | Sep 18 01:02:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477068163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.3477068163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.1084478714 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 189429027 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:02:46 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084478714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.1084478714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.2928057671 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 221672107 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:02:46 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928057671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.2928057671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.961791945 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 166738941 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:02:46 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961791945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_rx_crc_err.961791945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.2465139511 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 351299676 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:02:46 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465139511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.2465139511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.308815805 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 154247509 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:02:46 PM UTC 24 |
| Finished | Sep 18 01:02:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308815805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_setup_stage.308815805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.1522702304 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 156279852 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:02:47 PM UTC 24 |
| Finished | Sep 18 01:02:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522702304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.1522702304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.1079683077 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 300934096 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:02:47 PM UTC 24 |
| Finished | Sep 18 01:02:50 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079683077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.1079683077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.269573089 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 1739770372 ps |
| CPU time | 45.94 seconds |
| Started | Sep 18 01:02:47 PM UTC 24 |
| Finished | Sep 18 01:03:35 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=269573089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.269573089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.1361276311 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 150071692 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:02:47 PM UTC 24 |
| Finished | Sep 18 01:02:50 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361276311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1361276311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.1756097005 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 158505174 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:02:48 PM UTC 24 |
| Finished | Sep 18 01:02:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756097005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.1756097005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3091436012 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 1145499334 ps |
| CPU time | 2.92 seconds |
| Started | Sep 18 01:02:48 PM UTC 24 |
| Finished | Sep 18 01:02:52 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091436012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3091436012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.4183771519 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 2558234734 ps |
| CPU time | 19.12 seconds |
| Started | Sep 18 01:02:48 PM UTC 24 |
| Finished | Sep 18 01:03:08 PM UTC 24 |
| Peak memory | 235004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183771519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.4183771519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.1589926335 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 1565453950 ps |
| CPU time | 39.1 seconds |
| Started | Sep 18 01:02:34 PM UTC 24 |
| Finished | Sep 18 01:03:15 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589926335 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.1589926335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3333029763 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 637994075 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 01:02:49 PM UTC 24 |
| Finished | Sep 18 01:02:52 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3333029763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3333029763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2135796960 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 667700721 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2135796960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2135796960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.3889345652 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 552960330 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3889345652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.3889345652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.774754216 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 459799741 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=774754216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_t x_rx_disruption.774754216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.80607684 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 521790201 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=80607684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_tx _rx_disruption.80607684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.73797102 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 509697132 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=73797102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_tx _rx_disruption.73797102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.3629595739 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 504194814 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3629595739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.3629595739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.1428187405 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 517532961 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1428187405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.1428187405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.774366245 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 530601799 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=774366245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.774366245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.2412089602 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 639313632 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2412089602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.2412089602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.1212649358 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 525408834 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1212649358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.1212649358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.3168236838 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 46821554 ps |
| CPU time | 0.82 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168236838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.3168236838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.580462404 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 6559190034 ps |
| CPU time | 16.09 seconds |
| Started | Sep 18 01:02:49 PM UTC 24 |
| Finished | Sep 18 01:03:07 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=580462404 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.580462404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.663565260 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 21382252774 ps |
| CPU time | 32.36 seconds |
| Started | Sep 18 01:02:49 PM UTC 24 |
| Finished | Sep 18 01:03:23 PM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663565260 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.663565260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.2822826333 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 28802133157 ps |
| CPU time | 41.91 seconds |
| Started | Sep 18 01:02:50 PM UTC 24 |
| Finished | Sep 18 01:03:33 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822826333 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.2822826333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.3221025500 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 213470533 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:02:50 PM UTC 24 |
| Finished | Sep 18 01:02:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221025500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.3221025500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1054640348 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 144434020 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:02:50 PM UTC 24 |
| Finished | Sep 18 01:02:52 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054640348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1054640348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.2360947143 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 557120350 ps |
| CPU time | 2.88 seconds |
| Started | Sep 18 01:02:50 PM UTC 24 |
| Finished | Sep 18 01:02:54 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360947143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.2360947143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.2720888423 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 507944107 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 01:02:51 PM UTC 24 |
| Finished | Sep 18 01:02:54 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720888423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2720888423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.1051534488 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 6363272658 ps |
| CPU time | 38.27 seconds |
| Started | Sep 18 01:02:51 PM UTC 24 |
| Finished | Sep 18 01:03:31 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051534488 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.1051534488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.1984812334 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 747538713 ps |
| CPU time | 3.68 seconds |
| Started | Sep 18 01:02:51 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984812334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.1984812334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.146369826 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 136957364 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146369826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_disconnected.146369826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_enable.3487620293 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 41041993 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:55 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487620293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.3487620293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.2932935845 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 824800150 ps |
| CPU time | 4.17 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:58 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932935845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.2932935845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.2238739313 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 491250893 ps |
| CPU time | 2.4 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238739313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.2238739313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.472359583 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 243456729 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472359583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_fifo_levels.472359583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.1782886541 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 251587151 ps |
| CPU time | 2.35 seconds |
| Started | Sep 18 01:02:53 PM UTC 24 |
| Finished | Sep 18 01:02:56 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782886541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.1782886541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.2014790549 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 195144129 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:02:54 PM UTC 24 |
| Finished | Sep 18 01:02:57 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014790549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.2014790549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.1565827625 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 145827865 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:02:56 PM UTC 24 |
| Finished | Sep 18 01:02:58 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565827625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.1565827625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.3921060560 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 226849453 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:02:56 PM UTC 24 |
| Finished | Sep 18 01:02:59 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921060560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.3921060560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.189861232 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 4140100158 ps |
| CPU time | 108.66 seconds |
| Started | Sep 18 01:02:54 PM UTC 24 |
| Finished | Sep 18 01:04:45 PM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189861232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.189861232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2034514695 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 11085332824 ps |
| CPU time | 133.05 seconds |
| Started | Sep 18 01:02:56 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034514695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2034514695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.2216037811 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 245496493 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:02:56 PM UTC 24 |
| Finished | Sep 18 01:02:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216037811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.2216037811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.3484010009 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 8614218106 ps |
| CPU time | 21.9 seconds |
| Started | Sep 18 01:02:56 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484010009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.3484010009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.2059065668 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 8955028528 ps |
| CPU time | 13.86 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:03:13 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059065668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.2059065668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.1749265190 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 3988827249 ps |
| CPU time | 104.18 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749265190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.1749265190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.1107395752 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 2711563782 ps |
| CPU time | 75.69 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107395752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.1107395752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3656074539 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 284021876 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:03:00 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656074539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3656074539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.1469650750 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 186224251 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:03:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469650750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1469650750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.3121939492 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 3404114970 ps |
| CPU time | 27.22 seconds |
| Started | Sep 18 01:02:58 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121939492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.3121939492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.4167198493 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 212772586 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:02:59 PM UTC 24 |
| Finished | Sep 18 01:03:01 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167198493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.4167198493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.241330198 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 182130479 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:02:59 PM UTC 24 |
| Finished | Sep 18 01:03:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241330198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.241330198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.1551929094 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 144364161 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551929094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.1551929094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.1836504343 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 157601513 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836504343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.1836504343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.1545333616 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 184570898 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545333616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.1545333616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.129421452 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 156147482 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129421452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pending_in_trans.129421452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.444084499 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 249062221 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:05 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444084499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.444084499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.3912275161 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 211664813 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:03:01 PM UTC 24 |
| Finished | Sep 18 01:03:04 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912275161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.3912275161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.3846540054 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 48449121 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:03:02 PM UTC 24 |
| Finished | Sep 18 01:03:05 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846540054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3846540054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.946322717 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 19356338950 ps |
| CPU time | 55 seconds |
| Started | Sep 18 01:03:02 PM UTC 24 |
| Finished | Sep 18 01:04:00 PM UTC 24 |
| Peak memory | 235012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946322717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_pkt_buffer.946322717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.1741675563 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 186920187 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:03:02 PM UTC 24 |
| Finished | Sep 18 01:03:05 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741675563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.1741675563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3264724381 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 162413229 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 01:03:02 PM UTC 24 |
| Finished | Sep 18 01:03:05 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264724381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3264724381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.17772298 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 212503576 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17772298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_random_length_in_transaction.17772298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3891769680 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 245090642 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891769680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3891769680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.4211514643 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 140159646 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:08 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211514643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.4211514643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2931498268 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 266096659 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931498268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2931498268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.302304319 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 167933160 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302304319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.302304319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.3273001927 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 170532085 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273001927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.3273001927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.410979550 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 221303630 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=410979550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.410979550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1815526374 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 1873058828 ps |
| CPU time | 13.32 seconds |
| Started | Sep 18 01:03:06 PM UTC 24 |
| Finished | Sep 18 01:03:21 PM UTC 24 |
| Peak memory | 234756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815526374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1815526374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.2477892028 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 156710372 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:03:07 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477892028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.2477892028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.905217578 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 164503881 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:03:07 PM UTC 24 |
| Finished | Sep 18 01:03:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905217578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_stall_trans.905217578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.3837054246 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 752678927 ps |
| CPU time | 2.37 seconds |
| Started | Sep 18 01:03:08 PM UTC 24 |
| Finished | Sep 18 01:03:11 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837054246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.3837054246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3212854625 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 2748857693 ps |
| CPU time | 20.65 seconds |
| Started | Sep 18 01:03:07 PM UTC 24 |
| Finished | Sep 18 01:03:29 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212854625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3212854625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.3952440861 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 1237038196 ps |
| CPU time | 26.62 seconds |
| Started | Sep 18 01:02:51 PM UTC 24 |
| Finished | Sep 18 01:03:19 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952440861 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.3952440861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.1920452290 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 530987181 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:03:09 PM UTC 24 |
| Finished | Sep 18 01:03:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1920452290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.1920452290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.148760163 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 556939404 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:10:36 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=148760163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_t x_rx_disruption.148760163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.2195267647 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 677702325 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:10:37 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2195267647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.2195267647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.699390021 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 542049087 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:10:37 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=699390021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_t x_rx_disruption.699390021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.2936241613 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 670671889 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:10:37 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2936241613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.2936241613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.2108721431 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 524028463 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:10:37 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2108721431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.2108721431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.2611885108 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 590734323 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:37 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2611885108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.2611885108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2134820174 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 587091604 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:38 PM UTC 24 |
| Finished | Sep 18 01:10:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2134820174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2134820174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.3073360182 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 544816883 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:38 PM UTC 24 |
| Finished | Sep 18 01:10:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3073360182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.3073360182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.386130838 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 539224074 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:10:38 PM UTC 24 |
| Finished | Sep 18 01:10:43 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=386130838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_t x_rx_disruption.386130838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.1489677019 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 38057514 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:53:12 PM UTC 24 |
| Finished | Sep 18 12:53:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489677019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.1489677019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3663852040 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 10237107794 ps |
| CPU time | 12.41 seconds |
| Started | Sep 18 12:52:16 PM UTC 24 |
| Finished | Sep 18 12:52:31 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663852040 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.3663852040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.8034313 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 13449308517 ps |
| CPU time | 20.48 seconds |
| Started | Sep 18 12:52:17 PM UTC 24 |
| Finished | Sep 18 12:52:39 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=8034313 -assert nopostproc +UVM_TESTNAME=usbdev_base_tes t +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbde v-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.8034313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.192810971 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 24034156920 ps |
| CPU time | 41.44 seconds |
| Started | Sep 18 12:52:17 PM UTC 24 |
| Finished | Sep 18 12:53:00 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192810971 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.192810971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1928917234 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 183865977 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:52:18 PM UTC 24 |
| Finished | Sep 18 12:52:21 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928917234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.1928917234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3180534476 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 200291624 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:52:18 PM UTC 24 |
| Finished | Sep 18 12:52:21 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180534476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.3180534476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.1167743684 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 167069380 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:52:19 PM UTC 24 |
| Finished | Sep 18 12:52:22 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167743684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.1167743684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.355492830 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 164364568 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:52:19 PM UTC 24 |
| Finished | Sep 18 12:52:22 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355492830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.355492830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.2682152742 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 486875158 ps |
| CPU time | 2.58 seconds |
| Started | Sep 18 12:52:20 PM UTC 24 |
| Finished | Sep 18 12:52:24 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682152742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.2682152742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.1441123650 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 1070592529 ps |
| CPU time | 4.8 seconds |
| Started | Sep 18 12:52:20 PM UTC 24 |
| Finished | Sep 18 12:52:27 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441123650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.1441123650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.4125185238 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 14297152148 ps |
| CPU time | 40.91 seconds |
| Started | Sep 18 12:52:20 PM UTC 24 |
| Finished | Sep 18 12:53:03 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125185238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.4125185238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.2079548536 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 1244556626 ps |
| CPU time | 32 seconds |
| Started | Sep 18 12:52:24 PM UTC 24 |
| Finished | Sep 18 12:52:57 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079548536 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.2079548536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1042900485 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 932041637 ps |
| CPU time | 3.58 seconds |
| Started | Sep 18 12:52:25 PM UTC 24 |
| Finished | Sep 18 12:52:30 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042900485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.1042900485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.3331768477 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 171983570 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:52:25 PM UTC 24 |
| Finished | Sep 18 12:52:28 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331768477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.3331768477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1984870551 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 43447988 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 12:52:25 PM UTC 24 |
| Finished | Sep 18 12:52:27 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984870551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1984870551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.338088784 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 722967889 ps |
| CPU time | 4.02 seconds |
| Started | Sep 18 12:52:25 PM UTC 24 |
| Finished | Sep 18 12:52:30 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338088784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.338088784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.860446652 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 181089168 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:52:27 PM UTC 24 |
| Finished | Sep 18 12:52:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860446652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_fifo_levels.860446652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.459836406 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 273790190 ps |
| CPU time | 3.22 seconds |
| Started | Sep 18 12:52:29 PM UTC 24 |
| Finished | Sep 18 12:52:34 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459836406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_fifo_rst.459836406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.3501589271 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 121185685862 ps |
| CPU time | 227.8 seconds |
| Started | Sep 18 12:52:29 PM UTC 24 |
| Finished | Sep 18 12:56:21 PM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501589271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.3501589271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2831305693 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 81109427376 ps |
| CPU time | 155.76 seconds |
| Started | Sep 18 12:52:32 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831305693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2831305693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.3204676284 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 119976195493 ps |
| CPU time | 224.98 seconds |
| Started | Sep 18 12:52:32 PM UTC 24 |
| Finished | Sep 18 12:56:21 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3204676284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.3204676284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.2319424820 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 92158965319 ps |
| CPU time | 211.41 seconds |
| Started | Sep 18 12:52:33 PM UTC 24 |
| Finished | Sep 18 12:56:08 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319424820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.2319424820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3317407276 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 199876771 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 12:52:33 PM UTC 24 |
| Finished | Sep 18 12:52:36 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317407276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3317407276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.233627025 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 143030876 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:52:33 PM UTC 24 |
| Finished | Sep 18 12:52:35 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233627025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_stall.233627025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.2887950624 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 189566261 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:52:35 PM UTC 24 |
| Finished | Sep 18 12:52:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887950624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.2887950624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.3899281741 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 5464335278 ps |
| CPU time | 61.4 seconds |
| Started | Sep 18 12:52:33 PM UTC 24 |
| Finished | Sep 18 12:53:36 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899281741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3899281741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.3391458126 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 4274229841 ps |
| CPU time | 53.18 seconds |
| Started | Sep 18 12:52:35 PM UTC 24 |
| Finished | Sep 18 12:53:30 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391458126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.3391458126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.3870018723 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 245166153 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:52:35 PM UTC 24 |
| Finished | Sep 18 12:52:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870018723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.3870018723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1412754574 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 10008179611 ps |
| CPU time | 27.89 seconds |
| Started | Sep 18 12:52:37 PM UTC 24 |
| Finished | Sep 18 12:53:07 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412754574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.1412754574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2613482184 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 9839879673 ps |
| CPU time | 29.78 seconds |
| Started | Sep 18 12:52:37 PM UTC 24 |
| Finished | Sep 18 12:53:09 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613482184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2613482184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.2836268612 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 3519857595 ps |
| CPU time | 104.43 seconds |
| Started | Sep 18 12:52:37 PM UTC 24 |
| Finished | Sep 18 12:54:24 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836268612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.2836268612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.997655404 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 3837627610 ps |
| CPU time | 121.26 seconds |
| Started | Sep 18 12:52:39 PM UTC 24 |
| Finished | Sep 18 12:54:43 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=997655404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.997655404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.3410814670 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 250134520 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:52:40 PM UTC 24 |
| Finished | Sep 18 12:52:42 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410814670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.3410814670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.915614794 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 181760345 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 12:52:40 PM UTC 24 |
| Finished | Sep 18 12:52:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=915614794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.915614794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3973765535 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 2188785720 ps |
| CPU time | 29.48 seconds |
| Started | Sep 18 12:52:42 PM UTC 24 |
| Finished | Sep 18 12:53:13 PM UTC 24 |
| Peak memory | 235132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973765535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3973765535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.593396980 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 2072758166 ps |
| CPU time | 66.69 seconds |
| Started | Sep 18 12:52:43 PM UTC 24 |
| Finished | Sep 18 12:53:51 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593396980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.593396980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.332138466 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 2688913933 ps |
| CPU time | 33.04 seconds |
| Started | Sep 18 12:52:43 PM UTC 24 |
| Finished | Sep 18 12:53:17 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332138466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.332138466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.1409572280 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 234003629 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:52:46 PM UTC 24 |
| Finished | Sep 18 12:52:49 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409572280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.1409572280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2023406973 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 182665741 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:52:49 PM UTC 24 |
| Finished | Sep 18 12:52:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023406973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2023406973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.2228259130 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 270583836 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:52:51 PM UTC 24 |
| Finished | Sep 18 12:52:54 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228259130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.2228259130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.2338613800 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 175989061 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:52:51 PM UTC 24 |
| Finished | Sep 18 12:52:54 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338613800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.2338613800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.3473008956 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 171491973 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:52:52 PM UTC 24 |
| Finished | Sep 18 12:52:55 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473008956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.3473008956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.1747568751 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 250687057 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:52:55 PM UTC 24 |
| Finished | Sep 18 12:52:57 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747568751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.1747568751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.2138303747 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 204785471 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:52:55 PM UTC 24 |
| Finished | Sep 18 12:52:57 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138303747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.2138303747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.3385083519 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 194802296 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:52:55 PM UTC 24 |
| Finished | Sep 18 12:52:57 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385083519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.3385083519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.823994941 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 250267295 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:52:56 PM UTC 24 |
| Finished | Sep 18 12:52:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823994941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.823994941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.1511698068 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 196145146 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:52:58 PM UTC 24 |
| Finished | Sep 18 12:53:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511698068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.1511698068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3160754417 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 89384335 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 12:52:58 PM UTC 24 |
| Finished | Sep 18 12:53:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160754417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3160754417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.1807548878 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 14894057331 ps |
| CPU time | 47.77 seconds |
| Started | Sep 18 12:52:58 PM UTC 24 |
| Finished | Sep 18 12:53:48 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807548878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.1807548878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.2778552231 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 185040057 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:52:58 PM UTC 24 |
| Finished | Sep 18 12:53:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778552231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.2778552231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.89221294 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 240726414 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:52:58 PM UTC 24 |
| Finished | Sep 18 12:53:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89221294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_pkt_sent.89221294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.3154648522 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 6973142531 ps |
| CPU time | 62.77 seconds |
| Started | Sep 18 12:53:02 PM UTC 24 |
| Finished | Sep 18 12:54:06 PM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154648522 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.3154648522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.2943769665 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 6892999779 ps |
| CPU time | 65.92 seconds |
| Started | Sep 18 12:53:02 PM UTC 24 |
| Finished | Sep 18 12:54:09 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943769665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.2943769665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.1315019355 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 6671711001 ps |
| CPU time | 30.23 seconds |
| Started | Sep 18 12:53:02 PM UTC 24 |
| Finished | Sep 18 12:53:34 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315019355 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.1315019355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2305537001 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 165473559 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 12:53:00 PM UTC 24 |
| Finished | Sep 18 12:53:02 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305537001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2305537001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.1397232441 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 226847768 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:53:01 PM UTC 24 |
| Finished | Sep 18 12:53:03 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397232441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.1397232441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.397001527 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 20154676970 ps |
| CPU time | 42.81 seconds |
| Started | Sep 18 12:53:02 PM UTC 24 |
| Finished | Sep 18 12:53:46 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397001527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_resume_link_active.397001527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.4161719295 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 181973657 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:53:02 PM UTC 24 |
| Finished | Sep 18 12:53:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161719295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.4161719295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.1762984010 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 361260409 ps |
| CPU time | 2.17 seconds |
| Started | Sep 18 12:53:03 PM UTC 24 |
| Finished | Sep 18 12:53:06 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762984010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.1762984010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.3335849365 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 204569605 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:53:04 PM UTC 24 |
| Finished | Sep 18 12:53:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335849365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.3335849365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.1207120415 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 510313955 ps |
| CPU time | 2.32 seconds |
| Started | Sep 18 12:53:12 PM UTC 24 |
| Finished | Sep 18 12:53:15 PM UTC 24 |
| Peak memory | 252144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207120415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1207120415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.2142044952 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 443734121 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:53:04 PM UTC 24 |
| Finished | Sep 18 12:53:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142044952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.2142044952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.426389974 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 215826568 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:53:06 PM UTC 24 |
| Finished | Sep 18 12:53:08 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426389974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.426389974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.3951121568 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 157198453 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:53:07 PM UTC 24 |
| Finished | Sep 18 12:53:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951121568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.3951121568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.634050475 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 145158494 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:53:08 PM UTC 24 |
| Finished | Sep 18 12:53:10 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634050475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_setup_trans_ignored.634050475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.61843928 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 202544843 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:53:08 PM UTC 24 |
| Finished | Sep 18 12:53:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61843928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 3.usbdev_smoke.61843928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.1655802225 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 2099256983 ps |
| CPU time | 61.45 seconds |
| Started | Sep 18 12:53:08 PM UTC 24 |
| Finished | Sep 18 12:54:11 PM UTC 24 |
| Peak memory | 228152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655802225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1655802225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.653718750 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 226459215 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:53:08 PM UTC 24 |
| Finished | Sep 18 12:53:10 PM UTC 24 |
| Peak memory | 215400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653718750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.653718750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.1672980780 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 157604754 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:53:08 PM UTC 24 |
| Finished | Sep 18 12:53:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672980780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.1672980780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.1531578269 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 1227611926 ps |
| CPU time | 5.45 seconds |
| Started | Sep 18 12:53:09 PM UTC 24 |
| Finished | Sep 18 12:53:16 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531578269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.1531578269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3761604596 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 3267006059 ps |
| CPU time | 29.71 seconds |
| Started | Sep 18 12:53:09 PM UTC 24 |
| Finished | Sep 18 12:53:40 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761604596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.3761604596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.316726321 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 3627164281 ps |
| CPU time | 24.94 seconds |
| Started | Sep 18 12:52:24 PM UTC 24 |
| Finished | Sep 18 12:52:50 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316726321 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.316726321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2257220193 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 473545943 ps |
| CPU time | 2.31 seconds |
| Started | Sep 18 12:53:10 PM UTC 24 |
| Finished | Sep 18 12:53:14 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2257220193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2257220193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.3506369771 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 132462900 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:03:26 PM UTC 24 |
| Finished | Sep 18 01:03:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506369771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.3506369771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.1039199875 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 4725510987 ps |
| CPU time | 7.91 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039199875 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.1039199875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3401205893 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 15274881505 ps |
| CPU time | 21.71 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:34 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401205893 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3401205893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.313561036 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 31404123766 ps |
| CPU time | 46.84 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:59 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=313561036 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.313561036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.1550624676 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 146275780 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:13 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550624676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.1550624676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.162511330 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 139345701 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:13 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162511330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_bitstuff_err.162511330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.3304095578 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 387919039 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304095578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.3304095578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3316687217 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 1138778937 ps |
| CPU time | 3.45 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:16 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316687217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3316687217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.3475008720 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 15017176529 ps |
| CPU time | 26.66 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:39 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475008720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3475008720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.673908672 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 4776767256 ps |
| CPU time | 37.25 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=673908672 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.673908672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3671971281 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 585379035 ps |
| CPU time | 2.69 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671971281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3671971281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.1054755622 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 157073001 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:15 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054755622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.1054755622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_enable.615095571 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 64731554 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615095571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.615095571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.2995383979 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 806123758 ps |
| CPU time | 3.26 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995383979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.2995383979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1224077591 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 501150895 ps |
| CPU time | 2.75 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224077591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1224077591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.507759121 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 266079208 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:03:13 PM UTC 24 |
| Finished | Sep 18 01:03:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=507759121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_fifo_levels.507759121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3940503157 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 280039351 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:03:18 PM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940503157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3940503157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.1047927727 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 178721506 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047927727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.1047927727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2671514553 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 140827168 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671514553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2671514553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.832496482 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 215325238 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:03:17 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832496482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_trans.832496482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.2645641427 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 3884527049 ps |
| CPU time | 29.29 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 230364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645641427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.2645641427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.665206482 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 12237531275 ps |
| CPU time | 82.51 seconds |
| Started | Sep 18 01:03:15 PM UTC 24 |
| Finished | Sep 18 01:04:39 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=665206482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.665206482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.1859101598 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 227795698 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859101598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.1859101598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.2105111580 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 12409666707 ps |
| CPU time | 22.38 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:40 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105111580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.2105111580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3498783098 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 4065957143 ps |
| CPU time | 8.11 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498783098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3498783098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.1199450438 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 4152844063 ps |
| CPU time | 38.72 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:57 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199450438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1199450438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.607007588 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 2955320662 ps |
| CPU time | 27.48 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607007588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.607007588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.2898854552 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 249447336 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:03:16 PM UTC 24 |
| Finished | Sep 18 01:03:19 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898854552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.2898854552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.6037056 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 228610974 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6037056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.6037056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1693345895 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 2698190199 ps |
| CPU time | 18.83 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:38 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693345895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1693345895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.1190692135 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 171716768 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 215480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190692135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.1190692135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.521047280 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 152276298 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521047280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.521047280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.4131189585 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 220630147 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:21 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131189585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.4131189585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.2803226690 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 156643061 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:21 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803226690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.2803226690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2816239446 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 193315402 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:03:18 PM UTC 24 |
| Finished | Sep 18 01:03:21 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816239446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2816239446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.3099062437 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 183786164 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:03:19 PM UTC 24 |
| Finished | Sep 18 01:03:22 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099062437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.3099062437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.3213055145 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 155799011 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:03:20 PM UTC 24 |
| Finished | Sep 18 01:03:23 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213055145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.3213055145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.558104310 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 296277233 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 01:03:20 PM UTC 24 |
| Finished | Sep 18 01:03:23 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=558104310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.558104310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3238501500 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 143600708 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:03:20 PM UTC 24 |
| Finished | Sep 18 01:03:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238501500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3238501500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.1981031451 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 31702071 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:03:22 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981031451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.1981031451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.1997830000 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 6633727263 ps |
| CPU time | 18.29 seconds |
| Started | Sep 18 01:03:22 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 228196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997830000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.1997830000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.2382141539 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 184075730 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382141539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.2382141539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.1753005781 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 211431565 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753005781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.1753005781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3051860949 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 189821906 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051860949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3051860949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3323172871 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 196477949 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323172871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3323172871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.3289235707 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 139781636 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289235707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.3289235707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.2822524999 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 249257962 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822524999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.2822524999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.1611241326 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 191935859 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611241326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.1611241326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2805244173 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 158915531 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805244173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2805244173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.4252724668 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 261670653 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252724668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.4252724668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.1631597954 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 1967051481 ps |
| CPU time | 18.01 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631597954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.1631597954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.2509455210 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 164837930 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:03:23 PM UTC 24 |
| Finished | Sep 18 01:03:25 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509455210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.2509455210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.2156048632 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 190215348 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:03:24 PM UTC 24 |
| Finished | Sep 18 01:03:26 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156048632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.2156048632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.3247476550 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 616549723 ps |
| CPU time | 2.16 seconds |
| Started | Sep 18 01:03:24 PM UTC 24 |
| Finished | Sep 18 01:03:27 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247476550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.3247476550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.973520355 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 2706449723 ps |
| CPU time | 71.6 seconds |
| Started | Sep 18 01:03:24 PM UTC 24 |
| Finished | Sep 18 01:04:37 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973520355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_streaming_out.973520355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.3811800108 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 4994665895 ps |
| CPU time | 31.17 seconds |
| Started | Sep 18 01:03:11 PM UTC 24 |
| Finished | Sep 18 01:03:44 PM UTC 24 |
| Peak memory | 218404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811800108 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.3811800108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.952053415 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 459424575 ps |
| CPU time | 2.56 seconds |
| Started | Sep 18 01:03:24 PM UTC 24 |
| Finished | Sep 18 01:03:28 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=952053415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.952053415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.1008428835 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 619321967 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:10:39 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1008428835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.1008428835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.1155523607 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 602360332 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:39 PM UTC 24 |
| Finished | Sep 18 01:10:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1155523607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.1155523607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.2064959318 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 436505619 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:10:39 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2064959318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.2064959318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.3085343632 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 498180791 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:10:39 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3085343632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.3085343632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.3770237275 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 531097350 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:10:40 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3770237275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.3770237275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.1668707188 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 558833154 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:10:40 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1668707188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.1668707188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.687668067 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 429920442 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:10:40 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=687668067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_t x_rx_disruption.687668067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.3117604731 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 596049340 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:10:40 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3117604731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.3117604731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.1619289749 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 535476201 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:40 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1619289749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.1619289749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.2739858651 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 553676202 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:10:44 PM UTC 24 |
| Finished | Sep 18 01:10:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2739858651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.2739858651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.3948247248 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 35041771 ps |
| CPU time | 0.91 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948247248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3948247248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.187118698 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 10728987877 ps |
| CPU time | 16.7 seconds |
| Started | Sep 18 01:03:26 PM UTC 24 |
| Finished | Sep 18 01:03:43 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=187118698 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.187118698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.3442287068 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 14824288202 ps |
| CPU time | 19.08 seconds |
| Started | Sep 18 01:03:26 PM UTC 24 |
| Finished | Sep 18 01:03:46 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442287068 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3442287068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3496235290 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 31094385606 ps |
| CPU time | 48.02 seconds |
| Started | Sep 18 01:03:26 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496235290 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3496235290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2757891670 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 154219556 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:03:27 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757891670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2757891670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.3783221472 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 145641039 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:03:27 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783221472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.3783221472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.758735284 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 385838053 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 01:03:27 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758735284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.758735284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.1375362212 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 1001809920 ps |
| CPU time | 3.3 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:32 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375362212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.1375362212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.1457737784 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 28754572930 ps |
| CPU time | 44.87 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:04:14 PM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457737784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.1457737784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.3245895146 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 7077928443 ps |
| CPU time | 43.43 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245895146 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3245895146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.84386164 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 502177815 ps |
| CPU time | 2.91 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:32 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84386164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.84386164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.1660415644 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 148530715 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660415644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.1660415644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_enable.3263599237 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 82385412 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:30 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263599237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.3263599237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.539835778 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 921375701 ps |
| CPU time | 3.18 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:32 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539835778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.539835778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.1421741897 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 323807151 ps |
| CPU time | 3.02 seconds |
| Started | Sep 18 01:03:29 PM UTC 24 |
| Finished | Sep 18 01:03:33 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421741897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.1421741897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.3544266309 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 176248851 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:03:29 PM UTC 24 |
| Finished | Sep 18 01:03:32 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544266309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.3544266309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.2467970979 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 146995961 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:03:33 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467970979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.2467970979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.1751264177 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 226085464 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:03:34 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751264177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.1751264177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.622117753 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 3430659302 ps |
| CPU time | 31.81 seconds |
| Started | Sep 18 01:03:29 PM UTC 24 |
| Finished | Sep 18 01:04:03 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622117753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.622117753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.2756193411 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 9059527128 ps |
| CPU time | 64.31 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:04:37 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756193411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.2756193411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.4052581674 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 212579986 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:03:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052581674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.4052581674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1893408299 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 24947908769 ps |
| CPU time | 45.28 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:04:18 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893408299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1893408299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.3584506202 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 10676721108 ps |
| CPU time | 18.88 seconds |
| Started | Sep 18 01:03:31 PM UTC 24 |
| Finished | Sep 18 01:03:51 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584506202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.3584506202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.953590869 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 4262082629 ps |
| CPU time | 116.18 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:05:32 PM UTC 24 |
| Peak memory | 230780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953590869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.953590869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.1052849687 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 2312828768 ps |
| CPU time | 20.91 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052849687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.1052849687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.1421337915 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 236844047 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:35 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421337915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.1421337915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.4050558496 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 205502953 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:36 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050558496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.4050558496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.2184541277 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 3512269626 ps |
| CPU time | 32.79 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:04:07 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184541277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.2184541277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.2721252977 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 147673851 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:36 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721252977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.2721252977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1363890472 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 174056689 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:36 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363890472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1363890472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.876751931 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 210383169 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:03:33 PM UTC 24 |
| Finished | Sep 18 01:03:36 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876751931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_nak_trans.876751931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.941807429 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 159103151 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941807429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_out_iso.941807429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.1570391591 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 173863100 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570391591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.1570391591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.3687708679 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 203780070 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687708679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.3687708679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.1497754909 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 152302646 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497754909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.1497754909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.1927871941 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 209264832 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927871941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.1927871941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.3379493103 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 218534509 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379493103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.3379493103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.373548114 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 49313971 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:03:35 PM UTC 24 |
| Finished | Sep 18 01:03:37 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373548114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.373548114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.3878761281 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 18008626547 ps |
| CPU time | 56.29 seconds |
| Started | Sep 18 01:03:36 PM UTC 24 |
| Finished | Sep 18 01:04:34 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878761281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.3878761281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.2956785678 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 186917569 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:03:36 PM UTC 24 |
| Finished | Sep 18 01:03:39 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956785678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.2956785678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.398460675 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 160541877 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:03:36 PM UTC 24 |
| Finished | Sep 18 01:03:39 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398460675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_pkt_sent.398460675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1003703333 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 182461885 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:03:36 PM UTC 24 |
| Finished | Sep 18 01:03:39 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003703333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1003703333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.2379733641 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 183956390 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:03:36 PM UTC 24 |
| Finished | Sep 18 01:03:39 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379733641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2379733641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.312812021 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 147011886 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:03:38 PM UTC 24 |
| Finished | Sep 18 01:03:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312812021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_rx_crc_err.312812021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.2686908304 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 344040876 ps |
| CPU time | 2.23 seconds |
| Started | Sep 18 01:03:38 PM UTC 24 |
| Finished | Sep 18 01:03:41 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686908304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.2686908304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.581288255 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 145265683 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:03:38 PM UTC 24 |
| Finished | Sep 18 01:03:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581288255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_setup_stage.581288255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.2570961878 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 170105236 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 01:03:39 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570961878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.2570961878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.1752318917 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 224554181 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:03:39 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752318917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.1752318917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.3348305280 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 2821912926 ps |
| CPU time | 79.83 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348305280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.3348305280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.2225482332 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 166009104 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225482332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.2225482332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.2973396110 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 186484630 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:03:42 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973396110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.2973396110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.3755475502 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 1247758508 ps |
| CPU time | 4.54 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:03:45 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755475502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.3755475502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.1952172245 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 2711928074 ps |
| CPU time | 27.28 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:04:08 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952172245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.1952172245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.245339799 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 1253279271 ps |
| CPU time | 27.58 seconds |
| Started | Sep 18 01:03:28 PM UTC 24 |
| Finished | Sep 18 01:03:57 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245339799 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.245339799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.2092170344 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 504530034 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 01:03:40 PM UTC 24 |
| Finished | Sep 18 01:03:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2092170344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.2092170344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.2608500120 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 564519848 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:45 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2608500120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_ tx_rx_disruption.2608500120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.534552030 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 483567128 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:10:45 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=534552030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_t x_rx_disruption.534552030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.3814508675 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 554459203 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:45 PM UTC 24 |
| Finished | Sep 18 01:10:50 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3814508675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.3814508675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.2160134352 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 558468441 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:10:49 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2160134352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.2160134352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.2524240049 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 578995240 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:10:49 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2524240049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.2524240049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.2568505826 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 509210112 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:49 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2568505826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.2568505826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.341022821 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 594099290 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341022821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_t x_rx_disruption.341022821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.660247759 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 602757691 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=660247759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.660247759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.2568393124 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 475414928 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2568393124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.2568393124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.2360574031 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 525379947 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2360574031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.2360574031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.2684782071 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 38961951 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:03:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684782071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2684782071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.2182392849 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 11721516990 ps |
| CPU time | 30.33 seconds |
| Started | Sep 18 01:03:41 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182392849 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.2182392849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.577244888 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 19209277267 ps |
| CPU time | 30.59 seconds |
| Started | Sep 18 01:03:41 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=577244888 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.577244888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.1120382780 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 26114627885 ps |
| CPU time | 36 seconds |
| Started | Sep 18 01:03:42 PM UTC 24 |
| Finished | Sep 18 01:04:19 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120382780 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.1120382780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.1577250344 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 163799938 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:03:42 PM UTC 24 |
| Finished | Sep 18 01:03:44 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577250344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.1577250344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.893014938 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 197853913 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:03:42 PM UTC 24 |
| Finished | Sep 18 01:03:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=893014938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_bitstuff_err.893014938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2047530488 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 424039033 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 01:03:43 PM UTC 24 |
| Finished | Sep 18 01:03:46 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047530488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2047530488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.1738403745 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 303111707 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:03:43 PM UTC 24 |
| Finished | Sep 18 01:03:46 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738403745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.1738403745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.3888696715 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 27788675865 ps |
| CPU time | 55.82 seconds |
| Started | Sep 18 01:03:43 PM UTC 24 |
| Finished | Sep 18 01:04:41 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888696715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.3888696715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.1305817859 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 5644934558 ps |
| CPU time | 50.53 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:04:36 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305817859 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.1305817859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.2975097316 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 936110560 ps |
| CPU time | 2.33 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:47 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975097316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.2975097316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.1679719422 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 137799850 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679719422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.1679719422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_enable.3060579556 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 31444634 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060579556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.3060579556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.2216807140 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 902637973 ps |
| CPU time | 3.67 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:49 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216807140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.2216807140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.3399417290 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 200886120 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:03:45 PM UTC 24 |
| Finished | Sep 18 01:03:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399417290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.3399417290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.3391819437 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 439597830 ps |
| CPU time | 3.29 seconds |
| Started | Sep 18 01:03:45 PM UTC 24 |
| Finished | Sep 18 01:03:49 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391819437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.3391819437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.3582250678 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 159530984 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:03:45 PM UTC 24 |
| Finished | Sep 18 01:03:48 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582250678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.3582250678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.4259078423 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 162456862 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259078423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.4259078423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.506250329 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 217247119 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506250329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_trans.506250329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.1019898223 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 2861437486 ps |
| CPU time | 74.89 seconds |
| Started | Sep 18 01:03:45 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019898223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.1019898223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.2820062710 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 5092496481 ps |
| CPU time | 46.93 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:04:36 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820062710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.2820062710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1406033987 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 255734208 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406033987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1406033987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.912827613 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 12654545179 ps |
| CPU time | 24.08 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912827613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_resume.912827613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3720361162 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 5478249054 ps |
| CPU time | 8.48 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:03:57 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720361162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3720361162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.3327611253 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 3459027777 ps |
| CPU time | 34.27 seconds |
| Started | Sep 18 01:03:47 PM UTC 24 |
| Finished | Sep 18 01:04:23 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327611253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3327611253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.921291623 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 2610326475 ps |
| CPU time | 22.98 seconds |
| Started | Sep 18 01:03:48 PM UTC 24 |
| Finished | Sep 18 01:04:12 PM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=921291623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.921291623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.1505943090 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 233054163 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:03:48 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505943090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.1505943090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.762784240 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 201369651 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:03:48 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762784240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.762784240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.1272180967 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 3207584272 ps |
| CPU time | 25.13 seconds |
| Started | Sep 18 01:03:48 PM UTC 24 |
| Finished | Sep 18 01:04:14 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272180967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.1272180967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.1575287945 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 156350924 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:03:48 PM UTC 24 |
| Finished | Sep 18 01:03:50 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575287945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1575287945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.2072844376 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 167297458 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:03:49 PM UTC 24 |
| Finished | Sep 18 01:03:51 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072844376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.2072844376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.2607756153 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 186475334 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:03:49 PM UTC 24 |
| Finished | Sep 18 01:03:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607756153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.2607756153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.3677011418 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 155677666 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:03:49 PM UTC 24 |
| Finished | Sep 18 01:03:51 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677011418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.3677011418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.180198881 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 171418138 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:53 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180198881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_out_stall.180198881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3869687436 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 149897185 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869687436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3869687436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.3193656380 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 157799373 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:53 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193656380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.3193656380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.2442573466 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 240854470 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:54 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442573466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2442573466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.413542866 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 148396199 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413542866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.413542866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.2497226061 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 59862770 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:53 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497226061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.2497226061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.2859907156 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 8604719981 ps |
| CPU time | 27.37 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859907156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.2859907156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.1513915460 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 199366060 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:03:51 PM UTC 24 |
| Finished | Sep 18 01:03:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513915460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.1513915460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.1465884653 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 208294882 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:03:52 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465884653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.1465884653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.2259126799 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 196774690 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:03:52 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259126799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.2259126799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.299265860 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 160210743 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:03:52 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299265860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.299265860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.2892197233 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 183956377 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:03:52 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892197233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.2892197233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.2047875505 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 338068507 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:03:52 PM UTC 24 |
| Finished | Sep 18 01:03:55 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047875505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.2047875505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.846039853 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 147079714 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:03:54 PM UTC 24 |
| Finished | Sep 18 01:03:56 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846039853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_setup_stage.846039853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.22916412 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 181291567 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:03:54 PM UTC 24 |
| Finished | Sep 18 01:03:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22916412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_setup_trans_ignored.22916412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.846989925 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 228743909 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:03:54 PM UTC 24 |
| Finished | Sep 18 01:03:57 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846989925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.846989925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.3360451860 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 2115428008 ps |
| CPU time | 14.42 seconds |
| Started | Sep 18 01:03:54 PM UTC 24 |
| Finished | Sep 18 01:04:09 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360451860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.3360451860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.270432461 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 199988982 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:03:54 PM UTC 24 |
| Finished | Sep 18 01:03:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270432461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.270432461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.4027233679 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 146057858 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:03:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027233679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.4027233679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.538077375 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 760070313 ps |
| CPU time | 3.68 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:04:00 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=538077375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_stream_len_max.538077375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.340948768 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 2276111433 ps |
| CPU time | 55.9 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:04:53 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340948768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_streaming_out.340948768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3879235721 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 1527505009 ps |
| CPU time | 9.63 seconds |
| Started | Sep 18 01:03:44 PM UTC 24 |
| Finished | Sep 18 01:03:54 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879235721 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3879235721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.1298600814 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 623981592 ps |
| CPU time | 2.26 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:03:59 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1298600814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.1298600814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.1240792638 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 496044204 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:10:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1240792638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.1240792638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1110683694 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 609810361 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1110683694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1110683694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.5448539 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 593029787 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:10:50 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=5448539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_tx_ rx_disruption.5448539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.2440072617 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 678493203 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:10:51 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2440072617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.2440072617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.2245327222 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 595127986 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:10:51 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2245327222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.2245327222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.1237443247 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 440200896 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:10:51 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1237443247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.1237443247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.461662706 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 512167163 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:10:51 PM UTC 24 |
| Finished | Sep 18 01:11:01 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=461662706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_t x_rx_disruption.461662706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.195104490 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 454490820 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:52 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=195104490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_t x_rx_disruption.195104490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.479497360 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 618678150 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:10:52 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=479497360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_t x_rx_disruption.479497360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.3193197495 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 550284632 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:10:52 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3193197495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.3193197495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2849043193 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 43324207 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849043193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2849043193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.2113648666 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 8968904661 ps |
| CPU time | 15.25 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:04:12 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113648666 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.2113648666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.554698795 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 19266637476 ps |
| CPU time | 30.32 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:04:28 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554698795 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.554698795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.3410585115 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 30436148638 ps |
| CPU time | 53.32 seconds |
| Started | Sep 18 01:03:56 PM UTC 24 |
| Finished | Sep 18 01:04:51 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410585115 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.3410585115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2686861702 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 151518588 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:00 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686861702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2686861702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.3822177073 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 150692562 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:00 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822177073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.3822177073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.2493538978 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 482455098 ps |
| CPU time | 2.6 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:01 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493538978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.2493538978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.1581237769 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 941893427 ps |
| CPU time | 4.78 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:04 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581237769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.1581237769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.4251274112 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 37176331234 ps |
| CPU time | 65.17 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:05:05 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4251274112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.4251274112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.704999128 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 5536228568 ps |
| CPU time | 37.76 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:37 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=704999128 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.704999128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.2782623744 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 605733436 ps |
| CPU time | 2.23 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:01 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782623744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.2782623744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.900106219 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 180138197 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:03:59 PM UTC 24 |
| Finished | Sep 18 01:04:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900106219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_disconnected.900106219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_enable.3799247216 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 37499766 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:03:59 PM UTC 24 |
| Finished | Sep 18 01:04:01 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799247216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.3799247216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.2355122720 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 853415358 ps |
| CPU time | 4.41 seconds |
| Started | Sep 18 01:03:59 PM UTC 24 |
| Finished | Sep 18 01:04:05 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355122720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.2355122720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1786359149 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 334869353 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:04:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786359149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.1786359149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.2996404182 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 465549882 ps |
| CPU time | 3.95 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:04:06 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996404182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.2996404182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.4229686425 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 169123239 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:04:04 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229686425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.4229686425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.2940782435 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 140305055 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:04:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940782435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.2940782435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.3724142935 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 224323632 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:04:03 PM UTC 24 |
| Finished | Sep 18 01:04:05 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724142935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.3724142935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1039848770 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 4930770206 ps |
| CPU time | 137.29 seconds |
| Started | Sep 18 01:04:01 PM UTC 24 |
| Finished | Sep 18 01:06:21 PM UTC 24 |
| Peak memory | 229864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039848770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1039848770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.726431201 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 9162651553 ps |
| CPU time | 69.83 seconds |
| Started | Sep 18 01:04:03 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726431201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.726431201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.1591558113 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 208212745 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:04:03 PM UTC 24 |
| Finished | Sep 18 01:04:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591558113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.1591558113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.1450490793 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 29818616705 ps |
| CPU time | 51.67 seconds |
| Started | Sep 18 01:04:03 PM UTC 24 |
| Finished | Sep 18 01:04:56 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450490793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.1450490793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.3150751115 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 10317611466 ps |
| CPU time | 23.22 seconds |
| Started | Sep 18 01:04:04 PM UTC 24 |
| Finished | Sep 18 01:04:29 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150751115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.3150751115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.1344773285 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 4326117434 ps |
| CPU time | 43.81 seconds |
| Started | Sep 18 01:04:04 PM UTC 24 |
| Finished | Sep 18 01:04:49 PM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344773285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.1344773285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.3007347225 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 1834249662 ps |
| CPU time | 17.03 seconds |
| Started | Sep 18 01:04:04 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007347225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.3007347225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.4079203874 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 238515959 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:04:06 PM UTC 24 |
| Finished | Sep 18 01:04:08 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079203874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.4079203874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.3221401728 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 275915574 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:04:06 PM UTC 24 |
| Finished | Sep 18 01:04:08 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221401728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3221401728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.3855252881 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 3336052424 ps |
| CPU time | 26.84 seconds |
| Started | Sep 18 01:04:06 PM UTC 24 |
| Finished | Sep 18 01:04:34 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855252881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.3855252881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.1391878001 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 154810687 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:04:06 PM UTC 24 |
| Finished | Sep 18 01:04:08 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391878001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1391878001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1315166501 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 147706174 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:04:06 PM UTC 24 |
| Finished | Sep 18 01:04:08 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315166501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1315166501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.2496007159 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 188874047 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:04:08 PM UTC 24 |
| Finished | Sep 18 01:04:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496007159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.2496007159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.6693194 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 171286158 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:04:08 PM UTC 24 |
| Finished | Sep 18 01:04:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6693194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_out_stall.6693194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.760272405 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 193454333 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760272405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_out_trans_nak.760272405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.2658780670 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 150244075 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:11 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658780670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.2658780670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.3214646518 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 181666129 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214646518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.3214646518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.2098514223 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 171823133 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:12 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098514223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.2098514223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.3437756706 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 56496458 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:11 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437756706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.3437756706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.2460661738 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 9975592151 ps |
| CPU time | 27.32 seconds |
| Started | Sep 18 01:04:09 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460661738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.2460661738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.3172231663 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 218254289 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:04:11 PM UTC 24 |
| Finished | Sep 18 01:04:14 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172231663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.3172231663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.3234059915 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 200627452 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:04:11 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234059915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.3234059915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.1259029278 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 253544173 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:04:11 PM UTC 24 |
| Finished | Sep 18 01:04:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259029278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.1259029278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1748686501 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 168847965 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:04:11 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748686501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1748686501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.990802888 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 159926522 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:04:11 PM UTC 24 |
| Finished | Sep 18 01:04:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990802888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.990802888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.3595766106 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 366793529 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595766106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.3595766106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.2524592649 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 187792724 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524592649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.2524592649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3514848392 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 147824097 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514848392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3514848392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.2719398669 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 222569622 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 215408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719398669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.2719398669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.1130154431 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 2871634863 ps |
| CPU time | 24.42 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130154431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.1130154431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.1242517514 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 163181528 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:04:13 PM UTC 24 |
| Finished | Sep 18 01:04:15 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242517514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.1242517514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.874802893 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 187972360 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874802893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_stall_trans.874802893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.2295866530 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 277444186 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:17 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295866530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.2295866530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.3513044410 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 1955058879 ps |
| CPU time | 17.89 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:33 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513044410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.3513044410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.170355545 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 2525793762 ps |
| CPU time | 22.32 seconds |
| Started | Sep 18 01:03:58 PM UTC 24 |
| Finished | Sep 18 01:04:21 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170355545 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.170355545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.1059071622 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 537030592 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1059071622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.1059071622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2170033263 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 578350628 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:52 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2170033263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2170033263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.3663443013 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 544415290 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:10:52 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3663443013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.3663443013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.3918125634 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 528176151 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:54 PM UTC 24 |
| Finished | Sep 18 01:11:00 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3918125634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.3918125634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.2336607683 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 564560920 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2336607683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.2336607683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3916957272 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 544310638 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3916957272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3916957272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.4217931459 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 585457368 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4217931459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.4217931459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.424408664 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 478881080 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=424408664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_t x_rx_disruption.424408664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.3165860908 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 560925207 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3165860908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.3165860908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.649013923 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 533471142 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=649013923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_t x_rx_disruption.649013923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.389556899 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 623747255 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=389556899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_t x_rx_disruption.389556899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.2855666143 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 46923915 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:04:30 PM UTC 24 |
| Finished | Sep 18 01:04:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855666143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.2855666143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.3422576749 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 10379957431 ps |
| CPU time | 19.5 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:35 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422576749 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.3422576749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.2292890840 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 14317099110 ps |
| CPU time | 17.2 seconds |
| Started | Sep 18 01:04:14 PM UTC 24 |
| Finished | Sep 18 01:04:33 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292890840 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2292890840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.1016276864 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 29302871396 ps |
| CPU time | 44.08 seconds |
| Started | Sep 18 01:04:15 PM UTC 24 |
| Finished | Sep 18 01:05:00 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016276864 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.1016276864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.2431792740 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 148549121 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:04:15 PM UTC 24 |
| Finished | Sep 18 01:04:17 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431792740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.2431792740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.2450807821 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 201688982 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450807821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.2450807821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.901574924 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 336162253 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901574924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_data_toggle_clear.901574924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.3399818537 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 561806674 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399818537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.3399818537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1552572985 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 35039606499 ps |
| CPU time | 76.36 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:05:35 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552572985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1552572985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.1978025662 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 451463555 ps |
| CPU time | 7.35 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978025662 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.1978025662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.2850171160 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 833636415 ps |
| CPU time | 3.51 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850171160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.2850171160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.3246947738 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 137197274 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246947738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.3246947738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_enable.2524618909 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 38066278 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524618909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.2524618909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.762290920 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 786707636 ps |
| CPU time | 3.45 seconds |
| Started | Sep 18 01:04:18 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762290920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.762290920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2258114422 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 197879156 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:04:18 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258114422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2258114422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.917204563 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 296184354 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:04:18 PM UTC 24 |
| Finished | Sep 18 01:04:20 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917204563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_fifo_levels.917204563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.587192378 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 248119236 ps |
| CPU time | 2.89 seconds |
| Started | Sep 18 01:04:18 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587192378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_fifo_rst.587192378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.4082406125 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 218147060 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:04:19 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082406125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.4082406125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.2369204930 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 149293095 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:04:19 PM UTC 24 |
| Finished | Sep 18 01:04:22 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369204930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.2369204930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.1729492606 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 166500646 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:04:20 PM UTC 24 |
| Finished | Sep 18 01:04:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729492606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.1729492606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.2249585360 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 4050122279 ps |
| CPU time | 29.41 seconds |
| Started | Sep 18 01:04:19 PM UTC 24 |
| Finished | Sep 18 01:04:50 PM UTC 24 |
| Peak memory | 234896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249585360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.2249585360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.1256221828 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 6988407178 ps |
| CPU time | 42.78 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:05:05 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256221828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.1256221828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1745900984 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 162025608 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745900984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1745900984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.2449568091 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 29485350929 ps |
| CPU time | 58.63 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:05:21 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449568091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.2449568091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.509524185 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 10702821096 ps |
| CPU time | 15.08 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:37 PM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=509524185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_suspend.509524185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.1327767855 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 3008015712 ps |
| CPU time | 33.81 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:56 PM UTC 24 |
| Peak memory | 234940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327767855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1327767855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.590314911 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 4194151172 ps |
| CPU time | 30.34 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:53 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590314911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.590314911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1787715033 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 250413020 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:24 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787715033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1787715033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.4147371077 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 208508367 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:04:21 PM UTC 24 |
| Finished | Sep 18 01:04:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147371077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.4147371077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1103505096 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 3373372043 ps |
| CPU time | 24.99 seconds |
| Started | Sep 18 01:04:22 PM UTC 24 |
| Finished | Sep 18 01:04:49 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103505096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.1103505096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.4128494214 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 159306709 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:04:22 PM UTC 24 |
| Finished | Sep 18 01:04:25 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128494214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.4128494214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.1065502408 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 170175482 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:04:22 PM UTC 24 |
| Finished | Sep 18 01:04:24 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065502408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.1065502408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.859853457 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 217735563 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859853457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_nak_trans.859853457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.2094491396 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 178662358 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094491396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.2094491396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.1322685908 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 161232593 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322685908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.1322685908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.2049404678 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 176156142 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049404678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.2049404678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.2366076291 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 162656753 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366076291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.2366076291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.635105712 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 199643354 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635105712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.635105712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.2078898119 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 186843166 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:04:24 PM UTC 24 |
| Finished | Sep 18 01:04:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078898119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2078898119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.3675371625 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 37591102 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:04:25 PM UTC 24 |
| Finished | Sep 18 01:04:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675371625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.3675371625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.1099777273 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 21457675727 ps |
| CPU time | 62.94 seconds |
| Started | Sep 18 01:04:25 PM UTC 24 |
| Finished | Sep 18 01:05:30 PM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099777273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.1099777273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.897848605 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 232828002 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:04:26 PM UTC 24 |
| Finished | Sep 18 01:04:28 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=897848605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_pkt_received.897848605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.1363615519 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 250277808 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:04:26 PM UTC 24 |
| Finished | Sep 18 01:04:28 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363615519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.1363615519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.1192385093 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 187304437 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192385093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.1192385093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.3057650690 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 168186255 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057650690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.3057650690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1485905713 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 145658211 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485905713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1485905713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.1108734858 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 186931575 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108734858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.1108734858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.2290214405 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 178148056 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:04:27 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290214405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2290214405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.1822325739 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 229502483 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:04:28 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822325739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.1822325739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.3908576854 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 3426841534 ps |
| CPU time | 92.97 seconds |
| Started | Sep 18 01:04:28 PM UTC 24 |
| Finished | Sep 18 01:06:03 PM UTC 24 |
| Peak memory | 230628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908576854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.3908576854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.1180956724 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 160008090 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:04:28 PM UTC 24 |
| Finished | Sep 18 01:04:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1180956724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.1180956724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.1351389639 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 177066206 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:04:29 PM UTC 24 |
| Finished | Sep 18 01:04:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351389639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.1351389639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.3254600107 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 832385099 ps |
| CPU time | 2.51 seconds |
| Started | Sep 18 01:04:29 PM UTC 24 |
| Finished | Sep 18 01:04:32 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254600107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.3254600107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.378508365 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 2578013782 ps |
| CPU time | 72.56 seconds |
| Started | Sep 18 01:04:29 PM UTC 24 |
| Finished | Sep 18 01:05:43 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378508365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_streaming_out.378508365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.3089024704 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 4731090717 ps |
| CPU time | 43.04 seconds |
| Started | Sep 18 01:04:17 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089024704 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.3089024704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.3991981762 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 497640339 ps |
| CPU time | 2.66 seconds |
| Started | Sep 18 01:04:29 PM UTC 24 |
| Finished | Sep 18 01:04:33 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3991981762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.3991981762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.4080434240 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 571526786 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4080434240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.4080434240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.3365901144 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 652267495 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3365901144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.3365901144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.1380719708 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 431690356 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1380719708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.1380719708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.832708237 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 620036073 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=832708237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_t x_rx_disruption.832708237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.2654213611 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 651989454 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2654213611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.2654213611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.2669590582 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 648143808 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:10:56 PM UTC 24 |
| Finished | Sep 18 01:10:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2669590582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.2669590582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.1289727154 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 515458551 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:10:59 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1289727154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.1289727154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.1583222813 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 521396167 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:10:59 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1583222813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.1583222813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.3127260278 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 572182862 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3127260278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.3127260278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.2775667017 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 485989090 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775667017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.2775667017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.739209983 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 66612385 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:04:46 PM UTC 24 |
| Finished | Sep 18 01:04:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=739209983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.739209983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.4143801913 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 5143215992 ps |
| CPU time | 10.97 seconds |
| Started | Sep 18 01:04:30 PM UTC 24 |
| Finished | Sep 18 01:04:43 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143801913 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.4143801913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.2047821845 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 21447613504 ps |
| CPU time | 27.87 seconds |
| Started | Sep 18 01:04:31 PM UTC 24 |
| Finished | Sep 18 01:05:00 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047821845 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.2047821845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.2385955270 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 26292676790 ps |
| CPU time | 37.96 seconds |
| Started | Sep 18 01:04:31 PM UTC 24 |
| Finished | Sep 18 01:05:10 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385955270 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.2385955270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.709873478 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 188463206 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:04:31 PM UTC 24 |
| Finished | Sep 18 01:04:33 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709873478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.709873478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.41920262 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 194374706 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:04:32 PM UTC 24 |
| Finished | Sep 18 01:04:35 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41920262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_bitstuff_err.41920262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.2816359153 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 315528353 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:04:32 PM UTC 24 |
| Finished | Sep 18 01:04:35 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816359153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.2816359153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.2217953831 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 1127778154 ps |
| CPU time | 2.97 seconds |
| Started | Sep 18 01:04:32 PM UTC 24 |
| Finished | Sep 18 01:04:37 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217953831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.2217953831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.3195137386 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 17924246416 ps |
| CPU time | 33.99 seconds |
| Started | Sep 18 01:04:32 PM UTC 24 |
| Finished | Sep 18 01:05:08 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195137386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.3195137386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.3758516574 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 3085609860 ps |
| CPU time | 21.56 seconds |
| Started | Sep 18 01:04:33 PM UTC 24 |
| Finished | Sep 18 01:04:56 PM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758516574 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.3758516574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.2888576995 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 828553331 ps |
| CPU time | 3.31 seconds |
| Started | Sep 18 01:04:33 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888576995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.2888576995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.3685637459 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 150962150 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:04:34 PM UTC 24 |
| Finished | Sep 18 01:04:36 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685637459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.3685637459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_enable.3568591469 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 59535193 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568591469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.3568591469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.3556795888 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 990491916 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:40 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556795888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.3556795888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.2117134976 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 671482649 ps |
| CPU time | 2.12 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:39 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117134976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.2117134976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.3336363598 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 155649744 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336363598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.3336363598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.3770965921 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 506820186 ps |
| CPU time | 3.01 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:40 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770965921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.3770965921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.959211514 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 219390225 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:04:38 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=959211514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.959211514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.2301897050 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 140391850 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:04:37 PM UTC 24 |
| Finished | Sep 18 01:04:40 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301897050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.2301897050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.432213958 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 176333371 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:04:37 PM UTC 24 |
| Finished | Sep 18 01:04:40 PM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432213958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_trans.432213958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.2145548330 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 2861288293 ps |
| CPU time | 23.33 seconds |
| Started | Sep 18 01:04:36 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145548330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.2145548330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.196239078 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 11193686194 ps |
| CPU time | 85.77 seconds |
| Started | Sep 18 01:04:37 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196239078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.196239078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.2008174627 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 201675386 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:04:37 PM UTC 24 |
| Finished | Sep 18 01:04:40 PM UTC 24 |
| Peak memory | 215460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008174627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.2008174627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.3250544625 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 33242061840 ps |
| CPU time | 65.4 seconds |
| Started | Sep 18 01:04:37 PM UTC 24 |
| Finished | Sep 18 01:05:45 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250544625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.3250544625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.2508514791 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 8701133270 ps |
| CPU time | 16.59 seconds |
| Started | Sep 18 01:04:39 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508514791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.2508514791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.4142109412 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 3973394702 ps |
| CPU time | 40.26 seconds |
| Started | Sep 18 01:04:39 PM UTC 24 |
| Finished | Sep 18 01:05:21 PM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142109412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.4142109412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3664596284 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 1831333479 ps |
| CPU time | 12.75 seconds |
| Started | Sep 18 01:04:39 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 234744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664596284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3664596284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.1758083687 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 256575338 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:04:39 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758083687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.1758083687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.812334529 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 198146300 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:04:39 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=812334529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.812334529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1870007614 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 2258532983 ps |
| CPU time | 64.51 seconds |
| Started | Sep 18 01:04:40 PM UTC 24 |
| Finished | Sep 18 01:05:46 PM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870007614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1870007614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3487779333 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 163257939 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:04:40 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487779333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3487779333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.3782443232 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 179120820 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:04:40 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782443232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3782443232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.2234956118 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 218622472 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:04:40 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234956118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.2234956118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.2255854942 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 185735532 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:04:40 PM UTC 24 |
| Finished | Sep 18 01:04:42 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255854942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.2255854942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.961059694 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 200836668 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:43 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961059694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_out_stall.961059694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.719440691 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 142886001 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=719440691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_out_trans_nak.719440691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.547845499 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 149595544 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=547845499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.547845499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.812762274 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 194951666 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=812762274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.812762274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.795291571 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 144467376 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=795291571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.795291571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3802513783 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 61484672 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:04:43 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802513783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3802513783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.1584212237 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 20255779922 ps |
| CPU time | 54.55 seconds |
| Started | Sep 18 01:04:41 PM UTC 24 |
| Finished | Sep 18 01:05:38 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584212237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.1584212237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.2773017886 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 215919418 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773017886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.2773017886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.2505261986 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 216254903 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505261986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.2505261986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2618355634 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 164910946 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:45 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618355634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2618355634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.2050905787 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 162425733 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050905787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.2050905787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.425042216 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 147015756 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=425042216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_rx_crc_err.425042216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.398423744 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 256149136 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398423744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_rx_full.398423744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.3840744629 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 173234896 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:04:43 PM UTC 24 |
| Finished | Sep 18 01:04:46 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840744629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.3840744629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.174217874 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 182330785 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:47 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174217874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 35.usbdev_setup_trans_ignored.174217874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.1907864840 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 189976241 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:47 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907864840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.1907864840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.2008710265 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 3124200060 ps |
| CPU time | 33.5 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:05:20 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008710265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.2008710265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.3768891186 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 178293242 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:47 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768891186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.3768891186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.305556655 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 244795888 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305556655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_stall_trans.305556655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.2615883108 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 892865692 ps |
| CPU time | 2.82 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:49 PM UTC 24 |
| Peak memory | 217932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615883108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.2615883108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.3166238091 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 1408306297 ps |
| CPU time | 11.14 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 228208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166238091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.3166238091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.1406608023 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 1084062956 ps |
| CPU time | 9.54 seconds |
| Started | Sep 18 01:04:33 PM UTC 24 |
| Finished | Sep 18 01:04:44 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406608023 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.1406608023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.409950587 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 628236730 ps |
| CPU time | 2.05 seconds |
| Started | Sep 18 01:04:45 PM UTC 24 |
| Finished | Sep 18 01:04:48 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=409950587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_tx _rx_disruption.409950587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.3563052234 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 461623047 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3563052234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.3563052234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.1227566392 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 503113232 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1227566392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.1227566392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.2542904622 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 531582058 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2542904622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.2542904622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.2143483693 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 498179719 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2143483693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.2143483693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1644657226 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 665748900 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1644657226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1644657226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2466263304 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 500972907 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2466263304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2466263304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.2166660948 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 547167046 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2166660948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.2166660948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.3421635006 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 498267708 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3421635006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.3421635006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.3375768444 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 476131453 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:11:00 PM UTC 24 |
| Finished | Sep 18 01:11:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3375768444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.3375768444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3899309443 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 603298504 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3899309443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3899309443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.2283650912 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 39136664 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283650912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.2283650912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.3038217874 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 6482276145 ps |
| CPU time | 9.68 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038217874 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.3038217874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.485896693 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 18373356311 ps |
| CPU time | 24.57 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485896693 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.485896693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.77274869 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 31215726316 ps |
| CPU time | 49.24 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:05:37 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=77274869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.77274869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.3539580473 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 243568806 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:04:50 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539580473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.3539580473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.25581303 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 148669783 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:04:49 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25581303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_bitstuff_err.25581303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.2994377583 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 281903756 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:04:50 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994377583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.2994377583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.1716508579 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 648172796 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 01:04:47 PM UTC 24 |
| Finished | Sep 18 01:04:50 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716508579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.1716508579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.1847452122 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 178781356 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:04:48 PM UTC 24 |
| Finished | Sep 18 01:04:51 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847452122 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.1847452122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.1314025631 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 946383738 ps |
| CPU time | 4.52 seconds |
| Started | Sep 18 01:04:48 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314025631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.1314025631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.1958744810 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 138858296 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:04:49 PM UTC 24 |
| Finished | Sep 18 01:04:52 PM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958744810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.1958744810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_enable.483291765 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 77676952 ps |
| CPU time | 0.95 seconds |
| Started | Sep 18 01:04:50 PM UTC 24 |
| Finished | Sep 18 01:04:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483291765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.483291765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.3663052594 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 784619123 ps |
| CPU time | 4.38 seconds |
| Started | Sep 18 01:04:50 PM UTC 24 |
| Finished | Sep 18 01:04:55 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663052594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.3663052594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.478915661 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 626308588 ps |
| CPU time | 2.19 seconds |
| Started | Sep 18 01:04:50 PM UTC 24 |
| Finished | Sep 18 01:04:53 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=478915661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.478915661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.1309385277 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 446764418 ps |
| CPU time | 3.22 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:04:56 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309385277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.1309385277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.4063014300 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 237617993 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063014300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.4063014300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.1359858799 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 148568694 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359858799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.1359858799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.3479993506 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 196466948 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479993506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.3479993506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.2459267390 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 2623989997 ps |
| CPU time | 69.17 seconds |
| Started | Sep 18 01:04:51 PM UTC 24 |
| Finished | Sep 18 01:06:02 PM UTC 24 |
| Peak memory | 235260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459267390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.2459267390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.962612328 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 13822032984 ps |
| CPU time | 102.11 seconds |
| Started | Sep 18 01:04:52 PM UTC 24 |
| Finished | Sep 18 01:06:36 PM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962612328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.962612328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.3547172543 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 225523005 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:04:52 PM UTC 24 |
| Finished | Sep 18 01:04:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547172543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.3547172543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.231096225 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 12087633042 ps |
| CPU time | 21.46 seconds |
| Started | Sep 18 01:04:53 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231096225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_resume.231096225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2076328207 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 5270125286 ps |
| CPU time | 9.5 seconds |
| Started | Sep 18 01:04:53 PM UTC 24 |
| Finished | Sep 18 01:05:04 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076328207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2076328207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.1018369512 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 4111347615 ps |
| CPU time | 29.25 seconds |
| Started | Sep 18 01:04:53 PM UTC 24 |
| Finished | Sep 18 01:05:24 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018369512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.1018369512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.3640490744 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 2057062942 ps |
| CPU time | 55.06 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640490744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.3640490744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.1748372200 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 242093901 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:58 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748372200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.1748372200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.797310108 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 213721390 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:58 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797310108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.797310108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.658483268 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 1618156105 ps |
| CPU time | 11.8 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:05:08 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=658483268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.658483268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.1177962061 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 171648969 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177962061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.1177962061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.3299476626 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 154257707 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:58 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299476626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3299476626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2259394838 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 168934629 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259394838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.2259394838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.1017207746 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 175732071 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:04:55 PM UTC 24 |
| Finished | Sep 18 01:04:57 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017207746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.1017207746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.1854791141 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 190625453 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:04:56 PM UTC 24 |
| Finished | Sep 18 01:04:58 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854791141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.1854791141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.55268254 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 183422522 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:04:56 PM UTC 24 |
| Finished | Sep 18 01:04:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55268254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_out_trans_nak.55268254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.2937472400 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 169687302 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:04:56 PM UTC 24 |
| Finished | Sep 18 01:04:59 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937472400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.2937472400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.3244607062 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 239217816 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244607062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.3244607062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.3928602047 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 150134312 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:00 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928602047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.3928602047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3763128690 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 36929840 ps |
| CPU time | 0.95 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763128690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3763128690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1332804860 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 12580405772 ps |
| CPU time | 34.4 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:34 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332804860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.1332804860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.1196016356 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 153439559 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:00 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196016356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.1196016356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.2224026215 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 244038655 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:04:58 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224026215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.2224026215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3269957414 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 202279158 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:04:59 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269957414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3269957414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.2694736618 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 166633037 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:04:59 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694736618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.2694736618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.3881340118 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 145234049 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:04:59 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881340118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.3881340118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.584729835 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 340621370 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=584729835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_rx_full.584729835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.4115166919 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 143210423 ps |
| CPU time | 0.87 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115166919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.4115166919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.1989203708 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 154958884 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989203708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.1989203708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.959135679 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 217634235 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959135679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.959135679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.1719023772 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 1682614836 ps |
| CPU time | 40.74 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719023772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1719023772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2875895057 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 166150153 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875895057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2875895057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.2650899209 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 166709065 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:05:00 PM UTC 24 |
| Finished | Sep 18 01:05:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650899209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.2650899209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.1917754483 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 1236988013 ps |
| CPU time | 3.34 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917754483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.1917754483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.1366481723 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 2382425506 ps |
| CPU time | 22.5 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:25 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366481723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.1366481723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1140514785 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 1063477092 ps |
| CPU time | 22.23 seconds |
| Started | Sep 18 01:04:48 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140514785 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1140514785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.105592024 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 555141343 ps |
| CPU time | 2.34 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:05 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=105592024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx _rx_disruption.105592024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.2528653162 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 441319262 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2528653162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.2528653162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.3768585418 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 470715137 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3768585418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.3768585418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.2386904745 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 583829264 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2386904745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.2386904745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.1157444396 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 609684469 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1157444396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.1157444396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.3186419892 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 562346497 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:01 PM UTC 24 |
| Finished | Sep 18 01:11:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3186419892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.3186419892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.1089554205 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 473172241 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:11:03 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1089554205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.1089554205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.3483263702 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 425489131 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:11:03 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3483263702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.3483263702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.2936160273 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 567428116 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:11:03 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2936160273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.2936160273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.1366093706 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 498828783 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:11:03 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1366093706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.1366093706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.1777937146 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 473030923 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:03 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1777937146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.1777937146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.284172369 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 56816347 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:05:16 PM UTC 24 |
| Finished | Sep 18 01:05:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=284172369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.284172369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.2386115006 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 7135260080 ps |
| CPU time | 11.97 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:15 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386115006 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.2386115006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.621950146 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 20689961687 ps |
| CPU time | 24.88 seconds |
| Started | Sep 18 01:05:01 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=621950146 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.621950146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3336531117 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 25459917928 ps |
| CPU time | 40.27 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:05:45 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336531117 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3336531117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.2481450664 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 144871199 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481450664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.2481450664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.2329972106 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 145079802 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329972106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.2329972106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.3970696382 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 203896267 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970696382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.3970696382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2933457232 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 1054279761 ps |
| CPU time | 5.61 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:05:10 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933457232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2933457232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.397763197 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 46295405981 ps |
| CPU time | 80.24 seconds |
| Started | Sep 18 01:05:03 PM UTC 24 |
| Finished | Sep 18 01:06:25 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397763197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_device_address.397763197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.3110509691 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 1310981666 ps |
| CPU time | 27.19 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:32 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110509691 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.3110509691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.2901169506 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 586004986 ps |
| CPU time | 2.45 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:07 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901169506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.2901169506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2937242198 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 190070918 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937242198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.2937242198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_enable.3779880935 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 34139823 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779880935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.3779880935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.1271270967 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 1104855093 ps |
| CPU time | 4.78 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:10 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271270967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.1271270967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.376758666 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 491534193 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:06 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=376758666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.376758666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.2952290688 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 270412111 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:05:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952290688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.2952290688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.3013250148 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 337543893 ps |
| CPU time | 3.59 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:05:11 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013250148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.3013250148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2506421253 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 160901275 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:05:09 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506421253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2506421253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.3899884318 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 137822477 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:05:08 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899884318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.3899884318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1044246684 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 175709614 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:05:09 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1044246684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1044246684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2822689984 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 4538829086 ps |
| CPU time | 112.78 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822689984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2822689984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.1413969579 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 11142712831 ps |
| CPU time | 139.93 seconds |
| Started | Sep 18 01:05:06 PM UTC 24 |
| Finished | Sep 18 01:07:29 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413969579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.1413969579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3292623325 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 196006120 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:05:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292623325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3292623325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.1669108701 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 31422809528 ps |
| CPU time | 50.72 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669108701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.1669108701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.1407997055 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 6183156832 ps |
| CPU time | 11.11 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:05:20 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407997055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.1407997055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.1969083624 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 3118790071 ps |
| CPU time | 93.82 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:06:44 PM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969083624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.1969083624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.4093075679 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 3676978651 ps |
| CPU time | 96.52 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:06:46 PM UTC 24 |
| Peak memory | 228304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093075679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.4093075679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.1401416305 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 237404733 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:05:10 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401416305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.1401416305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.2496626212 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 267222442 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:05:08 PM UTC 24 |
| Finished | Sep 18 01:05:11 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496626212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.2496626212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.142399523 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 3881541045 ps |
| CPU time | 36.99 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:48 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142399523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.142399523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2373133012 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 213196006 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373133012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2373133012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3727286296 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 166027926 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727286296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.3727286296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2726795149 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 203914224 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 215428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726795149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.2726795149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.2228954634 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 181650781 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228954634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.2228954634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.2507471639 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 147895164 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:05:10 PM UTC 24 |
| Finished | Sep 18 01:05:12 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507471639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.2507471639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.3856143796 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 239809268 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:05:11 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856143796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.3856143796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.3376815008 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 143830371 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:05:11 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376815008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.3376815008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.1417337157 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 255638319 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:05:11 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417337157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.1417337157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.3125919888 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 196895914 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:05:12 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125919888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.3125919888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.708196936 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 31721314 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:05:12 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708196936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_phy_pins_sense.708196936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.2896321390 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 8102796738 ps |
| CPU time | 31.86 seconds |
| Started | Sep 18 01:05:12 PM UTC 24 |
| Finished | Sep 18 01:05:45 PM UTC 24 |
| Peak memory | 235032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896321390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.2896321390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.440196201 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 195487965 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:05:12 PM UTC 24 |
| Finished | Sep 18 01:05:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440196201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.440196201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2249244227 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 200098986 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:05:13 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249244227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2249244227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.804787177 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 237855290 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:05:13 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804787177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_random_length_in_transaction.804787177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.4200723675 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 146261875 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:05:13 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200723675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.4200723675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2834102449 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 163187147 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:05:13 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834102449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2834102449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.3395004384 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 249512196 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:05:14 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395004384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.3395004384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1849746307 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 147592732 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:05:14 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849746307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.1849746307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.1274216084 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 154499617 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:05:14 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274216084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.1274216084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.723096647 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 217900150 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:05:14 PM UTC 24 |
| Finished | Sep 18 01:05:16 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723096647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.723096647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2563579020 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 2355676745 ps |
| CPU time | 61.12 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 230824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563579020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2563579020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.3068439015 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 153479656 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:05:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068439015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.3068439015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.1797742163 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 159271771 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:05:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797742163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.1797742163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.1099651063 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 550500781 ps |
| CPU time | 2.57 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:05:19 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099651063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.1099651063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.2331339606 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 2530700271 ps |
| CPU time | 30.33 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:05:47 PM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331339606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.2331339606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2209952855 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 1088884357 ps |
| CPU time | 8.5 seconds |
| Started | Sep 18 01:05:04 PM UTC 24 |
| Finished | Sep 18 01:05:13 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209952855 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2209952855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.200089758 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 573160026 ps |
| CPU time | 2.68 seconds |
| Started | Sep 18 01:05:15 PM UTC 24 |
| Finished | Sep 18 01:05:19 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=200089758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_tx _rx_disruption.200089758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.1707709050 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 540109151 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1707709050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.1707709050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.1822486952 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 478224174 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1822486952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.1822486952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.4059548187 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 590612925 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4059548187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.4059548187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.857882831 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 527398633 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=857882831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_t x_rx_disruption.857882831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.3638142058 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 601943965 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3638142058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.3638142058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2940095965 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 547385767 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2940095965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2940095965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3280013026 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 606076765 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3280013026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.3280013026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.2897550141 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 568221587 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2897550141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.2897550141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.3446602528 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 554600616 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:07 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3446602528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.3446602528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.1564557630 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 485705215 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1564557630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.1564557630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.2427815940 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 115949549 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427815940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.2427815940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2727416854 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 4968549786 ps |
| CPU time | 8.45 seconds |
| Started | Sep 18 01:05:16 PM UTC 24 |
| Finished | Sep 18 01:05:25 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727416854 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.2727416854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.1745321236 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 20829883944 ps |
| CPU time | 30.43 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:49 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745321236 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.1745321236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.179692543 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 29146197809 ps |
| CPU time | 49.23 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:06:08 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179692543 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.179692543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.3509317537 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 151617717 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:20 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509317537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.3509317537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.325928454 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 236593725 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=325928454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_bitstuff_err.325928454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.4126941587 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 230501645 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126941587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.4126941587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.1059659595 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 644775229 ps |
| CPU time | 2.33 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:21 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059659595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.1059659595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1978070181 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 30402242503 ps |
| CPU time | 61.69 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:06:21 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978070181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1978070181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.3576268058 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 282280845 ps |
| CPU time | 4.55 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576268058 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.3576268058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.3726039691 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 815783174 ps |
| CPU time | 3.57 seconds |
| Started | Sep 18 01:05:19 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726039691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.3726039691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.2761190177 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 205856602 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:05:19 PM UTC 24 |
| Finished | Sep 18 01:05:21 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761190177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.2761190177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_enable.3682047441 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 35324436 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:05:19 PM UTC 24 |
| Finished | Sep 18 01:05:21 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682047441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.3682047441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.3673017468 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 853834693 ps |
| CPU time | 3.01 seconds |
| Started | Sep 18 01:05:19 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673017468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.3673017468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.308866787 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 619683355 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 01:05:20 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 215436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=308866787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.308866787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.493352680 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 196407212 ps |
| CPU time | 2.87 seconds |
| Started | Sep 18 01:05:20 PM UTC 24 |
| Finished | Sep 18 01:05:24 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493352680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.493352680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.3755565191 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 267586597 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:05:21 PM UTC 24 |
| Finished | Sep 18 01:05:23 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755565191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.3755565191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1597821331 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 144104127 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:05:24 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597821331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.1597821331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3658998003 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 216751931 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:05:25 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658998003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.3658998003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.917010237 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 4578121341 ps |
| CPU time | 47.17 seconds |
| Started | Sep 18 01:05:21 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917010237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.917010237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.2484406537 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 14842450790 ps |
| CPU time | 89.51 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:06:54 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484406537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.2484406537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.3341530270 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 259006078 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:05:25 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341530270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.3341530270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.2439650411 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 31598954125 ps |
| CPU time | 53.45 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:06:17 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439650411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.2439650411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.347671441 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 9416343973 ps |
| CPU time | 15.11 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:05:39 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347671441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_suspend.347671441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1753566866 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 3765047450 ps |
| CPU time | 27.32 seconds |
| Started | Sep 18 01:05:22 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753566866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1753566866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2312669677 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 2628237528 ps |
| CPU time | 27.36 seconds |
| Started | Sep 18 01:05:24 PM UTC 24 |
| Finished | Sep 18 01:05:53 PM UTC 24 |
| Peak memory | 234908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312669677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2312669677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.2668471568 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 238005430 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:05:24 PM UTC 24 |
| Finished | Sep 18 01:05:27 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668471568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.2668471568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3448323142 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 185516259 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:05:24 PM UTC 24 |
| Finished | Sep 18 01:05:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448323142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.3448323142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.1711744343 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 2867897582 ps |
| CPU time | 82.1 seconds |
| Started | Sep 18 01:05:24 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711744343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1711744343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.1543785081 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 151879182 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:05:24 PM UTC 24 |
| Finished | Sep 18 01:05:27 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543785081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.1543785081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.432757159 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 139682321 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432757159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.432757159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.617403583 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 212334301 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617403583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_nak_trans.617403583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.1605320579 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 179080785 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605320579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.1605320579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.1120603498 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 167663467 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120603498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.1120603498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2995662000 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 175779070 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995662000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.2995662000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3783827063 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 169537788 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783827063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3783827063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.3825828689 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 211438310 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:29 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825828689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.3825828689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.4007758627 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 199345405 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:05:26 PM UTC 24 |
| Finished | Sep 18 01:05:28 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007758627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.4007758627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3969469366 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 117927698 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:05:27 PM UTC 24 |
| Finished | Sep 18 01:05:29 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969469366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3969469366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.2715723997 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 8409423214 ps |
| CPU time | 24.89 seconds |
| Started | Sep 18 01:05:27 PM UTC 24 |
| Finished | Sep 18 01:05:53 PM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715723997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.2715723997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.3218449460 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 162415347 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:05:27 PM UTC 24 |
| Finished | Sep 18 01:05:29 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218449460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.3218449460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.476559379 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 217239144 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:05:28 PM UTC 24 |
| Finished | Sep 18 01:05:31 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476559379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_pkt_sent.476559379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2925066530 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 157568392 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:05:28 PM UTC 24 |
| Finished | Sep 18 01:05:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925066530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.2925066530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3974317575 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 167531504 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:05:28 PM UTC 24 |
| Finished | Sep 18 01:05:31 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974317575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3974317575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.3884013603 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 147478728 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:32 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884013603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.3884013603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.2412366064 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 263079478 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:33 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412366064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.2412366064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.1330726274 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 144727739 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:32 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330726274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.1330726274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1796988336 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 191688165 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796988336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.1796988336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1793790416 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 209121377 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793790416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1793790416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.4220467057 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 2319825235 ps |
| CPU time | 66.41 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:06:38 PM UTC 24 |
| Peak memory | 235076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220467057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.4220467057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1870433857 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 147468211 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:33 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870433857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1870433857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3798035846 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 189309159 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:05:30 PM UTC 24 |
| Finished | Sep 18 01:05:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798035846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.3798035846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.4032798592 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 207067518 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:05:32 PM UTC 24 |
| Finished | Sep 18 01:05:35 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032798592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.4032798592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.374515960 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 2766889772 ps |
| CPU time | 75.57 seconds |
| Started | Sep 18 01:05:32 PM UTC 24 |
| Finished | Sep 18 01:06:50 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374515960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_streaming_out.374515960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.3505019578 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 3613180371 ps |
| CPU time | 23.06 seconds |
| Started | Sep 18 01:05:17 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505019578 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.3505019578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.4167281400 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 447981594 ps |
| CPU time | 2.38 seconds |
| Started | Sep 18 01:05:32 PM UTC 24 |
| Finished | Sep 18 01:05:36 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4167281400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.4167281400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.172755704 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 546278992 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=172755704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_t x_rx_disruption.172755704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.2031079947 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 616500945 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:07 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2031079947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.2031079947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.1067832428 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 509752671 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1067832428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.1067832428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2883283179 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 504862024 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2883283179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2883283179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1836761342 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 543903953 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:07 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1836761342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1836761342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3287680121 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 527493421 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3287680121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3287680121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.2375322474 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 507727955 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2375322474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.2375322474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.3421160061 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 527942605 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3421160061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.3421160061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.1169403435 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 601656067 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1169403435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.1169403435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.1102991229 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 650723877 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1102991229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.1102991229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.764552654 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 58126911 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:05:52 PM UTC 24 |
| Finished | Sep 18 01:05:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764552654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.764552654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.2638597004 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 10131604244 ps |
| CPU time | 18.15 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:53 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638597004 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.2638597004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.216892759 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 20614422498 ps |
| CPU time | 33.19 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=216892759 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.216892759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.3671947730 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 24216287057 ps |
| CPU time | 41.01 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:06:16 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671947730 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.3671947730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.3399983894 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 176863296 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:37 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399983894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.3399983894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2590624852 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 154198325 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:36 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590624852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2590624852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1610813202 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 379755907 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:37 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610813202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1610813202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.3736724133 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 1082056348 ps |
| CPU time | 5.36 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:05:41 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736724133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.3736724133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.639639773 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 41369369841 ps |
| CPU time | 75.41 seconds |
| Started | Sep 18 01:05:34 PM UTC 24 |
| Finished | Sep 18 01:06:52 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639639773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_device_address.639639773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.4093607023 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 4943445877 ps |
| CPU time | 34.55 seconds |
| Started | Sep 18 01:05:36 PM UTC 24 |
| Finished | Sep 18 01:06:12 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093607023 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.4093607023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.22925842 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 596602901 ps |
| CPU time | 3.04 seconds |
| Started | Sep 18 01:05:36 PM UTC 24 |
| Finished | Sep 18 01:05:40 PM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22925842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.22925842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.170423599 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 175280749 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:40 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=170423599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_disconnected.170423599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3853332510 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 44347733 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:40 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853332510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.3853332510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.1531419145 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 830678011 ps |
| CPU time | 2.69 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531419145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.1531419145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.1336449475 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 188181019 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:40 PM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336449475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.1336449475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.3964628557 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 382682783 ps |
| CPU time | 3.81 seconds |
| Started | Sep 18 01:05:38 PM UTC 24 |
| Finished | Sep 18 01:05:43 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964628557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.3964628557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.4016601544 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 188458316 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:05:40 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016601544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.4016601544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.28950787 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 162454348 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:05:40 PM UTC 24 |
| Finished | Sep 18 01:05:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28950787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_in_stall.28950787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.582268356 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 215757103 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:05:41 PM UTC 24 |
| Finished | Sep 18 01:05:44 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=582268356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_trans.582268356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.1547223761 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 4327690556 ps |
| CPU time | 113.45 seconds |
| Started | Sep 18 01:05:40 PM UTC 24 |
| Finished | Sep 18 01:07:35 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547223761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.1547223761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.2546297084 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 7398268525 ps |
| CPU time | 54.64 seconds |
| Started | Sep 18 01:05:41 PM UTC 24 |
| Finished | Sep 18 01:06:38 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546297084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.2546297084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.3621368161 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 227293872 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:05:41 PM UTC 24 |
| Finished | Sep 18 01:05:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621368161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.3621368161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.3717751133 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 31920464055 ps |
| CPU time | 66.57 seconds |
| Started | Sep 18 01:05:41 PM UTC 24 |
| Finished | Sep 18 01:06:50 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717751133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.3717751133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2762341856 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 11097728794 ps |
| CPU time | 16.02 seconds |
| Started | Sep 18 01:05:42 PM UTC 24 |
| Finished | Sep 18 01:05:59 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762341856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2762341856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.2034332161 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 3863912158 ps |
| CPU time | 101.64 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:07:27 PM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034332161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.2034332161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.3218755111 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2502202664 ps |
| CPU time | 24.29 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 228372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218755111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.3218755111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.3165256139 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 239827044 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:05:46 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165256139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.3165256139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.3437343327 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 194177540 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:05:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437343327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.3437343327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.3068725430 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 3535403273 ps |
| CPU time | 36.07 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:06:21 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068725430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.3068725430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.188054603 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 156066274 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:05:43 PM UTC 24 |
| Finished | Sep 18 01:05:45 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188054603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.188054603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.3010828736 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 153054353 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:05:45 PM UTC 24 |
| Finished | Sep 18 01:05:47 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010828736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.3010828736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.3484644439 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 211597413 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:05:45 PM UTC 24 |
| Finished | Sep 18 01:05:47 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484644439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.3484644439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.1553748496 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 154604188 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:05:45 PM UTC 24 |
| Finished | Sep 18 01:05:47 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553748496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.1553748496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2500930538 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 179909644 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:05:45 PM UTC 24 |
| Finished | Sep 18 01:05:47 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500930538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.2500930538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.607847877 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 179908798 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:05:46 PM UTC 24 |
| Finished | Sep 18 01:05:49 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=607847877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_out_trans_nak.607847877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.250284351 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 165175534 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:05:46 PM UTC 24 |
| Finished | Sep 18 01:05:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250284351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pending_in_trans.250284351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3680988509 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 243644376 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:05:46 PM UTC 24 |
| Finished | Sep 18 01:05:49 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680988509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3680988509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.3114028684 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 153884635 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:05:46 PM UTC 24 |
| Finished | Sep 18 01:05:49 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114028684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.3114028684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.618970740 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 60945623 ps |
| CPU time | 0.9 seconds |
| Started | Sep 18 01:05:47 PM UTC 24 |
| Finished | Sep 18 01:05:48 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618970740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.618970740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.3012484172 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 15693609832 ps |
| CPU time | 42.56 seconds |
| Started | Sep 18 01:05:47 PM UTC 24 |
| Finished | Sep 18 01:06:31 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012484172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.3012484172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.724591298 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 188111795 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724591298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_pkt_received.724591298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1214748227 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 231352345 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214748227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1214748227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.1464046829 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 206574878 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464046829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.1464046829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.454424685 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 157962694 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454424685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.454424685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2615378112 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 139768217 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615378112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.2615378112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1108609890 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 264596287 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:05:48 PM UTC 24 |
| Finished | Sep 18 01:05:51 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108609890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.1108609890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.594525610 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 157643867 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:05:52 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594525610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_setup_stage.594525610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.3257284733 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 142996946 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:05:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257284733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.3257284733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.3421783459 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 222191757 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:05:52 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421783459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.3421783459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.3163031143 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 2816021684 ps |
| CPU time | 23.02 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:06:14 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163031143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.3163031143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1747157230 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 213800191 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:05:52 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747157230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.1747157230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.4091107257 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 224760118 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:05:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091107257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.4091107257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.1232105415 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 826682391 ps |
| CPU time | 4.01 seconds |
| Started | Sep 18 01:05:52 PM UTC 24 |
| Finished | Sep 18 01:05:57 PM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232105415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.1232105415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.990508967 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 3407565163 ps |
| CPU time | 31.12 seconds |
| Started | Sep 18 01:05:50 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990508967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_streaming_out.990508967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3442894136 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 1683013798 ps |
| CPU time | 38.07 seconds |
| Started | Sep 18 01:05:36 PM UTC 24 |
| Finished | Sep 18 01:06:15 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442894136 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3442894136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3291430328 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 552350420 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3291430328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3291430328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1465244278 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 475687254 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1465244278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1465244278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.1446980242 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 675869944 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1446980242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.1446980242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.4274467546 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 493989533 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4274467546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.4274467546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.2399396558 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 526965183 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2399396558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.2399396558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.3270994471 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 499658450 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3270994471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.3270994471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.2667611918 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 479343148 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2667611918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.2667611918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.3232873511 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 515703972 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3232873511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.3232873511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3303168877 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 584963521 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3303168877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3303168877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.1235938060 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 509345635 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:04 PM UTC 24 |
| Finished | Sep 18 01:11:08 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1235938060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.1235938060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.505727102 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 48095774 ps |
| CPU time | 1.06 seconds |
| Started | Sep 18 12:54:04 PM UTC 24 |
| Finished | Sep 18 12:54:06 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505727102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.505727102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.4268854944 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 4381863038 ps |
| CPU time | 13.46 seconds |
| Started | Sep 18 12:53:12 PM UTC 24 |
| Finished | Sep 18 12:53:26 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268854944 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.4268854944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.3416843298 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 29830653821 ps |
| CPU time | 40.87 seconds |
| Started | Sep 18 12:53:14 PM UTC 24 |
| Finished | Sep 18 12:53:56 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416843298 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.3416843298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.3974569372 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 137002477 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:53:15 PM UTC 24 |
| Finished | Sep 18 12:53:17 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974569372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.3974569372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.1813954115 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 153251523 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:53:15 PM UTC 24 |
| Finished | Sep 18 12:53:18 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813954115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.1813954115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.4157012549 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 220658781 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:53:16 PM UTC 24 |
| Finished | Sep 18 12:53:18 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157012549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.4157012549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.1552835221 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 635513747 ps |
| CPU time | 2.77 seconds |
| Started | Sep 18 12:53:17 PM UTC 24 |
| Finished | Sep 18 12:53:21 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552835221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.1552835221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.3282800019 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 1033164609 ps |
| CPU time | 4.74 seconds |
| Started | Sep 18 12:53:19 PM UTC 24 |
| Finished | Sep 18 12:53:25 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282800019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.3282800019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.2497987514 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 24486386439 ps |
| CPU time | 52.86 seconds |
| Started | Sep 18 12:53:19 PM UTC 24 |
| Finished | Sep 18 12:54:13 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497987514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.2497987514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.3625351595 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 1067159146 ps |
| CPU time | 23.82 seconds |
| Started | Sep 18 12:53:19 PM UTC 24 |
| Finished | Sep 18 12:53:44 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625351595 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.3625351595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.3090774478 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 904865742 ps |
| CPU time | 3.12 seconds |
| Started | Sep 18 12:53:20 PM UTC 24 |
| Finished | Sep 18 12:53:24 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090774478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.3090774478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.4230301973 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 155098114 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:53:21 PM UTC 24 |
| Finished | Sep 18 12:53:23 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230301973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.4230301973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3958129974 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 41330608 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:53:22 PM UTC 24 |
| Finished | Sep 18 12:53:24 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958129974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3958129974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.4161146295 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 795853435 ps |
| CPU time | 4.18 seconds |
| Started | Sep 18 12:53:24 PM UTC 24 |
| Finished | Sep 18 12:53:30 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161146295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.4161146295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.1840435928 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 182949448 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:53:26 PM UTC 24 |
| Finished | Sep 18 12:53:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840435928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.1840435928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.2999861423 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 260823443 ps |
| CPU time | 2.97 seconds |
| Started | Sep 18 12:53:26 PM UTC 24 |
| Finished | Sep 18 12:53:30 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999861423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.2999861423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.239840228 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 98227746053 ps |
| CPU time | 155.71 seconds |
| Started | Sep 18 12:53:27 PM UTC 24 |
| Finished | Sep 18 12:56:05 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=239840228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.239840228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3492852246 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 94114947000 ps |
| CPU time | 170.4 seconds |
| Started | Sep 18 12:53:29 PM UTC 24 |
| Finished | Sep 18 12:56:22 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492852246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3492852246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.4062017858 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 115042318733 ps |
| CPU time | 250.63 seconds |
| Started | Sep 18 12:53:31 PM UTC 24 |
| Finished | Sep 18 12:57:45 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=4062017858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.4062017858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.1555215106 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 83112750902 ps |
| CPU time | 155.3 seconds |
| Started | Sep 18 12:53:31 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555215106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.1555215106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.2607215709 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 203083472 ps |
| CPU time | 2.04 seconds |
| Started | Sep 18 12:53:31 PM UTC 24 |
| Finished | Sep 18 12:53:34 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607215709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.2607215709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.299202935 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 222614856 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:53:32 PM UTC 24 |
| Finished | Sep 18 12:53:34 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299202935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_stall.299202935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.398296214 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 274978342 ps |
| CPU time | 1.89 seconds |
| Started | Sep 18 12:53:32 PM UTC 24 |
| Finished | Sep 18 12:53:35 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398296214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_trans.398296214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1976872235 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 4486216856 ps |
| CPU time | 37.66 seconds |
| Started | Sep 18 12:53:31 PM UTC 24 |
| Finished | Sep 18 12:54:10 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976872235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1976872235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.449616428 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 11791682687 ps |
| CPU time | 150.52 seconds |
| Started | Sep 18 12:53:34 PM UTC 24 |
| Finished | Sep 18 12:56:07 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449616428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.449616428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.2984370584 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 174357190 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:53:34 PM UTC 24 |
| Finished | Sep 18 12:53:37 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984370584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.2984370584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1843965106 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 14634850096 ps |
| CPU time | 41.36 seconds |
| Started | Sep 18 12:53:35 PM UTC 24 |
| Finished | Sep 18 12:54:18 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843965106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.1843965106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.1463015550 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 9989368541 ps |
| CPU time | 16.08 seconds |
| Started | Sep 18 12:53:35 PM UTC 24 |
| Finished | Sep 18 12:53:53 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463015550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.1463015550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.1359543813 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 3310891440 ps |
| CPU time | 33.23 seconds |
| Started | Sep 18 12:53:38 PM UTC 24 |
| Finished | Sep 18 12:54:12 PM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359543813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1359543813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.2291542861 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 1906874159 ps |
| CPU time | 20.27 seconds |
| Started | Sep 18 12:53:38 PM UTC 24 |
| Finished | Sep 18 12:53:59 PM UTC 24 |
| Peak memory | 228204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291542861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.2291542861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.2997254975 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 302508312 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:53:38 PM UTC 24 |
| Finished | Sep 18 12:53:40 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997254975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.2997254975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.819196322 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 197084840 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:53:38 PM UTC 24 |
| Finished | Sep 18 12:53:40 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819196322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.819196322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2131361733 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 3047186949 ps |
| CPU time | 78.22 seconds |
| Started | Sep 18 12:53:41 PM UTC 24 |
| Finished | Sep 18 12:55:01 PM UTC 24 |
| Peak memory | 230376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131361733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2131361733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.357050515 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 2168398935 ps |
| CPU time | 27.86 seconds |
| Started | Sep 18 12:53:41 PM UTC 24 |
| Finished | Sep 18 12:54:10 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357050515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.357050515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3813900037 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 3973955535 ps |
| CPU time | 101.5 seconds |
| Started | Sep 18 12:53:41 PM UTC 24 |
| Finished | Sep 18 12:55:24 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813900037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3813900037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2609537919 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 157360282 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:53:43 PM UTC 24 |
| Finished | Sep 18 12:53:45 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609537919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2609537919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.3451269093 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 169450719 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:53:45 PM UTC 24 |
| Finished | Sep 18 12:53:47 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451269093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.3451269093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.1192236613 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 206887887 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 12:53:46 PM UTC 24 |
| Finished | Sep 18 12:53:49 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192236613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.1192236613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.2250834580 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 143890470 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:53:46 PM UTC 24 |
| Finished | Sep 18 12:53:49 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250834580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.2250834580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.274515687 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 179196781 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 12:53:46 PM UTC 24 |
| Finished | Sep 18 12:53:48 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=274515687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_out_trans_nak.274515687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.4060050565 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 169774668 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:53:47 PM UTC 24 |
| Finished | Sep 18 12:53:50 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060050565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.4060050565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.468674113 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 243622412 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 12:53:49 PM UTC 24 |
| Finished | Sep 18 12:53:52 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468674113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.468674113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.3082782812 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 245687217 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:53:49 PM UTC 24 |
| Finished | Sep 18 12:53:52 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082782812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3082782812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.4239386461 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 150758940 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:53:49 PM UTC 24 |
| Finished | Sep 18 12:53:51 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239386461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.4239386461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.71708987 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 49791184 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:53:49 PM UTC 24 |
| Finished | Sep 18 12:53:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71708987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_phy_pins_sense.71708987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1447200529 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 14292357851 ps |
| CPU time | 44.93 seconds |
| Started | Sep 18 12:53:50 PM UTC 24 |
| Finished | Sep 18 12:54:37 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447200529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.1447200529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.2574787636 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 168754775 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:53:50 PM UTC 24 |
| Finished | Sep 18 12:53:53 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574787636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.2574787636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.1158451549 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 187019101 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:53:51 PM UTC 24 |
| Finished | Sep 18 12:53:54 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158451549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.1158451549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.284769323 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 6626765138 ps |
| CPU time | 33.52 seconds |
| Started | Sep 18 12:53:52 PM UTC 24 |
| Finished | Sep 18 12:54:27 PM UTC 24 |
| Peak memory | 230316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=284769323 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.284769323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.2247793554 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 5645812514 ps |
| CPU time | 67.67 seconds |
| Started | Sep 18 12:53:53 PM UTC 24 |
| Finished | Sep 18 12:55:02 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247793554 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.2247793554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.4035818267 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 176674362 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 12:53:52 PM UTC 24 |
| Finished | Sep 18 12:53:55 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035818267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.4035818267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.2783354357 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 189632246 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:53:52 PM UTC 24 |
| Finished | Sep 18 12:53:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783354357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.2783354357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.748252032 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 20169808950 ps |
| CPU time | 38.49 seconds |
| Started | Sep 18 12:53:54 PM UTC 24 |
| Finished | Sep 18 12:54:34 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748252032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.748252032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.4294038969 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 220119777 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:53:54 PM UTC 24 |
| Finished | Sep 18 12:53:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294038969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.4294038969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2057415289 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 263793114 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:53:55 PM UTC 24 |
| Finished | Sep 18 12:53:58 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057415289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2057415289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.1183902973 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 164146868 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:53:55 PM UTC 24 |
| Finished | Sep 18 12:53:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183902973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.1183902973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.774333349 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 512173778 ps |
| CPU time | 2.55 seconds |
| Started | Sep 18 12:54:01 PM UTC 24 |
| Finished | Sep 18 12:54:05 PM UTC 24 |
| Peak memory | 252156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=774333349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.774333349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.1241968366 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 450613441 ps |
| CPU time | 2.3 seconds |
| Started | Sep 18 12:53:55 PM UTC 24 |
| Finished | Sep 18 12:53:59 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241968366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.1241968366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.3335238485 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 213946423 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:53:56 PM UTC 24 |
| Finished | Sep 18 12:53:59 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335238485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3335238485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.3730723675 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 159656840 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:53:56 PM UTC 24 |
| Finished | Sep 18 12:53:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730723675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.3730723675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3599655395 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 199191001 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:53:58 PM UTC 24 |
| Finished | Sep 18 12:54:01 PM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599655395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3599655395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.3310874431 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 246675976 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:53:58 PM UTC 24 |
| Finished | Sep 18 12:54:01 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310874431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3310874431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.2292924820 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 2218883968 ps |
| CPU time | 19.37 seconds |
| Started | Sep 18 12:53:58 PM UTC 24 |
| Finished | Sep 18 12:54:19 PM UTC 24 |
| Peak memory | 235000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292924820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.2292924820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.418546536 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 186948299 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:54:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418546536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.418546536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.347366015 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 192769395 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:54:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347366015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_stall_trans.347366015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.1283202273 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 703896126 ps |
| CPU time | 3 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:54:04 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283202273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.1283202273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.2369043805 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 2778257574 ps |
| CPU time | 80.51 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:55:23 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369043805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.2369043805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.3519237394 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 14430364059 ps |
| CPU time | 109.07 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:55:52 PM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519237394 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.3519237394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.3232079975 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 469906642 ps |
| CPU time | 10.82 seconds |
| Started | Sep 18 12:53:19 PM UTC 24 |
| Finished | Sep 18 12:53:31 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232079975 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.3232079975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.2664724559 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 507454823 ps |
| CPU time | 2.87 seconds |
| Started | Sep 18 12:54:00 PM UTC 24 |
| Finished | Sep 18 12:54:04 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2664724559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.2664724559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.168717109 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 45079057 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=168717109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.168717109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.993713606 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 11766798464 ps |
| CPU time | 18.95 seconds |
| Started | Sep 18 01:05:52 PM UTC 24 |
| Finished | Sep 18 01:06:12 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=993713606 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.993713606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.4287392250 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 13736793748 ps |
| CPU time | 24.28 seconds |
| Started | Sep 18 01:05:52 PM UTC 24 |
| Finished | Sep 18 01:06:17 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287392250 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.4287392250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.2974591092 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 30178925890 ps |
| CPU time | 54.36 seconds |
| Started | Sep 18 01:05:53 PM UTC 24 |
| Finished | Sep 18 01:06:49 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974591092 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.2974591092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.1606569186 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 177774762 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:05:53 PM UTC 24 |
| Finished | Sep 18 01:05:56 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606569186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.1606569186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.3364385752 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 190827026 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:05:53 PM UTC 24 |
| Finished | Sep 18 01:05:56 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364385752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.3364385752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3953190919 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 224534308 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:05:53 PM UTC 24 |
| Finished | Sep 18 01:05:56 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953190919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.3953190919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.3395789179 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 1131115574 ps |
| CPU time | 3.32 seconds |
| Started | Sep 18 01:05:54 PM UTC 24 |
| Finished | Sep 18 01:05:58 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395789179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.3395789179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.455605825 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 44651932523 ps |
| CPU time | 96.15 seconds |
| Started | Sep 18 01:05:54 PM UTC 24 |
| Finished | Sep 18 01:07:32 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455605825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_device_address.455605825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2970681616 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 594519079 ps |
| CPU time | 5.2 seconds |
| Started | Sep 18 01:05:54 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970681616 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2970681616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.3154335823 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 646341918 ps |
| CPU time | 3.28 seconds |
| Started | Sep 18 01:05:55 PM UTC 24 |
| Finished | Sep 18 01:05:59 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154335823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.3154335823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1282332238 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 152484485 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:05:55 PM UTC 24 |
| Finished | Sep 18 01:05:58 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282332238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.1282332238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_enable.4158527648 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 38617122 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:05:55 PM UTC 24 |
| Finished | Sep 18 01:05:57 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158527648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.4158527648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.3380336508 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 981724386 ps |
| CPU time | 4.19 seconds |
| Started | Sep 18 01:05:55 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380336508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.3380336508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1603753371 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 177614891 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:05:57 PM UTC 24 |
| Finished | Sep 18 01:05:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603753371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1603753371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1941969755 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 260339535 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 01:05:57 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941969755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1941969755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.463105901 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 418935716 ps |
| CPU time | 4.16 seconds |
| Started | Sep 18 01:05:57 PM UTC 24 |
| Finished | Sep 18 01:06:02 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463105901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_fifo_rst.463105901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.291677817 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 192485953 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:05:58 PM UTC 24 |
| Finished | Sep 18 01:06:01 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=291677817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.291677817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.2313670925 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 185518196 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:05:58 PM UTC 24 |
| Finished | Sep 18 01:06:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313670925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.2313670925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.635889850 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 191146263 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:05:58 PM UTC 24 |
| Finished | Sep 18 01:06:01 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=635889850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_trans.635889850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.1506041181 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 3198899297 ps |
| CPU time | 31.9 seconds |
| Started | Sep 18 01:05:57 PM UTC 24 |
| Finished | Sep 18 01:06:30 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506041181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.1506041181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1002267251 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 7687152961 ps |
| CPU time | 52.16 seconds |
| Started | Sep 18 01:05:59 PM UTC 24 |
| Finished | Sep 18 01:06:53 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002267251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1002267251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.880675097 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 240825700 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:05:59 PM UTC 24 |
| Finished | Sep 18 01:06:02 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880675097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_in_err.880675097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.4086721248 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 25961033038 ps |
| CPU time | 43.28 seconds |
| Started | Sep 18 01:06:00 PM UTC 24 |
| Finished | Sep 18 01:06:44 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086721248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.4086721248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1385627814 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 6044472730 ps |
| CPU time | 12.5 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:15 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385627814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.1385627814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.3615504128 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 5092418836 ps |
| CPU time | 129.31 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:08:13 PM UTC 24 |
| Peak memory | 235168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615504128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3615504128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.1099979217 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 2833275765 ps |
| CPU time | 79.82 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:07:24 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099979217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1099979217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1172330488 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 275237150 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:04 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172330488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.1172330488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.2076396586 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 192700308 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:04 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076396586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.2076396586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.3474751310 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 3094554561 ps |
| CPU time | 24.65 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474751310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.3474751310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.3591473509 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 159111003 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:04 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591473509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.3591473509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.4169880456 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 165982756 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:04 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169880456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.4169880456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.21661545 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 223805217 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:06:02 PM UTC 24 |
| Finished | Sep 18 01:06:05 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21661545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_nak_trans.21661545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1018737244 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 181177857 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:06:04 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018737244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.1018737244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.3316857540 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 164788279 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:06:04 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316857540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.3316857540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.4124695484 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 172038503 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:06:04 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124695484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.4124695484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.801948748 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 147715637 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:06:04 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801948748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.801948748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.2913522102 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 248616225 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:06:04 PM UTC 24 |
| Finished | Sep 18 01:06:06 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913522102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2913522102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.3223321850 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 201418556 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:06:05 PM UTC 24 |
| Finished | Sep 18 01:06:08 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223321850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.3223321850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.2343815485 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 107119215 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:06:05 PM UTC 24 |
| Finished | Sep 18 01:06:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343815485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.2343815485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.2502993485 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 17976547122 ps |
| CPU time | 48.06 seconds |
| Started | Sep 18 01:06:05 PM UTC 24 |
| Finished | Sep 18 01:06:55 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502993485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.2502993485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.2731088444 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 173122533 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:06:05 PM UTC 24 |
| Finished | Sep 18 01:06:08 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731088444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.2731088444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3987557583 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 184449481 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987557583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3987557583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.280462819 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 234187647 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280462819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_random_length_in_transaction.280462819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.3064607707 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 188371060 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064607707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.3064607707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.1023172873 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 185418055 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023172873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_rx_crc_err.1023172873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.3781574973 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 250470731 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781574973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.3781574973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.4186903710 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 184036824 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186903710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.4186903710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.528078741 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 151642931 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:06:07 PM UTC 24 |
| Finished | Sep 18 01:06:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528078741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.528078741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.4130250045 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 246465262 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:06:08 PM UTC 24 |
| Finished | Sep 18 01:06:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130250045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.4130250045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.2114533564 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 2315478299 ps |
| CPU time | 26.43 seconds |
| Started | Sep 18 01:06:09 PM UTC 24 |
| Finished | Sep 18 01:06:36 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114533564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.2114533564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.933543059 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 162690997 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:06:09 PM UTC 24 |
| Finished | Sep 18 01:06:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=933543059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.933543059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1717745859 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 161744927 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:06:09 PM UTC 24 |
| Finished | Sep 18 01:06:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717745859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.1717745859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.423570874 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 206922037 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:13 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423570874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_stream_len_max.423570874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.464373507 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 1836151052 ps |
| CPU time | 46.54 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:58 PM UTC 24 |
| Peak memory | 228320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464373507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_streaming_out.464373507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3144696525 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 2057969436 ps |
| CPU time | 18.41 seconds |
| Started | Sep 18 01:05:54 PM UTC 24 |
| Finished | Sep 18 01:06:13 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144696525 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3144696525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.1422601238 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 480820603 ps |
| CPU time | 2.62 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:14 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1422601238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.1422601238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.245214423 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 483023478 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=245214423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_t x_rx_disruption.245214423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.1163163513 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 517944343 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1163163513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.1163163513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.37373934 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 532101215 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=37373934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_tx _rx_disruption.37373934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.4098642505 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 486486326 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098642505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.4098642505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.3640905822 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 440900118 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3640905822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.3640905822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1565250948 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 478211126 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1565250948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1565250948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.3310834699 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 477674836 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3310834699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.3310834699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.3591752188 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 554360666 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3591752188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.3591752188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.218773497 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 496768807 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=218773497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_t x_rx_disruption.218773497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.1715352851 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 637222113 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1715352851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.1715352851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.1766977734 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 32626273 ps |
| CPU time | 0.89 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:06:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766977734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.1766977734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.2953730373 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 9959642908 ps |
| CPU time | 15.89 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:27 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953730373 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.2953730373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.287073906 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 14081551872 ps |
| CPU time | 21.87 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:34 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=287073906 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.287073906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.4147317283 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 23672183342 ps |
| CPU time | 43.32 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:55 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147317283 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.4147317283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.89915415 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 188722348 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:06:10 PM UTC 24 |
| Finished | Sep 18 01:06:13 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89915415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_av_buffer.89915415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3191754201 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 151554245 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:06:12 PM UTC 24 |
| Finished | Sep 18 01:06:14 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191754201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3191754201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3602150465 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 190048164 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:06:12 PM UTC 24 |
| Finished | Sep 18 01:06:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602150465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3602150465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.1564661251 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 1156998118 ps |
| CPU time | 4.79 seconds |
| Started | Sep 18 01:06:12 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564661251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.1564661251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.865850952 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 38765563074 ps |
| CPU time | 74.47 seconds |
| Started | Sep 18 01:06:12 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=865850952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_device_address.865850952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.3448336177 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 1150128043 ps |
| CPU time | 24.24 seconds |
| Started | Sep 18 01:06:13 PM UTC 24 |
| Finished | Sep 18 01:06:39 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448336177 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.3448336177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.567028752 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 1146554355 ps |
| CPU time | 2.78 seconds |
| Started | Sep 18 01:06:13 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567028752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disable_endpoint.567028752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.3063447779 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 175702389 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:06:13 PM UTC 24 |
| Finished | Sep 18 01:06:16 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063447779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.3063447779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_enable.3711397645 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 32364361 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:06:14 PM UTC 24 |
| Finished | Sep 18 01:06:16 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711397645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.3711397645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.157395758 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 1033976315 ps |
| CPU time | 4.76 seconds |
| Started | Sep 18 01:06:14 PM UTC 24 |
| Finished | Sep 18 01:06:20 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157395758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.157395758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3243833827 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 267023175 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:06:15 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243833827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3243833827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.1183115989 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 276875262 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 01:06:15 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183115989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.1183115989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.2589206610 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 330839875 ps |
| CPU time | 2.74 seconds |
| Started | Sep 18 01:06:15 PM UTC 24 |
| Finished | Sep 18 01:06:19 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589206610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.2589206610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.592508747 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 169177201 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:06:16 PM UTC 24 |
| Finished | Sep 18 01:06:19 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=592508747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.592508747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.977825981 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 139287741 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:06:16 PM UTC 24 |
| Finished | Sep 18 01:06:18 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977825981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.977825981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.821522242 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 175791362 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:06:17 PM UTC 24 |
| Finished | Sep 18 01:06:19 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821522242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_trans.821522242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1580028415 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 5477318989 ps |
| CPU time | 143.29 seconds |
| Started | Sep 18 01:06:15 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 230476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580028415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1580028415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3250390943 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 10294465013 ps |
| CPU time | 69.39 seconds |
| Started | Sep 18 01:06:17 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250390943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3250390943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.3849423642 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 212602659 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:06:18 PM UTC 24 |
| Finished | Sep 18 01:06:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849423642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.3849423642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.3058465194 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 25252745026 ps |
| CPU time | 50.49 seconds |
| Started | Sep 18 01:06:18 PM UTC 24 |
| Finished | Sep 18 01:07:10 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058465194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.3058465194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.3665426074 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 9852878706 ps |
| CPU time | 14.39 seconds |
| Started | Sep 18 01:06:18 PM UTC 24 |
| Finished | Sep 18 01:06:33 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665426074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.3665426074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.479450978 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 3846992717 ps |
| CPU time | 105.83 seconds |
| Started | Sep 18 01:06:19 PM UTC 24 |
| Finished | Sep 18 01:08:08 PM UTC 24 |
| Peak memory | 230312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479450978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.479450978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.754867268 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 3912163710 ps |
| CPU time | 105.92 seconds |
| Started | Sep 18 01:06:19 PM UTC 24 |
| Finished | Sep 18 01:08:08 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=754867268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.754867268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.2867320574 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 260475810 ps |
| CPU time | 1.93 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 215484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867320574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.2867320574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.2793845617 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 237244302 ps |
| CPU time | 1.77 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793845617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.2793845617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.1268970149 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 3474046610 ps |
| CPU time | 26.56 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268970149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.1268970149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.3268777829 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 153565254 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:22 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268777829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.3268777829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.1651728340 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 148200850 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:22 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651728340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.1651728340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.3302890585 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 250795891 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302890585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.3302890585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.3550645490 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 177630040 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550645490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.3550645490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.922620728 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 192974251 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:06:20 PM UTC 24 |
| Finished | Sep 18 01:06:23 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922620728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_out_stall.922620728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.1878945553 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 206698046 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:06:21 PM UTC 24 |
| Finished | Sep 18 01:06:24 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878945553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.1878945553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.2419050926 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 184635418 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:06:21 PM UTC 24 |
| Finished | Sep 18 01:06:24 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419050926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.2419050926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.1326842713 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 253279995 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:06:23 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326842713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.1326842713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.2571304432 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 188390558 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:06:23 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571304432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.2571304432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2124793375 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 113868688 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:06:23 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124793375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2124793375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.592625115 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 14027643708 ps |
| CPU time | 35.68 seconds |
| Started | Sep 18 01:06:23 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 228308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592625115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_pkt_buffer.592625115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3376307820 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 151298378 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:06:24 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376307820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3376307820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.2094474704 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 207723727 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:06:24 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094474704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.2094474704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.2409560328 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 178413757 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:06:24 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409560328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.2409560328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.2734588083 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 183941200 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:06:24 PM UTC 24 |
| Finished | Sep 18 01:06:26 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734588083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.2734588083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.2462609270 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 136159546 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:06:25 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462609270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.2462609270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.727634722 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 412871899 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 01:06:25 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727634722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_rx_full.727634722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.377732032 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 247880530 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:06:25 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377732032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_setup_stage.377732032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.837846555 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 157230118 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:06:25 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=837846555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 41.usbdev_setup_trans_ignored.837846555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.953776174 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 208814027 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:06:25 PM UTC 24 |
| Finished | Sep 18 01:06:28 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=953776174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.953776174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.3821025973 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 2968284797 ps |
| CPU time | 26.53 seconds |
| Started | Sep 18 01:06:27 PM UTC 24 |
| Finished | Sep 18 01:06:55 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821025973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.3821025973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.2292134368 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 174090227 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:06:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292134368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2292134368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.2830806951 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 200667403 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:06:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830806951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.2830806951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2164686724 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 1233821763 ps |
| CPU time | 3.4 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:06:32 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164686724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.2164686724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.1073649799 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 3435329685 ps |
| CPU time | 32.92 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:07:02 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073649799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.1073649799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.1166490484 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 1661106147 ps |
| CPU time | 34.69 seconds |
| Started | Sep 18 01:06:13 PM UTC 24 |
| Finished | Sep 18 01:06:50 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166490484 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.1166490484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.2862878684 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 543480610 ps |
| CPU time | 2.44 seconds |
| Started | Sep 18 01:06:28 PM UTC 24 |
| Finished | Sep 18 01:06:31 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2862878684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.2862878684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.4150060406 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 448189875 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4150060406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.4150060406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.3196909674 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 517566965 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196909674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.3196909674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.146690098 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 568951856 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=146690098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_t x_rx_disruption.146690098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.2292428350 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 685363469 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2292428350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.2292428350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.2976102297 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 566317087 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:11:06 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2976102297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.2976102297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1708203541 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 547929482 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:07 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1708203541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.1708203541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1287860637 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 672890623 ps |
| CPU time | 1.91 seconds |
| Started | Sep 18 01:11:07 PM UTC 24 |
| Finished | Sep 18 01:11:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1287860637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1287860637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.1133252151 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 646180376 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:11:07 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1133252151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.1133252151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.111107865 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 503047224 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:11:07 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=111107865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_t x_rx_disruption.111107865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.4247904695 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 547139403 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:11:07 PM UTC 24 |
| Finished | Sep 18 01:11:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4247904695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.4247904695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.4227151269 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 40975149 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:06:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227151269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.4227151269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.2151476021 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 11046917867 ps |
| CPU time | 16.81 seconds |
| Started | Sep 18 01:06:29 PM UTC 24 |
| Finished | Sep 18 01:06:47 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151476021 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.2151476021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.1425620982 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 15337273881 ps |
| CPU time | 25.75 seconds |
| Started | Sep 18 01:06:29 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425620982 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.1425620982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.3063584667 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 29615220034 ps |
| CPU time | 47.64 seconds |
| Started | Sep 18 01:06:29 PM UTC 24 |
| Finished | Sep 18 01:07:18 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063584667 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.3063584667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.998835161 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 187625046 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:06:30 PM UTC 24 |
| Finished | Sep 18 01:06:32 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998835161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_av_buffer.998835161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.3614788426 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 162867691 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:06:30 PM UTC 24 |
| Finished | Sep 18 01:06:32 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614788426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.3614788426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.3419077637 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 198652295 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:06:30 PM UTC 24 |
| Finished | Sep 18 01:06:32 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419077637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.3419077637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.1042201148 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 585825965 ps |
| CPU time | 3.01 seconds |
| Started | Sep 18 01:06:30 PM UTC 24 |
| Finished | Sep 18 01:06:34 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042201148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.1042201148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.1988170901 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 40976672502 ps |
| CPU time | 68.82 seconds |
| Started | Sep 18 01:06:31 PM UTC 24 |
| Finished | Sep 18 01:07:42 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988170901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.1988170901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2300062489 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 1553089483 ps |
| CPU time | 33.8 seconds |
| Started | Sep 18 01:06:31 PM UTC 24 |
| Finished | Sep 18 01:07:06 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300062489 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2300062489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3705207849 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 542659981 ps |
| CPU time | 2.97 seconds |
| Started | Sep 18 01:06:31 PM UTC 24 |
| Finished | Sep 18 01:06:35 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705207849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3705207849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.2074732078 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 145558408 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:06:31 PM UTC 24 |
| Finished | Sep 18 01:06:34 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074732078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.2074732078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_enable.954024663 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 44154255 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:35 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954024663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.954024663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.3089140132 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 971578883 ps |
| CPU time | 3.52 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:37 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089140132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3089140132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.2310757518 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 426443548 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:36 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310757518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.2310757518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.439144920 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 148520005 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:35 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439144920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_fifo_levels.439144920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.478547741 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 290203577 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:36 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478547741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_fifo_rst.478547741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.329739326 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 234925433 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:06:34 PM UTC 24 |
| Finished | Sep 18 01:06:37 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=329739326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.329739326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.3130739655 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 146825702 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:06:34 PM UTC 24 |
| Finished | Sep 18 01:06:37 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130739655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.3130739655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.24881600 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 182614425 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:06:34 PM UTC 24 |
| Finished | Sep 18 01:06:37 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24881600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_in_trans.24881600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.2445777693 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 2420469530 ps |
| CPU time | 19.01 seconds |
| Started | Sep 18 01:06:33 PM UTC 24 |
| Finished | Sep 18 01:06:53 PM UTC 24 |
| Peak memory | 234952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445777693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.2445777693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.3482432044 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 5317924632 ps |
| CPU time | 61.18 seconds |
| Started | Sep 18 01:06:35 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482432044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.3482432044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.499640275 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 183184200 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:06:36 PM UTC 24 |
| Finished | Sep 18 01:06:38 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499640275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_link_in_err.499640275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.911503762 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 33116970359 ps |
| CPU time | 54.12 seconds |
| Started | Sep 18 01:06:37 PM UTC 24 |
| Finished | Sep 18 01:07:33 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911503762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_link_resume.911503762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.1398162075 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 4963775162 ps |
| CPU time | 8.94 seconds |
| Started | Sep 18 01:06:37 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398162075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.1398162075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.2661391690 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 3723466279 ps |
| CPU time | 36.61 seconds |
| Started | Sep 18 01:06:37 PM UTC 24 |
| Finished | Sep 18 01:07:16 PM UTC 24 |
| Peak memory | 234820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661391690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2661391690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.1242140853 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 2177139117 ps |
| CPU time | 18.75 seconds |
| Started | Sep 18 01:06:38 PM UTC 24 |
| Finished | Sep 18 01:06:58 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242140853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.1242140853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.188326642 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 248976306 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:06:38 PM UTC 24 |
| Finished | Sep 18 01:06:40 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188326642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.188326642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.3108853499 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 187634179 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:06:38 PM UTC 24 |
| Finished | Sep 18 01:06:40 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108853499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.3108853499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.525472827 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 2641699178 ps |
| CPU time | 68.66 seconds |
| Started | Sep 18 01:06:38 PM UTC 24 |
| Finished | Sep 18 01:07:48 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525472827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.525472827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.350933207 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 184590847 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=350933207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.350933207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.3349022060 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 201311588 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349022060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.3349022060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.815026980 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 200900625 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=815026980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_nak_trans.815026980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.3574320554 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 193970593 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574320554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.3574320554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2057937220 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 165455529 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057937220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2057937220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.4136819043 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 159566645 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:06:39 PM UTC 24 |
| Finished | Sep 18 01:06:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136819043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.4136819043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.2030320018 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 242859197 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:06:41 PM UTC 24 |
| Finished | Sep 18 01:06:43 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030320018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.2030320018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.910035046 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 256645910 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:06:41 PM UTC 24 |
| Finished | Sep 18 01:06:44 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910035046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.910035046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.698999943 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 157749777 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:06:42 PM UTC 24 |
| Finished | Sep 18 01:06:44 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698999943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.698999943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.604335783 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 46920371 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:06:43 PM UTC 24 |
| Finished | Sep 18 01:06:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=604335783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_phy_pins_sense.604335783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.216195170 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 20267682253 ps |
| CPU time | 53.65 seconds |
| Started | Sep 18 01:06:43 PM UTC 24 |
| Finished | Sep 18 01:07:39 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=216195170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_pkt_buffer.216195170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.3565874163 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 161111913 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:06:43 PM UTC 24 |
| Finished | Sep 18 01:06:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565874163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.3565874163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.2696651119 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 219291653 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:06:43 PM UTC 24 |
| Finished | Sep 18 01:06:46 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696651119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.2696651119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.3302716046 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 255363576 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:06:43 PM UTC 24 |
| Finished | Sep 18 01:06:47 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302716046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.3302716046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.2910219083 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 184377827 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:06:44 PM UTC 24 |
| Finished | Sep 18 01:06:46 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910219083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.2910219083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.1852365642 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 138589876 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:06:45 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852365642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.1852365642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.1988366288 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 346112803 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:06:45 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988366288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.1988366288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.1841091784 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 154109159 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:06:45 PM UTC 24 |
| Finished | Sep 18 01:06:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841091784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.1841091784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1948236762 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 177788801 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:06:45 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948236762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1948236762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.3561551783 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 213902888 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:06:45 PM UTC 24 |
| Finished | Sep 18 01:06:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561551783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.3561551783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.966419032 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 2814209984 ps |
| CPU time | 19.69 seconds |
| Started | Sep 18 01:06:46 PM UTC 24 |
| Finished | Sep 18 01:07:07 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=966419032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.966419032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.3704814792 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 238585765 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:06:48 PM UTC 24 |
| Finished | Sep 18 01:06:50 PM UTC 24 |
| Peak memory | 215540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704814792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3704814792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.1838615288 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 165851356 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:06:48 PM UTC 24 |
| Finished | Sep 18 01:06:50 PM UTC 24 |
| Peak memory | 214676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838615288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.1838615288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.3422660152 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 934883287 ps |
| CPU time | 4.6 seconds |
| Started | Sep 18 01:06:48 PM UTC 24 |
| Finished | Sep 18 01:06:54 PM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422660152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3422660152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.2256371282 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 3586151104 ps |
| CPU time | 32.42 seconds |
| Started | Sep 18 01:06:48 PM UTC 24 |
| Finished | Sep 18 01:07:22 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256371282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.2256371282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.2607128768 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 3875564115 ps |
| CPU time | 30.56 seconds |
| Started | Sep 18 01:06:31 PM UTC 24 |
| Finished | Sep 18 01:07:03 PM UTC 24 |
| Peak memory | 218404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607128768 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.2607128768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.1481234770 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 496489471 ps |
| CPU time | 2.21 seconds |
| Started | Sep 18 01:06:48 PM UTC 24 |
| Finished | Sep 18 01:06:51 PM UTC 24 |
| Peak memory | 217576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1481234770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.1481234770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.3052192346 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 581465142 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3052192346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.3052192346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.527099742 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 457939888 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=527099742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_t x_rx_disruption.527099742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.2863072832 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 571333482 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2863072832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.2863072832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.100055871 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 483768462 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=100055871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_t x_rx_disruption.100055871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.2208659758 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 496245975 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2208659758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.2208659758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.2906333924 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 551120255 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2906333924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.2906333924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.1301826616 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 495330961 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1301826616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.1301826616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.196363607 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 574708311 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=196363607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.196363607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.550779656 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 46445141 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=550779656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.550779656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.1840618777 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 5779837639 ps |
| CPU time | 9.08 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:07:00 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840618777 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.1840618777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.1743048698 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 21053278787 ps |
| CPU time | 31.93 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743048698 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.1743048698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.1002282167 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 23522442105 ps |
| CPU time | 35.86 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:07:27 PM UTC 24 |
| Peak memory | 228304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002282167 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.1002282167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.2085429568 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 220252335 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:06:52 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085429568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.2085429568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.753633923 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 145598256 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:06:52 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753633923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_bitstuff_err.753633923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.3611303794 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 368254972 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:06:53 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611303794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.3611303794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.1027181061 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 942214225 ps |
| CPU time | 4.52 seconds |
| Started | Sep 18 01:06:50 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027181061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.1027181061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.4227948556 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 29687012220 ps |
| CPU time | 52.13 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:07:45 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227948556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.4227948556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.1593389259 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 4331742988 ps |
| CPU time | 26.94 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:07:20 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593389259 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.1593389259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.2258701129 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 568845815 ps |
| CPU time | 2.89 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258701129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.2258701129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2723025034 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 144767706 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:06:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723025034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2723025034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_enable.1588671153 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 32890034 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:06:54 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588671153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.1588671153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.3658606002 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 988263612 ps |
| CPU time | 3.04 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658606002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.3658606002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.3613940074 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 293033097 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 01:06:53 PM UTC 24 |
| Finished | Sep 18 01:06:57 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613940074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.3613940074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.3093557595 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 154698559 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:06:53 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093557595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.3093557595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.554820881 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 353242682 ps |
| CPU time | 2.36 seconds |
| Started | Sep 18 01:06:53 PM UTC 24 |
| Finished | Sep 18 01:06:57 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554820881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.554820881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.829303051 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 178214084 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:06:54 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829303051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.829303051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.2218391674 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 190088399 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:06:54 PM UTC 24 |
| Finished | Sep 18 01:06:56 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218391674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.2218391674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.2113620516 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 218298413 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:06:58 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113620516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.2113620516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.3279174984 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 2920864914 ps |
| CPU time | 28.18 seconds |
| Started | Sep 18 01:06:54 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279174984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.3279174984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.2906704547 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 10935401365 ps |
| CPU time | 75.84 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:08:14 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906704547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.2906704547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1048308263 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 172732266 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:06:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048308263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1048308263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.3602017977 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 22971378376 ps |
| CPU time | 42.26 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:07:40 PM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602017977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.3602017977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.3366834020 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 6166967777 ps |
| CPU time | 9.33 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:07:06 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366834020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.3366834020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.3262769302 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 3736817693 ps |
| CPU time | 99.34 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:08:38 PM UTC 24 |
| Peak memory | 230320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262769302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.3262769302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.3485131191 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 2314793898 ps |
| CPU time | 21.19 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:07:19 PM UTC 24 |
| Peak memory | 229764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485131191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.3485131191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.2567783831 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 290713085 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:06:56 PM UTC 24 |
| Finished | Sep 18 01:06:59 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567783831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.2567783831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.434588851 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 203850220 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434588851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.434588851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.317741924 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 3439700146 ps |
| CPU time | 90.86 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317741924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.317741924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.4282867213 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 175095061 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282867213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.4282867213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.1300759114 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 176313978 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1300759114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.1300759114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.4034619016 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 224271605 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:00 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034619016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.4034619016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.3564798967 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 150101883 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564798967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.3564798967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.1538650561 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 177224905 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538650561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.1538650561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.811375784 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 201164311 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811375784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_out_trans_nak.811375784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.3834617448 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 145878245 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834617448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.3834617448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.3925488629 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 214452051 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:06:58 PM UTC 24 |
| Finished | Sep 18 01:07:01 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925488629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.3925488629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.779110434 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 135981653 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:07:00 PM UTC 24 |
| Finished | Sep 18 01:07:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779110434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.779110434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.2250095826 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 56628934 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 01:07:00 PM UTC 24 |
| Finished | Sep 18 01:07:02 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250095826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.2250095826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.57615496 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 9007160302 ps |
| CPU time | 25.75 seconds |
| Started | Sep 18 01:07:00 PM UTC 24 |
| Finished | Sep 18 01:07:27 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57615496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_buffer.57615496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.1984196112 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 176090244 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:07:00 PM UTC 24 |
| Finished | Sep 18 01:07:02 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984196112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.1984196112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.963801591 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 188218225 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:07:00 PM UTC 24 |
| Finished | Sep 18 01:07:03 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963801591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_pkt_sent.963801591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.713432910 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 212409454 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713432910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_random_length_in_transaction.713432910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.1729652093 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 165586377 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729652093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.1729652093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.3103398248 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 140561346 ps |
| CPU time | 0.93 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103398248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.3103398248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1378173451 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 264143594 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378173451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1378173451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.3459042610 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 154105044 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459042610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.3459042610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.3547099640 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 148386497 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547099640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3547099640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.1728347752 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 202427600 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728347752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.1728347752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.3086213477 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 2423532010 ps |
| CPU time | 21.64 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:25 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086213477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.3086213477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.2395004369 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 175513311 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395004369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.2395004369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.135945099 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 163138745 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:04 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135945099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_stall_trans.135945099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.769822956 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 336263050 ps |
| CPU time | 2.08 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:07 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=769822956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_stream_len_max.769822956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2326942723 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 2172127596 ps |
| CPU time | 15.53 seconds |
| Started | Sep 18 01:07:02 PM UTC 24 |
| Finished | Sep 18 01:07:19 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326942723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2326942723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.3116780573 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 3899239516 ps |
| CPU time | 30.86 seconds |
| Started | Sep 18 01:06:52 PM UTC 24 |
| Finished | Sep 18 01:07:24 PM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116780573 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.3116780573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.238707878 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 510357547 ps |
| CPU time | 2.66 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:07 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=238707878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx _rx_disruption.238707878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.2981376490 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 660373347 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2981376490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.2981376490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2694569911 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 489158827 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2694569911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2694569911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.1396764324 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 620345996 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1396764324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.1396764324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.4002633093 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 466958164 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4002633093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.4002633093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.338827079 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 445454422 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=338827079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_t x_rx_disruption.338827079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.3927486784 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 586065413 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3927486784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.3927486784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.3697093044 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 500801628 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3697093044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.3697093044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.73968428 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 511347951 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=73968428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_tx _rx_disruption.73968428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.3875515636 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 67861185 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:07:22 PM UTC 24 |
| Finished | Sep 18 01:07:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875515636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.3875515636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.1023400184 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 4284685250 ps |
| CPU time | 8.89 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:14 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023400184 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.1023400184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.3134519356 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 19276306667 ps |
| CPU time | 28.87 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134519356 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.3134519356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2774164751 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 29064591310 ps |
| CPU time | 46.7 seconds |
| Started | Sep 18 01:07:04 PM UTC 24 |
| Finished | Sep 18 01:07:52 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774164751 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2774164751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.3697477381 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 154829453 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:08 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697477381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.3697477381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.2682426577 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 152866670 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:08 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682426577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.2682426577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.3486544674 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 411370976 ps |
| CPU time | 2.72 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:09 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486544674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.3486544674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.252632129 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 579357190 ps |
| CPU time | 2.94 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:10 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252632129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.252632129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.613627444 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 32550157837 ps |
| CPU time | 59.99 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:08:07 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=613627444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_device_address.613627444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.1667878224 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 4270081717 ps |
| CPU time | 38.8 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:46 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667878224 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.1667878224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.1573654272 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 1105612327 ps |
| CPU time | 2.54 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:09 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573654272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.1573654272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3435138530 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 142712612 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:07:08 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435138530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3435138530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_enable.177089783 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 50670005 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:07:07 PM UTC 24 |
| Finished | Sep 18 01:07:09 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177089783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.177089783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.2805834323 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 813032118 ps |
| CPU time | 3.95 seconds |
| Started | Sep 18 01:07:07 PM UTC 24 |
| Finished | Sep 18 01:07:12 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805834323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.2805834323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.3316947911 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 350136764 ps |
| CPU time | 2.09 seconds |
| Started | Sep 18 01:07:07 PM UTC 24 |
| Finished | Sep 18 01:07:10 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316947911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.3316947911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.4279639659 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 251268112 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:07:07 PM UTC 24 |
| Finished | Sep 18 01:07:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279639659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.4279639659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.147641124 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 392351264 ps |
| CPU time | 3.19 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:07:13 PM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147641124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_fifo_rst.147641124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.2880708860 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 236604488 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:07:12 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880708860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2880708860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.604301630 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 168645290 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:07:11 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=604301630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_stall.604301630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.3239837762 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 210675074 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:07:12 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239837762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.3239837762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.1923646480 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 4913148829 ps |
| CPU time | 130.21 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:09:22 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923646480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.1923646480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2582729846 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 14223915058 ps |
| CPU time | 89.81 seconds |
| Started | Sep 18 01:07:09 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582729846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2582729846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.2248004869 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 245065057 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:07:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248004869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.2248004869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.2729518648 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 22758033394 ps |
| CPU time | 43.66 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:07:56 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729518648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.2729518648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.3668129624 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 8996946735 ps |
| CPU time | 13.06 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:07:25 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668129624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.3668129624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.309259295 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 4874834399 ps |
| CPU time | 132.3 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:09:26 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309259295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.309259295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.1381663206 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 2580368604 ps |
| CPU time | 28.7 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:07:41 PM UTC 24 |
| Peak memory | 230312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381663206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.1381663206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.413081430 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 235033002 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:07:11 PM UTC 24 |
| Finished | Sep 18 01:07:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413081430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.413081430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.3621279253 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 191081917 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:07:12 PM UTC 24 |
| Finished | Sep 18 01:07:15 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621279253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.3621279253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.3128772735 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 2963880626 ps |
| CPU time | 21.79 seconds |
| Started | Sep 18 01:07:12 PM UTC 24 |
| Finished | Sep 18 01:07:35 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128772735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.3128772735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.679613462 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 156675850 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:07:12 PM UTC 24 |
| Finished | Sep 18 01:07:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=679613462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.679613462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.1545442658 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 151026575 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:07:13 PM UTC 24 |
| Finished | Sep 18 01:07:16 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545442658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.1545442658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.2386791997 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 211197179 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:07:13 PM UTC 24 |
| Finished | Sep 18 01:07:16 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386791997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.2386791997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.177009711 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 169357117 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:07:15 PM UTC 24 |
| Finished | Sep 18 01:07:17 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177009711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_out_iso.177009711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.3771226869 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 190330293 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:07:15 PM UTC 24 |
| Finished | Sep 18 01:07:17 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771226869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.3771226869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2151819938 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 154911061 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:07:15 PM UTC 24 |
| Finished | Sep 18 01:07:17 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151819938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2151819938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2036641228 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 205995986 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:07:15 PM UTC 24 |
| Finished | Sep 18 01:07:17 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036641228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2036641228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.1912833483 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 232628413 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:07:16 PM UTC 24 |
| Finished | Sep 18 01:07:18 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912833483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.1912833483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.3189118275 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 149933182 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:07:16 PM UTC 24 |
| Finished | Sep 18 01:07:19 PM UTC 24 |
| Peak memory | 215308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189118275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.3189118275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.1358900366 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 40991769 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:07:16 PM UTC 24 |
| Finished | Sep 18 01:07:18 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358900366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.1358900366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.2415793515 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 21566514416 ps |
| CPU time | 54.65 seconds |
| Started | Sep 18 01:07:16 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415793515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.2415793515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.663880853 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 160056015 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:07:18 PM UTC 24 |
| Finished | Sep 18 01:07:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663880853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_pkt_received.663880853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.3577894676 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 184070411 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:07:18 PM UTC 24 |
| Finished | Sep 18 01:07:20 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577894676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.3577894676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.1405056970 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 187689603 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:07:19 PM UTC 24 |
| Finished | Sep 18 01:07:21 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405056970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.1405056970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1854853712 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 147085880 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:07:19 PM UTC 24 |
| Finished | Sep 18 01:07:21 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854853712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1854853712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.3132815187 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 152445255 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:19 PM UTC 24 |
| Finished | Sep 18 01:07:21 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132815187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.3132815187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.319401678 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 306851073 ps |
| CPU time | 2.18 seconds |
| Started | Sep 18 01:07:19 PM UTC 24 |
| Finished | Sep 18 01:07:22 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319401678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_rx_full.319401678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.991046925 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 170764097 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:07:19 PM UTC 24 |
| Finished | Sep 18 01:07:22 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=991046925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_setup_stage.991046925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.1365343461 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 150326938 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365343461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.1365343461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.3916204001 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 239307310 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916204001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.3916204001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.1843632467 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 3325686936 ps |
| CPU time | 88.23 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843632467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.1843632467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2501771226 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 169802694 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501771226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2501771226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.2038146382 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 169393044 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:07:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038146382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.2038146382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.1783881247 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 277036204 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:07:22 PM UTC 24 |
| Finished | Sep 18 01:07:25 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783881247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.1783881247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.1366927357 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 2748110651 ps |
| CPU time | 29.76 seconds |
| Started | Sep 18 01:07:21 PM UTC 24 |
| Finished | Sep 18 01:07:52 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366927357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.1366927357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.3240005262 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 8402988216 ps |
| CPU time | 56.2 seconds |
| Started | Sep 18 01:07:06 PM UTC 24 |
| Finished | Sep 18 01:08:04 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240005262 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.3240005262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.1415731127 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 675393771 ps |
| CPU time | 2.21 seconds |
| Started | Sep 18 01:07:22 PM UTC 24 |
| Finished | Sep 18 01:07:26 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1415731127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.1415731127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.2171859095 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 449906421 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2171859095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.2171859095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.805614276 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 707472410 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=805614276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_t x_rx_disruption.805614276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.3249117823 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 567482481 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3249117823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.3249117823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.1696495799 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 658043849 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:11:09 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1696495799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.1696495799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.2394882787 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 455917486 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:11:11 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2394882787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.2394882787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.2590576988 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 662770928 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:11 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2590576988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.2590576988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.2416116602 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 645871088 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 01:11:11 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2416116602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.2416116602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.3114772495 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 499535523 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3114772495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.3114772495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.3720752683 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 469311294 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3720752683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.3720752683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.2579772084 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 461150245 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2579772084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.2579772084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.957367494 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 58031721 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:07:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=957367494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.957367494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.976918703 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 10560384205 ps |
| CPU time | 15.41 seconds |
| Started | Sep 18 01:07:22 PM UTC 24 |
| Finished | Sep 18 01:07:39 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976918703 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.976918703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.2938602065 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 19531442884 ps |
| CPU time | 25.24 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938602065 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.2938602065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.1119943435 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 29132980806 ps |
| CPU time | 38.88 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:08:04 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119943435 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.1119943435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.3772551896 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 185119644 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:07:26 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772551896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.3772551896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.1080840573 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 193993179 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:07:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080840573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.1080840573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.3575458394 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 543990770 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575458394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.3575458394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.1069813546 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 877117963 ps |
| CPU time | 3.87 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:07:29 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069813546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1069813546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.819434872 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 39591439989 ps |
| CPU time | 82.19 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:08:48 PM UTC 24 |
| Peak memory | 218404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819434872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_device_address.819434872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.84751117 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 1671580534 ps |
| CPU time | 37.35 seconds |
| Started | Sep 18 01:07:24 PM UTC 24 |
| Finished | Sep 18 01:08:03 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84751117 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.84751117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.774622856 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 666907459 ps |
| CPU time | 2.14 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:29 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774622856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.774622856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.3238765141 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 176032202 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238765141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.3238765141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_enable.2477724162 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 63116160 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477724162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.2477724162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.3882303338 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 932523746 ps |
| CPU time | 3.69 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:31 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882303338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.3882303338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.225273515 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 517313126 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:29 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=225273515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.225273515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.2807208407 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 255998382 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807208407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.2807208407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.949324696 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 280189005 ps |
| CPU time | 2.13 seconds |
| Started | Sep 18 01:07:27 PM UTC 24 |
| Finished | Sep 18 01:07:31 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=949324696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_fifo_rst.949324696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.2012095499 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 180536240 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:07:27 PM UTC 24 |
| Finished | Sep 18 01:07:30 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012095499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.2012095499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.2792467733 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 187391860 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:07:27 PM UTC 24 |
| Finished | Sep 18 01:07:30 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792467733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.2792467733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.1536036786 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 173628308 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:07:32 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536036786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.1536036786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.2599322962 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 3894901800 ps |
| CPU time | 95.51 seconds |
| Started | Sep 18 01:07:27 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599322962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.2599322962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3604729256 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 10397748611 ps |
| CPU time | 81.14 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:08:52 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604729256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.3604729256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1531818533 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 203402696 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:07:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531818533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1531818533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.45069898 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 22562595881 ps |
| CPU time | 39.29 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:08:10 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45069898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_link_resume.45069898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.2750030106 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 3458699171 ps |
| CPU time | 6.72 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:07:37 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750030106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.2750030106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.483642653 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 4945683179 ps |
| CPU time | 51.25 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483642653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.483642653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.364869745 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 2200091922 ps |
| CPU time | 23.05 seconds |
| Started | Sep 18 01:07:29 PM UTC 24 |
| Finished | Sep 18 01:07:54 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364869745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.364869745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.2625776745 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 254891064 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625776745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.2625776745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.3560558810 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 190807253 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560558810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.3560558810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.2778433591 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 4093165515 ps |
| CPU time | 109.5 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:09:23 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778433591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.2778433591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.83889405 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 181889746 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=83889405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.83889405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.107804048 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 139055013 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=107804048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.107804048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.487914448 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 191203850 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487914448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_nak_trans.487914448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.2188656493 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 187299270 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188656493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.2188656493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.1646930432 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 173750170 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646930432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.1646930432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3561713774 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 192843756 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561713774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.3561713774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.2705005924 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 188855315 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:32 PM UTC 24 |
| Finished | Sep 18 01:07:34 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705005924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.2705005924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.1756301835 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 227176188 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:07:34 PM UTC 24 |
| Finished | Sep 18 01:07:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756301835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.1756301835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.28313452 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 169271043 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:07:34 PM UTC 24 |
| Finished | Sep 18 01:07:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28313452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.28313452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.1497060291 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 91559625 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:07:34 PM UTC 24 |
| Finished | Sep 18 01:07:36 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497060291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1497060291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.68924398 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 16374617720 ps |
| CPU time | 43.11 seconds |
| Started | Sep 18 01:07:34 PM UTC 24 |
| Finished | Sep 18 01:08:19 PM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68924398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_buffer.68924398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.354712786 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 270573247 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354712786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_pkt_received.354712786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.3370526175 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 219755904 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370526175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.3370526175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.4263685828 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 244839598 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263685828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.4263685828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.1066905203 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 222531291 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:39 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066905203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.1066905203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.3497966770 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 191476167 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497966770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.3497966770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.2478077356 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 256427882 ps |
| CPU time | 1.91 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:39 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478077356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.2478077356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.4098249263 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 155011665 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098249263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.4098249263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2096415417 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 153326214 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096415417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2096415417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.1859895 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 226903668 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:07:39 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -c m_name 45.usbdev_smoke.1859895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3976625477 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 3115342784 ps |
| CPU time | 30.79 seconds |
| Started | Sep 18 01:07:36 PM UTC 24 |
| Finished | Sep 18 01:08:08 PM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976625477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3976625477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.1726212890 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 205919423 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:07:38 PM UTC 24 |
| Finished | Sep 18 01:07:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726212890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.1726212890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.509700856 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 171608268 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:07:38 PM UTC 24 |
| Finished | Sep 18 01:07:40 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=509700856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_stall_trans.509700856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.217043634 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 319426260 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:07:38 PM UTC 24 |
| Finished | Sep 18 01:07:40 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=217043634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_stream_len_max.217043634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.3316751065 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 2503028884 ps |
| CPU time | 23.2 seconds |
| Started | Sep 18 01:07:38 PM UTC 24 |
| Finished | Sep 18 01:08:02 PM UTC 24 |
| Peak memory | 230752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316751065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.3316751065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.2937136472 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 166943172 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:07:26 PM UTC 24 |
| Finished | Sep 18 01:07:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937136472 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.2937136472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.2967419557 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 500779031 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:07:38 PM UTC 24 |
| Finished | Sep 18 01:07:40 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2967419557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.2967419557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.1416756472 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 531783245 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1416756472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.1416756472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.4250537551 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 489108836 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4250537551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.4250537551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.2644694205 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 502807961 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2644694205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.2644694205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1515443114 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 554401496 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1515443114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.1515443114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.900163823 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 705675397 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=900163823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_t x_rx_disruption.900163823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.4038964222 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 556849734 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4038964222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.4038964222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.3912012423 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 523474436 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3912012423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.3912012423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.3973726524 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 622581239 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3973726524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.3973726524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.1043809484 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 541690972 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1043809484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.1043809484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.623596604 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 635218163 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=623596604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_t x_rx_disruption.623596604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.3580713164 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 50461179 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:07:58 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580713164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.3580713164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.819172758 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 9525193157 ps |
| CPU time | 20.11 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:08:02 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819172758 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.819172758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.671846430 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 15798021481 ps |
| CPU time | 32.32 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:08:14 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=671846430 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.671846430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.4135270783 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 29648634592 ps |
| CPU time | 43.3 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:08:25 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135270783 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.4135270783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1873787540 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 166565484 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:07:42 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873787540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1873787540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.1340395201 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 148935153 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:07:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340395201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.1340395201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.2781797836 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 257292712 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:07:40 PM UTC 24 |
| Finished | Sep 18 01:07:43 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781797836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.2781797836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.3187441734 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 663760110 ps |
| CPU time | 1.99 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:07:44 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187441734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.3187441734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.2968632842 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 28108374382 ps |
| CPU time | 61.69 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:08:44 PM UTC 24 |
| Peak memory | 218348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968632842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.2968632842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.3330238146 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 756410052 ps |
| CPU time | 14.24 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:07:56 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330238146 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.3330238146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.2445247467 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 724662276 ps |
| CPU time | 3.65 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:07:45 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445247467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.2445247467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.1347168945 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 143249129 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:07:43 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347168945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.1347168945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_enable.1324546398 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 45012777 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:07:44 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324546398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.1324546398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.1812259949 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 924287519 ps |
| CPU time | 4.21 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:07:47 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812259949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.1812259949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.3512212113 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 165810364 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:07:45 PM UTC 24 |
| Peak memory | 215480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512212113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.3512212113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.3358100906 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 256298480 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:07:45 PM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358100906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.3358100906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2831625951 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 380169393 ps |
| CPU time | 3.14 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:07:46 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831625951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2831625951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.1892542618 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 220540297 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:07:44 PM UTC 24 |
| Finished | Sep 18 01:07:47 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892542618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1892542618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.3006982470 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 147753893 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:07:44 PM UTC 24 |
| Finished | Sep 18 01:07:47 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006982470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.3006982470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.1773148371 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 160258886 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:07:44 PM UTC 24 |
| Finished | Sep 18 01:07:47 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773148371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.1773148371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.4261305772 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 5557091289 ps |
| CPU time | 41.68 seconds |
| Started | Sep 18 01:07:42 PM UTC 24 |
| Finished | Sep 18 01:08:25 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261305772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.4261305772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.1604936145 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 12765413937 ps |
| CPU time | 144.83 seconds |
| Started | Sep 18 01:07:44 PM UTC 24 |
| Finished | Sep 18 01:10:12 PM UTC 24 |
| Peak memory | 219900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604936145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1604936145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.2080608850 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 225886665 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:07:45 PM UTC 24 |
| Finished | Sep 18 01:07:47 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080608850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.2080608850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.1063817739 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 9180633916 ps |
| CPU time | 17.71 seconds |
| Started | Sep 18 01:07:45 PM UTC 24 |
| Finished | Sep 18 01:08:03 PM UTC 24 |
| Peak memory | 228264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063817739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.1063817739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2566751561 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 6288150049 ps |
| CPU time | 11.83 seconds |
| Started | Sep 18 01:07:45 PM UTC 24 |
| Finished | Sep 18 01:07:58 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566751561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2566751561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.3837700375 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 2773505747 ps |
| CPU time | 74.77 seconds |
| Started | Sep 18 01:07:45 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 234700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837700375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.3837700375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.347225233 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 3252918125 ps |
| CPU time | 35.77 seconds |
| Started | Sep 18 01:07:47 PM UTC 24 |
| Finished | Sep 18 01:08:24 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=347225233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.347225233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2222743006 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 241618004 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:07:47 PM UTC 24 |
| Finished | Sep 18 01:07:49 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222743006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.2222743006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.1584500380 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 238610650 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:07:47 PM UTC 24 |
| Finished | Sep 18 01:07:49 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584500380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.1584500380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.3844227556 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 2995278902 ps |
| CPU time | 22.23 seconds |
| Started | Sep 18 01:07:47 PM UTC 24 |
| Finished | Sep 18 01:08:10 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844227556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.3844227556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.1841183274 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 154624554 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:07:47 PM UTC 24 |
| Finished | Sep 18 01:07:49 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841183274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.1841183274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.4128819009 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 145490510 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128819009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.4128819009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.4078742252 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 190013280 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078742252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.4078742252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.4059815642 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 198994047 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059815642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.4059815642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.2050738332 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 208672317 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050738332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.2050738332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3656218529 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 199165311 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656218529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3656218529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.680546698 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 150363506 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:07:48 PM UTC 24 |
| Finished | Sep 18 01:07:51 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680546698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.680546698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.3465134254 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 189894985 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:07:50 PM UTC 24 |
| Finished | Sep 18 01:07:52 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465134254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.3465134254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.1297910846 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 209997591 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:07:50 PM UTC 24 |
| Finished | Sep 18 01:07:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297910846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.1297910846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.2341361457 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 38167911 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:07:50 PM UTC 24 |
| Finished | Sep 18 01:07:52 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341361457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.2341361457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.944279319 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 9898686178 ps |
| CPU time | 25.54 seconds |
| Started | Sep 18 01:07:51 PM UTC 24 |
| Finished | Sep 18 01:08:18 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944279319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_pkt_buffer.944279319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.3430466411 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 218678421 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 01:07:52 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430466411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.3430466411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3359528617 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 166189316 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:07:52 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359528617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3359528617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1409954682 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 190202074 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:07:52 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409954682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.1409954682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.3307486526 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 194997305 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:07:53 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307486526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.3307486526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.2761339735 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 167261319 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:07:53 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761339735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.2761339735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.3962854690 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 252179796 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:07:53 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962854690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.3962854690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3577320080 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 144061136 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:07:53 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577320080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3577320080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.3209346610 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 149619571 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:07:53 PM UTC 24 |
| Finished | Sep 18 01:07:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209346610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.3209346610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2474914921 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 223997523 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:07:54 PM UTC 24 |
| Finished | Sep 18 01:07:57 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474914921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.2474914921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.1666460488 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 2404894140 ps |
| CPU time | 17.36 seconds |
| Started | Sep 18 01:07:54 PM UTC 24 |
| Finished | Sep 18 01:08:13 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666460488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.1666460488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.3578443589 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 177057172 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:07:54 PM UTC 24 |
| Finished | Sep 18 01:07:56 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3578443589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.3578443589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3376561415 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 234184073 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:07:54 PM UTC 24 |
| Finished | Sep 18 01:07:57 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376561415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.3376561415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.2139952137 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 1155085260 ps |
| CPU time | 4.39 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:08:01 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139952137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.2139952137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.1363524681 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 2672454127 ps |
| CPU time | 22.42 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:08:19 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363524681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.1363524681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.2495619624 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 6388405406 ps |
| CPU time | 43.88 seconds |
| Started | Sep 18 01:07:41 PM UTC 24 |
| Finished | Sep 18 01:08:26 PM UTC 24 |
| Peak memory | 218404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495619624 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.2495619624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.1470456717 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 463159698 ps |
| CPU time | 1.93 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:07:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1470456717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.1470456717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.1209014016 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 489412317 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1209014016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.1209014016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.1414429914 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 559549708 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1414429914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.1414429914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.1096015091 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 749636794 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1096015091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.1096015091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.2720278312 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 587690394 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2720278312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.2720278312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.580616956 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 589659125 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=580616956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_t x_rx_disruption.580616956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.458491853 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 576301139 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=458491853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_t x_rx_disruption.458491853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.275689297 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 484738902 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=275689297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_t x_rx_disruption.275689297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3168383751 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 626355901 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3168383751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3168383751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.2057752797 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 29309885 ps |
| CPU time | 1 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:16 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057752797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.2057752797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.784243830 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 11290533272 ps |
| CPU time | 18.16 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:08:15 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=784243830 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.784243830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.2664042647 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 15395529888 ps |
| CPU time | 29.86 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:08:27 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664042647 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.2664042647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.382371632 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 25303063147 ps |
| CPU time | 35.03 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:08:32 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=382371632 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.382371632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.3186939794 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 179122896 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:07:56 PM UTC 24 |
| Finished | Sep 18 01:07:59 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186939794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.3186939794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.2889171104 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 173852777 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:07:57 PM UTC 24 |
| Finished | Sep 18 01:08:00 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889171104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.2889171104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.400786346 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 382454546 ps |
| CPU time | 2.45 seconds |
| Started | Sep 18 01:07:57 PM UTC 24 |
| Finished | Sep 18 01:08:01 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400786346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_data_toggle_clear.400786346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.3110392588 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 854148424 ps |
| CPU time | 2.49 seconds |
| Started | Sep 18 01:07:57 PM UTC 24 |
| Finished | Sep 18 01:08:01 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110392588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.3110392588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.3088435158 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 49504487443 ps |
| CPU time | 80.66 seconds |
| Started | Sep 18 01:07:57 PM UTC 24 |
| Finished | Sep 18 01:09:20 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088435158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.3088435158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.3579133694 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 3429595893 ps |
| CPU time | 29.74 seconds |
| Started | Sep 18 01:07:58 PM UTC 24 |
| Finished | Sep 18 01:08:29 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579133694 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.3579133694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.3303205802 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 804312131 ps |
| CPU time | 3.48 seconds |
| Started | Sep 18 01:07:59 PM UTC 24 |
| Finished | Sep 18 01:08:03 PM UTC 24 |
| Peak memory | 217680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303205802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.3303205802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.3615280319 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 136081551 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:07:59 PM UTC 24 |
| Finished | Sep 18 01:08:01 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615280319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.3615280319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_enable.816759934 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 34625911 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:08:00 PM UTC 24 |
| Finished | Sep 18 01:08:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816759934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.816759934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.258320707 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 985507446 ps |
| CPU time | 4.24 seconds |
| Started | Sep 18 01:08:00 PM UTC 24 |
| Finished | Sep 18 01:08:05 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258320707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.258320707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3127805797 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 443151989 ps |
| CPU time | 2.36 seconds |
| Started | Sep 18 01:08:00 PM UTC 24 |
| Finished | Sep 18 01:08:03 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127805797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3127805797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.2670716145 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 195896331 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:08:01 PM UTC 24 |
| Finished | Sep 18 01:08:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670716145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.2670716145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2603809075 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 313679314 ps |
| CPU time | 3.42 seconds |
| Started | Sep 18 01:08:01 PM UTC 24 |
| Finished | Sep 18 01:08:06 PM UTC 24 |
| Peak memory | 217808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603809075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.2603809075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.918769676 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 212406547 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:08:03 PM UTC 24 |
| Finished | Sep 18 01:08:05 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=918769676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.918769676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1956125862 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 144064288 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:08:03 PM UTC 24 |
| Finished | Sep 18 01:08:05 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956125862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.1956125862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.738373899 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 240785645 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:03 PM UTC 24 |
| Finished | Sep 18 01:08:05 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738373899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.738373899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.421192853 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 3707923260 ps |
| CPU time | 28.2 seconds |
| Started | Sep 18 01:08:01 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=421192853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.421192853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1186171900 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 8719650301 ps |
| CPU time | 53.22 seconds |
| Started | Sep 18 01:08:03 PM UTC 24 |
| Finished | Sep 18 01:08:58 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186171900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1186171900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.2861461876 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 238639165 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:08:04 PM UTC 24 |
| Finished | Sep 18 01:08:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861461876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.2861461876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.559587278 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 27288069681 ps |
| CPU time | 51.08 seconds |
| Started | Sep 18 01:08:04 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559587278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_resume.559587278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1005220672 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 4925984634 ps |
| CPU time | 10.71 seconds |
| Started | Sep 18 01:08:05 PM UTC 24 |
| Finished | Sep 18 01:08:16 PM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005220672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1005220672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.2404175236 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 4617097719 ps |
| CPU time | 34.85 seconds |
| Started | Sep 18 01:08:05 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404175236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.2404175236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.2022441972 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 2524473741 ps |
| CPU time | 19.81 seconds |
| Started | Sep 18 01:08:05 PM UTC 24 |
| Finished | Sep 18 01:08:26 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022441972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.2022441972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.2994669381 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 253733935 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:08:05 PM UTC 24 |
| Finished | Sep 18 01:08:07 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994669381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.2994669381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.1380077845 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 187884685 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:08:06 PM UTC 24 |
| Finished | Sep 18 01:08:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380077845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.1380077845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1868452017 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 2557077827 ps |
| CPU time | 73.14 seconds |
| Started | Sep 18 01:08:06 PM UTC 24 |
| Finished | Sep 18 01:09:21 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868452017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1868452017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.3231805850 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 240996469 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:08:06 PM UTC 24 |
| Finished | Sep 18 01:08:09 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231805850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.3231805850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2203208546 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 161259959 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:08:06 PM UTC 24 |
| Finished | Sep 18 01:08:08 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203208546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2203208546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.3835275309 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 186549554 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:08:06 PM UTC 24 |
| Finished | Sep 18 01:08:09 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835275309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.3835275309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.1559690984 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 195039811 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:08:07 PM UTC 24 |
| Finished | Sep 18 01:08:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559690984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.1559690984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.2775534232 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 183379050 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775534232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.2775534232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2400612407 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 204515682 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400612407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2400612407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.1216392118 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 171703497 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216392118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.1216392118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.1177586415 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 193465773 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177586415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.1177586415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.1921925361 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 159302433 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921925361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.1921925361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.4027813790 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 28552770 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:11 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027813790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.4027813790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.613402899 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 14132232850 ps |
| CPU time | 37.83 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:49 PM UTC 24 |
| Peak memory | 232544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=613402899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_pkt_buffer.613402899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.1519275283 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 175422379 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:08:09 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519275283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.1519275283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1218684821 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 235909609 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:08:10 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218684821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1218684821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2504009039 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 183293649 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:08:10 PM UTC 24 |
| Finished | Sep 18 01:08:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504009039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.2504009039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.2746292186 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 202456520 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:08:11 PM UTC 24 |
| Finished | Sep 18 01:08:13 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746292186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.2746292186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.2911604665 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 168001893 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:08:11 PM UTC 24 |
| Finished | Sep 18 01:08:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911604665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.2911604665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.2542440429 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 304821316 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:08:11 PM UTC 24 |
| Finished | Sep 18 01:08:13 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542440429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.2542440429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.888060753 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 148991008 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:08:12 PM UTC 24 |
| Finished | Sep 18 01:08:15 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=888060753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_setup_stage.888060753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.578640202 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 169142782 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:08:12 PM UTC 24 |
| Finished | Sep 18 01:08:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578640202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 47.usbdev_setup_trans_ignored.578640202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.834653021 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 247272827 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:08:12 PM UTC 24 |
| Finished | Sep 18 01:08:15 PM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834653021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.834653021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.4197536042 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 2903928336 ps |
| CPU time | 20.15 seconds |
| Started | Sep 18 01:08:12 PM UTC 24 |
| Finished | Sep 18 01:08:34 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197536042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.4197536042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.889114353 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 145968796 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:08:12 PM UTC 24 |
| Finished | Sep 18 01:08:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889114353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.889114353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.3046916276 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 220739301 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046916276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.3046916276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.2179673979 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 542856601 ps |
| CPU time | 2.67 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:18 PM UTC 24 |
| Peak memory | 217812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179673979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.2179673979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.1525813664 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 3203717065 ps |
| CPU time | 82.8 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:09:39 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525813664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.1525813664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.752635272 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 2976581536 ps |
| CPU time | 28 seconds |
| Started | Sep 18 01:07:59 PM UTC 24 |
| Finished | Sep 18 01:08:28 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=752635272 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.752635272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.2701779217 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 536944311 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:17 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2701779217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.2701779217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.3108538146 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 477448979 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3108538146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.3108538146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.608026251 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 476381198 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 216516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=608026251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_t x_rx_disruption.608026251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.2348054917 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 566515820 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2348054917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.2348054917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.2205355072 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 415303173 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:11:12 PM UTC 24 |
| Finished | Sep 18 01:11:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2205355072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.2205355072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.1805282263 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 508653996 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:11:14 PM UTC 24 |
| Finished | Sep 18 01:11:23 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1805282263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.1805282263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.1766092498 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 573476002 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:11:15 PM UTC 24 |
| Finished | Sep 18 01:11:23 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1766092498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.1766092498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.447043878 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 473439393 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:15 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=447043878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.447043878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.2471853236 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 453618707 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:11:15 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2471853236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.2471853236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.2715961660 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 500282879 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:11:15 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2715961660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.2715961660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.19928956 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 588453804 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 01:11:16 PM UTC 24 |
| Finished | Sep 18 01:11:19 PM UTC 24 |
| Peak memory | 215264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=19928956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_tx _rx_disruption.19928956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.3701044043 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 57551724 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:08:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701044043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.3701044043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.3284573831 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 4123114526 ps |
| CPU time | 6.94 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284573831 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.3284573831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.4060228095 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 14010091439 ps |
| CPU time | 22.16 seconds |
| Started | Sep 18 01:08:14 PM UTC 24 |
| Finished | Sep 18 01:08:38 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060228095 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.4060228095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3744761882 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 29173677899 ps |
| CPU time | 42.85 seconds |
| Started | Sep 18 01:08:15 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744761882 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3744761882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.1328874097 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 179971528 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:18 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328874097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.1328874097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.1162224872 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 164283732 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:18 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162224872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.1162224872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.27790494 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 222925087 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:19 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=27790494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_clear.27790494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.565209960 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 690008193 ps |
| CPU time | 3.18 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:20 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565209960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.565209960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3404500519 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 31921486175 ps |
| CPU time | 57.04 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404500519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.3404500519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.2486835886 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 2972601245 ps |
| CPU time | 25.58 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:43 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486835886 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.2486835886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.2245322419 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 1011701977 ps |
| CPU time | 4.4 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245322419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.2245322419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.2624141774 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 141298614 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:08:18 PM UTC 24 |
| Finished | Sep 18 01:08:20 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624141774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.2624141774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_enable.513383094 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 90143164 ps |
| CPU time | 0.88 seconds |
| Started | Sep 18 01:08:18 PM UTC 24 |
| Finished | Sep 18 01:08:20 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513383094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.513383094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.3070348438 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 969263733 ps |
| CPU time | 4.58 seconds |
| Started | Sep 18 01:08:18 PM UTC 24 |
| Finished | Sep 18 01:08:24 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070348438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.3070348438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.3516797611 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 674075879 ps |
| CPU time | 2.99 seconds |
| Started | Sep 18 01:08:18 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516797611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.3516797611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.2421857877 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 254488149 ps |
| CPU time | 1.84 seconds |
| Started | Sep 18 01:08:19 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421857877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.2421857877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.2317329184 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 294424895 ps |
| CPU time | 3.26 seconds |
| Started | Sep 18 01:08:19 PM UTC 24 |
| Finished | Sep 18 01:08:23 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2317329184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.2317329184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.2626406533 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 221023216 ps |
| CPU time | 1.9 seconds |
| Started | Sep 18 01:08:19 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626406533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.2626406533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.1631623627 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 227091544 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:08:19 PM UTC 24 |
| Finished | Sep 18 01:08:22 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631623627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.1631623627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.3649430796 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 203321747 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:08:24 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649430796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.3649430796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.1782719594 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 2776786858 ps |
| CPU time | 25.85 seconds |
| Started | Sep 18 01:08:19 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782719594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.1782719594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.2512863441 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 6636198850 ps |
| CPU time | 42.82 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:09:06 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512863441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.2512863441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.2352359938 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 201850815 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:08:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352359938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.2352359938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.1613819103 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 10813125679 ps |
| CPU time | 17.26 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:08:40 PM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613819103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.1613819103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1291556747 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 4135320400 ps |
| CPU time | 7.49 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291556747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.1291556747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.984825505 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 3854394305 ps |
| CPU time | 40.64 seconds |
| Started | Sep 18 01:08:21 PM UTC 24 |
| Finished | Sep 18 01:09:04 PM UTC 24 |
| Peak memory | 235208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984825505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.984825505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.404122586 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 2678940600 ps |
| CPU time | 68.39 seconds |
| Started | Sep 18 01:08:23 PM UTC 24 |
| Finished | Sep 18 01:09:33 PM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=404122586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.404122586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.3151057598 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 237999149 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:08:23 PM UTC 24 |
| Finished | Sep 18 01:08:26 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151057598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.3151057598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.3752740375 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 203509768 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:23 PM UTC 24 |
| Finished | Sep 18 01:08:26 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752740375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.3752740375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3182826755 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 3653233468 ps |
| CPU time | 34.51 seconds |
| Started | Sep 18 01:08:23 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182826755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3182826755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.3756252288 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 169019479 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:08:23 PM UTC 24 |
| Finished | Sep 18 01:08:26 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756252288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.3756252288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.3801175455 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 201660734 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:24 PM UTC 24 |
| Finished | Sep 18 01:08:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801175455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3801175455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.2818780779 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 177470522 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:08:24 PM UTC 24 |
| Finished | Sep 18 01:08:27 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818780779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.2818780779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.674719489 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 227582863 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:08:24 PM UTC 24 |
| Finished | Sep 18 01:08:27 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=674719489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_out_iso.674719489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3238653399 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 187180437 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:08:24 PM UTC 24 |
| Finished | Sep 18 01:08:27 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238653399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.3238653399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.1897011228 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 182503860 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:08:26 PM UTC 24 |
| Finished | Sep 18 01:08:28 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897011228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.1897011228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3547359926 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 156339920 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:08:26 PM UTC 24 |
| Finished | Sep 18 01:08:28 PM UTC 24 |
| Peak memory | 215200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547359926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.3547359926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.1173260933 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 217769096 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:26 PM UTC 24 |
| Finished | Sep 18 01:08:28 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173260933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.1173260933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.973751310 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 169902470 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:08:26 PM UTC 24 |
| Finished | Sep 18 01:08:28 PM UTC 24 |
| Peak memory | 215212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973751310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.973751310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.2157193697 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 33251847 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:29 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157193697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.2157193697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3297918792 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 16977083751 ps |
| CPU time | 45.01 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:09:14 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3297918792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.3297918792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.3269749062 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 188387594 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269749062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.3269749062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.3270524628 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 235638387 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270524628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.3270524628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.3331293988 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 167635521 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331293988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.3331293988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2761699509 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 155409981 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761699509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2761699509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.458400884 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 194472532 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:08:27 PM UTC 24 |
| Finished | Sep 18 01:08:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=458400884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_rx_crc_err.458400884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3354770816 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 276820077 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:32 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354770816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3354770816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.434834621 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 150995546 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434834621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_setup_stage.434834621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.150163520 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 158746741 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150163520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 48.usbdev_setup_trans_ignored.150163520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.1363849826 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 179454126 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363849826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.1363849826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.126137098 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 2867059478 ps |
| CPU time | 20.34 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126137098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.126137098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1566494221 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 186308183 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566494221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1566494221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.3099775063 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 185855647 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099775063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.3099775063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.1258666 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 265403328 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stream_len_max.1258666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.878628062 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 2424686641 ps |
| CPU time | 17.98 seconds |
| Started | Sep 18 01:08:29 PM UTC 24 |
| Finished | Sep 18 01:08:48 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878628062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_streaming_out.878628062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.874489742 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 766021352 ps |
| CPU time | 13.96 seconds |
| Started | Sep 18 01:08:16 PM UTC 24 |
| Finished | Sep 18 01:08:31 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=874489742 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.874489742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3601358088 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 665247578 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:08:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3601358088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3601358088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.2101504238 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 445887311 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:11:16 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2101504238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.2101504238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.4020567931 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 564767069 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 01:11:16 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4020567931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.4020567931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.4216191335 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 601105465 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:16 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4216191335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.4216191335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3424577976 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 461511617 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:11:16 PM UTC 24 |
| Finished | Sep 18 01:11:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3424577976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3424577976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.3434800396 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 548038651 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3434800396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.3434800396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.2911942784 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 531601231 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2911942784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.2911942784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.2070483889 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 638258552 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2070483889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.2070483889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.2585519411 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 637378930 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585519411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.2585519411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3706246667 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 440334029 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3706246667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.3706246667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.4194853498 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 491546086 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4194853498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.4194853498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.3945674732 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 36035641 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:08:47 PM UTC 24 |
| Finished | Sep 18 01:08:49 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945674732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.3945674732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2794215772 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 6327256375 ps |
| CPU time | 10.53 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:08:42 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794215772 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2794215772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3929515067 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 14831462502 ps |
| CPU time | 19.68 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:08:52 PM UTC 24 |
| Peak memory | 228196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929515067 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3929515067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.2207081301 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 29847078265 ps |
| CPU time | 44.99 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:09:17 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207081301 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.2207081301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.1250020508 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 221896449 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:08:31 PM UTC 24 |
| Finished | Sep 18 01:08:33 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250020508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.1250020508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.1756136657 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 148872490 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:08:32 PM UTC 24 |
| Finished | Sep 18 01:08:35 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756136657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.1756136657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1506748649 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 217977164 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:08:32 PM UTC 24 |
| Finished | Sep 18 01:08:35 PM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506748649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1506748649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.3444230784 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 547570548 ps |
| CPU time | 3.13 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:37 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444230784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3444230784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.2905551095 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 21388162867 ps |
| CPU time | 36.05 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 217928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905551095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.2905551095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.2848590544 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 5672856590 ps |
| CPU time | 46.64 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:09:21 PM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848590544 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.2848590544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.259250694 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 809355890 ps |
| CPU time | 3.25 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:37 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259250694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disable_endpoint.259250694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.4183158434 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 161226161 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:35 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183158434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.4183158434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_enable.3114724578 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 41243216 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:35 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114724578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.3114724578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3773715946 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 989764319 ps |
| CPU time | 3.72 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:38 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773715946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3773715946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3325823511 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 642113896 ps |
| CPU time | 1.89 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:36 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325823511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3325823511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.1881527390 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 166866017 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:08:37 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881527390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.1881527390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.3207879828 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 337724926 ps |
| CPU time | 3.06 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:08:38 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207879828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.3207879828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.1167947901 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 262828922 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:08:37 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167947901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.1167947901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.487435194 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 148022640 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:08:36 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487435194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_in_stall.487435194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.2958557121 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 162203157 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:08:37 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958557121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.2958557121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.1709932305 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 2971557377 ps |
| CPU time | 28.89 seconds |
| Started | Sep 18 01:08:34 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709932305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.1709932305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.436785736 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 6132570327 ps |
| CPU time | 68.54 seconds |
| Started | Sep 18 01:08:36 PM UTC 24 |
| Finished | Sep 18 01:09:46 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=436785736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.436785736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2254824941 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 192554861 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:08:36 PM UTC 24 |
| Finished | Sep 18 01:08:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254824941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2254824941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.3427119089 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 28311353627 ps |
| CPU time | 46.57 seconds |
| Started | Sep 18 01:08:36 PM UTC 24 |
| Finished | Sep 18 01:09:24 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427119089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.3427119089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.3726543765 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 11191305469 ps |
| CPU time | 17.82 seconds |
| Started | Sep 18 01:08:36 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726543765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.3726543765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.2359898101 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 3723529819 ps |
| CPU time | 29.21 seconds |
| Started | Sep 18 01:08:37 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 235068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359898101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.2359898101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3979274113 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 4184494912 ps |
| CPU time | 32.79 seconds |
| Started | Sep 18 01:08:37 PM UTC 24 |
| Finished | Sep 18 01:09:11 PM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979274113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.3979274113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.3664825663 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 235743872 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 01:08:38 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664825663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.3664825663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.762106572 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 192392893 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:08:38 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762106572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.762106572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.536707074 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 2699436884 ps |
| CPU time | 21.88 seconds |
| Started | Sep 18 01:08:38 PM UTC 24 |
| Finished | Sep 18 01:09:02 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536707074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.536707074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.1335936595 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 213662704 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:08:38 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335936595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.1335936595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.1134357675 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 205677973 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:08:39 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134357675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.1134357675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.2799183048 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 224101330 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:08:39 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799183048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.2799183048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.1660861575 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 184280414 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 01:08:39 PM UTC 24 |
| Finished | Sep 18 01:08:41 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660861575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.1660861575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.2205476653 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 185336553 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:08:40 PM UTC 24 |
| Finished | Sep 18 01:08:43 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205476653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.2205476653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.461068801 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 178393338 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:08:40 PM UTC 24 |
| Finished | Sep 18 01:08:42 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461068801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_out_trans_nak.461068801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2017861322 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 144923894 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:40 PM UTC 24 |
| Finished | Sep 18 01:08:43 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017861322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2017861322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.2227588396 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 198869282 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 01:08:41 PM UTC 24 |
| Finished | Sep 18 01:08:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227588396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.2227588396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1256684582 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 151409033 ps |
| CPU time | 1.34 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256684582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1256684582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1126679220 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 63872631 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126679220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1126679220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1995371466 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 8996442643 ps |
| CPU time | 25.63 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995371466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1995371466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.1656509756 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 188343707 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656509756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.1656509756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.3387746664 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 154336585 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387746664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.3387746664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3691811223 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 236436407 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691811223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3691811223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.602010489 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 191397812 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602010489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.602010489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2657361929 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 142726500 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:43 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657361929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2657361929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.4236180005 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 390391746 ps |
| CPU time | 2.36 seconds |
| Started | Sep 18 01:08:44 PM UTC 24 |
| Finished | Sep 18 01:08:47 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236180005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.4236180005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.468354274 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 174703402 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:08:44 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468354274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_setup_stage.468354274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.821116285 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 152740700 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:08:44 PM UTC 24 |
| Finished | Sep 18 01:08:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821116285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 49.usbdev_setup_trans_ignored.821116285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.3216090016 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 290579232 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 01:08:44 PM UTC 24 |
| Finished | Sep 18 01:08:47 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216090016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3216090016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.3663144105 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 3295505030 ps |
| CPU time | 23.98 seconds |
| Started | Sep 18 01:08:45 PM UTC 24 |
| Finished | Sep 18 01:09:11 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663144105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.3663144105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.4218749372 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 158057649 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:08:45 PM UTC 24 |
| Finished | Sep 18 01:08:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218749372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.4218749372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.221093598 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 192260975 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:08:46 PM UTC 24 |
| Finished | Sep 18 01:08:48 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221093598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_stall_trans.221093598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.1177882140 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 630675606 ps |
| CPU time | 2.85 seconds |
| Started | Sep 18 01:08:47 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 217748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177882140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.1177882140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.149090400 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 2979988174 ps |
| CPU time | 27.12 seconds |
| Started | Sep 18 01:08:46 PM UTC 24 |
| Finished | Sep 18 01:09:14 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149090400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_streaming_out.149090400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.348991800 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 2537450640 ps |
| CPU time | 21.46 seconds |
| Started | Sep 18 01:08:33 PM UTC 24 |
| Finished | Sep 18 01:08:56 PM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348991800 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.348991800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.4009185266 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 607715600 ps |
| CPU time | 2.92 seconds |
| Started | Sep 18 01:08:47 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4009185266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.4009185266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.142609084 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 424521117 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=142609084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_t x_rx_disruption.142609084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.4093170278 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 590422626 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4093170278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.4093170278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.1997814333 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 550319746 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1997814333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.1997814333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.1032842783 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 494445735 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1032842783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.1032842783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.2059610358 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 534267874 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2059610358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.2059610358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.2287601806 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 531626598 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2287601806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.2287601806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3277565688 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 627259232 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3277565688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.3277565688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2668565063 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 517046989 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2668565063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2668565063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2536408464 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 516711542 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2536408464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2536408464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.2280634298 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 638705505 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:11:20 PM UTC 24 |
| Finished | Sep 18 01:11:30 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2280634298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.2280634298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.1346627922 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 42192465 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 12:54:41 PM UTC 24 |
| Finished | Sep 18 12:54:43 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346627922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.1346627922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.15955351 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 9150560586 ps |
| CPU time | 27.32 seconds |
| Started | Sep 18 12:54:04 PM UTC 24 |
| Finished | Sep 18 12:54:32 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=15955351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.15955351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1050000318 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 20001348839 ps |
| CPU time | 38.7 seconds |
| Started | Sep 18 12:54:04 PM UTC 24 |
| Finished | Sep 18 12:54:44 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050000318 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1050000318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.3827563913 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 25542451947 ps |
| CPU time | 34.88 seconds |
| Started | Sep 18 12:54:04 PM UTC 24 |
| Finished | Sep 18 12:54:40 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827563913 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.3827563913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.649490377 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 162782572 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:54:05 PM UTC 24 |
| Finished | Sep 18 12:54:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649490377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_av_buffer.649490377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.3671269072 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 190097210 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:54:05 PM UTC 24 |
| Finished | Sep 18 12:54:07 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671269072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.3671269072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.3984105858 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 248070877 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 12:54:06 PM UTC 24 |
| Finished | Sep 18 12:54:09 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984105858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.3984105858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.1129785932 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 1127512262 ps |
| CPU time | 4.69 seconds |
| Started | Sep 18 12:54:06 PM UTC 24 |
| Finished | Sep 18 12:54:12 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129785932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.1129785932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1890240393 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 15847133931 ps |
| CPU time | 35.5 seconds |
| Started | Sep 18 12:54:07 PM UTC 24 |
| Finished | Sep 18 12:54:44 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890240393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.1890240393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.636107894 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 468692836 ps |
| CPU time | 9.62 seconds |
| Started | Sep 18 12:54:08 PM UTC 24 |
| Finished | Sep 18 12:54:19 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636107894 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.636107894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.1439635486 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 1254434937 ps |
| CPU time | 4.96 seconds |
| Started | Sep 18 12:54:11 PM UTC 24 |
| Finished | Sep 18 12:54:17 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439635486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.1439635486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.2875054480 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 139495193 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:54:11 PM UTC 24 |
| Finished | Sep 18 12:54:13 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875054480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.2875054480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_enable.2965421229 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 27093574 ps |
| CPU time | 0.97 seconds |
| Started | Sep 18 12:54:11 PM UTC 24 |
| Finished | Sep 18 12:54:13 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965421229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.2965421229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.544688306 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 869986111 ps |
| CPU time | 3.39 seconds |
| Started | Sep 18 12:54:11 PM UTC 24 |
| Finished | Sep 18 12:54:15 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544688306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.544688306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1939394616 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 289648516 ps |
| CPU time | 1.89 seconds |
| Started | Sep 18 12:54:13 PM UTC 24 |
| Finished | Sep 18 12:54:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939394616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.1939394616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.873267682 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 286645177 ps |
| CPU time | 3.35 seconds |
| Started | Sep 18 12:54:13 PM UTC 24 |
| Finished | Sep 18 12:54:18 PM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873267682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_fifo_rst.873267682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.3770833586 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 205282303 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 12:54:15 PM UTC 24 |
| Finished | Sep 18 12:54:18 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770833586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.3770833586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.1109106550 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 156101602 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:54:15 PM UTC 24 |
| Finished | Sep 18 12:54:17 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109106550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.1109106550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.3680174485 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 206157520 ps |
| CPU time | 1.6 seconds |
| Started | Sep 18 12:54:16 PM UTC 24 |
| Finished | Sep 18 12:54:19 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680174485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.3680174485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.1020853164 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 3073617246 ps |
| CPU time | 30.27 seconds |
| Started | Sep 18 12:54:13 PM UTC 24 |
| Finished | Sep 18 12:54:45 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020853164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.1020853164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.953045912 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 10886490582 ps |
| CPU time | 136.62 seconds |
| Started | Sep 18 12:54:16 PM UTC 24 |
| Finished | Sep 18 12:56:36 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953045912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.953045912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.1098006042 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 223334455 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:54:17 PM UTC 24 |
| Finished | Sep 18 12:54:20 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098006042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.1098006042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3673095947 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 9446811400 ps |
| CPU time | 22.12 seconds |
| Started | Sep 18 12:54:18 PM UTC 24 |
| Finished | Sep 18 12:54:42 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673095947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3673095947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.1101576615 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 4482311289 ps |
| CPU time | 126.48 seconds |
| Started | Sep 18 12:54:18 PM UTC 24 |
| Finished | Sep 18 12:56:27 PM UTC 24 |
| Peak memory | 234900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101576615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.1101576615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.3350958419 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 2204229197 ps |
| CPU time | 17.49 seconds |
| Started | Sep 18 12:54:18 PM UTC 24 |
| Finished | Sep 18 12:54:37 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350958419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3350958419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.4220528082 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 248945053 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 12:54:18 PM UTC 24 |
| Finished | Sep 18 12:54:21 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220528082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.4220528082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.1518888460 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 191578490 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 12:54:20 PM UTC 24 |
| Finished | Sep 18 12:54:22 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518888460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1518888460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.187919068 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 1897855530 ps |
| CPU time | 54.22 seconds |
| Started | Sep 18 12:54:20 PM UTC 24 |
| Finished | Sep 18 12:55:15 PM UTC 24 |
| Peak memory | 228132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187919068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.187919068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2256548862 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 2687872832 ps |
| CPU time | 81.14 seconds |
| Started | Sep 18 12:54:20 PM UTC 24 |
| Finished | Sep 18 12:55:43 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256548862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2256548862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2181792779 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 2197885681 ps |
| CPU time | 17.52 seconds |
| Started | Sep 18 12:54:20 PM UTC 24 |
| Finished | Sep 18 12:54:38 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181792779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2181792779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.1651446342 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 152635613 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:54:21 PM UTC 24 |
| Finished | Sep 18 12:54:24 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651446342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1651446342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.1662810109 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 149486382 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 12:54:21 PM UTC 24 |
| Finished | Sep 18 12:54:23 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662810109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.1662810109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.2680638366 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 239508463 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:54:22 PM UTC 24 |
| Finished | Sep 18 12:54:24 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680638366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.2680638366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2500128221 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 179544021 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:54:23 PM UTC 24 |
| Finished | Sep 18 12:54:25 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500128221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2500128221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.3236153425 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 220448054 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:54:25 PM UTC 24 |
| Finished | Sep 18 12:54:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236153425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.3236153425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.2686005640 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 190313082 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:54:25 PM UTC 24 |
| Finished | Sep 18 12:54:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686005640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.2686005640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.4243927931 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 159294641 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:54:25 PM UTC 24 |
| Finished | Sep 18 12:54:27 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243927931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.4243927931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.2459966745 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 256576764 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:54:25 PM UTC 24 |
| Finished | Sep 18 12:54:27 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459966745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.2459966745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.2973452242 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 181050144 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:54:27 PM UTC 24 |
| Finished | Sep 18 12:54:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973452242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.2973452242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.2883871048 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 42945003 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:54:27 PM UTC 24 |
| Finished | Sep 18 12:54:29 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883871048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.2883871048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.2025309764 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 192787424 ps |
| CPU time | 1.56 seconds |
| Started | Sep 18 12:54:28 PM UTC 24 |
| Finished | Sep 18 12:54:30 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025309764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.2025309764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.4029542161 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 202570582 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 12:54:28 PM UTC 24 |
| Finished | Sep 18 12:54:31 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029542161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.4029542161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.2736190119 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 3501776407 ps |
| CPU time | 30.74 seconds |
| Started | Sep 18 12:54:29 PM UTC 24 |
| Finished | Sep 18 12:55:01 PM UTC 24 |
| Peak memory | 235060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736190119 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.2736190119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.3539678342 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 3850316173 ps |
| CPU time | 40.4 seconds |
| Started | Sep 18 12:54:30 PM UTC 24 |
| Finished | Sep 18 12:55:12 PM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539678342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3539678342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.1504264133 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 5067027440 ps |
| CPU time | 20.67 seconds |
| Started | Sep 18 12:54:31 PM UTC 24 |
| Finished | Sep 18 12:54:53 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504264133 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.1504264133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1910991484 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 236375586 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 12:54:28 PM UTC 24 |
| Finished | Sep 18 12:54:31 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910991484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1910991484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.2882827899 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 211592532 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:54:28 PM UTC 24 |
| Finished | Sep 18 12:54:30 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882827899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.2882827899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.3786526608 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 20158390351 ps |
| CPU time | 33.05 seconds |
| Started | Sep 18 12:54:31 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786526608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.3786526608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.1906971826 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 149686449 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:54:31 PM UTC 24 |
| Finished | Sep 18 12:54:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906971826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.1906971826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.3107071061 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 344531391 ps |
| CPU time | 1.97 seconds |
| Started | Sep 18 12:54:31 PM UTC 24 |
| Finished | Sep 18 12:54:35 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107071061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.3107071061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.4035587144 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 149597151 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:54:34 PM UTC 24 |
| Finished | Sep 18 12:54:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035587144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.4035587144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1243436651 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 184713071 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:54:34 PM UTC 24 |
| Finished | Sep 18 12:54:36 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243436651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.1243436651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.3433271354 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 234969679 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:54:35 PM UTC 24 |
| Finished | Sep 18 12:54:37 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433271354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.3433271354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.2885642708 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 2478903058 ps |
| CPU time | 66.36 seconds |
| Started | Sep 18 12:54:35 PM UTC 24 |
| Finished | Sep 18 12:55:43 PM UTC 24 |
| Peak memory | 234924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885642708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.2885642708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.175499459 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 185007519 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:54:36 PM UTC 24 |
| Finished | Sep 18 12:54:38 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175499459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.175499459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.2268057225 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 183015704 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:54:37 PM UTC 24 |
| Finished | Sep 18 12:54:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268057225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.2268057225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.681762300 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 1169220170 ps |
| CPU time | 3.58 seconds |
| Started | Sep 18 12:54:39 PM UTC 24 |
| Finished | Sep 18 12:54:43 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681762300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_stream_len_max.681762300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.3534638728 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 2151282872 ps |
| CPU time | 60.96 seconds |
| Started | Sep 18 12:54:37 PM UTC 24 |
| Finished | Sep 18 12:55:40 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534638728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.3534638728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.2515157114 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 11041003070 ps |
| CPU time | 230.54 seconds |
| Started | Sep 18 12:54:39 PM UTC 24 |
| Finished | Sep 18 12:58:33 PM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515157114 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.2515157114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.2753995422 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 295810445 ps |
| CPU time | 4.81 seconds |
| Started | Sep 18 12:54:08 PM UTC 24 |
| Finished | Sep 18 12:54:14 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753995422 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.2753995422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1849450494 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 500772310 ps |
| CPU time | 2.69 seconds |
| Started | Sep 18 12:54:41 PM UTC 24 |
| Finished | Sep 18 12:54:44 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1849450494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1849450494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.2188315737 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 438150521 ps |
| CPU time | 2.55 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188315737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.2188315737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.2111385239 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 265001261 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111385239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.2111385239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.1648311279 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 503737225 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1648311279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.1648311279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1102357699 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 489310724 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:50 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102357699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1102357699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.3710516252 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 278194206 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:50 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710516252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.3710516252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.2597571460 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 516195239 ps |
| CPU time | 2.39 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2597571460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.2597571460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3067059935 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 500671253 ps |
| CPU time | 2.23 seconds |
| Started | Sep 18 01:08:48 PM UTC 24 |
| Finished | Sep 18 01:08:51 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067059935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3067059935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2728822247 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 277073510 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:08:50 PM UTC 24 |
| Finished | Sep 18 01:08:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728822247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.2728822247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2589527022 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 567562351 ps |
| CPU time | 2.1 seconds |
| Started | Sep 18 01:08:50 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 217824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2589527022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.2589527022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.4060494461 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 567920532 ps |
| CPU time | 1.93 seconds |
| Started | Sep 18 01:08:50 PM UTC 24 |
| Finished | Sep 18 01:08:53 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060494461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.4060494461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.2850656210 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 480833819 ps |
| CPU time | 2.04 seconds |
| Started | Sep 18 01:08:50 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2850656210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.2850656210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.4092823097 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 364682946 ps |
| CPU time | 2.13 seconds |
| Started | Sep 18 01:08:51 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092823097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.4092823097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1423506949 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 312060539 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:08:51 PM UTC 24 |
| Finished | Sep 18 01:08:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423506949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.1423506949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2658018454 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 541703380 ps |
| CPU time | 2.1 seconds |
| Started | Sep 18 01:08:51 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 217952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2658018454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.2658018454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.378348652 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 487417465 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 01:08:51 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 217700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=378348652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.378348652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.942236480 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 293688846 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942236480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 55.usbdev_fifo_levels.942236480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.346266424 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 512875309 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=346266424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_tx _rx_disruption.346266424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.727629286 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 227658391 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=727629286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.727629286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1454485065 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 165331326 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:54 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454485065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.1454485065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.920158 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 535109570 ps |
| CPU time | 2.13 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=920158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_rx _disruption.920158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.2416273308 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 638690854 ps |
| CPU time | 2.25 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:56 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416273308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.2416273308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.3438694082 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 298356345 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438694082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.3438694082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2872767300 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 655649783 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2872767300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2872767300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.1495008484 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 216800881 ps |
| CPU time | 1.26 seconds |
| Started | Sep 18 01:08:52 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495008484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.1495008484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.4118647054 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 158808320 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:08:53 PM UTC 24 |
| Finished | Sep 18 01:08:55 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118647054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.4118647054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.777479441 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 456828260 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=777479441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.777479441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.197017972 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 318293020 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197017972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.197017972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1722002349 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 216144169 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722002349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.1722002349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1359091456 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 595943742 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1359091456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.1359091456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1180732564 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 42810334 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:55:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1180732564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1180732564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.4178745681 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 5768549033 ps |
| CPU time | 16.43 seconds |
| Started | Sep 18 12:54:41 PM UTC 24 |
| Finished | Sep 18 12:54:58 PM UTC 24 |
| Peak memory | 228336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178745681 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.4178745681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.1224071808 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 16194084577 ps |
| CPU time | 27.27 seconds |
| Started | Sep 18 12:54:42 PM UTC 24 |
| Finished | Sep 18 12:55:10 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224071808 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.1224071808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.4182186886 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 23392145161 ps |
| CPU time | 33.67 seconds |
| Started | Sep 18 12:54:42 PM UTC 24 |
| Finished | Sep 18 12:55:17 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182186886 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.4182186886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.1012006149 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 156279413 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:54:43 PM UTC 24 |
| Finished | Sep 18 12:54:46 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012006149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.1012006149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1762251177 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 147049591 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 12:54:43 PM UTC 24 |
| Finished | Sep 18 12:54:45 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762251177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1762251177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.969084919 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 426756225 ps |
| CPU time | 2.51 seconds |
| Started | Sep 18 12:54:44 PM UTC 24 |
| Finished | Sep 18 12:54:48 PM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969084919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_data_toggle_clear.969084919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.1434337272 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 900137596 ps |
| CPU time | 4.39 seconds |
| Started | Sep 18 12:54:44 PM UTC 24 |
| Finished | Sep 18 12:54:50 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434337272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1434337272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.2760044373 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 18384835134 ps |
| CPU time | 47.7 seconds |
| Started | Sep 18 12:54:44 PM UTC 24 |
| Finished | Sep 18 12:55:33 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760044373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.2760044373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.4127687294 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 1963613934 ps |
| CPU time | 19.06 seconds |
| Started | Sep 18 12:54:44 PM UTC 24 |
| Finished | Sep 18 12:55:05 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127687294 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.4127687294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.3650848596 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 740620190 ps |
| CPU time | 3.48 seconds |
| Started | Sep 18 12:54:46 PM UTC 24 |
| Finished | Sep 18 12:54:50 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650848596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.3650848596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.2921180234 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 167583613 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:54:46 PM UTC 24 |
| Finished | Sep 18 12:54:48 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921180234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.2921180234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_enable.178217113 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 49858330 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 12:54:46 PM UTC 24 |
| Finished | Sep 18 12:54:48 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178217113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.178217113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.3531303624 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 794484901 ps |
| CPU time | 3.5 seconds |
| Started | Sep 18 12:54:47 PM UTC 24 |
| Finished | Sep 18 12:54:52 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531303624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.3531303624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.2660940048 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 403465479 ps |
| CPU time | 2.11 seconds |
| Started | Sep 18 12:54:48 PM UTC 24 |
| Finished | Sep 18 12:54:51 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660940048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.2660940048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1774915096 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 157040566 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:54:50 PM UTC 24 |
| Finished | Sep 18 12:54:53 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774915096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1774915096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.1469616932 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 531071025 ps |
| CPU time | 4.87 seconds |
| Started | Sep 18 12:54:50 PM UTC 24 |
| Finished | Sep 18 12:54:56 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469616932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.1469616932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.530621055 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 185744685 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 12:54:51 PM UTC 24 |
| Finished | Sep 18 12:54:54 PM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530621055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.530621055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.3541440801 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 151385807 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 12:54:51 PM UTC 24 |
| Finished | Sep 18 12:54:54 PM UTC 24 |
| Peak memory | 215524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541440801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.3541440801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1322045497 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 192614273 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:54:53 PM UTC 24 |
| Finished | Sep 18 12:54:56 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322045497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1322045497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.3495769597 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 2563008681 ps |
| CPU time | 66.27 seconds |
| Started | Sep 18 12:54:50 PM UTC 24 |
| Finished | Sep 18 12:55:58 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495769597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.3495769597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1986445453 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 5179585129 ps |
| CPU time | 31.95 seconds |
| Started | Sep 18 12:54:53 PM UTC 24 |
| Finished | Sep 18 12:55:26 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986445453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1986445453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.2635335215 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 174198092 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:54:53 PM UTC 24 |
| Finished | Sep 18 12:54:56 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635335215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.2635335215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.4204085720 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 30753950223 ps |
| CPU time | 53.6 seconds |
| Started | Sep 18 12:54:55 PM UTC 24 |
| Finished | Sep 18 12:55:50 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204085720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.4204085720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.1962064974 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 6343737957 ps |
| CPU time | 15.06 seconds |
| Started | Sep 18 12:54:55 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 228660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962064974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.1962064974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.2375644039 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 3742157769 ps |
| CPU time | 28.5 seconds |
| Started | Sep 18 12:54:55 PM UTC 24 |
| Finished | Sep 18 12:55:25 PM UTC 24 |
| Peak memory | 230644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375644039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.2375644039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.4292931697 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 2921577235 ps |
| CPU time | 23.69 seconds |
| Started | Sep 18 12:54:55 PM UTC 24 |
| Finished | Sep 18 12:55:20 PM UTC 24 |
| Peak memory | 234876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292931697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.4292931697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.1722878620 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 305892067 ps |
| CPU time | 1.91 seconds |
| Started | Sep 18 12:54:55 PM UTC 24 |
| Finished | Sep 18 12:54:58 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722878620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.1722878620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.3617338026 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 210580737 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:54:57 PM UTC 24 |
| Finished | Sep 18 12:54:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617338026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.3617338026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.3588233788 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 2068364469 ps |
| CPU time | 56.64 seconds |
| Started | Sep 18 12:54:57 PM UTC 24 |
| Finished | Sep 18 12:55:55 PM UTC 24 |
| Peak memory | 230428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588233788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.3588233788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.1851464837 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 2993105691 ps |
| CPU time | 31.52 seconds |
| Started | Sep 18 12:54:57 PM UTC 24 |
| Finished | Sep 18 12:55:30 PM UTC 24 |
| Peak memory | 234508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851464837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.1851464837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.831727825 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 2563044641 ps |
| CPU time | 71.01 seconds |
| Started | Sep 18 12:54:59 PM UTC 24 |
| Finished | Sep 18 12:56:12 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=831727825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.831727825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2280615470 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 163643598 ps |
| CPU time | 1.28 seconds |
| Started | Sep 18 12:54:59 PM UTC 24 |
| Finished | Sep 18 12:55:01 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280615470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2280615470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.17602241 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 148547483 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 12:54:59 PM UTC 24 |
| Finished | Sep 18 12:55:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17602241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.17602241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.2476262452 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 165575837 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:55:01 PM UTC 24 |
| Finished | Sep 18 12:55:04 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476262452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.2476262452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.467057359 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 193474409 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 12:55:01 PM UTC 24 |
| Finished | Sep 18 12:55:03 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=467057359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_out_iso.467057359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2695401514 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 246200209 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 12:55:01 PM UTC 24 |
| Finished | Sep 18 12:55:04 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695401514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2695401514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.4161847334 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 211582628 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:55:03 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161847334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.4161847334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.2152898319 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 187165442 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:55:03 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152898319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.2152898319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.3159375531 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 261655490 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 12:55:04 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159375531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.3159375531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.1883810833 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 156558436 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:55:04 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883810833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.1883810833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.3660392412 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 64795157 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:55:04 PM UTC 24 |
| Finished | Sep 18 12:55:06 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660392412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.3660392412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.439410282 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 8260889158 ps |
| CPU time | 30.64 seconds |
| Started | Sep 18 12:55:04 PM UTC 24 |
| Finished | Sep 18 12:55:36 PM UTC 24 |
| Peak memory | 232420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439410282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_pkt_buffer.439410282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.1444738979 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 211542049 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 12:55:04 PM UTC 24 |
| Finished | Sep 18 12:55:07 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444738979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.1444738979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.916946616 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 161328761 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 12:55:05 PM UTC 24 |
| Finished | Sep 18 12:55:07 PM UTC 24 |
| Peak memory | 215596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916946616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_pkt_sent.916946616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.1051600867 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 5643331247 ps |
| CPU time | 75.26 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:56:24 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051600867 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.1051600867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.2667714059 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 3369949593 ps |
| CPU time | 89.7 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:56:38 PM UTC 24 |
| Peak memory | 230500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667714059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.2667714059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.2737382058 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 5191048071 ps |
| CPU time | 24.72 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:55:33 PM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737382058 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.2737382058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2142822663 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 205875899 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 12:55:05 PM UTC 24 |
| Finished | Sep 18 12:55:08 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142822663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.2142822663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.2987431854 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 214123788 ps |
| CPU time | 1.73 seconds |
| Started | Sep 18 12:55:05 PM UTC 24 |
| Finished | Sep 18 12:55:08 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987431854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.2987431854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.3585349416 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 20169447067 ps |
| CPU time | 38.32 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:55:47 PM UTC 24 |
| Peak memory | 217816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585349416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.3585349416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.722284475 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 143084576 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:55:09 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722284475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_rx_crc_err.722284475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.3134063236 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 320183761 ps |
| CPU time | 2.13 seconds |
| Started | Sep 18 12:55:07 PM UTC 24 |
| Finished | Sep 18 12:55:10 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134063236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.3134063236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.2786915978 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 184738257 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786915978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.2786915978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3829202014 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 177694119 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829202014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3829202014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.4294700990 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 189582615 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294700990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.4294700990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.4148993616 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 2199717291 ps |
| CPU time | 58.93 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 235016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148993616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.4148993616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.742754506 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 227006055 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 215364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742754506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.742754506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.2124658664 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 195228055 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:55:08 PM UTC 24 |
| Finished | Sep 18 12:55:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124658664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.2124658664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.88890303 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 786750064 ps |
| CPU time | 3.94 seconds |
| Started | Sep 18 12:55:11 PM UTC 24 |
| Finished | Sep 18 12:55:16 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=88890303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_stream_len_max.88890303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.3822479773 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 3173893480 ps |
| CPU time | 28.84 seconds |
| Started | Sep 18 12:55:10 PM UTC 24 |
| Finished | Sep 18 12:55:40 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822479773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.3822479773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.446758561 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 8704933956 ps |
| CPU time | 64.68 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:56:19 PM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=446758561 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_1 7/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.446758561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.2069922969 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 1530588904 ps |
| CPU time | 15.77 seconds |
| Started | Sep 18 12:54:46 PM UTC 24 |
| Finished | Sep 18 12:55:03 PM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069922969 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.2069922969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1025314323 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 445120189 ps |
| CPU time | 2.42 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:55:16 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1025314323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1025314323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.920275364 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 529288144 ps |
| CPU time | 2.2 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:58 PM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920275364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.920275364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2906352526 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 278938140 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906352526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2906352526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.2965054218 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 613209877 ps |
| CPU time | 2.18 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:58 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2965054218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.2965054218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3435761729 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 210350298 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 01:08:54 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435761729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.3435761729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.692864254 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 287988122 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:08:55 PM UTC 24 |
| Finished | Sep 18 01:08:57 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692864254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 61.usbdev_fifo_levels.692864254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1064032166 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 549949786 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1064032166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1064032166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.2940851842 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 414396629 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940851842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.2940851842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1932971081 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 276468068 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932971081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.1932971081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2134993036 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 514940809 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2134993036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.2134993036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1878707298 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 216444532 ps |
| CPU time | 1.19 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878707298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.1878707298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2814485358 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 285583854 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814485358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.2814485358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1251959949 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 674812527 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1251959949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1251959949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.613563086 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 582920132 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613563086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.613563086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.1707617192 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 348258938 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 01:08:57 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707617192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.1707617192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.294860943 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 578441432 ps |
| CPU time | 2.11 seconds |
| Started | Sep 18 01:08:56 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=294860943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_tx _rx_disruption.294860943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3142752025 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 248423032 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 01:08:57 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142752025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.3142752025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.1929305892 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 289389301 ps |
| CPU time | 1.44 seconds |
| Started | Sep 18 01:08:57 PM UTC 24 |
| Finished | Sep 18 01:08:59 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929305892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.1929305892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.3456204255 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 467750438 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:08:57 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3456204255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.3456204255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2849119875 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 614423472 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849119875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.2849119875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.3922720429 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 254056313 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922720429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.3922720429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.794748216 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 596090474 ps |
| CPU time | 1.85 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=794748216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_tx _rx_disruption.794748216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2739463190 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 146168142 ps |
| CPU time | 1.09 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 215492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739463190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2739463190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.1226411505 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 246488985 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226411505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.1226411505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.389763137 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 620011235 ps |
| CPU time | 2.03 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=389763137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.389763137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.3619286695 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 195779703 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619286695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.3619286695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.864571369 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 265560815 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:00 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864571369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 68.usbdev_fifo_levels.864571369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2177630066 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 496215373 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 214680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2177630066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.2177630066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.4048397150 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 437501924 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048397150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.4048397150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.2117005368 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 266133511 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 01:08:58 PM UTC 24 |
| Finished | Sep 18 01:09:01 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117005368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.2117005368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.2679660265 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 551204435 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2679660265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.2679660265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.3384935707 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 40578595 ps |
| CPU time | 1.03 seconds |
| Started | Sep 18 12:55:44 PM UTC 24 |
| Finished | Sep 18 12:55:46 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384935707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.3384935707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.1618722197 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 10408243667 ps |
| CPU time | 17.07 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:55:31 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618722197 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.1618722197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.3372615977 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 15851183074 ps |
| CPU time | 22.9 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:55:37 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372615977 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.3372615977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.438494201 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 30066471662 ps |
| CPU time | 43.34 seconds |
| Started | Sep 18 12:55:13 PM UTC 24 |
| Finished | Sep 18 12:55:58 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=438494201 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.438494201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1022450120 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 216707174 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:55:14 PM UTC 24 |
| Finished | Sep 18 12:55:17 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022450120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.1022450120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.2739382462 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 159109972 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:55:16 PM UTC 24 |
| Finished | Sep 18 12:55:18 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739382462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.2739382462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.2190132497 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 324045163 ps |
| CPU time | 2.35 seconds |
| Started | Sep 18 12:55:16 PM UTC 24 |
| Finished | Sep 18 12:55:19 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190132497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.2190132497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.2069012409 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 924694821 ps |
| CPU time | 5.05 seconds |
| Started | Sep 18 12:55:16 PM UTC 24 |
| Finished | Sep 18 12:55:22 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069012409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.2069012409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.443067790 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 29965884882 ps |
| CPU time | 81.5 seconds |
| Started | Sep 18 12:55:17 PM UTC 24 |
| Finished | Sep 18 12:56:40 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443067790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_device_address.443067790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.2954250308 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 591553592 ps |
| CPU time | 15.41 seconds |
| Started | Sep 18 12:55:17 PM UTC 24 |
| Finished | Sep 18 12:55:34 PM UTC 24 |
| Peak memory | 217844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954250308 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.2954250308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.281365637 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 785481159 ps |
| CPU time | 3.68 seconds |
| Started | Sep 18 12:55:18 PM UTC 24 |
| Finished | Sep 18 12:55:23 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281365637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.281365637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.1241793014 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 162173515 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:55:18 PM UTC 24 |
| Finished | Sep 18 12:55:21 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241793014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.1241793014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_enable.3100283095 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 60234761 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 12:55:18 PM UTC 24 |
| Finished | Sep 18 12:55:21 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100283095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.3100283095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.3207086749 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 912743173 ps |
| CPU time | 3.83 seconds |
| Started | Sep 18 12:55:18 PM UTC 24 |
| Finished | Sep 18 12:55:24 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207086749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.3207086749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.2579230602 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 263213710 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:55:21 PM UTC 24 |
| Finished | Sep 18 12:55:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579230602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.2579230602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.164719353 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 191451172 ps |
| CPU time | 1.87 seconds |
| Started | Sep 18 12:55:22 PM UTC 24 |
| Finished | Sep 18 12:55:25 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=164719353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_fifo_rst.164719353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.4092510812 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 225340521 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:55:22 PM UTC 24 |
| Finished | Sep 18 12:55:25 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092510812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.4092510812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.511155905 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 142620830 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:55:24 PM UTC 24 |
| Finished | Sep 18 12:55:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511155905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_in_stall.511155905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.784398841 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 217843159 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:55:24 PM UTC 24 |
| Finished | Sep 18 12:55:27 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784398841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_in_trans.784398841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.1899677582 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 3165841948 ps |
| CPU time | 28.81 seconds |
| Started | Sep 18 12:55:22 PM UTC 24 |
| Finished | Sep 18 12:55:53 PM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899677582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1899677582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.3984934092 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 8548812808 ps |
| CPU time | 108.02 seconds |
| Started | Sep 18 12:55:24 PM UTC 24 |
| Finished | Sep 18 12:57:14 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984934092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.3984934092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1809656247 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 216076427 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:55:24 PM UTC 24 |
| Finished | Sep 18 12:55:27 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809656247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1809656247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.3234214095 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 28192205485 ps |
| CPU time | 49.09 seconds |
| Started | Sep 18 12:55:24 PM UTC 24 |
| Finished | Sep 18 12:56:15 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234214095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.3234214095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.366644289 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 8569552871 ps |
| CPU time | 19.74 seconds |
| Started | Sep 18 12:55:25 PM UTC 24 |
| Finished | Sep 18 12:55:46 PM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366644289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_suspend.366644289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.756640809 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 3974386460 ps |
| CPU time | 116.76 seconds |
| Started | Sep 18 12:55:25 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 230044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=756640809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.756640809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.3833927476 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 2911398264 ps |
| CPU time | 82.49 seconds |
| Started | Sep 18 12:55:27 PM UTC 24 |
| Finished | Sep 18 12:56:51 PM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833927476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.3833927476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.64284415 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 266260010 ps |
| CPU time | 1.91 seconds |
| Started | Sep 18 12:55:27 PM UTC 24 |
| Finished | Sep 18 12:55:30 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64284415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.64284415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.3989766014 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 193758446 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 12:55:27 PM UTC 24 |
| Finished | Sep 18 12:55:29 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989766014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.3989766014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.3890632532 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 3068186863 ps |
| CPU time | 30.61 seconds |
| Started | Sep 18 12:55:28 PM UTC 24 |
| Finished | Sep 18 12:56:00 PM UTC 24 |
| Peak memory | 235100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890632532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3890632532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.3483292219 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 2778931182 ps |
| CPU time | 83.19 seconds |
| Started | Sep 18 12:55:28 PM UTC 24 |
| Finished | Sep 18 12:56:53 PM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483292219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3483292219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.749271544 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 2918510513 ps |
| CPU time | 29.34 seconds |
| Started | Sep 18 12:55:28 PM UTC 24 |
| Finished | Sep 18 12:55:59 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=749271544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.749271544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.3070805831 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 154178158 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:55:28 PM UTC 24 |
| Finished | Sep 18 12:55:31 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070805831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.3070805831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3802977066 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 148490778 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 12:55:31 PM UTC 24 |
| Finished | Sep 18 12:55:33 PM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802977066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3802977066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.3626342144 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 229655563 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 12:55:31 PM UTC 24 |
| Finished | Sep 18 12:55:33 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626342144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.3626342144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.3214690823 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 172162141 ps |
| CPU time | 1.52 seconds |
| Started | Sep 18 12:55:31 PM UTC 24 |
| Finished | Sep 18 12:55:33 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214690823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.3214690823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.1983470563 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 180915836 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:55:32 PM UTC 24 |
| Finished | Sep 18 12:55:34 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983470563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.1983470563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.3659786671 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 180832863 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:55:32 PM UTC 24 |
| Finished | Sep 18 12:55:34 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659786671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.3659786671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.3572491740 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 186580765 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:55:33 PM UTC 24 |
| Finished | Sep 18 12:55:36 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572491740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.3572491740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.2118497269 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 227804452 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:37 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118497269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.2118497269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.3077876485 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 204858805 ps |
| CPU time | 0.92 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:37 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077876485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.3077876485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.1272837100 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 39126550 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:37 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272837100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1272837100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.23614346 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 21401915013 ps |
| CPU time | 67.18 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:56:44 PM UTC 24 |
| Peak memory | 232360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23614346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_buffer.23614346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.3582363704 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 145984077 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:38 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582363704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.3582363704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.1550649043 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 190688279 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550649043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.1550649043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.795385697 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 5907600447 ps |
| CPU time | 31.53 seconds |
| Started | Sep 18 12:55:37 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 234944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=795385697 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.795385697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.3169910488 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 2986212306 ps |
| CPU time | 22.58 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:56:02 PM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169910488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3169910488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.3874512880 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 9300132395 ps |
| CPU time | 42.07 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:56:22 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874512880 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.3874512880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.1776534266 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 191199096 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 12:55:35 PM UTC 24 |
| Finished | Sep 18 12:55:37 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776534266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.1776534266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.748678110 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 196707267 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 12:55:36 PM UTC 24 |
| Finished | Sep 18 12:55:39 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748678110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.748678110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.4276906962 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 20161635687 ps |
| CPU time | 29.1 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276906962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.4276906962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.1361816818 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 173566359 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:55:41 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361816818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.1361816818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.794109877 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 327654880 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:55:42 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794109877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_rx_full.794109877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2542080541 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 154923332 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:55:41 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542080541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2542080541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.413657313 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 164801876 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:55:41 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413657313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_setup_trans_ignored.413657313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3782892790 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 206955820 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:55:39 PM UTC 24 |
| Finished | Sep 18 12:55:42 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782892790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3782892790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.790804383 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 2771572886 ps |
| CPU time | 77.67 seconds |
| Started | Sep 18 12:55:40 PM UTC 24 |
| Finished | Sep 18 12:57:00 PM UTC 24 |
| Peak memory | 229148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=790804383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.790804383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.468266683 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 167540283 ps |
| CPU time | 1.48 seconds |
| Started | Sep 18 12:55:40 PM UTC 24 |
| Finished | Sep 18 12:55:43 PM UTC 24 |
| Peak memory | 214572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468266683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.468266683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.3690889952 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 203938881 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 12:55:40 PM UTC 24 |
| Finished | Sep 18 12:55:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690889952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.3690889952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3381332093 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 1014712247 ps |
| CPU time | 2.7 seconds |
| Started | Sep 18 12:55:43 PM UTC 24 |
| Finished | Sep 18 12:55:46 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381332093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3381332093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.1808448391 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 3539203461 ps |
| CPU time | 35.43 seconds |
| Started | Sep 18 12:55:41 PM UTC 24 |
| Finished | Sep 18 12:56:18 PM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808448391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.1808448391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.4269661663 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 7120390475 ps |
| CPU time | 101.85 seconds |
| Started | Sep 18 12:55:43 PM UTC 24 |
| Finished | Sep 18 12:57:27 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269661663 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.4269661663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2013280397 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 4347429291 ps |
| CPU time | 29.93 seconds |
| Started | Sep 18 12:55:17 PM UTC 24 |
| Finished | Sep 18 12:55:48 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013280397 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2013280397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.3199079937 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 469771197 ps |
| CPU time | 2.6 seconds |
| Started | Sep 18 12:55:43 PM UTC 24 |
| Finished | Sep 18 12:55:46 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3199079937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.3199079937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.1884458083 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 164426513 ps |
| CPU time | 0.94 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:02 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884458083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.1884458083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.1010478163 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 249301317 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010478163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.1010478163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.2295046479 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 627735887 ps |
| CPU time | 1.91 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2295046479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.2295046479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.95860308 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 184340233 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:02 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=95860308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.95860308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.2142582053 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 267299889 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142582053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.2142582053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.465389914 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 639294055 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:04 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=465389914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_tx _rx_disruption.465389914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.4075880451 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 193150900 ps |
| CPU time | 1.04 seconds |
| Started | Sep 18 01:09:00 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075880451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.4075880451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.2118552710 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 151151508 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118552710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.2118552710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.509195484 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 467649165 ps |
| CPU time | 2.02 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:04 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=509195484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx _rx_disruption.509195484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.974659086 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 519855365 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=974659086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.974659086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.1653882154 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 254285781 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653882154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.1653882154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.1230267703 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 565768258 ps |
| CPU time | 1.92 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1230267703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.1230267703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.1666544245 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 239946782 ps |
| CPU time | 1.17 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666544245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.1666544245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.2914864500 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 301971126 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914864500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.2914864500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.126198517 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 547166821 ps |
| CPU time | 1.72 seconds |
| Started | Sep 18 01:09:01 PM UTC 24 |
| Finished | Sep 18 01:09:04 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=126198517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_tx _rx_disruption.126198517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.3811257443 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 734105197 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:06 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811257443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.3811257443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1242765821 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 157995571 ps |
| CPU time | 0.99 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242765821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.1242765821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2176492390 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 623366837 ps |
| CPU time | 1.94 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2176492390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.2176492390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.854149067 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 370144795 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854149067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.854149067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3622135009 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 243402838 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622135009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.3622135009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2550199170 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 525802533 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2550199170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.2550199170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.3283673234 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 569713300 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283673234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.3283673234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.395333578 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 282219308 ps |
| CPU time | 1.29 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395333578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 77.usbdev_fifo_levels.395333578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1723405443 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 581470813 ps |
| CPU time | 1.78 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1723405443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.1723405443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.726242807 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 275443317 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726242807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.726242807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.4027756137 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 193985459 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027756137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.4027756137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.777629431 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 529217285 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=777629431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_tx _rx_disruption.777629431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3500989017 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 342316574 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500989017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3500989017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.2634936529 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 156199407 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:09:03 PM UTC 24 |
| Finished | Sep 18 01:09:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634936529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.2634936529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.3404560675 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 615242604 ps |
| CPU time | 1.71 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3404560675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.3404560675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.1352682043 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 40602847 ps |
| CPU time | 1.05 seconds |
| Started | Sep 18 12:56:16 PM UTC 24 |
| Finished | Sep 18 12:56:18 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352682043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.1352682043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.3753451047 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 11955450436 ps |
| CPU time | 19.85 seconds |
| Started | Sep 18 12:55:44 PM UTC 24 |
| Finished | Sep 18 12:56:05 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753451047 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.3753451047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.2627301241 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 20514044387 ps |
| CPU time | 30.35 seconds |
| Started | Sep 18 12:55:44 PM UTC 24 |
| Finished | Sep 18 12:56:16 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627301241 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.2627301241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.1374471938 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 25923860685 ps |
| CPU time | 35.12 seconds |
| Started | Sep 18 12:55:45 PM UTC 24 |
| Finished | Sep 18 12:56:22 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374471938 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.1374471938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3306202171 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 159382504 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:55:47 PM UTC 24 |
| Finished | Sep 18 12:55:49 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306202171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3306202171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.1828998759 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 191322721 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:55:47 PM UTC 24 |
| Finished | Sep 18 12:55:49 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828998759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.1828998759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.2692536514 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 406472307 ps |
| CPU time | 2.77 seconds |
| Started | Sep 18 12:55:48 PM UTC 24 |
| Finished | Sep 18 12:55:52 PM UTC 24 |
| Peak memory | 217752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692536514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.2692536514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2042413693 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 1332552018 ps |
| CPU time | 4.79 seconds |
| Started | Sep 18 12:55:48 PM UTC 24 |
| Finished | Sep 18 12:55:54 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042413693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2042413693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.2402276468 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 15426758504 ps |
| CPU time | 36.85 seconds |
| Started | Sep 18 12:55:48 PM UTC 24 |
| Finished | Sep 18 12:56:26 PM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402276468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.2402276468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.3638271486 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 4285081049 ps |
| CPU time | 38.03 seconds |
| Started | Sep 18 12:55:48 PM UTC 24 |
| Finished | Sep 18 12:56:28 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638271486 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.3638271486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.2817521209 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 441553370 ps |
| CPU time | 2.27 seconds |
| Started | Sep 18 12:55:50 PM UTC 24 |
| Finished | Sep 18 12:55:54 PM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817521209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.2817521209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.3827203689 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 152091112 ps |
| CPU time | 1.38 seconds |
| Started | Sep 18 12:55:51 PM UTC 24 |
| Finished | Sep 18 12:55:53 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827203689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.3827203689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_enable.865386138 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 59598177 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 12:55:52 PM UTC 24 |
| Finished | Sep 18 12:55:54 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=865386138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_enable.865386138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1739656832 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 1059583819 ps |
| CPU time | 4.1 seconds |
| Started | Sep 18 12:55:53 PM UTC 24 |
| Finished | Sep 18 12:55:58 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739656832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1739656832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.2840958655 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 354212349 ps |
| CPU time | 2.08 seconds |
| Started | Sep 18 12:55:53 PM UTC 24 |
| Finished | Sep 18 12:55:56 PM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840958655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.2840958655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1600246394 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 240301314 ps |
| CPU time | 1.99 seconds |
| Started | Sep 18 12:55:54 PM UTC 24 |
| Finished | Sep 18 12:55:57 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600246394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1600246394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.1932840202 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 421629716 ps |
| CPU time | 4.53 seconds |
| Started | Sep 18 12:55:54 PM UTC 24 |
| Finished | Sep 18 12:56:00 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932840202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.1932840202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1429664185 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 214236972 ps |
| CPU time | 1.76 seconds |
| Started | Sep 18 12:55:55 PM UTC 24 |
| Finished | Sep 18 12:55:57 PM UTC 24 |
| Peak memory | 225900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429664185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1429664185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.3571631199 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 149632573 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:55:55 PM UTC 24 |
| Finished | Sep 18 12:55:57 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571631199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.3571631199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.982879581 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 218987000 ps |
| CPU time | 1.32 seconds |
| Started | Sep 18 12:55:56 PM UTC 24 |
| Finished | Sep 18 12:55:58 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=982879581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_in_trans.982879581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.1633844675 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 2775409348 ps |
| CPU time | 73.17 seconds |
| Started | Sep 18 12:55:54 PM UTC 24 |
| Finished | Sep 18 12:57:09 PM UTC 24 |
| Peak memory | 234664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633844675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1633844675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.2890341923 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 7376770446 ps |
| CPU time | 78.57 seconds |
| Started | Sep 18 12:55:57 PM UTC 24 |
| Finished | Sep 18 12:57:20 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890341923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.2890341923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.4085167898 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 233283744 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:55:58 PM UTC 24 |
| Finished | Sep 18 12:56:03 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085167898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.4085167898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.2822197277 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 24557126929 ps |
| CPU time | 48.28 seconds |
| Started | Sep 18 12:55:58 PM UTC 24 |
| Finished | Sep 18 12:56:50 PM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822197277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.2822197277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.1854281090 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 5700991822 ps |
| CPU time | 9.16 seconds |
| Started | Sep 18 12:55:58 PM UTC 24 |
| Finished | Sep 18 12:56:11 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854281090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.1854281090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.1351238457 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 2813369010 ps |
| CPU time | 28.88 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:32 PM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351238457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1351238457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.2685578431 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 2130013597 ps |
| CPU time | 55.54 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:59 PM UTC 24 |
| Peak memory | 228276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685578431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.2685578431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.2177937463 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 281518956 ps |
| CPU time | 1.82 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:05 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177937463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.2177937463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.3029529604 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 197705999 ps |
| CPU time | 1.7 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:05 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029529604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3029529604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.2021555171 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 2115235296 ps |
| CPU time | 60.58 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:57:04 PM UTC 24 |
| Peak memory | 234812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021555171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.2021555171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.3866939967 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 3005900258 ps |
| CPU time | 33.19 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:37 PM UTC 24 |
| Peak memory | 230432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866939967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.3866939967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.2368635830 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 3601684410 ps |
| CPU time | 30.21 seconds |
| Started | Sep 18 12:56:02 PM UTC 24 |
| Finished | Sep 18 12:56:34 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368635830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.2368635830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1311174033 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 173829768 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:56:04 PM UTC 24 |
| Finished | Sep 18 12:56:06 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311174033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1311174033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.2854742813 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 155255102 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:04 PM UTC 24 |
| Finished | Sep 18 12:56:06 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854742813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.2854742813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.3186551790 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 197503433 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:06 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186551790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.3186551790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1467644074 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 143768443 ps |
| CPU time | 1.37 seconds |
| Started | Sep 18 12:56:06 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467644074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1467644074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.1707109111 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 191572010 ps |
| CPU time | 1 seconds |
| Started | Sep 18 12:56:06 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707109111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.1707109111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.3682700294 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 205475274 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 12:56:06 PM UTC 24 |
| Finished | Sep 18 12:56:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682700294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.3682700294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.1376262742 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 196769070 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 12:56:06 PM UTC 24 |
| Finished | Sep 18 12:56:10 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376262742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.1376262742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.3674633078 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 236458474 ps |
| CPU time | 1.81 seconds |
| Started | Sep 18 12:56:09 PM UTC 24 |
| Finished | Sep 18 12:56:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674633078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.3674633078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.899275444 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 156073598 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:56:09 PM UTC 24 |
| Finished | Sep 18 12:56:12 PM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899275444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.899275444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.2617532664 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 41454388 ps |
| CPU time | 0.96 seconds |
| Started | Sep 18 12:56:09 PM UTC 24 |
| Finished | Sep 18 12:56:11 PM UTC 24 |
| Peak memory | 215492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617532664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.2617532664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.762241482 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 15348085319 ps |
| CPU time | 44.95 seconds |
| Started | Sep 18 12:56:09 PM UTC 24 |
| Finished | Sep 18 12:56:56 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762241482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.762241482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.2966300503 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 203795046 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:56:09 PM UTC 24 |
| Finished | Sep 18 12:56:12 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966300503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.2966300503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.1176159097 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 226327140 ps |
| CPU time | 1.31 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:14 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176159097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.1176159097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.4147076430 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 6869365665 ps |
| CPU time | 64.49 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:57:18 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147076430 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.4147076430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.1306766253 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 2143066853 ps |
| CPU time | 17.33 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:30 PM UTC 24 |
| Peak memory | 234728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306766253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1306766253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.3376885877 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 10279227895 ps |
| CPU time | 50 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:57:03 PM UTC 24 |
| Peak memory | 234932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376885877 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3376885877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.3922844530 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 226277621 ps |
| CPU time | 1.64 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:14 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922844530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.3922844530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.2858542822 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 191375055 ps |
| CPU time | 1.57 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:14 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858542822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.2858542822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.1969490879 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 20171848965 ps |
| CPU time | 27.96 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:41 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969490879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.1969490879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.1991163481 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 144545940 ps |
| CPU time | 1.24 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991163481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.1991163481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.3423297234 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 413721242 ps |
| CPU time | 2.31 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:15 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423297234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.3423297234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.633528382 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 154855632 ps |
| CPU time | 1.27 seconds |
| Started | Sep 18 12:56:12 PM UTC 24 |
| Finished | Sep 18 12:56:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633528382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_setup_stage.633528382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.3729534870 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 176940106 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 12:56:13 PM UTC 24 |
| Finished | Sep 18 12:56:16 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729534870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.3729534870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.3933922629 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 252042580 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 12:56:13 PM UTC 24 |
| Finished | Sep 18 12:56:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933922629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.3933922629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.407962568 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 1830879499 ps |
| CPU time | 53.8 seconds |
| Started | Sep 18 12:56:13 PM UTC 24 |
| Finished | Sep 18 12:57:09 PM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407962568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.407962568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.370579218 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 157839216 ps |
| CPU time | 1.42 seconds |
| Started | Sep 18 12:56:13 PM UTC 24 |
| Finished | Sep 18 12:56:16 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370579218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.370579218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2102639871 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 212852415 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 12:56:13 PM UTC 24 |
| Finished | Sep 18 12:56:16 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102639871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.2102639871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.4027971965 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 1211262980 ps |
| CPU time | 4.99 seconds |
| Started | Sep 18 12:56:15 PM UTC 24 |
| Finished | Sep 18 12:56:21 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027971965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.4027971965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.1944121166 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 2477895713 ps |
| CPU time | 18.13 seconds |
| Started | Sep 18 12:56:15 PM UTC 24 |
| Finished | Sep 18 12:56:34 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944121166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.1944121166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.854909911 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 3398703121 ps |
| CPU time | 30.86 seconds |
| Started | Sep 18 12:56:16 PM UTC 24 |
| Finished | Sep 18 12:56:48 PM UTC 24 |
| Peak memory | 234948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854909911 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_1 7/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.854909911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2923877288 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 908866496 ps |
| CPU time | 18.4 seconds |
| Started | Sep 18 12:55:49 PM UTC 24 |
| Finished | Sep 18 12:56:09 PM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923877288 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2923877288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.1425458281 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 455392222 ps |
| CPU time | 2.26 seconds |
| Started | Sep 18 12:56:16 PM UTC 24 |
| Finished | Sep 18 12:56:19 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1425458281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.1425458281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3069458281 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 308544736 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069458281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.3069458281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.3148496510 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 484183220 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3148496510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.3148496510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.311056943 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 422387511 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=311056943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.311056943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.1224532590 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 274656098 ps |
| CPU time | 1.14 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224532590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.1224532590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3550235945 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 571169010 ps |
| CPU time | 1.96 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3550235945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.3550235945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1430785249 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 636715215 ps |
| CPU time | 2.19 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430785249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1430785249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.1154397423 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 325513893 ps |
| CPU time | 1.22 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1154397423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.1154397423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.1635254699 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 607542672 ps |
| CPU time | 1.93 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1635254699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.1635254699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.615522010 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 169751164 ps |
| CPU time | 1.02 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=615522010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.615522010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3338689060 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 481807975 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3338689060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.3338689060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.383497449 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 460051105 ps |
| CPU time | 1.75 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:08 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=383497449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.383497449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.759987800 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 242061361 ps |
| CPU time | 0.98 seconds |
| Started | Sep 18 01:09:05 PM UTC 24 |
| Finished | Sep 18 01:09:07 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759987800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 84.usbdev_fifo_levels.759987800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1886289716 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 543252541 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1886289716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.1886289716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.304717727 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 313875664 ps |
| CPU time | 1.25 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:09 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304717727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 85.usbdev_fifo_levels.304717727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1856736277 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 518004430 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1856736277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.1856736277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.2571241812 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 316914282 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571241812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.2571241812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.442375034 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 519829610 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=442375034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_tx _rx_disruption.442375034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1442429806 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 304333406 ps |
| CPU time | 1.13 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442429806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1442429806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1615074069 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 313033760 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615074069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.1615074069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3600884774 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 626843080 ps |
| CPU time | 1.79 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3600884774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.3600884774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2178536847 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 365919651 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178536847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2178536847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.610721074 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 154877807 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=610721074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 88.usbdev_fifo_levels.610721074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3943209095 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 510606986 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3943209095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.3943209095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2869648748 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 346778445 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:09:07 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869648748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2869648748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.575462909 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 159077266 ps |
| CPU time | 1.12 seconds |
| Started | Sep 18 01:09:08 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575462909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 89.usbdev_fifo_levels.575462909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.758885259 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 560893839 ps |
| CPU time | 1.98 seconds |
| Started | Sep 18 01:09:08 PM UTC 24 |
| Finished | Sep 18 01:09:11 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=758885259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_tx _rx_disruption.758885259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.936276333 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 33568623 ps |
| CPU time | 1.01 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:56:44 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936276333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.936276333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.358978823 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 10846537337 ps |
| CPU time | 19.93 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:39 PM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=358978823 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.358978823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.2963390015 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 15042084142 ps |
| CPU time | 24.83 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:44 PM UTC 24 |
| Peak memory | 228332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963390015 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.2963390015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.2235323242 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 23527207112 ps |
| CPU time | 32.69 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:52 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235323242 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.2235323242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2787891674 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 208101103 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:20 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787891674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2787891674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.2682811589 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 152451681 ps |
| CPU time | 1.46 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:20 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682811589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.2682811589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.3691384785 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 167036062 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:56:18 PM UTC 24 |
| Finished | Sep 18 12:56:20 PM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691384785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.3691384785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.3283059323 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 424092784 ps |
| CPU time | 2.33 seconds |
| Started | Sep 18 12:56:19 PM UTC 24 |
| Finished | Sep 18 12:56:23 PM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283059323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.3283059323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.126152590 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 1120604838 ps |
| CPU time | 26.28 seconds |
| Started | Sep 18 12:56:20 PM UTC 24 |
| Finished | Sep 18 12:56:47 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126152590 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.126152590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.2899276125 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 651957545 ps |
| CPU time | 2.84 seconds |
| Started | Sep 18 12:56:21 PM UTC 24 |
| Finished | Sep 18 12:56:25 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899276125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.2899276125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.431376275 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 180068000 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:56:21 PM UTC 24 |
| Finished | Sep 18 12:56:24 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431376275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_disconnected.431376275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_enable.835529009 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 37872225 ps |
| CPU time | 1.11 seconds |
| Started | Sep 18 12:56:21 PM UTC 24 |
| Finished | Sep 18 12:56:23 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=835529009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.835529009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.317742826 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 1064675985 ps |
| CPU time | 5.28 seconds |
| Started | Sep 18 12:56:21 PM UTC 24 |
| Finished | Sep 18 12:56:28 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=317742826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.317742826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.3859922265 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 368496124 ps |
| CPU time | 2.06 seconds |
| Started | Sep 18 12:56:23 PM UTC 24 |
| Finished | Sep 18 12:56:27 PM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859922265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.3859922265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.156905888 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 146783094 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:56:23 PM UTC 24 |
| Finished | Sep 18 12:56:26 PM UTC 24 |
| Peak memory | 215584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156905888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_fifo_levels.156905888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.1911562540 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 149433410 ps |
| CPU time | 1.98 seconds |
| Started | Sep 18 12:56:23 PM UTC 24 |
| Finished | Sep 18 12:56:27 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911562540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.1911562540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3567178215 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 212762005 ps |
| CPU time | 2.01 seconds |
| Started | Sep 18 12:56:24 PM UTC 24 |
| Finished | Sep 18 12:56:27 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567178215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.3567178215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.554930865 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 179969999 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:56:24 PM UTC 24 |
| Finished | Sep 18 12:56:26 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554930865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.554930865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.3955977141 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 193021772 ps |
| CPU time | 1.53 seconds |
| Started | Sep 18 12:56:25 PM UTC 24 |
| Finished | Sep 18 12:56:28 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955977141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.3955977141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.3071230565 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 2264749615 ps |
| CPU time | 57.82 seconds |
| Started | Sep 18 12:56:24 PM UTC 24 |
| Finished | Sep 18 12:57:23 PM UTC 24 |
| Peak memory | 228300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071230565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3071230565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.915889341 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 11701480534 ps |
| CPU time | 79.68 seconds |
| Started | Sep 18 12:56:25 PM UTC 24 |
| Finished | Sep 18 12:57:47 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=915889341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.915889341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.2835806898 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 235301558 ps |
| CPU time | 1.67 seconds |
| Started | Sep 18 12:56:25 PM UTC 24 |
| Finished | Sep 18 12:56:28 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835806898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.2835806898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1338339046 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 29199672669 ps |
| CPU time | 48.15 seconds |
| Started | Sep 18 12:56:25 PM UTC 24 |
| Finished | Sep 18 12:57:15 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338339046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1338339046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2401679865 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 8828404953 ps |
| CPU time | 12.42 seconds |
| Started | Sep 18 12:56:26 PM UTC 24 |
| Finished | Sep 18 12:56:40 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401679865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2401679865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.283150947 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 4423767606 ps |
| CPU time | 127.09 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:58:38 PM UTC 24 |
| Peak memory | 235124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283150947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.283150947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2590291184 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 2732212760 ps |
| CPU time | 27.39 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:56:57 PM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590291184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.2590291184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.3576364908 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 249744740 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:56:30 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576364908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.3576364908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.914427956 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 226636756 ps |
| CPU time | 1.74 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:56:31 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=914427956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.914427956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.2949790712 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 2800074992 ps |
| CPU time | 37.12 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:57:07 PM UTC 24 |
| Peak memory | 234804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949790712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.2949790712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.483827338 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 2509752098 ps |
| CPU time | 29.19 seconds |
| Started | Sep 18 12:56:28 PM UTC 24 |
| Finished | Sep 18 12:57:00 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483827338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.483827338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.4277986017 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 2425002787 ps |
| CPU time | 22.29 seconds |
| Started | Sep 18 12:56:30 PM UTC 24 |
| Finished | Sep 18 12:56:53 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277986017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.4277986017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.200974312 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 156046656 ps |
| CPU time | 1.51 seconds |
| Started | Sep 18 12:56:30 PM UTC 24 |
| Finished | Sep 18 12:56:32 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=200974312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.200974312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.1410065545 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 236918414 ps |
| CPU time | 1.66 seconds |
| Started | Sep 18 12:56:30 PM UTC 24 |
| Finished | Sep 18 12:56:32 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410065545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.1410065545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.4253959459 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 206721258 ps |
| CPU time | 1.61 seconds |
| Started | Sep 18 12:56:30 PM UTC 24 |
| Finished | Sep 18 12:56:32 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253959459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.4253959459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.767635003 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 167325713 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:56:30 PM UTC 24 |
| Finished | Sep 18 12:56:32 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767635003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.767635003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.530560926 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 177712418 ps |
| CPU time | 1.5 seconds |
| Started | Sep 18 12:56:31 PM UTC 24 |
| Finished | Sep 18 12:56:33 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=530560926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_out_stall.530560926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.4180764907 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 173615260 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:31 PM UTC 24 |
| Finished | Sep 18 12:56:33 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180764907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.4180764907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2563227347 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 158637878 ps |
| CPU time | 1.21 seconds |
| Started | Sep 18 12:56:32 PM UTC 24 |
| Finished | Sep 18 12:56:34 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563227347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.2563227347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.3972263050 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 195889634 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:56:34 PM UTC 24 |
| Finished | Sep 18 12:56:36 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972263050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.3972263050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.2274898112 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 142037309 ps |
| CPU time | 1.39 seconds |
| Started | Sep 18 12:56:34 PM UTC 24 |
| Finished | Sep 18 12:56:36 PM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274898112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.2274898112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.2467646418 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 50295280 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 12:56:34 PM UTC 24 |
| Finished | Sep 18 12:56:36 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467646418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.2467646418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.309578086 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 15869547901 ps |
| CPU time | 48.82 seconds |
| Started | Sep 18 12:56:34 PM UTC 24 |
| Finished | Sep 18 12:57:24 PM UTC 24 |
| Peak memory | 232356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309578086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_pkt_buffer.309578086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.4132719745 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 167517392 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:34 PM UTC 24 |
| Finished | Sep 18 12:56:36 PM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132719745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.4132719745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.2405259766 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 207294826 ps |
| CPU time | 1.69 seconds |
| Started | Sep 18 12:56:35 PM UTC 24 |
| Finished | Sep 18 12:56:38 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405259766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.2405259766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3634179113 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 3600416074 ps |
| CPU time | 83.62 seconds |
| Started | Sep 18 12:56:35 PM UTC 24 |
| Finished | Sep 18 12:58:01 PM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634179113 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3634179113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.362913730 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 11060681575 ps |
| CPU time | 197.51 seconds |
| Started | Sep 18 12:56:35 PM UTC 24 |
| Finished | Sep 18 12:59:56 PM UTC 24 |
| Peak memory | 233064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=362913730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.362913730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1379838242 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 13291399672 ps |
| CPU time | 76.02 seconds |
| Started | Sep 18 12:56:37 PM UTC 24 |
| Finished | Sep 18 12:57:55 PM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379838242 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.1379838242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.689577485 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 193993823 ps |
| CPU time | 1.55 seconds |
| Started | Sep 18 12:56:35 PM UTC 24 |
| Finished | Sep 18 12:56:38 PM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689577485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_random_length_in_transaction.689577485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.3804154926 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 156725594 ps |
| CPU time | 1.4 seconds |
| Started | Sep 18 12:56:35 PM UTC 24 |
| Finished | Sep 18 12:56:38 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3804154926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3804154926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.3493225446 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 20175501017 ps |
| CPU time | 32.12 seconds |
| Started | Sep 18 12:56:37 PM UTC 24 |
| Finished | Sep 18 12:57:10 PM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493225446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.3493225446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3212378399 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 172098866 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:56:37 PM UTC 24 |
| Finished | Sep 18 12:56:39 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212378399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.3212378399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3895184771 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 247878025 ps |
| CPU time | 1.86 seconds |
| Started | Sep 18 12:56:37 PM UTC 24 |
| Finished | Sep 18 12:56:40 PM UTC 24 |
| Peak memory | 215660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895184771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3895184771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1900642762 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 152365348 ps |
| CPU time | 1.45 seconds |
| Started | Sep 18 12:56:37 PM UTC 24 |
| Finished | Sep 18 12:56:40 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900642762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1900642762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2287871044 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 142699286 ps |
| CPU time | 1.43 seconds |
| Started | Sep 18 12:56:38 PM UTC 24 |
| Finished | Sep 18 12:56:41 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287871044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.2287871044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.4012848734 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 244611156 ps |
| CPU time | 1.8 seconds |
| Started | Sep 18 12:56:39 PM UTC 24 |
| Finished | Sep 18 12:56:41 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012848734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.4012848734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.2436692391 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 2652052623 ps |
| CPU time | 23.06 seconds |
| Started | Sep 18 12:56:39 PM UTC 24 |
| Finished | Sep 18 12:57:03 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436692391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.2436692391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2106624297 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 173147155 ps |
| CPU time | 1.36 seconds |
| Started | Sep 18 12:56:39 PM UTC 24 |
| Finished | Sep 18 12:56:41 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106624297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2106624297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1932886324 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 191733385 ps |
| CPU time | 1.49 seconds |
| Started | Sep 18 12:56:40 PM UTC 24 |
| Finished | Sep 18 12:56:43 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932886324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.1932886324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.513275276 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 267124137 ps |
| CPU time | 1.95 seconds |
| Started | Sep 18 12:56:40 PM UTC 24 |
| Finished | Sep 18 12:56:43 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513275276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_stream_len_max.513275276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.3680194538 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 3977585373 ps |
| CPU time | 103.85 seconds |
| Started | Sep 18 12:56:40 PM UTC 24 |
| Finished | Sep 18 12:58:26 PM UTC 24 |
| Peak memory | 230420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680194538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.3680194538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.37965091 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 3381860978 ps |
| CPU time | 87.62 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:58:12 PM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37965091 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17 /usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.37965091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.1342741752 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 5236866179 ps |
| CPU time | 42.42 seconds |
| Started | Sep 18 12:56:21 PM UTC 24 |
| Finished | Sep 18 12:57:05 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342741752 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.1342741752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.1631958355 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 542943772 ps |
| CPU time | 2.8 seconds |
| Started | Sep 18 12:56:42 PM UTC 24 |
| Finished | Sep 18 12:56:46 PM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1631958355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.1631958355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.2443440721 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 413565496 ps |
| CPU time | 1.41 seconds |
| Started | Sep 18 01:09:08 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443440721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.2443440721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.4061302325 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 261913824 ps |
| CPU time | 1.3 seconds |
| Started | Sep 18 01:09:08 PM UTC 24 |
| Finished | Sep 18 01:09:10 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061302325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.4061302325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3991389804 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 514465816 ps |
| CPU time | 1.58 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3991389804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3991389804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.2469445630 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 270412989 ps |
| CPU time | 1.16 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469445630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.2469445630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.1940048571 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 510257623 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1940048571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.1940048571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1854197088 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 335758040 ps |
| CPU time | 1.33 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854197088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.1854197088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.868180878 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 145421844 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:11 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868180878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 92.usbdev_fifo_levels.868180878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.2276698252 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 502066331 ps |
| CPU time | 1.54 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2276698252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.2276698252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3337726080 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 775638697 ps |
| CPU time | 1.88 seconds |
| Started | Sep 18 01:09:09 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337726080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.3337726080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.644081593 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 273005456 ps |
| CPU time | 1.2 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644081593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 93.usbdev_fifo_levels.644081593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.615690127 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 618408690 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=615690127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_tx _rx_disruption.615690127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2167569940 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 300996854 ps |
| CPU time | 1.08 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167569940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2167569940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2984849640 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 261521341 ps |
| CPU time | 1.23 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984849640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.2984849640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.3042826080 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 615179202 ps |
| CPU time | 1.83 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:13 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3042826080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.3042826080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1710371906 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 338782802 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710371906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.1710371906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.2521192743 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 281459204 ps |
| CPU time | 1.07 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521192743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.2521192743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2956282546 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 543906016 ps |
| CPU time | 1.65 seconds |
| Started | Sep 18 01:09:10 PM UTC 24 |
| Finished | Sep 18 01:09:12 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2956282546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.2956282546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.3663924665 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 681360285 ps |
| CPU time | 1.63 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663924665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.3663924665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2570945984 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 275605434 ps |
| CPU time | 1.1 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570945984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.2570945984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.2904736991 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 500535696 ps |
| CPU time | 1.47 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2904736991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.2904736991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2631175593 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 399121515 ps |
| CPU time | 1.18 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631175593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2631175593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3499622787 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 241755088 ps |
| CPU time | 1.15 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499622787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.3499622787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.2410233853 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 463919713 ps |
| CPU time | 1.62 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2410233853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.2410233853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3288716942 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 180765422 ps |
| CPU time | 0.83 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:14 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288716942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.3288716942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.4092446927 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 549906212 ps |
| CPU time | 1.68 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4092446927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.4092446927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.2794246655 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 368135861 ps |
| CPU time | 1.35 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794246655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.2794246655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.3106708888 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 181242046 ps |
| CPU time | 0.86 seconds |
| Started | Sep 18 01:09:12 PM UTC 24 |
| Finished | Sep 18 01:09:14 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106708888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.3106708888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.2381023444 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 542862685 ps |
| CPU time | 1.59 seconds |
| Started | Sep 18 01:09:13 PM UTC 24 |
| Finished | Sep 18 01:09:15 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2381023444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.2381023444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_17/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
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