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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.63 98.23 96.05 97.44 96.61 98.42 98.21 98.46


Total test records in report: 3905
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T3233 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2291079364 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 149313871 ps
T3234 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2010513525 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 142540259 ps
T3235 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.199007960 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 267061457 ps
T3236 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.2686920494 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 152656471 ps
T3237 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.2988464954 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 235405816 ps
T3238 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1904716737 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:30 PM UTC 24 902158242 ps
T3239 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.2496132619 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 161849712 ps
T3240 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.4212380171 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:30 PM UTC 24 155767013 ps
T3241 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3846729480 Oct 12 05:20:36 PM UTC 24 Oct 12 05:21:30 PM UTC 24 22525543207 ps
T3242 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.2404893966 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:31 PM UTC 24 187074230 ps
T3243 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.454032575 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:31 PM UTC 24 274442705 ps
T3244 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3998181703 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:31 PM UTC 24 258745665 ps
T3245 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2951146921 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:31 PM UTC 24 890178605 ps
T3246 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.416561668 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:31 PM UTC 24 197889738 ps
T3247 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.1769800315 Oct 12 05:21:29 PM UTC 24 Oct 12 05:21:31 PM UTC 24 550219249 ps
T3248 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.730353094 Oct 12 05:20:35 PM UTC 24 Oct 12 05:21:35 PM UTC 24 5484583536 ps
T3249 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2765603343 Oct 12 05:20:35 PM UTC 24 Oct 12 05:21:36 PM UTC 24 2570566669 ps
T3250 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3063544695 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:40 PM UTC 24 1583733324 ps
T3251 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.951865559 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:43 PM UTC 24 10380077511 ps
T3252 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.3360612278 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:45 PM UTC 24 10546887169 ps
T3253 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2355120574 Oct 12 05:20:36 PM UTC 24 Oct 12 05:21:46 PM UTC 24 2891590956 ps
T3254 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.585253252 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:48 PM UTC 24 979834357 ps
T3255 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.4047148822 Oct 12 05:21:27 PM UTC 24 Oct 12 05:21:53 PM UTC 24 3720608961 ps
T3256 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.315937567 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:54 PM UTC 24 3098852365 ps
T3257 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.2954550637 Oct 12 05:21:28 PM UTC 24 Oct 12 05:21:57 PM UTC 24 11019798160 ps
T3258 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1146699978 Oct 12 05:20:35 PM UTC 24 Oct 12 05:22:05 PM UTC 24 3616868554 ps
T3259 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3002158345 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 464342367 ps
T423 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.3866009817 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 393234874 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.1828195515 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 265157166 ps
T3260 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1224742940 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 236722759 ps
T420 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1079934626 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 557432194 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3206621887 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 266943831 ps
T3261 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.295229575 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 154790345 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3881475192 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 289233170 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.403000466 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 189942996 ps
T402 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.472470733 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 262074268 ps
T3262 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.2655559382 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 321234164 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.645920026 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 323938727 ps
T3263 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1917987694 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 150272381 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.1220323579 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 373862041 ps
T3264 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1991947690 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 521614342 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.1783659192 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 472813960 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2594602065 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 416869237 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.58266665 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 249236333 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.2409719713 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 733194162 ps
T3265 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.857791162 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 578801139 ps
T354 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.3621874800 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 248644401 ps
T3266 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1291012728 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 605668300 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.4168381325 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 267957940 ps
T3267 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.3582373985 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 164485096 ps
T3268 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3501083818 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 503238427 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3312748601 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 245240777 ps
T3269 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.1994889275 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 612958889 ps
T3270 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.556627875 Oct 12 05:22:17 PM UTC 24 Oct 12 05:22:20 PM UTC 24 652467762 ps
T3271 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2691061841 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 254165761 ps
T540 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2035026714 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:20 PM UTC 24 281946831 ps
T421 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.1849919187 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 666385162 ps
T3272 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1779148120 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 481070160 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.700562778 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 306290630 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.2378749619 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 295207869 ps
T3273 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.1887086138 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 582474856 ps
T3274 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.3379026296 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 614887199 ps
T3275 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3068052804 Oct 12 05:22:19 PM UTC 24 Oct 12 05:22:21 PM UTC 24 303837114 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.403582644 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 306937719 ps
T3276 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1621660220 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 457191762 ps
T470 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.1532992156 Oct 12 05:22:19 PM UTC 24 Oct 12 05:22:21 PM UTC 24 364999394 ps
T446 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.328607999 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 524391881 ps
T3277 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.3588277034 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 687690322 ps
T3278 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1765254023 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 471209987 ps
T3279 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.112928003 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 509537437 ps
T3280 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.3958006756 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 548306806 ps
T3281 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.651917097 Oct 12 05:22:18 PM UTC 24 Oct 12 05:22:21 PM UTC 24 503916054 ps
T3282 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2315837394 Oct 12 05:20:35 PM UTC 24 Oct 12 05:22:28 PM UTC 24 4605681773 ps
T3283 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2511060164 Oct 12 05:21:28 PM UTC 24 Oct 12 05:22:29 PM UTC 24 2504344045 ps
T3284 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.1250862374 Oct 12 05:21:28 PM UTC 24 Oct 12 05:22:45 PM UTC 24 3300714808 ps
T3285 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3464958714 Oct 12 05:21:28 PM UTC 24 Oct 12 05:22:46 PM UTC 24 3160400991 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1760076465 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 259217360 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1986094391 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 322206064 ps
T400 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2257911451 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 253534226 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.4289701581 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 245812825 ps
T3286 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.1072578522 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 153336249 ps
T3287 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.4203774247 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 297877728 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3169343944 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 151663577 ps
T3288 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.702002277 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 545088878 ps
T544 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1122369077 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 269849845 ps
T3289 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.692706362 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 156090571 ps
T529 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.268126671 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 286300272 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.909720730 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 517389993 ps
T3290 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1821670239 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 255228445 ps
T3291 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2061435906 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 478684520 ps
T3292 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.288868795 Oct 12 05:23:20 PM UTC 24 Oct 12 05:23:23 PM UTC 24 532271521 ps
T3293 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.2618671782 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 529590149 ps
T3294 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.282206663 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 167793315 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1404266280 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 260111385 ps
T374 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.4222934297 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 263856852 ps
T3295 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1150155239 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 278791217 ps
T3296 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.3493460443 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 275355298 ps
T3297 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.1651374531 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 511231019 ps
T3298 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2866609634 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 372898712 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.118258494 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 272179334 ps
T3299 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.4209285725 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 458772390 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.290677768 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 732896996 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.255470876 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:23 PM UTC 24 309301148 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1678096343 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 482435404 ps
T3300 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.4211965306 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 271415824 ps
T3301 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2370702752 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 675259555 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.2065980613 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 274631967 ps
T3302 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.4156701687 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 633314619 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.4096733939 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 545185609 ps
T3303 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.4066522858 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 596628662 ps
T3304 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2968978076 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 586465962 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.1013888618 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 608010682 ps
T3305 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2287308685 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 556965357 ps
T3306 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.437947170 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:24 PM UTC 24 623989635 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.660197930 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 580611486 ps
T537 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.2027867792 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 167152704 ps
T3307 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.4182495425 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 154199268 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3661128503 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:24 PM UTC 24 184228326 ps
T3308 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2896720679 Oct 12 05:23:21 PM UTC 24 Oct 12 05:23:25 PM UTC 24 542625604 ps
T415 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.2365570207 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 426858022 ps
T3309 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.90218317 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 262694909 ps
T3310 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.893391851 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 304541868 ps
T435 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.1306192585 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 276658360 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3055497277 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 310347545 ps
T3311 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2442636690 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 584684601 ps
T3312 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3977313831 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 512544068 ps
T3313 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.528907813 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 536150782 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.2578217811 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 600117081 ps
T3314 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.1460754779 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 646619561 ps
T3315 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.697681405 Oct 12 05:23:22 PM UTC 24 Oct 12 05:23:25 PM UTC 24 536501085 ps
T3316 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3530711413 Oct 12 05:21:28 PM UTC 24 Oct 12 05:23:31 PM UTC 24 11538340820 ps
T3317 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3492280213 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 215281440 ps
T3318 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.4287558212 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 162468894 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.3002689801 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 281603751 ps
T392 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1954229635 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 254852017 ps
T3319 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2947165018 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 244128719 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1140207107 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 442324394 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.3094961318 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:28 PM UTC 24 262990328 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.3791108762 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 275377502 ps
T3320 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.128134596 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 261820224 ps
T386 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.2033505506 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 293212527 ps
T3321 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.2658982001 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 561918259 ps
T3322 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3318406061 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 549520265 ps
T440 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.2775513967 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 496317837 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.375315753 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 433473133 ps
T3323 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3477494013 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 255733172 ps
T3324 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.340793788 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 273237048 ps
T3325 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1066747775 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 602533382 ps
T3326 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.153424357 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 255150075 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.2166670991 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 278584259 ps
T3327 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.2726286486 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 497038418 ps
T3328 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2027925063 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 555366349 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.2243239337 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 264478453 ps
T3329 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.774706639 Oct 12 05:24:26 PM UTC 24 Oct 12 05:24:29 PM UTC 24 660061976 ps
T3330 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.2608456160 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 475827990 ps
T3331 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3872384814 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 261578389 ps
T3332 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.3611395021 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 455478812 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3285098429 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 392830374 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1998531537 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 587707060 ps
T3333 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3327063623 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 193929559 ps
T425 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3821285524 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 366558685 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.93851035 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 397685646 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.1396790918 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:29 PM UTC 24 657065130 ps
T212 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.4203375683 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 526152466 ps
T359 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2514775994 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 280524697 ps
T3334 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3931575523 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 187635642 ps
T3335 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.2523091626 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 149929178 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2218618720 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 608731042 ps
T3336 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.1567506563 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 266336015 ps
T3337 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.3800005784 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 557306278 ps
T3338 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.656010711 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 254919051 ps
T3339 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.575599055 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 255311773 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.3234089496 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 457929792 ps
T424 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3254689267 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 769868140 ps
T328 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.4280161080 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 238311511 ps
T395 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.701629167 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 323892271 ps
T3340 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.4135071012 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 429486745 ps
T531 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.3814735286 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 235874727 ps
T364 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1426553187 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 289749963 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3460828648 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 174237353 ps
T3341 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.1830848517 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 453643137 ps
T3342 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2637488309 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 294265351 ps
T458 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3147180763 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 337612893 ps
T3343 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2919341452 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 495449910 ps
T3344 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3839115300 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 421658700 ps
T3345 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.720834140 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 460564429 ps
T3346 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.847028470 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 507571355 ps
T3347 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.969243052 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 708676384 ps
T535 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.4082155083 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 328903662 ps
T3348 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.313661353 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:30 PM UTC 24 283905759 ps
T3349 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1817919443 Oct 12 05:24:27 PM UTC 24 Oct 12 05:24:30 PM UTC 24 613482289 ps
T3350 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1508889662 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:31 PM UTC 24 606166149 ps
T3351 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.3517905423 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:31 PM UTC 24 496971928 ps
T3352 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2467916631 Oct 12 05:24:28 PM UTC 24 Oct 12 05:24:31 PM UTC 24 622121662 ps
T333 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.899760863 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 158080854 ps
T3353 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.2361375664 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 297053772 ps
T3354 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.3488610942 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 230910979 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.4099077846 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 220074582 ps
T378 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.240482337 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 263843260 ps
T3355 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.2094954725 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 278212692 ps
T350 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.3110443453 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 248010072 ps
T390 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.1266709863 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 248034350 ps
T3356 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.3052793446 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 462008533 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3794957206 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:38 PM UTC 24 484090745 ps
T3357 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.4234417241 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:38 PM UTC 24 559855009 ps
T3358 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.848510090 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 186829026 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3171856037 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 260227242 ps
T3359 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.690011225 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:38 PM UTC 24 617675343 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.222245871 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 565748592 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3092357334 Oct 12 05:25:36 PM UTC 24 Oct 12 05:25:38 PM UTC 24 406358964 ps
T3360 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2930069706 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 330224305 ps
T3361 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3351487674 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:36 PM UTC 24 255221334 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2902184218 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 363501312 ps
T3362 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3822320223 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 267302739 ps
T3363 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.3098460224 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 497559559 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3700497977 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 382425319 ps
T3364 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1920131082 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 147571694 ps
T3365 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.4057343327 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 592782554 ps
T3366 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2244646357 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 451940213 ps
T3367 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.506592600 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:38 PM UTC 24 622447419 ps
T387 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.4214249134 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 306699003 ps
T522 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.1021429728 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 343429003 ps
T417 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.329792066 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 646552835 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3785374371 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 260879424 ps
T3368 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.8121045 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 169052424 ps
T394 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.34536226 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 150143432 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.2288536379 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 255721375 ps
T403 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3905895453 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 263735103 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2580248607 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 272912726 ps
T3369 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3045003295 Oct 12 05:25:36 PM UTC 24 Oct 12 05:25:38 PM UTC 24 265477111 ps
T3370 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.134454876 Oct 12 05:25:36 PM UTC 24 Oct 12 05:25:38 PM UTC 24 504716758 ps
T3371 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4192531709 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 305815453 ps
T3372 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.4274717934 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 429186136 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3199900304 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 182638083 ps
T3373 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.2520946086 Oct 12 05:25:36 PM UTC 24 Oct 12 05:25:38 PM UTC 24 555934656 ps
T3374 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.951896060 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 259901441 ps
T401 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.2704877738 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 269282089 ps
T3375 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.3789110175 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 638117019 ps
T3376 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.739978462 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 630620019 ps
T3377 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2910702160 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 202170319 ps
T3378 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.3651292164 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 694513846 ps
T3379 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.3780227236 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 151343427 ps
T3380 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1256905194 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 452333840 ps
T3381 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.524505372 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 297248535 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.4157662636 Oct 12 05:25:34 PM UTC 24 Oct 12 05:25:37 PM UTC 24 862021498 ps
T335 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.703858260 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 285650262 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.1074487454 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 383960003 ps
T3382 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.834165104 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 583619965 ps
T3383 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.1703896777 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 162825927 ps
T377 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2932117033 Oct 12 05:25:35 PM UTC 24 Oct 12 05:25:37 PM UTC 24 293891222 ps
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