Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.63 98.23 96.05 97.44 96.61 98.42 98.21 98.46


Total test records in report: 3905
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html | tests61.html | tests62.html | tests63.html | tests64.html | tests65.html | tests66.html | tests67.html | tests68.html | tests69.html | tests70.html | tests71.html | tests72.html | tests73.html | tests74.html | tests75.html | tests76.html | tests77.html | tests78.html | tests79.html | tests80.html | tests81.html | tests82.html

T2516 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.1530433873 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:21 PM UTC 24 176428819 ps
T2517 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.1962498758 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:21 PM UTC 24 207262419 ps
T2518 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.753424398 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:21 PM UTC 24 173556576 ps
T2519 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.360986247 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:21 PM UTC 24 185102830 ps
T2520 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.3122630046 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:21 PM UTC 24 169817683 ps
T2521 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2907484610 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:21 PM UTC 24 38169132 ps
T2522 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3947569480 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 186486186 ps
T2523 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.3407570453 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 171284494 ps
T2524 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2850279905 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 159930504 ps
T2525 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3185099030 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 188116249 ps
T2526 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.3541570893 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 180620876 ps
T2527 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.3404580668 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 157894762 ps
T2528 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.3165589199 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 165252929 ps
T2529 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.3150492307 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 292570805 ps
T2530 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1180313754 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:22 PM UTC 24 230308388 ps
T2531 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2350217918 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:26 PM UTC 24 4368953037 ps
T2532 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.1103048893 Oct 12 05:08:52 PM UTC 24 Oct 12 05:09:28 PM UTC 24 25957720235 ps
T2533 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.3713577500 Oct 12 05:07:25 PM UTC 24 Oct 12 05:09:33 PM UTC 24 11862100046 ps
T2534 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3810286436 Oct 12 05:08:53 PM UTC 24 Oct 12 05:09:35 PM UTC 24 7004348398 ps
T2535 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.1238987337 Oct 12 05:09:19 PM UTC 24 Oct 12 05:09:36 PM UTC 24 2562155170 ps
T2536 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.1719814359 Oct 12 05:08:11 PM UTC 24 Oct 12 05:09:39 PM UTC 24 3747252100 ps
T2537 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.2790074542 Oct 12 05:08:53 PM UTC 24 Oct 12 05:09:42 PM UTC 24 32188964769 ps
T2538 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.4294115981 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:46 PM UTC 24 2921471597 ps
T542 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.643185654 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:36 PM UTC 24 191362248 ps
T2539 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.1363058665 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:47 PM UTC 24 33603611 ps
T2540 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.4186567438 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:47 PM UTC 24 162327862 ps
T2541 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.905273406 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:47 PM UTC 24 213339290 ps
T2542 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_enable.385058128 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:47 PM UTC 24 31369454 ps
T2543 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.1475108948 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:47 PM UTC 24 154788222 ps
T2544 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2894337174 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:48 PM UTC 24 352693465 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.1960193341 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:48 PM UTC 24 532025306 ps
T2545 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.2085592428 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:48 PM UTC 24 445416826 ps
T2546 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.885775403 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 171685122 ps
T2547 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.3785427469 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 222009092 ps
T2548 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3515891230 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 185644961 ps
T2549 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1831875965 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 174359699 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.4222352298 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 269060021 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.4280159329 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:48 PM UTC 24 503102944 ps
T2550 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.1946536216 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:48 PM UTC 24 823674081 ps
T2551 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.2553279073 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:48 PM UTC 24 851493329 ps
T2552 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.2484246030 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:49 PM UTC 24 402900595 ps
T2553 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.3360799828 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:49 PM UTC 24 794422482 ps
T2554 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.2068488395 Oct 12 05:09:20 PM UTC 24 Oct 12 05:09:53 PM UTC 24 13820870316 ps
T2555 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.641184331 Oct 12 05:09:45 PM UTC 24 Oct 12 05:09:59 PM UTC 24 1970931989 ps
T2556 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.422527153 Oct 12 05:09:46 PM UTC 24 Oct 12 05:09:59 PM UTC 24 9121729959 ps
T2557 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.919101242 Oct 12 05:09:45 PM UTC 24 Oct 12 05:10:01 PM UTC 24 11627793666 ps
T2558 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1181966817 Oct 12 05:09:45 PM UTC 24 Oct 12 05:10:09 PM UTC 24 18359472609 ps
T2559 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.962720126 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 278240237 ps
T2560 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.2173760832 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 155879040 ps
T2561 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.40796643 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:35 PM UTC 24 171639828 ps
T2562 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.2875004665 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:35 PM UTC 24 144117898 ps
T2563 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.710435690 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:13 PM UTC 24 149311534 ps
T2564 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1056260537 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:36 PM UTC 24 200582316 ps
T130 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1579284440 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 227980864 ps
T2565 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.886200833 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 195342788 ps
T2566 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2802013078 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 185376514 ps
T2567 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.2039882333 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:13 PM UTC 24 197420661 ps
T2568 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.3452596594 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:36 PM UTC 24 147311408 ps
T2569 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.174954601 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 183405380 ps
T2570 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.3148192408 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:13 PM UTC 24 182764255 ps
T2571 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1477070879 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:36 PM UTC 24 31221669 ps
T2572 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.32614247 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:13 PM UTC 24 81544031 ps
T2573 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.253349546 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:13 PM UTC 24 149047743 ps
T2574 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3403846779 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:13 PM UTC 24 203913308 ps
T2575 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.946580583 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 167904038 ps
T2576 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.3596683259 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 144561466 ps
T2577 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.2252063471 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:14 PM UTC 24 151646208 ps
T2578 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.1073173732 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 162321596 ps
T2579 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2985700991 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 192814632 ps
T2580 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.3462748612 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 169719210 ps
T2581 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.594765700 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 238989418 ps
T2582 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.3234766489 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 161852196 ps
T2583 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.3297518147 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:14 PM UTC 24 359320404 ps
T2584 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2032156512 Oct 12 05:09:45 PM UTC 24 Oct 12 05:10:17 PM UTC 24 4352392966 ps
T2585 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.663018151 Oct 12 05:09:45 PM UTC 24 Oct 12 05:10:19 PM UTC 24 25969295985 ps
T2586 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2145876349 Oct 12 05:09:46 PM UTC 24 Oct 12 05:10:21 PM UTC 24 3859259142 ps
T2587 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.970082208 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:23 PM UTC 24 8362692457 ps
T2588 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1728424924 Oct 12 05:09:45 PM UTC 24 Oct 12 05:10:27 PM UTC 24 27948084090 ps
T2589 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.3308356496 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:33 PM UTC 24 2511592570 ps
T2590 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.431559974 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:33 PM UTC 24 3132524081 ps
T2591 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3400990256 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:35 PM UTC 24 104827368 ps
T2592 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.2012529318 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:35 PM UTC 24 168200594 ps
T2593 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.706374413 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:35 PM UTC 24 162240331 ps
T2594 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3042699026 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:36 PM UTC 24 303080722 ps
T2595 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.28636988 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:36 PM UTC 24 321880944 ps
T2596 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.3048429158 Oct 12 05:09:19 PM UTC 24 Oct 12 05:10:36 PM UTC 24 3198913274 ps
T2597 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.4245517625 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:36 PM UTC 24 757687302 ps
T2598 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.3676552242 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:36 PM UTC 24 789865639 ps
T2599 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.3166775544 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:37 PM UTC 24 304916293 ps
T2600 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.2315528310 Oct 12 05:10:34 PM UTC 24 Oct 12 05:10:38 PM UTC 24 1032023465 ps
T2601 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2003441460 Oct 12 05:09:19 PM UTC 24 Oct 12 05:10:39 PM UTC 24 3309525056 ps
T2602 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.225039647 Oct 12 05:10:10 PM UTC 24 Oct 12 05:10:40 PM UTC 24 3196275990 ps
T2603 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.3666365378 Oct 12 05:09:20 PM UTC 24 Oct 12 05:10:40 PM UTC 24 3259827244 ps
T2604 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1048613075 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:45 PM UTC 24 644404733 ps
T2605 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2800081618 Oct 12 05:10:33 PM UTC 24 Oct 12 05:10:47 PM UTC 24 9516453294 ps
T2606 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.492336837 Oct 12 05:10:11 PM UTC 24 Oct 12 05:10:55 PM UTC 24 16487799799 ps
T2607 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.3135088768 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 137232386 ps
T2608 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.881671341 Oct 12 05:10:33 PM UTC 24 Oct 12 05:11:01 PM UTC 24 21229417638 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.480744993 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 432460470 ps
T2609 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2424551938 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 169441247 ps
T2610 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.131938091 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 170054312 ps
T2611 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1254301148 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 182012007 ps
T2612 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.145715666 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 148272587 ps
T2613 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.4076436221 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:01 PM UTC 24 151191148 ps
T2614 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.2155251692 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:01 PM UTC 24 186252882 ps
T2615 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3193979112 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:02 PM UTC 24 195326372 ps
T2616 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3794246960 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:02 PM UTC 24 240791498 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.2779591513 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 216222342 ps
T2617 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.2206688349 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 212681624 ps
T2618 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1543645608 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 201480702 ps
T2619 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.721086789 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 163074599 ps
T2620 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3066341220 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 33054757 ps
T2621 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.687195354 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 153664957 ps
T2622 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.2951402011 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 169250978 ps
T2623 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2307486029 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 176952312 ps
T2624 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3406924226 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 203626610 ps
T2625 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.4010796064 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 249139019 ps
T2626 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.341261124 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:02 PM UTC 24 190794450 ps
T2627 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2961275200 Oct 12 05:10:34 PM UTC 24 Oct 12 05:11:03 PM UTC 24 1389894684 ps
T2628 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.969858107 Oct 12 05:10:33 PM UTC 24 Oct 12 05:11:04 PM UTC 24 3474998367 ps
T2629 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.550800775 Oct 12 05:09:46 PM UTC 24 Oct 12 05:11:06 PM UTC 24 13722139536 ps
T2630 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.4206758036 Oct 12 05:10:33 PM UTC 24 Oct 12 05:11:06 PM UTC 24 25252345342 ps
T2631 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4190103474 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:07 PM UTC 24 3862419037 ps
T2632 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.4047922753 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:12 PM UTC 24 1801145658 ps
T2633 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3935725480 Oct 12 05:10:10 PM UTC 24 Oct 12 05:11:13 PM UTC 24 2547408237 ps
T2634 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1335147905 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:20 PM UTC 24 14095363474 ps
T2635 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2034725802 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:22 PM UTC 24 3427859782 ps
T2636 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.378254584 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 167256956 ps
T2637 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.3184994575 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 180354583 ps
T2638 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.2980211530 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 155446876 ps
T2639 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.3847534084 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 198331042 ps
T2640 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3042910082 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 185508282 ps
T2641 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1186277566 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 200769079 ps
T2642 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.1813096078 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 376882497 ps
T2643 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1756259918 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 75597313 ps
T2644 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.4086830662 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 174583442 ps
T2645 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3399893581 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:27 PM UTC 24 178627070 ps
T2646 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1682183558 Oct 12 05:11:26 PM UTC 24 Oct 12 05:11:27 PM UTC 24 40739605 ps
T2647 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.2111856413 Oct 12 05:11:26 PM UTC 24 Oct 12 05:11:28 PM UTC 24 183941843 ps
T2648 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.4215481563 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:28 PM UTC 24 666774720 ps
T2649 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1377554486 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:28 PM UTC 24 486807171 ps
T2650 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3188009756 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:28 PM UTC 24 689307407 ps
T2651 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2084095647 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:29 PM UTC 24 739364303 ps
T2652 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.3846520603 Oct 12 05:11:26 PM UTC 24 Oct 12 05:11:29 PM UTC 24 951334753 ps
T2653 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.1270757425 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:29 PM UTC 24 1376241232 ps
T2654 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.631024961 Oct 12 05:11:00 PM UTC 24 Oct 12 05:11:30 PM UTC 24 11459246966 ps
T2655 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1842918652 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:38 PM UTC 24 9252661531 ps
T2656 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3710921294 Oct 12 05:10:59 PM UTC 24 Oct 12 05:11:40 PM UTC 24 1656301092 ps
T2657 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.3045544505 Oct 12 05:10:33 PM UTC 24 Oct 12 05:11:42 PM UTC 24 38154533618 ps
T2658 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.1252256700 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:42 PM UTC 24 920315204 ps
T2659 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3230744638 Oct 12 05:11:25 PM UTC 24 Oct 12 05:11:51 PM UTC 24 19819720242 ps
T2660 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.2392852685 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 147295385 ps
T384 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.3197072558 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 186245399 ps
T2661 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.2731312448 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 200186882 ps
T2662 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3651146896 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 243767209 ps
T2663 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.1695177178 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:55 PM UTC 24 241185355 ps
T2664 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.1313237098 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:03 PM UTC 24 658495989 ps
T2665 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.2426092576 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 145273749 ps
T2666 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.1116189815 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 289114753 ps
T2667 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.248949453 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:56 PM UTC 24 289327976 ps
T414 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.719179240 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 345062549 ps
T2668 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2350932477 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:56 PM UTC 24 161171531 ps
T2669 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.86377186 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:56 PM UTC 24 188407297 ps
T2670 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2465152795 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 40102568 ps
T2671 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.26780266 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 183613780 ps
T2672 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3729623983 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 204162071 ps
T2673 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1454666143 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 155606202 ps
T2674 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4029414372 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 153888589 ps
T2675 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.3782014605 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 159128109 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.397203327 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 196372458 ps
T2676 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1874500337 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 223144384 ps
T2677 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3203311089 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 178978312 ps
T2678 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.580130627 Oct 12 05:11:53 PM UTC 24 Oct 12 05:11:56 PM UTC 24 330939204 ps
T2679 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.2152092084 Oct 12 05:11:54 PM UTC 24 Oct 12 05:11:56 PM UTC 24 149341195 ps
T2680 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.1374273591 Oct 12 05:11:25 PM UTC 24 Oct 12 05:12:01 PM UTC 24 1677167850 ps
T2681 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.650341697 Oct 12 05:11:25 PM UTC 24 Oct 12 05:12:07 PM UTC 24 31174653087 ps
T2682 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.819717458 Oct 12 05:10:59 PM UTC 24 Oct 12 05:12:08 PM UTC 24 10220453207 ps
T2683 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2805679868 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:09 PM UTC 24 10097976363 ps
T2684 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.315054860 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:09 PM UTC 24 1545164038 ps
T2685 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1859227865 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:09 PM UTC 24 2170731683 ps
T2686 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.3671952557 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 235089999 ps
T2687 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.321705763 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 201402321 ps
T352 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3072669006 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 257184931 ps
T2688 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.2967913102 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 214498854 ps
T2689 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.4211145735 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 158555675 ps
T545 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1776860022 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 248916968 ps
T2690 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.4060260408 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 164939709 ps
T2691 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.1259565398 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 146834886 ps
T2692 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1410606478 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 199857336 ps
T2693 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.30573550 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 62069515 ps
T2694 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.850285521 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:18 PM UTC 24 241435383 ps
T2695 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2735455945 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:19 PM UTC 24 189168185 ps
T2696 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1259810014 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:19 PM UTC 24 405576946 ps
T2697 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.289137572 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:19 PM UTC 24 162234658 ps
T2698 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.931103856 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:19 PM UTC 24 337883165 ps
T2699 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.4203212865 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:19 PM UTC 24 529553606 ps
T2700 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1871771873 Oct 12 05:12:17 PM UTC 24 Oct 12 05:12:19 PM UTC 24 421265659 ps
T2701 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.3627542324 Oct 12 05:12:17 PM UTC 24 Oct 12 05:12:20 PM UTC 24 1007592526 ps
T2702 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.2094458366 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:24 PM UTC 24 4219410599 ps
T2703 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.3470238703 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:25 PM UTC 24 4887390512 ps
T2704 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.3104077486 Oct 12 05:11:25 PM UTC 24 Oct 12 05:12:26 PM UTC 24 2431661606 ps
T2705 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1488669265 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:34 PM UTC 24 27349252756 ps
T2706 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2251752211 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:36 PM UTC 24 2954466632 ps
T2707 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.4186955458 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:36 PM UTC 24 14767715219 ps
T2708 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.2234955952 Oct 12 05:11:53 PM UTC 24 Oct 12 05:12:36 PM UTC 24 4827846127 ps
T2709 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2496714603 Oct 12 05:11:25 PM UTC 24 Oct 12 05:12:38 PM UTC 24 43215776798 ps
T2710 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.675172410 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:39 PM UTC 24 2427352666 ps
T2711 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1924740966 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:41 PM UTC 24 141234929 ps
T2712 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.1962706306 Oct 12 05:26:50 PM UTC 24 Oct 12 05:26:52 PM UTC 24 170212563 ps
T2713 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_enable.2318145296 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:41 PM UTC 24 62344367 ps
T548 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1055846739 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:42 PM UTC 24 189618469 ps
T2714 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.2130969132 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 164241504 ps
T2715 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.567540608 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 174102308 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1167984964 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:42 PM UTC 24 296001450 ps
T2716 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.384196136 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 163429959 ps
T2717 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2390236036 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 181020003 ps
T2718 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.4188321555 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 230975027 ps
T2719 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1824839140 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:42 PM UTC 24 154257523 ps
T2720 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.558747016 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:43 PM UTC 24 237349329 ps
T2721 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1949207329 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:43 PM UTC 24 837836727 ps
T2722 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.300162104 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:43 PM UTC 24 198281172 ps
T2723 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3183918990 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:43 PM UTC 24 262733703 ps
T2724 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.2311901402 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:43 PM UTC 24 875189248 ps
T2725 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2058931742 Oct 12 05:11:54 PM UTC 24 Oct 12 05:12:44 PM UTC 24 20127173663 ps
T2726 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1725629443 Oct 12 05:12:39 PM UTC 24 Oct 12 05:12:47 PM UTC 24 441069812 ps
T2727 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.3846956787 Oct 12 05:12:40 PM UTC 24 Oct 12 05:12:48 PM UTC 24 3833073632 ps
T2728 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.971457020 Oct 12 05:12:16 PM UTC 24 Oct 12 05:12:49 PM UTC 24 25152507852 ps
T2729 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.3038145017 Oct 12 05:10:59 PM UTC 24 Oct 12 05:12:57 PM UTC 24 4737838012 ps
T2730 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.4209207624 Oct 12 05:11:25 PM UTC 24 Oct 12 05:12:57 PM UTC 24 3820367404 ps
T2731 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.2066097597 Oct 12 05:12:17 PM UTC 24 Oct 12 05:12:58 PM UTC 24 26832155562 ps
T2732 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.3920018968 Oct 12 05:12:40 PM UTC 24 Oct 12 05:13:05 PM UTC 24 2804975199 ps
T2733 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.161774196 Oct 12 05:12:40 PM UTC 24 Oct 12 05:13:06 PM UTC 24 3929714289 ps
T2734 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2887468309 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 167156135 ps
T2735 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.421885476 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 158036915 ps
T2736 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1777082253 Oct 12 05:13:08 PM UTC 24 Oct 12 05:13:09 PM UTC 24 69198809 ps
T2737 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.521396 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:02 PM UTC 24 221847894 ps
T2738 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1670135318 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 162560131 ps
T2739 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1116021638 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 173520620 ps
T2740 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1550343657 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 151742713 ps
T2741 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.311635402 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:09 PM UTC 24 188853519 ps
T2742 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3005737903 Oct 12 05:13:08 PM UTC 24 Oct 12 05:13:10 PM UTC 24 162634505 ps
T2743 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.309751667 Oct 12 05:13:07 PM UTC 24 Oct 12 05:13:10 PM UTC 24 279185871 ps
T2744 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.127566164 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:02 PM UTC 24 154343390 ps
T2745 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.594701516 Oct 12 05:13:08 PM UTC 24 Oct 12 05:13:10 PM UTC 24 204321802 ps
T2746 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2283399769 Oct 12 05:13:08 PM UTC 24 Oct 12 05:13:10 PM UTC 24 162877333 ps
T2747 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.75096524 Oct 12 05:13:08 PM UTC 24 Oct 12 05:13:10 PM UTC 24 210175149 ps
T2748 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.4018122266 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:02 PM UTC 24 154012617 ps
T2749 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.157500312 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:02 PM UTC 24 182900058 ps
T2750 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.4121481662 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:02 PM UTC 24 296523089 ps
T2751 /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.2845407758 Oct 12 05:14:00 PM UTC 24 Oct 12 05:14:03 PM UTC 24 378556835 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%