| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.63 | 98.23 | 96.05 | 97.44 | 96.61 | 98.42 | 98.21 | 98.46 |
| T268 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.24894366 | Oct 12 03:06:56 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 98999831 ps | ||
| T249 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2638617265 | Oct 12 03:06:55 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 57000022 ps | ||
| T279 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.105107943 | Oct 12 03:06:56 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 104230795 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.805111370 | Oct 12 03:06:53 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 622018691 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.3917928346 | Oct 12 03:06:56 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 148954709 ps | ||
| T231 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.4175355232 | Oct 12 03:06:55 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 77043148 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3449678684 | Oct 12 03:06:55 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 163594601 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.701316729 | Oct 12 03:06:53 PM UTC 24 | Oct 12 03:06:58 PM UTC 24 | 459803009 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2774882799 | Oct 12 03:06:56 PM UTC 24 | Oct 12 03:06:59 PM UTC 24 | 79756569 ps | ||
| T197 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1315252870 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:06:59 PM UTC 24 | 36954609 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.579179825 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:06:59 PM UTC 24 | 65155870 ps | ||
| T232 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1938177744 | Oct 12 03:06:53 PM UTC 24 | Oct 12 03:06:59 PM UTC 24 | 1596156229 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2197618744 | Oct 12 03:06:55 PM UTC 24 | Oct 12 03:06:59 PM UTC 24 | 258384437 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2675697268 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 93568314 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1742277120 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 110768668 ps | ||
| T236 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.2973902729 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 176626060 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.745202673 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 224078472 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3299982038 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 148383849 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.890340279 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:00 PM UTC 24 | 177867630 ps | ||
| T198 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2291302978 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 46303603 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.4108421724 | Oct 12 03:06:53 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 328417894 ps | ||
| T233 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3283078788 | Oct 12 03:06:55 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 791573556 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.978299530 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 93119921 ps | ||
| T570 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.1659221253 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 366964020 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.748719734 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 326113484 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.1159416396 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 40018528 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.3688785360 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:01 PM UTC 24 | 71405741 ps | ||
| T289 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.4058520672 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 195936247 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.434084388 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 298045144 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3494777985 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 96658940 ps | ||
| T235 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.342159429 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 157084096 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.761227695 | Oct 12 03:06:57 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 482980661 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.768173596 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:02 PM UTC 24 | 196657427 ps | ||
| T237 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3029489345 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 125766525 ps | ||
| T290 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3859157979 | Oct 12 03:07:00 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 102945468 ps | ||
| T299 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3880454242 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 106613165 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.3558329116 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 53581263 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.1602493105 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 105856438 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2718939229 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 158739564 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2000920659 | Oct 12 03:06:56 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 432514657 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2314214036 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:03 PM UTC 24 | 217512017 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1426684648 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 136581269 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.122545795 | Oct 12 03:07:00 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 408727586 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.3921363003 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 41748612 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2433832142 | Oct 12 03:07:00 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 201332452 ps | ||
| T238 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3151250309 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 261003655 ps | ||
| T239 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2121311752 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 258103988 ps | ||
| T304 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.3966496832 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 37049427 ps | ||
| T571 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1016019440 | Oct 12 03:07:01 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 446733282 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.553854394 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 62228116 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.737412362 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 77474599 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2839135219 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:04 PM UTC 24 | 98865808 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1204959014 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:05 PM UTC 24 | 848364873 ps | ||
| T574 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3088120142 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:05 PM UTC 24 | 714495991 ps | ||
| T241 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4247760647 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:05 PM UTC 24 | 136520337 ps | ||
| T572 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3278793195 | Oct 12 03:06:59 PM UTC 24 | Oct 12 03:07:05 PM UTC 24 | 1971165408 ps | ||
| T240 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3695627163 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:05 PM UTC 24 | 175967254 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.642312464 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 145774607 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.251318172 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 64576419 ps | ||
| T300 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.56533324 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 48566004 ps | ||
| T305 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1717927129 | Oct 12 03:07:03 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 50700522 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2046378851 | Oct 12 03:07:03 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 71741774 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2053612913 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 222220937 ps | ||
| T575 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1515421524 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 1065905635 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2390235946 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:06 PM UTC 24 | 84349796 ps | ||
| T242 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1912287447 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 163923571 ps | ||
| T306 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2620145266 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 138845747 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.548150829 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 49531159 ps | ||
| T307 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.1800844967 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:15 PM UTC 24 | 56347166 ps | ||
| T308 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.297001233 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 99786936 ps | ||
| T580 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3629036345 | Oct 12 03:07:03 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 690738112 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1765966176 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 59511015 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2453725518 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:07 PM UTC 24 | 135545284 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.3391846308 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 147752464 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1086920856 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 181121676 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.1623836059 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 256611199 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.552137689 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 218766832 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.1020676949 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 157450294 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3882644455 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:08 PM UTC 24 | 136906297 ps | ||
| T579 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.4293809588 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 435090842 ps | ||
| T573 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2876615202 | Oct 12 03:07:02 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 908119152 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3664449814 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 47794716 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1682812915 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 52721782 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.554299162 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 82820380 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2286041791 | Oct 12 03:07:04 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 1451237258 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1719289458 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:09 PM UTC 24 | 79113874 ps | ||
| T301 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.4147722929 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 60507265 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1081321386 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 293950238 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.2623712357 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 111140082 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.598714773 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 67262511 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.544770242 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 52664530 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2178697925 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 156868282 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.309393808 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 55211429 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2296402419 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 196858810 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1515234660 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:10 PM UTC 24 | 125039282 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3664717617 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 114002657 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.157108155 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 140678325 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.341633989 | Oct 12 03:07:05 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 927297637 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.943654435 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 139896532 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1530289030 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 59957073 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3337867464 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 87674501 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1866056066 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 103728864 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.57863443 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 85261835 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.228334901 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 83615353 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.4064173890 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:11 PM UTC 24 | 103724500 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1943088972 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 91621210 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3599000244 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 351409430 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1692544770 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 113656803 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2636101963 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 143567492 ps | ||
| T576 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.3561166914 | Oct 12 03:07:08 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 1131782288 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3551476145 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 52678644 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1799130507 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:12 PM UTC 24 | 551766163 ps | ||
| T302 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1902858904 | Oct 12 03:07:10 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 100462969 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1128462925 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 45271264 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1527025424 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 532401246 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.946400664 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 64175402 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3898419211 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 161177802 ps | ||
| T578 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.2591968788 | Oct 12 03:07:07 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 729902186 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.412051815 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 73860158 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1917494481 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 160395688 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1637059526 | Oct 12 03:07:10 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 91557009 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.359526663 | Oct 12 03:07:09 PM UTC 24 | Oct 12 03:07:13 PM UTC 24 | 581188853 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2671513797 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 180250892 ps | ||
| T303 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.4066825759 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 49632699 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1858427471 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 142464148 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.880205603 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 34981974 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.4240160686 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 116226973 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2506782807 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 74592467 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3712379530 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 101623582 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2008413018 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 39234190 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1968076435 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 39566596 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.61964437 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 49591490 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2395155368 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 39339350 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2226162463 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 43660896 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2150793811 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 89202511 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.889602954 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 58949567 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1714983735 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 74682648 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2888832479 | Oct 12 03:07:12 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 37006176 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3291248933 | Oct 12 03:07:13 PM UTC 24 | Oct 12 03:07:14 PM UTC 24 | 104734292 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2184164676 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:15 PM UTC 24 | 39961729 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3133547061 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:15 PM UTC 24 | 41946602 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3875841985 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 37409522 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3700125630 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 45284541 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2967135044 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 42090455 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2973242948 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 74025841 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.823686532 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 45019318 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1525170194 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 93704852 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.932134693 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 33720196 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.93712858 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 58670541 ps | ||
| T3902 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1918438106 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 46666713 ps | ||
| T3903 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.766815961 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 54470368 ps | ||
| T3904 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.3559767703 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 59299928 ps | ||
| T3905 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.957687888 | Oct 12 03:07:14 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 35825774 ps | ||
| T577 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2302757645 | Oct 12 03:07:10 PM UTC 24 | Oct 12 03:07:16 PM UTC 24 | 842008844 ps | ||
| T245 | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2758903186 | Oct 12 03:07:11 PM UTC 24 | Oct 12 03:07:17 PM UTC 24 | 1476856517 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.164227865 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 716774949 ps |
| CPU time | 3.67 seconds |
| Started | Oct 12 04:35:44 PM UTC 24 |
| Finished | Oct 12 04:35:48 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=164227865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.164227865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2149301851 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 40875441640 ps |
| CPU time | 131.08 seconds |
| Started | Oct 12 04:35:44 PM UTC 24 |
| Finished | Oct 12 04:37:57 PM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149301851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2149301851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3224015642 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 14611478027 ps |
| CPU time | 37.52 seconds |
| Started | Oct 12 04:35:01 PM UTC 24 |
| Finished | Oct 12 04:35:40 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224015642 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.3224015642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3880454242 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 106613165 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880454242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3880454242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2890457020 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 28663585628 ps |
| CPU time | 78.97 seconds |
| Started | Oct 12 04:35:11 PM UTC 24 |
| Finished | Oct 12 04:36:32 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890457020 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.2890457020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.267686052 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 4478421313 ps |
| CPU time | 46.81 seconds |
| Started | Oct 12 04:39:34 PM UTC 24 |
| Finished | Oct 12 04:40:22 PM UTC 24 |
| Peak memory | 236040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267686052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.267686052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4144329440 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 98149300 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:56 PM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144329440 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.4144329440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3152641228 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 1264709274 ps |
| CPU time | 3.61 seconds |
| Started | Oct 12 04:38:53 PM UTC 24 |
| Finished | Oct 12 04:38:58 PM UTC 24 |
| Peak memory | 253316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152641228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.3152641228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3502954866 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 6670559198 ps |
| CPU time | 39.26 seconds |
| Started | Oct 12 04:38:17 PM UTC 24 |
| Finished | Oct 12 04:38:58 PM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502954866 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3502954866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.1369962544 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 43800856 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369962544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.1369962544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2359146156 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 314545156 ps |
| CPU time | 2.09 seconds |
| Started | Oct 12 04:38:09 PM UTC 24 |
| Finished | Oct 12 04:38:12 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359146156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2359146156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.3808162057 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 10881394171 ps |
| CPU time | 32.05 seconds |
| Started | Oct 12 04:39:31 PM UTC 24 |
| Finished | Oct 12 04:40:04 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808162057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.3808162057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.2834794298 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 525792720 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2834794298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.2834794298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2471183778 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 70634992 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:38:11 PM UTC 24 |
| Finished | Oct 12 04:38:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471183778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2471183778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.3315130853 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 184903859 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:35:54 PM UTC 24 |
| Finished | Oct 12 04:35:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315130853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.3315130853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.2785254006 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 10806405564 ps |
| CPU time | 69.74 seconds |
| Started | Oct 12 04:38:51 PM UTC 24 |
| Finished | Oct 12 04:40:02 PM UTC 24 |
| Peak memory | 235756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785254006 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.2785254006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.2885518538 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 41631720603 ps |
| CPU time | 86.63 seconds |
| Started | Oct 12 04:42:57 PM UTC 24 |
| Finished | Oct 12 04:44:25 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885518538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.2885518538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.1221627190 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 20213631427 ps |
| CPU time | 41.59 seconds |
| Started | Oct 12 04:38:19 PM UTC 24 |
| Finished | Oct 12 04:39:03 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221627190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.1221627190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.854138931 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 459427162 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=854138931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_t x_rx_disruption.854138931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.1533152790 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 15632983691 ps |
| CPU time | 17.66 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533152790 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.1533152790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3278793195 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 1971165408 ps |
| CPU time | 5.37 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:05 PM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278793195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3278793195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.3803521921 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 501094398 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3803521921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.3803521921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.4203375683 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 526152466 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4203375683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.4203375683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3351522301 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 122061115 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351522301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3351522301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2885621643 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 31915880357 ps |
| CPU time | 71.29 seconds |
| Started | Oct 12 04:39:04 PM UTC 24 |
| Finished | Oct 12 04:40:17 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885621643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2885621643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.56533324 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 48566004 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56533324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.56533324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.3254968841 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 674560482 ps |
| CPU time | 2.32 seconds |
| Started | Oct 12 04:44:42 PM UTC 24 |
| Finished | Oct 12 04:44:46 PM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254968841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.3254968841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.1356244393 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 268948009 ps |
| CPU time | 1.97 seconds |
| Started | Oct 12 04:38:26 PM UTC 24 |
| Finished | Oct 12 04:38:29 PM UTC 24 |
| Peak memory | 216244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356244393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.1356244393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.1273027446 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 240796336 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:38:04 PM UTC 24 |
| Finished | Oct 12 04:38:07 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273027446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.1273027446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3029489345 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 125766525 ps |
| CPU time | 2.67 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 234776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029489345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.3029489345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.575521866 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 492138623 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=575521866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.575521866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.1112423076 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 629916368 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112423076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.1112423076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.3725907623 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 158431396 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:35:39 PM UTC 24 |
| Finished | Oct 12 04:35:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725907623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.3725907623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.453130729 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 687900667 ps |
| CPU time | 3.22 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:51 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=453130729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.453130729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.4157662636 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 862021498 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157662636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.4157662636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.1013888618 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 608010682 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013888618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.1013888618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.29300824 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 159781146 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:38:26 PM UTC 24 |
| Finished | Oct 12 04:38:28 PM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29300824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_rx_crc_err.29300824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.3680777435 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 33567397897 ps |
| CPU time | 103.92 seconds |
| Started | Oct 12 04:41:15 PM UTC 24 |
| Finished | Oct 12 04:43:02 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680777435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.3680777435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3057771582 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 519939154 ps |
| CPU time | 2.56 seconds |
| Started | Oct 12 04:37:02 PM UTC 24 |
| Finished | Oct 12 04:37:05 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057771582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3057771582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.3543444263 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 599248972 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543444263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.3543444263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.3825933084 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 37138515103 ps |
| CPU time | 86.95 seconds |
| Started | Oct 12 04:47:11 PM UTC 24 |
| Finished | Oct 12 04:48:40 PM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825933084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.3825933084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1315252870 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 36954609 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:06:59 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315252870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.1315252870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4082122257 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 558796097 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082122257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.4082122257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.1216777893 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 723109696 ps |
| CPU time | 2.32 seconds |
| Started | Oct 12 04:53:36 PM UTC 24 |
| Finished | Oct 12 04:53:39 PM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216777893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.1216777893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.3429289698 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 742518952 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:17:52 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429289698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.3429289698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.660197930 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 580611486 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=660197930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.660197930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1225491700 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 257520367 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 04:47:29 PM UTC 24 |
| Finished | Oct 12 04:47:32 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225491700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1225491700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.1653422121 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 708247419 ps |
| CPU time | 2.03 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653422121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.1653422121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.1553161770 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 358457529 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553161770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.1553161770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.480744993 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 432460470 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480744993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.480744993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1255800433 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 5339953180 ps |
| CPU time | 16.52 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:11 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255800433 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.1255800433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.2070272999 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 3393577634 ps |
| CPU time | 132.6 seconds |
| Started | Oct 12 04:37:43 PM UTC 24 |
| Finished | Oct 12 04:39:58 PM UTC 24 |
| Peak memory | 235748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070272999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.2070272999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3254689267 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 769868140 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254689267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.3254689267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1932477988 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 263120736 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:38:00 PM UTC 24 |
| Finished | Oct 12 04:38:03 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932477988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.1932477988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.565055406 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 43171308 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:38:55 PM UTC 24 |
| Finished | Oct 12 04:38:57 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565055406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.565055406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3429126116 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 400666239 ps |
| CPU time | 2.41 seconds |
| Started | Oct 12 04:38:30 PM UTC 24 |
| Finished | Oct 12 04:38:33 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429126116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.3429126116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.4102433380 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 5715888528 ps |
| CPU time | 146.69 seconds |
| Started | Oct 12 04:44:18 PM UTC 24 |
| Finished | Oct 12 04:46:47 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102433380 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.4102433380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2286041791 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 1451237258 ps |
| CPU time | 4.79 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 217740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286041791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2286041791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.2401897489 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 155689134 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:38:13 PM UTC 24 |
| Finished | Oct 12 04:38:15 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401897489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.2401897489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2640784253 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 119189910381 ps |
| CPU time | 205.76 seconds |
| Started | Oct 12 04:39:15 PM UTC 24 |
| Finished | Oct 12 04:42:44 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640784253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2640784253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.4090368363 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 630426567 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090368363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.4090368363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.2921296753 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 634549042 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921296753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.2921296753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.929987564 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 595471846 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=929987564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.929987564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.567223621 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 31473816824 ps |
| CPU time | 47.52 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:59:13 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567223621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.567223621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.4081975843 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 1289785633 ps |
| CPU time | 3.83 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:43 PM UTC 24 |
| Peak memory | 218828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081975843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.4081975843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.4280159329 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 503102944 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280159329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.4280159329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.721406471 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 32562515402 ps |
| CPU time | 60.43 seconds |
| Started | Oct 12 04:44:32 PM UTC 24 |
| Finished | Oct 12 04:45:35 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721406471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_device_address.721406471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.462886730 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 745973541 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462886730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.462886730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.328607999 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 524391881 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=328607999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.328607999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3599000244 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 351409430 ps |
| CPU time | 3.26 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 234004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599000244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3599000244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.2182366523 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 635412607 ps |
| CPU time | 3.1 seconds |
| Started | Oct 12 04:47:00 PM UTC 24 |
| Finished | Oct 12 04:47:04 PM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2182366523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.2182366523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2758903186 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 1476856517 ps |
| CPU time | 4.92 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:17 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758903186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.2758903186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.1175540893 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 167072796 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:35:39 PM UTC 24 |
| Finished | Oct 12 04:35:42 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175540893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.1175540893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.4147722929 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 60507265 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147722929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.4147722929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2656789344 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 352152778 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656789344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2656789344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.1374670319 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 482448710 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374670319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.1374670319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.1716403932 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 489700450 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:54:16 PM UTC 24 |
| Finished | Oct 12 04:54:19 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716403932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1716403932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.485296359 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 100389174952 ps |
| CPU time | 254.87 seconds |
| Started | Oct 12 04:43:09 PM UTC 24 |
| Finished | Oct 12 04:47:27 PM UTC 24 |
| Peak memory | 220520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=485296359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_hiclk_max.485296359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.4087942904 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 311290469 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:33 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087942904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.4087942904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.401789009 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 461196507 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401789009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.401789009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.3178366481 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 144097332 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:54:16 PM UTC 24 |
| Finished | Oct 12 04:54:19 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178366481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.3178366481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.4034833883 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 32475565 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:55 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034833883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.4034833883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.1499494091 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 20597923463 ps |
| CPU time | 100.97 seconds |
| Started | Oct 12 04:38:11 PM UTC 24 |
| Finished | Oct 12 04:39:54 PM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499494091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.1499494091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.3561166914 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 1131782288 ps |
| CPU time | 3.44 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561166914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.3561166914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.2444327771 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 247403170 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:36:10 PM UTC 24 |
| Finished | Oct 12 04:36:14 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444327771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.2444327771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.3599628027 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 170755923 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:36:14 PM UTC 24 |
| Finished | Oct 12 04:36:17 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599628027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.3599628027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.2738811856 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 3880378148 ps |
| CPU time | 41.04 seconds |
| Started | Oct 12 04:37:06 PM UTC 24 |
| Finished | Oct 12 04:37:49 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738811856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.2738811856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.852836207 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 177347816 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:38:34 PM UTC 24 |
| Finished | Oct 12 04:38:37 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852836207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_setup_trans_ignored.852836207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.57183577 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 197727178 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:38:38 PM UTC 24 |
| Finished | Oct 12 04:38:41 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57183577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.57183577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.4114008742 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 274418083 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 04:39:13 PM UTC 24 |
| Finished | Oct 12 04:39:16 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114008742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.4114008742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.86255795 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 5846877866 ps |
| CPU time | 34.66 seconds |
| Started | Oct 12 04:40:12 PM UTC 24 |
| Finished | Oct 12 04:40:48 PM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=86255795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bu s_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.86255795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.3016341413 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 259058756 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:50:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016341413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.3016341413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.4280161080 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 238311511 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280161080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.4280161080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3147180763 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 337612893 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147180763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3147180763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.2523091626 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 149929178 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523091626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.2523091626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.313661353 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 283905759 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=313661353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 105.usbdev_fifo_levels.313661353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.240482337 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 263843260 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240482337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 106.usbdev_fifo_levels.240482337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.2094954725 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 278212692 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094954725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.2094954725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.3110443453 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 248010072 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110443453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.3110443453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.1248937677 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 48708196348 ps |
| CPU time | 89.1 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:52:53 PM UTC 24 |
| Peak memory | 219300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248937677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1248937677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2902184218 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 363501312 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902184218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2902184218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3351487674 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 255221334 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351487674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3351487674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.4214249134 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 306699003 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214249134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.4214249134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3785374371 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 260879424 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785374371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.3785374371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.2288536379 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 255721375 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288536379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.2288536379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2580248607 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 272912726 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580248607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.2580248607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.2704877738 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 269282089 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704877738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.2704877738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.3981665039 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 445351293 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981665039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.3981665039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.524505372 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 297248535 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=524505372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 118.usbdev_fifo_levels.524505372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.34536226 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 150143432 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=34536226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 119.usbdev_fifo_levels.34536226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.703858260 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 285650262 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703858260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 120.usbdev_fifo_levels.703858260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.3884612907 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 255255752 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884612907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.3884612907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.1266709863 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 248034350 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266709863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.1266709863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3700497977 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 382425319 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700497977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3700497977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.2372458952 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 147247740 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372458952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.2372458952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3905895453 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 263735103 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905895453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.3905895453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.1685891505 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 277246109 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685891505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.1685891505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.1038629450 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 269627818 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038629450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.1038629450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.3847937455 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 266805766 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 04:53:36 PM UTC 24 |
| Finished | Oct 12 04:53:39 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847937455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.3847937455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.960091564 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 263224630 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960091564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 141.usbdev_fifo_levels.960091564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.819428605 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 353049889 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819428605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.819428605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.302091396 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 311489792 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302091396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 143.usbdev_fifo_levels.302091396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.1458057735 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 483922311 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458057735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.1458057735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.1252818111 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 340689672 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252818111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.1252818111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.3092791005 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 167453725 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092791005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.3092791005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.4179026337 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 276662774 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179026337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.4179026337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.622352956 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 292861094 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622352956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.622352956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.1048054104 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 408280421 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048054104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1048054104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.961082951 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 298584597 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961082951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.961082951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.2612723966 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 670105323 ps |
| CPU time | 2.47 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:52 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612723966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.2612723966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1969766686 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 276485759 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969766686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1969766686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1586698553 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 308425277 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586698553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1586698553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.1874747542 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 491257050 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874747542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.1874747542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.2953017921 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 245049793 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 04:40:56 PM UTC 24 |
| Finished | Oct 12 04:40:59 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953017921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.2953017921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.2673740928 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 426737169 ps |
| CPU time | 2.01 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:12 PM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673740928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.2673740928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3364849832 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 260363388 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364849832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3364849832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.4222352298 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 269060021 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222352298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.4222352298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.1783659192 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 472813960 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783659192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.1783659192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.3234089496 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 457929792 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234089496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.3234089496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.3269897155 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 148472051 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:38:09 PM UTC 24 |
| Finished | Oct 12 04:38:11 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269897155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.3269897155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.1419348229 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 13926764062 ps |
| CPU time | 22.79 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:51:04 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419348229 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.1419348229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1809117135 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 136752857 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:40:37 PM UTC 24 |
| Finished | Oct 12 04:40:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809117135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.1809117135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.173244687 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 195484458 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:35:35 PM UTC 24 |
| Finished | Oct 12 04:35:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173244687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_av_empty.173244687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1463200805 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 5554135223 ps |
| CPU time | 53.59 seconds |
| Started | Oct 12 04:35:46 PM UTC 24 |
| Finished | Oct 12 04:36:41 PM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463200805 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.1463200805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3343400572 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 4178332410 ps |
| CPU time | 20.5 seconds |
| Started | Oct 12 04:36:37 PM UTC 24 |
| Finished | Oct 12 04:36:59 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343400572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.3343400572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.95151434 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 165898138 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:37:02 PM UTC 24 |
| Finished | Oct 12 04:37:04 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=95151434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_link_reset.95151434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.3299161277 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 164244385 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:38:30 PM UTC 24 |
| Finished | Oct 12 04:38:32 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299161277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.3299161277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2226530163 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 154227050 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:40:34 PM UTC 24 |
| Finished | Oct 12 04:40:37 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226530163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.2226530163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.4275272499 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 221600426 ps |
| CPU time | 2.53 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:57 PM UTC 24 |
| Peak memory | 227848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275272499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.4275272499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.3665877732 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 13346820874 ps |
| CPU time | 142.25 seconds |
| Started | Oct 12 04:36:58 PM UTC 24 |
| Finished | Oct 12 04:39:23 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665877732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.3665877732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2919158933 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 175456600 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:40:00 PM UTC 24 |
| Finished | Oct 12 04:40:03 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919158933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.2919158933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.1023627842 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 576692569 ps |
| CPU time | 2.87 seconds |
| Started | Oct 12 04:40:26 PM UTC 24 |
| Finished | Oct 12 04:40:30 PM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1023627842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.1023627842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.2403483341 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 209560357 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:05 PM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403483341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.2403483341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.2446227783 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 188919595 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446227783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.2446227783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1105024105 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 190420177 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 04:52:24 PM UTC 24 |
| Finished | Oct 12 04:52:26 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105024105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1105024105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.4051803878 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 219765033 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051803878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.4051803878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.1530512869 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 243999711 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530512869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.1530512869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.957184803 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 232037398 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957184803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_nak_trans.957184803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.2680980543 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 225564701 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680980543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.2680980543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.424540279 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 222737397 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:40 PM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424540279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_nak_trans.424540279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.2343825316 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 207144188 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:43:44 PM UTC 24 |
| Finished | Oct 12 04:43:47 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343825316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.2343825316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1998531537 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 587707060 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1998531537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.1998531537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.1264768272 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 244144925 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:56 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264768272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.1264768272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.4108421724 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 328417894 ps |
| CPU time | 6.75 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108421724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.4108421724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.2522238796 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 175941364 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522238796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.2522238796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3299370051 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 45541689 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 03:06:51 PM UTC 24 |
| Finished | Oct 12 03:06:53 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299370051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3299370051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.93820589 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 113767736 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93820589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs /coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.93820589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.805111370 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 622018691 ps |
| CPU time | 4.22 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=805111370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.805111370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3403647121 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 92688123 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403647121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.3403647121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3324403371 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 67597466 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 03:06:51 PM UTC 24 |
| Finished | Oct 12 03:06:53 PM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324403371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.3324403371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3587546444 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 583244602 ps |
| CPU time | 2.92 seconds |
| Started | Oct 12 03:06:51 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 217624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587546444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.3587546444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3449678684 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 163594601 ps |
| CPU time | 2.06 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449678684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3449678684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.701316729 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 459803009 ps |
| CPU time | 3.89 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701316729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.701316729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3799932230 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 53158423 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:55 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799932230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3799932230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2638617265 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 57000022 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 226904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638617265 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.2638617265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.2948442065 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 156325215 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:56 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948442065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.2948442065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.2145461638 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 203434747 ps |
| CPU time | 2.35 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:57 PM UTC 24 |
| Peak memory | 227848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145461638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.2145461638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.537796270 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 262331174 ps |
| CPU time | 2.82 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:57 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537796270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.537796270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.90902779 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 120314070 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90902779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.90902779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1938177744 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 1596156229 ps |
| CPU time | 4.72 seconds |
| Started | Oct 12 03:06:53 PM UTC 24 |
| Finished | Oct 12 03:06:59 PM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938177744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.1938177744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2453725518 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 135545284 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 226900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453725518 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.2453725518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1802405695 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 84476665 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802405695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.1802405695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1086920856 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 181121676 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086920856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1086920856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1912287447 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 163923571 ps |
| CPU time | 1.96 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912287447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.1912287447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3882644455 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 136906297 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 227976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882644455 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.3882644455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.548150829 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 49531159 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=548150829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.548150829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2620145266 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 138845747 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620145266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.2620145266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.1623836059 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 256611199 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623836059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.1623836059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1765966176 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 59511015 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765966176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.1765966176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.341633989 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 927297637 ps |
| CPU time | 4.63 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=341633989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.341633989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.1020676949 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 157450294 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020676949 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.1020676949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.3391846308 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 147752464 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391846308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.3391846308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.297001233 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 99786936 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297001233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.297001233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.552137689 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 218766832 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:08 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552137689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.552137689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1081321386 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 293950238 ps |
| CPU time | 3.48 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 227852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081321386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1081321386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.4293809588 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 435090842 ps |
| CPU time | 2.5 seconds |
| Started | Oct 12 03:07:05 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293809588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.4293809588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.2623712357 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 111140082 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 227012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623712357 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.2623712357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1719289458 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 79113874 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719289458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1719289458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3664449814 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 47794716 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664449814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3664449814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.554299162 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 82820380 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554299162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.554299162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2296402419 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 196858810 ps |
| CPU time | 2.3 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 234516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296402419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2296402419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1799130507 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 551766163 ps |
| CPU time | 4.05 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799130507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.1799130507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.157108155 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 140678325 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157108155 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.157108155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.598714773 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 67262511 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=598714773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.598714773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1682812915 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 52721782 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682812915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1682812915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2178697925 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 156868282 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178697925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.2178697925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.2591968788 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 729902186 ps |
| CPU time | 4.41 seconds |
| Started | Oct 12 03:07:07 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591968788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.2591968788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.309393808 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 55211429 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 227016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309393808 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.309393808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.544770242 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 52664530 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=544770242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.544770242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1515234660 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 125039282 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:10 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515234660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1515234660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3664717617 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 114002657 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664717617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3664717617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.228334901 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 83615353 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=228334901 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.228334901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3337867464 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 87674501 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337867464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.3337867464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1530289030 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 59957073 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530289030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.1530289030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.4064173890 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 103724500 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064173890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.4064173890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.943654435 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 139896532 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 03:07:08 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943654435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.943654435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.359526663 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 581188853 ps |
| CPU time | 3.28 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=359526663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.359526663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1943088972 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 91621210 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 226900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943088972 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.1943088972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.57863443 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 85261835 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=57863443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_ reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.57863443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1866056066 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 103728864 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:11 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866056066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.1866056066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1692544770 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 113656803 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692544770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1692544770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2636101963 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 143567492 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636101963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2636101963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1527025424 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 532401246 ps |
| CPU time | 2.6 seconds |
| Started | Oct 12 03:07:09 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527025424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.1527025424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3898419211 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 161177802 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 226900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898419211 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.3898419211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3551476145 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 52678644 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:12 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551476145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.3551476145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1902858904 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 100462969 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 03:07:10 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1902858904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1902858904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1917494481 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 160395688 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917494481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1917494481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1637059526 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 91557009 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 03:07:10 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 227012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637059526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.1637059526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2302757645 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 842008844 ps |
| CPU time | 4.51 seconds |
| Started | Oct 12 03:07:10 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302757645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2302757645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1858427471 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 142464148 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 231016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858427471 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.1858427471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1128462925 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 45271264 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128462925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1128462925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.946400664 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 64175402 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=946400664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.946400664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.412051815 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 73860158 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:13 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412051815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.412051815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2671513797 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 180250892 ps |
| CPU time | 1.92 seconds |
| Started | Oct 12 03:07:11 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671513797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2671513797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2774882799 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 79756569 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:06:59 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774882799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2774882799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2000920659 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 432514657 ps |
| CPU time | 6.56 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000920659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.2000920659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3430229904 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 139068245 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430229904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.3430229904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.745202673 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 224078472 ps |
| CPU time | 2.31 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 227916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745202673 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.745202673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.24894366 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 98999831 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24894366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_ reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.24894366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1890150268 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 47442671 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:57 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890150268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1890150268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.3917928346 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 148954709 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 226948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917928346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.3917928346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2197618744 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 258384437 ps |
| CPU time | 2.69 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:59 PM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197618744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.2197618744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.105107943 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 104230795 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 03:06:56 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=105107943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.105107943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.4175355232 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 77043148 ps |
| CPU time | 1.98 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:06:58 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175355232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.4175355232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3283078788 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 791573556 ps |
| CPU time | 4.54 seconds |
| Started | Oct 12 03:06:55 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283078788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3283078788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.3712379530 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 101623582 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712379530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.3712379530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.4066825759 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 49632699 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066825759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.4066825759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.4240160686 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 116226973 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240160686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.4240160686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2506782807 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 74592467 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506782807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.2506782807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.880205603 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 34981974 ps |
| CPU time | 0.68 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=880205603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.880205603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2008413018 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 39234190 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008413018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.2008413018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.61964437 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 49591490 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61964437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.61964437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2226162463 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 43660896 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226162463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.2226162463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.889602954 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 58949567 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=889602954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.889602954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2150793811 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 89202511 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150793811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.2150793811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.434084388 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 298045144 ps |
| CPU time | 3.4 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434084388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.434084388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.761227695 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 482980661 ps |
| CPU time | 3.97 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=761227695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.761227695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2675697268 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 93568314 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675697268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.2675697268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1742277120 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 110768668 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742277120 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.1742277120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.579179825 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 65155870 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:06:59 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579179825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.579179825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.890340279 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 177867630 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=890340279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.890340279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.748719734 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 326113484 ps |
| CPU time | 3.05 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748719734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.748719734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3299982038 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 148383849 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299982038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3299982038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.2973902729 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 176626060 ps |
| CPU time | 2.01 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:00 PM UTC 24 |
| Peak memory | 217744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973902729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.2973902729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.1659221253 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 366964020 ps |
| CPU time | 3.05 seconds |
| Started | Oct 12 03:06:57 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 217536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659221253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.1659221253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1968076435 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 39566596 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968076435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.1968076435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2888832479 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 37006176 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888832479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.2888832479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2395155368 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 39339350 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395155368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2395155368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1714983735 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 74682648 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 03:07:12 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714983735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1714983735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.3291248933 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 104734292 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 03:07:13 PM UTC 24 |
| Finished | Oct 12 03:07:14 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291248933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.3291248933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2184164676 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 39961729 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:15 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184164676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.2184164676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3133547061 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 41946602 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:15 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133547061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.3133547061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.1800844967 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 56347166 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:15 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800844967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.1800844967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2973242948 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 74025841 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973242948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.2973242948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3875841985 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 37409522 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875841985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.3875841985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.768173596 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 196657427 ps |
| CPU time | 2.2 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 217672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768173596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.768173596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1204959014 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 848364873 ps |
| CPU time | 4.58 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:05 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204959014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1204959014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.978299530 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 93119921 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978299530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.978299530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.342159429 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 157084096 ps |
| CPU time | 1.88 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 227016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342159429 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.342159429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.3688785360 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 71405741 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688785360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.3688785360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2291302978 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 46303603 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291302978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2291302978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3494777985 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 96658940 ps |
| CPU time | 2.21 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 227732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494777985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3494777985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.1602493105 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 105856438 ps |
| CPU time | 2.69 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602493105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.1602493105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.4058520672 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 195936247 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:02 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4058520672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.4058520672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1525170194 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 93704852 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525170194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.1525170194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3700125630 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 45284541 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700125630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3700125630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.93712858 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 58670541 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93712858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.93712858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.823686532 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 45019318 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=823686532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.823686532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.3559767703 |
| Short name | T3904 |
| Test name | |
| Test status | |
| Simulation time | 59299928 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559767703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.3559767703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2967135044 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 42090455 ps |
| CPU time | 0.71 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967135044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.2967135044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1918438106 |
| Short name | T3902 |
| Test name | |
| Test status | |
| Simulation time | 46666713 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918438106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.1918438106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.932134693 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 33720196 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932134693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.932134693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.766815961 |
| Short name | T3903 |
| Test name | |
| Test status | |
| Simulation time | 54470368 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766815961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.766815961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.957687888 |
| Short name | T3905 |
| Test name | |
| Test status | |
| Simulation time | 35825774 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 03:07:14 PM UTC 24 |
| Finished | Oct 12 03:07:16 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=957687888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.957687888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2433832142 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 201332452 ps |
| CPU time | 2.4 seconds |
| Started | Oct 12 03:07:00 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 227848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433832142 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.2433832142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3859157979 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 102945468 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 03:07:00 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859157979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.3859157979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.1159416396 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 40018528 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:01 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159416396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.1159416396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.122545795 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 408727586 ps |
| CPU time | 2.3 seconds |
| Started | Oct 12 03:07:00 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 217556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122545795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.122545795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2121311752 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 258103988 ps |
| CPU time | 3.61 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 234000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121311752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.2121311752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3088120142 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 714495991 ps |
| CPU time | 4.48 seconds |
| Started | Oct 12 03:06:59 PM UTC 24 |
| Finished | Oct 12 03:07:05 PM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088120142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.3088120142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1426684648 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 136581269 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426684648 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.1426684648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.3558329116 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 53581263 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558329116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.3558329116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2314214036 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 217512017 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:03 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314214036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2314214036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3151250309 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 261003655 ps |
| CPU time | 2.39 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 231904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151250309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.3151250309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1016019440 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 446733282 ps |
| CPU time | 2.56 seconds |
| Started | Oct 12 03:07:01 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016019440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1016019440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.553854394 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 62228116 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=553854394 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.553854394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2718939229 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 158739564 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718939229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2718939229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.3921363003 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 41748612 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921363003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.3921363003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2839135219 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 98865808 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839135219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2839135219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4247760647 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 136520337 ps |
| CPU time | 2.31 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:05 PM UTC 24 |
| Peak memory | 217632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247760647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.4247760647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1515421524 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 1065905635 ps |
| CPU time | 3.44 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515421524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.1515421524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2046378851 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 71741774 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 03:07:03 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 226968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046378851 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.2046378851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.737412362 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 77474599 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737412362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.737412362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.3966496832 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 37049427 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:04 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966496832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.3966496832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.642312464 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 145774607 ps |
| CPU time | 2.25 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 217668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=642312464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.642312464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3695627163 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 175967254 ps |
| CPU time | 2.18 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:05 PM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695627163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.3695627163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2876615202 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 908119152 ps |
| CPU time | 5.44 seconds |
| Started | Oct 12 03:07:02 PM UTC 24 |
| Finished | Oct 12 03:07:09 PM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876615202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2876615202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2390235946 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 84349796 ps |
| CPU time | 1.9 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390235946 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2390235946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.251318172 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 64576419 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=251318172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.251318172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1717927129 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 50700522 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 03:07:03 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717927129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.1717927129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2053612913 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 222220937 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 03:07:04 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053612913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2053612913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.936508294 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 146243056 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 03:07:03 PM UTC 24 |
| Finished | Oct 12 03:07:06 PM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936508294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.936508294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3629036345 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 690738112 ps |
| CPU time | 2.87 seconds |
| Started | Oct 12 03:07:03 PM UTC 24 |
| Finished | Oct 12 03:07:07 PM UTC 24 |
| Peak memory | 217544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629036345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.3629036345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1391048291 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 4167340502 ps |
| CPU time | 6.43 seconds |
| Started | Oct 12 04:34:53 PM UTC 24 |
| Finished | Oct 12 04:35:00 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391048291 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.1391048291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.1439042536 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 184147517 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:35:35 PM UTC 24 |
| Finished | Oct 12 04:35:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439042536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.1439042536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.3635407965 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 188984410 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:35:41 PM UTC 24 |
| Finished | Oct 12 04:35:44 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635407965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.3635407965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3676849890 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 364544502 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:35:54 PM UTC 24 |
| Finished | Oct 12 04:35:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676849890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.3676849890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.3272940586 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 5151458163 ps |
| CPU time | 172.71 seconds |
| Started | Oct 12 04:35:58 PM UTC 24 |
| Finished | Oct 12 04:38:54 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272940586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.3272940586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_enable.856808140 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 54213374 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:35:58 PM UTC 24 |
| Finished | Oct 12 04:36:00 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856808140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_enable.856808140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.2297960646 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 994042479 ps |
| CPU time | 5.26 seconds |
| Started | Oct 12 04:36:02 PM UTC 24 |
| Finished | Oct 12 04:36:09 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297960646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.2297960646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.4117104090 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 415724025 ps |
| CPU time | 4.05 seconds |
| Started | Oct 12 04:36:18 PM UTC 24 |
| Finished | Oct 12 04:36:24 PM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117104090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.4117104090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3473722596 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 90180355319 ps |
| CPU time | 168.77 seconds |
| Started | Oct 12 04:36:25 PM UTC 24 |
| Finished | Oct 12 04:39:16 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473722596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3473722596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1484203177 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 97328926705 ps |
| CPU time | 179.29 seconds |
| Started | Oct 12 04:36:29 PM UTC 24 |
| Finished | Oct 12 04:39:31 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1484203177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1484203177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1366000103 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 118102001283 ps |
| CPU time | 327.01 seconds |
| Started | Oct 12 04:36:29 PM UTC 24 |
| Finished | Oct 12 04:42:00 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366000103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1366000103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.725511051 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 101174403173 ps |
| CPU time | 182.88 seconds |
| Started | Oct 12 04:36:33 PM UTC 24 |
| Finished | Oct 12 04:39:39 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=725511051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.725511051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.602729776 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 102194921540 ps |
| CPU time | 193.48 seconds |
| Started | Oct 12 04:36:35 PM UTC 24 |
| Finished | Oct 12 04:39:51 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602729776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.602729776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.2332424636 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 264430207 ps |
| CPU time | 1.98 seconds |
| Started | Oct 12 04:36:49 PM UTC 24 |
| Finished | Oct 12 04:36:52 PM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332424636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.2332424636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.788469654 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 143372503 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:36:53 PM UTC 24 |
| Finished | Oct 12 04:36:56 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788469654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_stall.788469654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.3529371131 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 197449272 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:36:57 PM UTC 24 |
| Finished | Oct 12 04:37:00 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529371131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.3529371131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.743632992 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 514806721 ps |
| CPU time | 2.78 seconds |
| Started | Oct 12 04:36:43 PM UTC 24 |
| Finished | Oct 12 04:36:47 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743632992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.743632992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.872545265 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 3121456972 ps |
| CPU time | 42.92 seconds |
| Started | Oct 12 04:36:49 PM UTC 24 |
| Finished | Oct 12 04:37:34 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872545265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.872545265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.1143012418 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 170653024 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:37:00 PM UTC 24 |
| Finished | Oct 12 04:37:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143012418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.1143012418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3364003107 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 27123267177 ps |
| CPU time | 55.69 seconds |
| Started | Oct 12 04:37:04 PM UTC 24 |
| Finished | Oct 12 04:38:01 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364003107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3364003107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.1520701151 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 3358103628 ps |
| CPU time | 13.76 seconds |
| Started | Oct 12 04:37:06 PM UTC 24 |
| Finished | Oct 12 04:37:21 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520701151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.1520701151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1716099107 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 1948740939 ps |
| CPU time | 59.45 seconds |
| Started | Oct 12 04:37:22 PM UTC 24 |
| Finished | Oct 12 04:38:23 PM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716099107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1716099107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.4106542703 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 232298647 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:37:34 PM UTC 24 |
| Finished | Oct 12 04:37:37 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106542703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.4106542703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.4220037430 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 202868940 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:37:38 PM UTC 24 |
| Finished | Oct 12 04:37:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220037430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.4220037430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.2063310560 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 3092513223 ps |
| CPU time | 41.73 seconds |
| Started | Oct 12 04:37:41 PM UTC 24 |
| Finished | Oct 12 04:38:24 PM UTC 24 |
| Peak memory | 235892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063310560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.2063310560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1984453094 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 1935807195 ps |
| CPU time | 66.61 seconds |
| Started | Oct 12 04:37:51 PM UTC 24 |
| Finished | Oct 12 04:38:59 PM UTC 24 |
| Peak memory | 229488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984453094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1984453094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.1340127929 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 173900621 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:37:51 PM UTC 24 |
| Finished | Oct 12 04:37:53 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340127929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.1340127929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.598467362 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 137146731 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:37:55 PM UTC 24 |
| Finished | Oct 12 04:37:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598467362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.598467362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.32830990 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 470727705 ps |
| CPU time | 2.73 seconds |
| Started | Oct 12 04:38:00 PM UTC 24 |
| Finished | Oct 12 04:38:04 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32830990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.32830990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.3059122257 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 180322766 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:38:00 PM UTC 24 |
| Finished | Oct 12 04:38:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059122257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.3059122257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.165199053 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 155805819 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:38:02 PM UTC 24 |
| Finished | Oct 12 04:38:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=165199053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_out_stall.165199053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.1350425936 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 187663251 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:38:02 PM UTC 24 |
| Finished | Oct 12 04:38:05 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350425936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.1350425936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.1999857366 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 157636159 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:38:04 PM UTC 24 |
| Finished | Oct 12 04:38:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999857366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.1999857366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2467076443 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 169281121 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:38:04 PM UTC 24 |
| Finished | Oct 12 04:38:07 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467076443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.2467076443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.645016118 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 218449805 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:38:06 PM UTC 24 |
| Finished | Oct 12 04:38:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645016118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.645016118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.917378174 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 242989173 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:38:06 PM UTC 24 |
| Finished | Oct 12 04:38:09 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917378174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.917378174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2296544531 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 236622112 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 04:38:09 PM UTC 24 |
| Finished | Oct 12 04:38:11 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296544531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2296544531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.811573131 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 224246750 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:38:13 PM UTC 24 |
| Finished | Oct 12 04:38:16 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811573131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_pkt_sent.811573131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.1457954815 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 15630198129 ps |
| CPU time | 363.31 seconds |
| Started | Oct 12 04:38:17 PM UTC 24 |
| Finished | Oct 12 04:44:26 PM UTC 24 |
| Peak memory | 237328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457954815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.1457954815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3957974383 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 6154104646 ps |
| CPU time | 33.09 seconds |
| Started | Oct 12 04:38:17 PM UTC 24 |
| Finished | Oct 12 04:38:52 PM UTC 24 |
| Peak memory | 231492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3957974383 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.3957974383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.3945136649 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 156828440 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:38:13 PM UTC 24 |
| Finished | Oct 12 04:38:15 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945136649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.3945136649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.3301081579 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 210364764 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:38:15 PM UTC 24 |
| Finished | Oct 12 04:38:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301081579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.3301081579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.1695215149 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 206278024 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:38:30 PM UTC 24 |
| Finished | Oct 12 04:38:33 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695215149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.1695215149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2165706075 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 170448930 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:38:34 PM UTC 24 |
| Finished | Oct 12 04:38:36 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165706075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.2165706075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.2827108667 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 220499537 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:38:34 PM UTC 24 |
| Finished | Oct 12 04:38:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827108667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.2827108667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.2117166570 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 2336765200 ps |
| CPU time | 91.53 seconds |
| Started | Oct 12 04:38:38 PM UTC 24 |
| Finished | Oct 12 04:40:12 PM UTC 24 |
| Peak memory | 231556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117166570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.2117166570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.228071500 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 162017341 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:38:38 PM UTC 24 |
| Finished | Oct 12 04:38:41 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228071500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_stall_trans.228071500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.502238208 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 831238846 ps |
| CPU time | 3.45 seconds |
| Started | Oct 12 04:38:43 PM UTC 24 |
| Finished | Oct 12 04:38:47 PM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502238208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_stream_len_max.502238208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.4122269335 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 2611971148 ps |
| CPU time | 31.19 seconds |
| Started | Oct 12 04:38:43 PM UTC 24 |
| Finished | Oct 12 04:39:15 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122269335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.4122269335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.709139497 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 1815032497 ps |
| CPU time | 45.23 seconds |
| Started | Oct 12 04:35:50 PM UTC 24 |
| Finished | Oct 12 04:36:37 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=709139497 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.709139497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2454761236 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 545584356 ps |
| CPU time | 2.09 seconds |
| Started | Oct 12 04:38:53 PM UTC 24 |
| Finished | Oct 12 04:38:56 PM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2454761236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2454761236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1573521312 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 36187705 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:40:28 PM UTC 24 |
| Finished | Oct 12 04:40:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573521312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.1573521312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.3505124624 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 3980714777 ps |
| CPU time | 8.54 seconds |
| Started | Oct 12 04:38:57 PM UTC 24 |
| Finished | Oct 12 04:39:07 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505124624 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.3505124624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.2667130425 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 15339939743 ps |
| CPU time | 21.31 seconds |
| Started | Oct 12 04:38:57 PM UTC 24 |
| Finished | Oct 12 04:39:20 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667130425 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.2667130425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1096658047 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 30965508348 ps |
| CPU time | 42.37 seconds |
| Started | Oct 12 04:39:00 PM UTC 24 |
| Finished | Oct 12 04:39:43 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096658047 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.1096658047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.690943272 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 185334161 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:39:00 PM UTC 24 |
| Finished | Oct 12 04:39:02 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690943272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_buffer.690943272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.2642537029 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 161882072 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:39:00 PM UTC 24 |
| Finished | Oct 12 04:39:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642537029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.2642537029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.547910335 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 143962889 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:39:00 PM UTC 24 |
| Finished | Oct 12 04:39:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=547910335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_av_overflow.547910335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.1924593735 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 162264096 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:39:02 PM UTC 24 |
| Finished | Oct 12 04:39:04 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924593735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.1924593735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3609264577 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 346683326 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:39:04 PM UTC 24 |
| Finished | Oct 12 04:39:07 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609264577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3609264577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3712291184 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 483377843 ps |
| CPU time | 2.84 seconds |
| Started | Oct 12 04:39:04 PM UTC 24 |
| Finished | Oct 12 04:39:08 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712291184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3712291184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.1670392512 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 169728772 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:39:04 PM UTC 24 |
| Finished | Oct 12 04:39:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670392512 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.1670392512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.2341224660 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 743712699 ps |
| CPU time | 3.4 seconds |
| Started | Oct 12 04:39:08 PM UTC 24 |
| Finished | Oct 12 04:39:13 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341224660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.2341224660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3429828881 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 142515020 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:39:09 PM UTC 24 |
| Finished | Oct 12 04:39:11 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429828881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3429828881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_enable.2815873178 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 49573417 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:39:09 PM UTC 24 |
| Finished | Oct 12 04:39:11 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815873178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.2815873178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.2979687815 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 891164521 ps |
| CPU time | 4.5 seconds |
| Started | Oct 12 04:39:09 PM UTC 24 |
| Finished | Oct 12 04:39:14 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979687815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.2979687815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.463193871 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 302359090 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 04:39:11 PM UTC 24 |
| Finished | Oct 12 04:39:14 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463193871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.463193871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.3901300396 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 334515170 ps |
| CPU time | 2.16 seconds |
| Started | Oct 12 04:39:13 PM UTC 24 |
| Finished | Oct 12 04:39:16 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901300396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.3901300396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.3645746886 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 104172777269 ps |
| CPU time | 246.72 seconds |
| Started | Oct 12 04:39:15 PM UTC 24 |
| Finished | Oct 12 04:43:26 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3645746886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.3645746886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.2450345161 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 120098608197 ps |
| CPU time | 259.25 seconds |
| Started | Oct 12 04:39:15 PM UTC 24 |
| Finished | Oct 12 04:43:39 PM UTC 24 |
| Peak memory | 219308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450345161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.2450345161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.507113938 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 117922720952 ps |
| CPU time | 317.68 seconds |
| Started | Oct 12 04:39:18 PM UTC 24 |
| Finished | Oct 12 04:44:40 PM UTC 24 |
| Peak memory | 220500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=507113938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_loclk_max.507113938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.785928916 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 106140408644 ps |
| CPU time | 225.61 seconds |
| Started | Oct 12 04:39:18 PM UTC 24 |
| Finished | Oct 12 04:43:07 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=785928916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_phase.785928916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.3889149854 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 192581502 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 04:39:18 PM UTC 24 |
| Finished | Oct 12 04:39:21 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889149854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.3889149854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.369257034 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 133226876 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:39:22 PM UTC 24 |
| Finished | Oct 12 04:39:25 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369257034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_stall.369257034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.1242804220 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 208738341 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 04:39:22 PM UTC 24 |
| Finished | Oct 12 04:39:25 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242804220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.1242804220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.614802308 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 4108579765 ps |
| CPU time | 50.76 seconds |
| Started | Oct 12 04:39:18 PM UTC 24 |
| Finished | Oct 12 04:40:11 PM UTC 24 |
| Peak memory | 235940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=614802308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.614802308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.3796560325 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 13960226699 ps |
| CPU time | 128.83 seconds |
| Started | Oct 12 04:39:25 PM UTC 24 |
| Finished | Oct 12 04:41:36 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796560325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.3796560325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.3847888502 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 196331757 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:39:27 PM UTC 24 |
| Finished | Oct 12 04:39:29 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847888502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.3847888502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2952441012 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 15233274419 ps |
| CPU time | 34.23 seconds |
| Started | Oct 12 04:39:27 PM UTC 24 |
| Finished | Oct 12 04:40:02 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952441012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2952441012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1022442916 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 1603474133 ps |
| CPU time | 16.76 seconds |
| Started | Oct 12 04:39:40 PM UTC 24 |
| Finished | Oct 12 04:39:58 PM UTC 24 |
| Peak memory | 235948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022442916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1022442916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.2285023490 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 239911492 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:39:44 PM UTC 24 |
| Finished | Oct 12 04:39:47 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285023490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.2285023490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.2677361870 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 211717671 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:39:46 PM UTC 24 |
| Finished | Oct 12 04:39:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677361870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.2677361870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.2332318296 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 2333731836 ps |
| CPU time | 72.32 seconds |
| Started | Oct 12 04:39:49 PM UTC 24 |
| Finished | Oct 12 04:41:03 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332318296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.2332318296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.38004813 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 1778876960 ps |
| CPU time | 28.28 seconds |
| Started | Oct 12 04:39:51 PM UTC 24 |
| Finished | Oct 12 04:40:20 PM UTC 24 |
| Peak memory | 231548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=38004813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.38004813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.1553009820 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 2575928964 ps |
| CPU time | 32.43 seconds |
| Started | Oct 12 04:39:53 PM UTC 24 |
| Finished | Oct 12 04:40:27 PM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553009820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.1553009820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2846336036 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 161971361 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:39:56 PM UTC 24 |
| Finished | Oct 12 04:39:58 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846336036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.2846336036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.139261587 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 168425365 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:40:00 PM UTC 24 |
| Finished | Oct 12 04:40:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139261587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.139261587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2283065300 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 162689662 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:40:00 PM UTC 24 |
| Finished | Oct 12 04:40:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283065300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2283065300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1816066719 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 172396455 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:40:02 PM UTC 24 |
| Finished | Oct 12 04:40:05 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816066719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1816066719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3362332571 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 176045446 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:40:05 PM UTC 24 |
| Finished | Oct 12 04:40:07 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362332571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.3362332571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.3889765309 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 178453254 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:40:05 PM UTC 24 |
| Finished | Oct 12 04:40:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889765309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.3889765309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2136557258 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 202751552 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:40:05 PM UTC 24 |
| Finished | Oct 12 04:40:07 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136557258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2136557258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.4161536218 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 227453835 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 04:40:05 PM UTC 24 |
| Finished | Oct 12 04:40:08 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161536218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.4161536218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2224901240 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 172771108 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:40:05 PM UTC 24 |
| Finished | Oct 12 04:40:07 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224901240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2224901240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.4162946237 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 54852756 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:40:07 PM UTC 24 |
| Finished | Oct 12 04:40:09 PM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162946237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.4162946237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.1805719676 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 14960651083 ps |
| CPU time | 40.38 seconds |
| Started | Oct 12 04:40:07 PM UTC 24 |
| Finished | Oct 12 04:40:49 PM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805719676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.1805719676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.2373974902 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 186659582 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:40:09 PM UTC 24 |
| Finished | Oct 12 04:40:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373974902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.2373974902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.3301168760 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 187854899 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:40:09 PM UTC 24 |
| Finished | Oct 12 04:40:12 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301168760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.3301168760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.4179865060 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 6072981841 ps |
| CPU time | 207.63 seconds |
| Started | Oct 12 04:40:09 PM UTC 24 |
| Finished | Oct 12 04:43:40 PM UTC 24 |
| Peak memory | 235824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179865060 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.4179865060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.714622811 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 5886693397 ps |
| CPU time | 71.11 seconds |
| Started | Oct 12 04:40:12 PM UTC 24 |
| Finished | Oct 12 04:41:24 PM UTC 24 |
| Peak memory | 236080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=714622811 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.714622811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.4208923278 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 224812404 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:40:09 PM UTC 24 |
| Finished | Oct 12 04:40:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208923278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.4208923278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.2700031924 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 210891299 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:40:09 PM UTC 24 |
| Finished | Oct 12 04:40:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700031924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2700031924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1536743780 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 20186059456 ps |
| CPU time | 34.62 seconds |
| Started | Oct 12 04:40:14 PM UTC 24 |
| Finished | Oct 12 04:40:50 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536743780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1536743780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.2988345687 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 157052976 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:40:14 PM UTC 24 |
| Finished | Oct 12 04:40:16 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988345687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.2988345687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.2401447965 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 365427752 ps |
| CPU time | 2.3 seconds |
| Started | Oct 12 04:40:14 PM UTC 24 |
| Finished | Oct 12 04:40:17 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401447965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.2401447965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.917252514 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 251942835 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:40:14 PM UTC 24 |
| Finished | Oct 12 04:40:17 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917252514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_pid_err.917252514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2589562595 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 786957269 ps |
| CPU time | 3.17 seconds |
| Started | Oct 12 04:40:28 PM UTC 24 |
| Finished | Oct 12 04:40:32 PM UTC 24 |
| Peak memory | 253320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589562595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.2589562595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2997973334 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 432973329 ps |
| CPU time | 2.53 seconds |
| Started | Oct 12 04:40:14 PM UTC 24 |
| Finished | Oct 12 04:40:18 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997973334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2997973334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.1748618301 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 201981103 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:40:19 PM UTC 24 |
| Finished | Oct 12 04:40:21 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748618301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.1748618301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.1090759649 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 154955470 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:40:19 PM UTC 24 |
| Finished | Oct 12 04:40:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090759649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.1090759649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.3678044584 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 166613280 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:40:19 PM UTC 24 |
| Finished | Oct 12 04:40:21 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678044584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.3678044584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.3007051237 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 206708953 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 04:40:19 PM UTC 24 |
| Finished | Oct 12 04:40:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007051237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.3007051237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1925567393 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 2167956486 ps |
| CPU time | 20.52 seconds |
| Started | Oct 12 04:40:19 PM UTC 24 |
| Finished | Oct 12 04:40:41 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925567393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1925567393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.2506295789 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 160976821 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:40:21 PM UTC 24 |
| Finished | Oct 12 04:40:24 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506295789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.2506295789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.811125619 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 167534505 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:40:23 PM UTC 24 |
| Finished | Oct 12 04:40:26 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811125619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_stall_trans.811125619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.135733392 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 1187921098 ps |
| CPU time | 5.02 seconds |
| Started | Oct 12 04:40:23 PM UTC 24 |
| Finished | Oct 12 04:40:30 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135733392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_stream_len_max.135733392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.818027192 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 2945785796 ps |
| CPU time | 71.04 seconds |
| Started | Oct 12 04:40:23 PM UTC 24 |
| Finished | Oct 12 04:41:36 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818027192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_streaming_out.818027192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.883989809 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 7228670498 ps |
| CPU time | 97.02 seconds |
| Started | Oct 12 04:40:24 PM UTC 24 |
| Finished | Oct 12 04:42:03 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883989809 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.883989809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.1109682362 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 3372569313 ps |
| CPU time | 37.84 seconds |
| Started | Oct 12 04:39:06 PM UTC 24 |
| Finished | Oct 12 04:39:46 PM UTC 24 |
| Peak memory | 219420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109682362 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.1109682362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.3307088802 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 37113178 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:19 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307088802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.3307088802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.1898502782 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 4313031057 ps |
| CPU time | 10.22 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:51 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898502782 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.1898502782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.3081880950 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 28460874927 ps |
| CPU time | 70.01 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:51:52 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081880950 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.3081880950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.1321239328 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 160955056 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321239328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.1321239328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2136398693 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 171312988 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:43 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136398693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2136398693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.1088409889 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 311870106 ps |
| CPU time | 1.97 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:43 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088409889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.1088409889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.682240375 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 384499284 ps |
| CPU time | 2.26 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:49 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=682240375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.682240375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.3515078799 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 25431343581 ps |
| CPU time | 42.81 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:51:30 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515078799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.3515078799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.2164242762 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 3114251837 ps |
| CPU time | 19.58 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:51:07 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164242762 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.2164242762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.3177059790 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 700085816 ps |
| CPU time | 3.48 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:51 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177059790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.3177059790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.1593302557 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 168643085 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:49 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593302557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.1593302557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_enable.4179427672 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 37834005 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:48 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179427672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.4179427672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.2764726204 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 957080531 ps |
| CPU time | 4.21 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:50:52 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764726204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.2764726204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.3097075387 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 408251019 ps |
| CPU time | 2.93 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:50:54 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097075387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.3097075387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3540388922 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 253600692 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:50:54 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540388922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3540388922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.3721779210 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 139798395 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:50:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721779210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.3721779210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.747313502 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 257599280 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:50:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747313502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_in_trans.747313502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.1617422241 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 5521118484 ps |
| CPU time | 156.04 seconds |
| Started | Oct 12 04:50:51 PM UTC 24 |
| Finished | Oct 12 04:53:29 PM UTC 24 |
| Peak memory | 231480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617422241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1617422241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.2805663969 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 10067386873 ps |
| CPU time | 110.94 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805663969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.2805663969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.523990829 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 209448329 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:51:00 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523990829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_link_in_err.523990829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.3654329054 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 32094872572 ps |
| CPU time | 57.4 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:51:57 PM UTC 24 |
| Peak memory | 218980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654329054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.3654329054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.4274326378 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 5368096024 ps |
| CPU time | 9.02 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:51:08 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274326378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.4274326378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.1745799465 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 3187321411 ps |
| CPU time | 32.36 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:51:31 PM UTC 24 |
| Peak memory | 235932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745799465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.1745799465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.3596957072 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 2440256009 ps |
| CPU time | 62.3 seconds |
| Started | Oct 12 04:50:57 PM UTC 24 |
| Finished | Oct 12 04:52:02 PM UTC 24 |
| Peak memory | 235988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596957072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3596957072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3163682043 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 269244409 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:50:58 PM UTC 24 |
| Finished | Oct 12 04:51:00 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163682043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3163682043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.3643430484 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 194689087 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:50:58 PM UTC 24 |
| Finished | Oct 12 04:51:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643430484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.3643430484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.3238210835 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 3036790643 ps |
| CPU time | 78.57 seconds |
| Started | Oct 12 04:50:58 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 236156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238210835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.3238210835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.282537385 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 2979230411 ps |
| CPU time | 29.34 seconds |
| Started | Oct 12 04:50:58 PM UTC 24 |
| Finished | Oct 12 04:51:29 PM UTC 24 |
| Peak memory | 235920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=282537385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.282537385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.3919391919 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 2093367912 ps |
| CPU time | 59.98 seconds |
| Started | Oct 12 04:50:58 PM UTC 24 |
| Finished | Oct 12 04:52:00 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919391919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.3919391919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3033571118 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 186629857 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:05 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033571118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3033571118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.878543289 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 151475384 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878543289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.878543289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.3524035431 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 174992646 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524035431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.3524035431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.300103639 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 183506757 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:06 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300103639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.300103639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.3560180792 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 166035147 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:05 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560180792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.3560180792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.3324910761 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 162488581 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:51:03 PM UTC 24 |
| Finished | Oct 12 04:51:06 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324910761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.3324910761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.3758036113 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 222980011 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758036113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.3758036113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1026403035 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 152622370 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:11 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026403035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1026403035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.867101966 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 46927072 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:11 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867101966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_phy_pins_sense.867101966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.616961009 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 9014043569 ps |
| CPU time | 31.33 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:42 PM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616961009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_pkt_buffer.616961009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.3871889677 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 212510713 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871889677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.3871889677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.2642119304 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 186819117 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642119304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.2642119304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.3468866141 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 216790169 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468866141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.3468866141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2621729180 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 150969455 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621729180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2621729180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.409707471 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 20152948249 ps |
| CPU time | 35.84 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:47 PM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=409707471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_resume_link_active.409707471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.477299774 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 156372035 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:12 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477299774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_rx_crc_err.477299774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.543000175 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 362794494 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 04:51:09 PM UTC 24 |
| Finished | Oct 12 04:51:13 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543000175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_rx_full.543000175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.1433186078 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 145320151 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:19 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433186078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.1433186078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.493311234 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 176497768 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:19 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493311234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_setup_trans_ignored.493311234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.3122817861 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 248099166 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:20 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122817861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.3122817861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.1241637238 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 3160046782 ps |
| CPU time | 90.45 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241637238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.1241637238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.1457522701 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 175304639 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457522701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.1457522701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.2440056473 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 144115547 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440056473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.2440056473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3195838363 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 839886585 ps |
| CPU time | 4.43 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:23 PM UTC 24 |
| Peak memory | 218960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195838363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3195838363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.2329942186 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 2747337225 ps |
| CPU time | 71.56 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:52:31 PM UTC 24 |
| Peak memory | 229312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329942186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.2329942186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.3918020039 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 2261129715 ps |
| CPU time | 15.67 seconds |
| Started | Oct 12 04:50:46 PM UTC 24 |
| Finished | Oct 12 04:51:03 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918020039 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.3918020039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2110884255 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 460160744 ps |
| CPU time | 2.65 seconds |
| Started | Oct 12 04:51:17 PM UTC 24 |
| Finished | Oct 12 04:51:21 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2110884255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2110884255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.3814735286 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 235874727 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814735286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.3814735286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.847028470 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 507571355 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=847028470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_t x_rx_disruption.847028470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3931575523 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 187635642 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931575523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.3931575523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1426553187 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 289749963 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426553187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.1426553187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3839115300 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 421658700 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3839115300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.3839115300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2637488309 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 294265351 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637488309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.2637488309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.720834140 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 460564429 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=720834140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_t x_rx_disruption.720834140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.153424357 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 255150075 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=153424357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.153424357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1508889662 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 606166149 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:31 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1508889662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.1508889662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3460828648 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 174237353 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460828648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.3460828648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.1567506563 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 266336015 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567506563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.1567506563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2467916631 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 622121662 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:31 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2467916631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.2467916631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.4082155083 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 328903662 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082155083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.4082155083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.3517905423 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 496971928 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:24:28 PM UTC 24 |
| Finished | Oct 12 05:24:31 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3517905423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.3517905423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.2361375664 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 297053772 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361375664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.2361375664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.3052793446 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 462008533 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3052793446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.3052793446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.222245871 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 565748592 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222245871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.222245871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.899760863 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 158080854 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899760863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 107.usbdev_fifo_levels.899760863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.4057343327 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 592782554 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4057343327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.4057343327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.329792066 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 646552835 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=329792066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.329792066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.3098460224 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 497559559 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3098460224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.3098460224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.3488610942 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 230910979 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488610942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.3488610942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2244646357 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 451940213 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2244646357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.2244646357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.1217324001 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 36615542 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:00 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217324001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.1217324001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.1766594506 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 5757396945 ps |
| CPU time | 13 seconds |
| Started | Oct 12 04:51:18 PM UTC 24 |
| Finished | Oct 12 04:51:32 PM UTC 24 |
| Peak memory | 229388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766594506 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.1766594506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.2324930239 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 15329339069 ps |
| CPU time | 21.58 seconds |
| Started | Oct 12 04:51:18 PM UTC 24 |
| Finished | Oct 12 04:51:40 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324930239 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.2324930239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.1420894296 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 24169683649 ps |
| CPU time | 37.79 seconds |
| Started | Oct 12 04:51:21 PM UTC 24 |
| Finished | Oct 12 04:52:01 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420894296 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.1420894296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3324300784 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 241968663 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324300784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3324300784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.1962484117 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 149883255 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:24 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962484117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.1962484117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.332794560 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 257975308 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332794560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_data_toggle_clear.332794560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.3410291300 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 301893701 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:25 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410291300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.3410291300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1505295847 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 3419252394 ps |
| CPU time | 27.19 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:50 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505295847 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1505295847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.2948274814 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 719895482 ps |
| CPU time | 3.26 seconds |
| Started | Oct 12 04:51:26 PM UTC 24 |
| Finished | Oct 12 04:51:31 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948274814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.2948274814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.1304470906 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 150576895 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:51:26 PM UTC 24 |
| Finished | Oct 12 04:51:29 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304470906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.1304470906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_enable.1533094003 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 37307115 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 04:51:26 PM UTC 24 |
| Finished | Oct 12 04:51:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533094003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.1533094003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.2523209502 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 850223408 ps |
| CPU time | 4.28 seconds |
| Started | Oct 12 04:51:26 PM UTC 24 |
| Finished | Oct 12 04:51:32 PM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523209502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.2523209502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.3985747581 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 212554622 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:51:26 PM UTC 24 |
| Finished | Oct 12 04:51:29 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985747581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.3985747581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.2354822977 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 286631605 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:51:27 PM UTC 24 |
| Finished | Oct 12 04:51:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354822977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.2354822977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.251185590 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 244906948 ps |
| CPU time | 3.86 seconds |
| Started | Oct 12 04:51:29 PM UTC 24 |
| Finished | Oct 12 04:51:34 PM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251185590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_fifo_rst.251185590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.3881961921 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 242569100 ps |
| CPU time | 2.17 seconds |
| Started | Oct 12 04:51:34 PM UTC 24 |
| Finished | Oct 12 04:51:38 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881961921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.3881961921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.345006209 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 146521489 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:51:34 PM UTC 24 |
| Finished | Oct 12 04:51:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345006209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_stall.345006209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.3669521673 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 165442016 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:51:34 PM UTC 24 |
| Finished | Oct 12 04:51:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669521673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.3669521673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.3764226726 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 3833525422 ps |
| CPU time | 97.34 seconds |
| Started | Oct 12 04:51:34 PM UTC 24 |
| Finished | Oct 12 04:53:14 PM UTC 24 |
| Peak memory | 231480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764226726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3764226726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3934414712 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 8587692223 ps |
| CPU time | 92.6 seconds |
| Started | Oct 12 04:51:35 PM UTC 24 |
| Finished | Oct 12 04:53:09 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934414712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3934414712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.3276884035 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 233830136 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:51:35 PM UTC 24 |
| Finished | Oct 12 04:51:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276884035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.3276884035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.2859603719 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 23276657470 ps |
| CPU time | 44.54 seconds |
| Started | Oct 12 04:51:35 PM UTC 24 |
| Finished | Oct 12 04:52:21 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859603719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.2859603719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.3367929558 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 5246279799 ps |
| CPU time | 10.84 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:51:53 PM UTC 24 |
| Peak memory | 228372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367929558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.3367929558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.46084114 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 4612852132 ps |
| CPU time | 128.46 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:53:52 PM UTC 24 |
| Peak memory | 231172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=46084114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.46084114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1230445481 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 2314576660 ps |
| CPU time | 20.78 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:52:03 PM UTC 24 |
| Peak memory | 228164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230445481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1230445481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.1618297302 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 233556321 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:51:44 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618297302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.1618297302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.2608362247 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 195962220 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:51:44 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608362247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.2608362247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.2895803618 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 3092958055 ps |
| CPU time | 29.88 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:52:12 PM UTC 24 |
| Peak memory | 235892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895803618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.2895803618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3071544379 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 2259269815 ps |
| CPU time | 62.59 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:52:46 PM UTC 24 |
| Peak memory | 228804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071544379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3071544379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.1882183084 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 2435422615 ps |
| CPU time | 27.1 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:52:10 PM UTC 24 |
| Peak memory | 229040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882183084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.1882183084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1088282518 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 166381854 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:51:41 PM UTC 24 |
| Finished | Oct 12 04:51:44 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088282518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.1088282518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.619959022 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 162977728 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=619959022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.619959022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.3699476539 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 199334387 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699476539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.3699476539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2612641735 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 201155884 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612641735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2612641735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.4078047026 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 181516724 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078047026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.4078047026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.4164684697 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 167329434 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164684697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.4164684697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.2059711269 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 210301824 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:50 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059711269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.2059711269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.3358070594 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 156244455 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:51:47 PM UTC 24 |
| Finished | Oct 12 04:51:49 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358070594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.3358070594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3774160932 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 8932370058 ps |
| CPU time | 41.6 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:52:36 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774160932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3774160932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.62225853 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 158067616 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=62225853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_received.62225853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.1591104167 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 181875447 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591104167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.1591104167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.3398114197 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 179463267 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398114197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.3398114197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1336728976 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 200891924 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336728976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1336728976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1771398705 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 20186749412 ps |
| CPU time | 36.89 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:52:32 PM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771398705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.1771398705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.3379150050 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 141506133 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379150050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.3379150050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.1556520675 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 259464007 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556520675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.1556520675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.2817274368 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 159893692 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:51:53 PM UTC 24 |
| Finished | Oct 12 04:51:56 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817274368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.2817274368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.3534246309 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 151556541 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534246309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.3534246309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.297514451 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 244440435 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297514451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.297514451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.201735950 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 3089196563 ps |
| CPU time | 30.25 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:30 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=201735950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.201735950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2986175015 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 157376942 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986175015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2986175015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.2836694049 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 165158967 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:00 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836694049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.2836694049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.1126272597 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 795737309 ps |
| CPU time | 2.41 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:02 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126272597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.1126272597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.2914076563 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 2226198766 ps |
| CPU time | 20.12 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:20 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914076563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.2914076563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.4160008335 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 868963169 ps |
| CPU time | 17.23 seconds |
| Started | Oct 12 04:51:22 PM UTC 24 |
| Finished | Oct 12 04:51:40 PM UTC 24 |
| Peak memory | 219368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160008335 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.4160008335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.1038817794 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 602213753 ps |
| CPU time | 2.82 seconds |
| Started | Oct 12 04:51:58 PM UTC 24 |
| Finished | Oct 12 04:52:02 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1038817794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.1038817794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.848510090 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 186829026 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=848510090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 110.usbdev_fifo_levels.848510090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.3651292164 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 694513846 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3651292164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.3651292164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3171856037 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 260227242 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:36 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171856037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.3171856037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.3789110175 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 638117019 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3789110175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.3789110175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.1021429728 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 343429003 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021429728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.1021429728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.4274717934 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 429186136 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4274717934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.4274717934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3822320223 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 267302739 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822320223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.3822320223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.739978462 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 630620019 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=739978462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.739978462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1920131082 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 147571694 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:25:34 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920131082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.1920131082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.834165104 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 583619965 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=834165104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.834165104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4192531709 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 305815453 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192531709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.4192531709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1256905194 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 452333840 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 217788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1256905194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.1256905194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.8121045 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 169052424 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=8121045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.8121045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1014533719 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 572875048 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1014533719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1014533719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.951896060 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 259901441 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951896060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.951896060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.2043495778 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 512073778 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2043495778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.2043495778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.2165448380 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 498286934 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2165448380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.2165448380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3199900304 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 182638083 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199900304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.3199900304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.645283285 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 526217191 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=645283285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_t x_rx_disruption.645283285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2034033073 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 42772350 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 04:52:44 PM UTC 24 |
| Finished | Oct 12 04:52:46 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034033073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2034033073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.1561220655 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 10529755097 ps |
| CPU time | 16.83 seconds |
| Started | Oct 12 04:51:59 PM UTC 24 |
| Finished | Oct 12 04:52:17 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561220655 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.1561220655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.2388856094 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 20370532194 ps |
| CPU time | 41.83 seconds |
| Started | Oct 12 04:52:02 PM UTC 24 |
| Finished | Oct 12 04:52:45 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388856094 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.2388856094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.803571456 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 25688061689 ps |
| CPU time | 50.25 seconds |
| Started | Oct 12 04:52:02 PM UTC 24 |
| Finished | Oct 12 04:52:54 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803571456 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.803571456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.126043102 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 163673484 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:52:02 PM UTC 24 |
| Finished | Oct 12 04:52:05 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126043102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_av_buffer.126043102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.4082618567 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 162464683 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:52:02 PM UTC 24 |
| Finished | Oct 12 04:52:05 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082618567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.4082618567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.1835838240 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 375049104 ps |
| CPU time | 2.34 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:11 PM UTC 24 |
| Peak memory | 218504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835838240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.1835838240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.4089911363 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 342661791 ps |
| CPU time | 2.04 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:10 PM UTC 24 |
| Peak memory | 218556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089911363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.4089911363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.590009922 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 48478421697 ps |
| CPU time | 87.31 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:53:36 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590009922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_device_address.590009922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.2593758932 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 7033764356 ps |
| CPU time | 45.68 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:54 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593758932 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2593758932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.3242100705 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 646822348 ps |
| CPU time | 3.04 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:11 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242100705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.3242100705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.446649591 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 134514327 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:10 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446649591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_disconnected.446649591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_enable.1741099859 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 35266501 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741099859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.1741099859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.1265273920 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 921075515 ps |
| CPU time | 4.63 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:13 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265273920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.1265273920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.4285292443 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 641880191 ps |
| CPU time | 2.93 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:11 PM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285292443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.4285292443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.3654915643 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 182801597 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:17 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654915643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.3654915643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.3073088348 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 377441094 ps |
| CPU time | 2.44 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073088348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.3073088348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.4160503078 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 231822434 ps |
| CPU time | 1.94 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160503078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.4160503078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.659352125 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 233070306 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659352125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.659352125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.1107362365 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 242127790 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107362365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.1107362365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.3531080333 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 3161210982 ps |
| CPU time | 80.65 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:53:37 PM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531080333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.3531080333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.661131074 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 7028137388 ps |
| CPU time | 87.68 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:53:45 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=661131074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.661131074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.412023969 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 209788391 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:52:15 PM UTC 24 |
| Finished | Oct 12 04:52:18 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=412023969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_in_err.412023969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1261700015 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 32879552389 ps |
| CPU time | 60.94 seconds |
| Started | Oct 12 04:52:19 PM UTC 24 |
| Finished | Oct 12 04:53:22 PM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261700015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.1261700015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.40493978 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 4263731039 ps |
| CPU time | 14.65 seconds |
| Started | Oct 12 04:52:19 PM UTC 24 |
| Finished | Oct 12 04:52:35 PM UTC 24 |
| Peak memory | 229212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40493978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_suspend.40493978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.3975466615 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 2864034716 ps |
| CPU time | 79.24 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:53:41 PM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975466615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.3975466615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.1185236953 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 3186456467 ps |
| CPU time | 28.84 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185236953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.1185236953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.3704596804 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 257012771 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:52:22 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704596804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.3704596804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3368614088 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 208020489 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:52:22 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368614088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3368614088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.1796248288 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 3183105318 ps |
| CPU time | 31.4 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:52:53 PM UTC 24 |
| Peak memory | 235976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796248288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.1796248288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.1106391392 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 2991722563 ps |
| CPU time | 80.12 seconds |
| Started | Oct 12 04:52:20 PM UTC 24 |
| Finished | Oct 12 04:53:42 PM UTC 24 |
| Peak memory | 231448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106391392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.1106391392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.3329051163 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 4132033009 ps |
| CPU time | 34.23 seconds |
| Started | Oct 12 04:52:23 PM UTC 24 |
| Finished | Oct 12 04:52:59 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329051163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.3329051163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.1982579119 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 148560598 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:52:23 PM UTC 24 |
| Finished | Oct 12 04:52:26 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982579119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.1982579119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.2007787056 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 155331179 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:52:23 PM UTC 24 |
| Finished | Oct 12 04:52:26 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007787056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.2007787056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.2513054742 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 148663307 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:52:24 PM UTC 24 |
| Finished | Oct 12 04:52:26 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513054742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.2513054742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.628164917 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 159102880 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:52:29 PM UTC 24 |
| Finished | Oct 12 04:52:31 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=628164917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_out_stall.628164917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.260668914 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 183889630 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:52:29 PM UTC 24 |
| Finished | Oct 12 04:52:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260668914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_out_trans_nak.260668914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.2313609690 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 185165587 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:52:29 PM UTC 24 |
| Finished | Oct 12 04:52:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313609690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.2313609690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.960433048 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 252223583 ps |
| CPU time | 1.89 seconds |
| Started | Oct 12 04:52:29 PM UTC 24 |
| Finished | Oct 12 04:52:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=960433048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.960433048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.1942784777 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 200744749 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:52:33 PM UTC 24 |
| Finished | Oct 12 04:52:36 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942784777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1942784777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2366730977 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 38471048 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:52:33 PM UTC 24 |
| Finished | Oct 12 04:52:36 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366730977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2366730977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.2354835789 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 6320034379 ps |
| CPU time | 23.23 seconds |
| Started | Oct 12 04:52:33 PM UTC 24 |
| Finished | Oct 12 04:52:58 PM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354835789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.2354835789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.4111017079 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 195343559 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:52:34 PM UTC 24 |
| Finished | Oct 12 04:52:36 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111017079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.4111017079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.1945357364 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 264794612 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 04:52:34 PM UTC 24 |
| Finished | Oct 12 04:52:36 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945357364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.1945357364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1315875774 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 267248753 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315875774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1315875774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.1023205846 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 210946769 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023205846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.1023205846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.4211462186 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 20167764728 ps |
| CPU time | 39.53 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:53:20 PM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211462186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.4211462186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.4264267981 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 227710645 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:41 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264267981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.4264267981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.702031409 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 257219484 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=702031409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_rx_full.702031409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.1480663044 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 161687192 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:42 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480663044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.1480663044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2066105488 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 152688676 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:42 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066105488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2066105488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.2290852775 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 269284924 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:52:39 PM UTC 24 |
| Finished | Oct 12 04:52:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290852775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2290852775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.1094910675 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 2244621551 ps |
| CPU time | 62.37 seconds |
| Started | Oct 12 04:52:43 PM UTC 24 |
| Finished | Oct 12 04:53:47 PM UTC 24 |
| Peak memory | 229500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094910675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.1094910675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.661363829 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 207127396 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:52:43 PM UTC 24 |
| Finished | Oct 12 04:52:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661363829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.661363829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.1651794361 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 169291455 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:52:43 PM UTC 24 |
| Finished | Oct 12 04:52:46 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651794361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.1651794361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.2172993232 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 826013946 ps |
| CPU time | 3.73 seconds |
| Started | Oct 12 04:52:43 PM UTC 24 |
| Finished | Oct 12 04:52:48 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172993232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.2172993232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.4034410442 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 1879123346 ps |
| CPU time | 55.05 seconds |
| Started | Oct 12 04:52:43 PM UTC 24 |
| Finished | Oct 12 04:53:40 PM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034410442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.4034410442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.2370430838 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 4278939479 ps |
| CPU time | 31.69 seconds |
| Started | Oct 12 04:52:07 PM UTC 24 |
| Finished | Oct 12 04:52:40 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370430838 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.2370430838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.2967793823 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 581523263 ps |
| CPU time | 2.68 seconds |
| Started | Oct 12 04:52:44 PM UTC 24 |
| Finished | Oct 12 04:52:47 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2967793823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.2967793823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.1074487454 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 383960003 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074487454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.1074487454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.507980256 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 534062014 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507980256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_t x_rx_disruption.507980256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.3892995646 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 649099369 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892995646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.3892995646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.3780227236 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 151343427 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780227236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.3780227236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.2207254462 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 437040833 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2207254462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.2207254462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.3536562176 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 504702084 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536562176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.3536562176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.133817649 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 272844661 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=133817649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 122.usbdev_fifo_levels.133817649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.690011225 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 617675343 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=690011225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_t x_rx_disruption.690011225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2202072815 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 474808826 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202072815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.2202072815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2932117033 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 293891222 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932117033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.2932117033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.4234417241 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 559855009 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4234417241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.4234417241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1262318859 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 182223198 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262318859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1262318859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.1703896777 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 162825927 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703896777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.1703896777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.506592600 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 622447419 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=506592600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_t x_rx_disruption.506592600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3794957206 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 484090745 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:25:35 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794957206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3794957206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.134454876 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 504716758 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:25:36 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=134454876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.134454876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3092357334 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 406358964 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:25:36 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092357334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3092357334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.2842340006 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 205652520 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:25:36 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842340006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.2842340006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.2520946086 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 555934656 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:25:36 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2520946086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.2520946086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3045003295 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 265477111 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:25:36 PM UTC 24 |
| Finished | Oct 12 05:25:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045003295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3045003295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2910702160 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 202170319 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910702160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.2910702160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.2585987465 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 559991628 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585987465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.2585987465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.4099077846 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 220074582 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099077846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.4099077846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.1071157080 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 572247963 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071157080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.1071157080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2930069706 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 330224305 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930069706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.2930069706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.2188302302 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 602713043 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2188302302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.2188302302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.3354292543 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 53655998 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:53:26 PM UTC 24 |
| Finished | Oct 12 04:53:29 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354292543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.3354292543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3933708647 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 6565576588 ps |
| CPU time | 9.91 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:52:59 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933708647 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3933708647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.495768964 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 19062097329 ps |
| CPU time | 23.46 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:53:12 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=495768964 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.495768964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.3317338020 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 29851905384 ps |
| CPU time | 36.17 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:53:25 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317338020 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.3317338020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.2534500093 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 159240344 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534500093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.2534500093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.1562262074 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 154706233 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562262074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.1562262074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2236807352 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 321563935 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:52:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236807352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2236807352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.1260148483 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 790121801 ps |
| CPU time | 2.38 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:52:51 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260148483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.1260148483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.1908152828 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 44843022241 ps |
| CPU time | 70.57 seconds |
| Started | Oct 12 04:52:48 PM UTC 24 |
| Finished | Oct 12 04:54:00 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908152828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.1908152828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.2723118026 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 4330994190 ps |
| CPU time | 41.21 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:53:37 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723118026 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.2723118026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1215187463 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 844448627 ps |
| CPU time | 3 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:59 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215187463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1215187463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.2123938457 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 142604319 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123938457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.2123938457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_enable.2568538071 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 51212688 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:57 PM UTC 24 |
| Peak memory | 216220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568538071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.2568538071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.2539264391 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 845421856 ps |
| CPU time | 2.54 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:59 PM UTC 24 |
| Peak memory | 218968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539264391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2539264391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1450334878 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 147918476 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:57 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450334878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1450334878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.3159957535 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 198114597 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159957535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.3159957535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.3982119183 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 240039209 ps |
| CPU time | 2.07 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:52:58 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982119183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.3982119183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.3680148913 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 140917838 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:52:59 PM UTC 24 |
| Finished | Oct 12 04:53:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680148913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.3680148913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2984364995 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 259710290 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 04:52:59 PM UTC 24 |
| Finished | Oct 12 04:53:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984364995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2984364995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.4009823787 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 3112583323 ps |
| CPU time | 26.5 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:53:23 PM UTC 24 |
| Peak memory | 235856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009823787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.4009823787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.2936004275 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 11825609317 ps |
| CPU time | 135.83 seconds |
| Started | Oct 12 04:52:59 PM UTC 24 |
| Finished | Oct 12 04:55:18 PM UTC 24 |
| Peak memory | 220520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936004275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.2936004275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.1940428521 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 234444487 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:52:59 PM UTC 24 |
| Finished | Oct 12 04:53:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940428521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.1940428521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.4171081615 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 24065841100 ps |
| CPU time | 37.14 seconds |
| Started | Oct 12 04:53:00 PM UTC 24 |
| Finished | Oct 12 04:53:38 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171081615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.4171081615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.679543796 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 8682204079 ps |
| CPU time | 15.44 seconds |
| Started | Oct 12 04:53:00 PM UTC 24 |
| Finished | Oct 12 04:53:16 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=679543796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_suspend.679543796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.3363422917 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 4867896957 ps |
| CPU time | 119.01 seconds |
| Started | Oct 12 04:53:00 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 231524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363422917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.3363422917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.2224879486 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 2632843915 ps |
| CPU time | 65.89 seconds |
| Started | Oct 12 04:53:00 PM UTC 24 |
| Finished | Oct 12 04:54:07 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224879486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2224879486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.1549532045 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 241804351 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:08 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549532045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.1549532045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.3372453840 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 199569727 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372453840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.3372453840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.359441421 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 3151613751 ps |
| CPU time | 29.89 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:37 PM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359441421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.359441421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.1501028590 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 3280971358 ps |
| CPU time | 82.02 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:54:30 PM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501028590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.1501028590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.4245123504 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 3965949808 ps |
| CPU time | 113.7 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:55:02 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245123504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.4245123504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.169585829 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 155201695 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:08 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169585829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.169585829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.2346972742 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 160583398 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346972742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.2346972742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.270823213 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 181208808 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270823213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_out_iso.270823213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.1208080639 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 184673842 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:53:06 PM UTC 24 |
| Finished | Oct 12 04:53:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208080639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.1208080639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.1192202213 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 185574385 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:53:09 PM UTC 24 |
| Finished | Oct 12 04:53:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192202213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.1192202213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.3700842557 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 153418020 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700842557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.3700842557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.4281105277 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 244513139 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281105277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.4281105277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2138026520 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 138796508 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138026520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2138026520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.1174640237 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 41451824 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:16 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174640237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.1174640237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.1412451432 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 22185742503 ps |
| CPU time | 61.64 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:54:18 PM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412451432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.1412451432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.330016210 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 209871911 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=330016210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_pkt_received.330016210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.805705357 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 188282539 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:53:14 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805705357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_sent.805705357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.1138106197 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 177160326 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:53:15 PM UTC 24 |
| Finished | Oct 12 04:53:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138106197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.1138106197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.748900599 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 158149195 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748900599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.748900599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.3008521463 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 20174400425 ps |
| CPU time | 28.32 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:51 PM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008521463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.3008521463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3013259784 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 188818313 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:23 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013259784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.3013259784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.4238431659 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 258749839 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238431659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.4238431659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.3950153062 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 152805385 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950153062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.3950153062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.3661478538 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 171850486 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661478538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.3661478538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.2339335863 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 189826437 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339335863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.2339335863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.3848841010 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 2865481675 ps |
| CPU time | 73 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:54:36 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848841010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.3848841010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.403275161 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 181230027 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403275161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.403275161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.2896173550 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 207110144 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:53:21 PM UTC 24 |
| Finished | Oct 12 04:53:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896173550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.2896173550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.4001622529 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 830927134 ps |
| CPU time | 4.12 seconds |
| Started | Oct 12 04:53:26 PM UTC 24 |
| Finished | Oct 12 04:53:31 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001622529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.4001622529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1926146558 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 3085473742 ps |
| CPU time | 31.78 seconds |
| Started | Oct 12 04:53:26 PM UTC 24 |
| Finished | Oct 12 04:54:00 PM UTC 24 |
| Peak memory | 229244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926146558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1926146558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.1427878008 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 324837275 ps |
| CPU time | 4.86 seconds |
| Started | Oct 12 04:52:55 PM UTC 24 |
| Finished | Oct 12 04:53:01 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427878008 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.1427878008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.607697036 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 637361038 ps |
| CPU time | 3.36 seconds |
| Started | Oct 12 04:53:26 PM UTC 24 |
| Finished | Oct 12 04:53:31 PM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=607697036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_tx _rx_disruption.607697036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.719179240 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 345062549 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719179240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.719179240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.2601478294 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 607958398 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2601478294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.2601478294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.1116189815 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 289114753 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116189815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.1116189815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.2716795599 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 663079892 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2716795599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.2716795599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3072669006 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 257184931 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072669006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.3072669006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3838915177 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 572137717 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3838915177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.3838915177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.227902188 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 169464621 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=227902188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.227902188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.1531833374 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 283175684 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531833374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.1531833374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.3918876951 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 493360550 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3918876951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.3918876951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1776860022 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 248916968 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776860022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1776860022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.1237576976 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 258606201 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237576976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.1237576976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.58831736 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 579108821 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=58831736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_tx _rx_disruption.58831736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.878266756 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 323543451 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878266756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.878266756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.1962706306 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 170212563 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962706306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.1962706306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2153398225 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 617650218 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2153398225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.2153398225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.3792274118 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 182949122 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792274118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.3792274118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3348927446 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 609758697 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3348927446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.3348927446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3225044774 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 537767868 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:26:50 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3225044774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3225044774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.3088230478 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 486383291 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3088230478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.3088230478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.3616581901 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 573538181 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616581901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.3616581901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.1054559958 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 201093098 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054559958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.1054559958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.1447666279 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 599618375 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1447666279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.1447666279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1158935719 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 277601650 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158935719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1158935719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2557546635 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 500303429 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2557546635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2557546635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3786550104 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 99419025 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:05 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786550104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3786550104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.2926103607 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 12074039092 ps |
| CPU time | 22.98 seconds |
| Started | Oct 12 04:53:26 PM UTC 24 |
| Finished | Oct 12 04:53:51 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926103607 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.2926103607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2423040930 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 19368302250 ps |
| CPU time | 33.28 seconds |
| Started | Oct 12 04:53:27 PM UTC 24 |
| Finished | Oct 12 04:54:01 PM UTC 24 |
| Peak memory | 219276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423040930 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2423040930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.2854894931 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 29811249922 ps |
| CPU time | 42.45 seconds |
| Started | Oct 12 04:53:27 PM UTC 24 |
| Finished | Oct 12 04:54:11 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854894931 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.2854894931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.3459493940 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 150724290 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:53:27 PM UTC 24 |
| Finished | Oct 12 04:53:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459493940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.3459493940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.3155571033 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 163531537 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:53:27 PM UTC 24 |
| Finished | Oct 12 04:53:29 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155571033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.3155571033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.259747114 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 409478367 ps |
| CPU time | 2.51 seconds |
| Started | Oct 12 04:53:27 PM UTC 24 |
| Finished | Oct 12 04:53:30 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259747114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_data_toggle_clear.259747114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.4115556044 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 1278101200 ps |
| CPU time | 5.62 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:39 PM UTC 24 |
| Peak memory | 218744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115556044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.4115556044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1165417538 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 25877924302 ps |
| CPU time | 49.74 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:54:23 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165417538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1165417538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.4127988369 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 2495049772 ps |
| CPU time | 19.69 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:53 PM UTC 24 |
| Peak memory | 218788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127988369 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.4127988369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.1793450028 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 884801022 ps |
| CPU time | 3.43 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:37 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793450028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.1793450028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.2980671504 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 149294274 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:35 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980671504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.2980671504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_enable.1926899464 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 36971652 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:35 PM UTC 24 |
| Peak memory | 218452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926899464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.1926899464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3516793166 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 955220093 ps |
| CPU time | 3.6 seconds |
| Started | Oct 12 04:53:36 PM UTC 24 |
| Finished | Oct 12 04:53:40 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516793166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3516793166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.1703567305 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 410447564 ps |
| CPU time | 3.55 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:48 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703567305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.1703567305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.2787333902 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 214826986 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787333902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.2787333902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.3247130105 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 146144120 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:45 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247130105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.3247130105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3211045447 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 189660648 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:46 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211045447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3211045447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.612803752 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 2201424013 ps |
| CPU time | 58.96 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:54:44 PM UTC 24 |
| Peak memory | 229368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=612803752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.612803752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.802063405 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 9976180302 ps |
| CPU time | 104.85 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:55:30 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802063405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.802063405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.1103444322 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 221175779 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:45 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103444322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.1103444322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.1105428649 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 27346269300 ps |
| CPU time | 49.07 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 229268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105428649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.1105428649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.1145503094 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 8609938988 ps |
| CPU time | 12.13 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:53:57 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145503094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.1145503094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.216468016 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 3125664228 ps |
| CPU time | 23.36 seconds |
| Started | Oct 12 04:53:43 PM UTC 24 |
| Finished | Oct 12 04:54:08 PM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=216468016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.216468016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.2312775003 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 2122881614 ps |
| CPU time | 59.56 seconds |
| Started | Oct 12 04:53:44 PM UTC 24 |
| Finished | Oct 12 04:54:45 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312775003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.2312775003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.2390934167 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 290869907 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 04:53:44 PM UTC 24 |
| Finished | Oct 12 04:53:46 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390934167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.2390934167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.1901598119 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 257913014 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901598119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.1901598119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.2623851393 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 1934568549 ps |
| CPU time | 18.3 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:54:09 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623851393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.2623851393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.3102721843 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 2962741069 ps |
| CPU time | 26.92 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:54:18 PM UTC 24 |
| Peak memory | 231324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102721843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.3102721843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.1549224032 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 3874645869 ps |
| CPU time | 34.58 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:54:26 PM UTC 24 |
| Peak memory | 229416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549224032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.1549224032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1699874037 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 156911001 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:53 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699874037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1699874037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.3121530365 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 151076011 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121530365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.3121530365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.2640658250 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 233199567 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:53 PM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640658250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.2640658250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.940395262 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 183718245 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=940395262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_out_iso.940395262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.711632003 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 149985565 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:53 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711632003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_out_stall.711632003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.4247539455 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 148925066 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:53:50 PM UTC 24 |
| Finished | Oct 12 04:53:53 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247539455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.4247539455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.2082805023 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 154125118 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082805023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.2082805023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.2209235363 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 226064830 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209235363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2209235363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3857135499 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 143816789 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857135499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3857135499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.743147973 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 58295148 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743147973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_phy_pins_sense.743147973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.1723566978 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 9626147658 ps |
| CPU time | 32.19 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:54:29 PM UTC 24 |
| Peak memory | 229168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723566978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.1723566978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.708263638 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 145715094 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708263638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_pkt_received.708263638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.3128275594 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 177117961 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128275594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.3128275594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.1211035241 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 187692669 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211035241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.1211035241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.1599270635 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 186649283 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:59 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599270635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.1599270635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.4158794360 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 20194631719 ps |
| CPU time | 29.01 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:54:26 PM UTC 24 |
| Peak memory | 218928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158794360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.4158794360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.3493529927 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 143561835 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:58 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493529927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.3493529927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.915273993 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 251911724 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:53:56 PM UTC 24 |
| Finished | Oct 12 04:53:59 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=915273993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_rx_full.915273993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3359595498 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 158642736 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:04 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359595498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3359595498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.2596422005 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 163504796 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:04 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596422005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.2596422005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.3913459545 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 237589345 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:04 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913459545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.3913459545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.4262445375 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 2172438336 ps |
| CPU time | 20.07 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:23 PM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262445375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.4262445375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.3728767353 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 160396861 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:04 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728767353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.3728767353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.698778986 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 186979395 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:05 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698778986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_stall_trans.698778986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.1047431118 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 458778582 ps |
| CPU time | 2.28 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:06 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047431118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.1047431118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.4146351331 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 2537036098 ps |
| CPU time | 68.03 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:55:12 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146351331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.4146351331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.1660136155 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 2014573961 ps |
| CPU time | 16.1 seconds |
| Started | Oct 12 04:53:32 PM UTC 24 |
| Finished | Oct 12 04:53:50 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660136155 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.1660136155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.302769896 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 554951281 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:54:02 PM UTC 24 |
| Finished | Oct 12 04:54:05 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=302769896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_tx _rx_disruption.302769896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.429725758 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 318074518 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=429725758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.429725758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.1399101777 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 262348604 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399101777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.1399101777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.2061557722 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 497341960 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2061557722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.2061557722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.923407005 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 517000734 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=923407005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_t x_rx_disruption.923407005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.563925650 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 338961602 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563925650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 142.usbdev_fifo_levels.563925650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.3747804431 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 560963260 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3747804431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.3747804431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.2069395688 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 243393541 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069395688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.2069395688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.3415688109 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 647132270 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3415688109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.3415688109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.1784821338 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 291577738 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784821338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.1784821338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.1552848696 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 596212030 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1552848696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.1552848696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.400512778 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 343602898 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400512778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.400512778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.3291666668 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 271365995 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291666668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.3291666668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.1448306290 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 572996439 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1448306290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.1448306290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.3097617811 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 189699518 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097617811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.3097617811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.4264035694 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 267840009 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264035694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.4264035694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2076937889 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 466551080 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2076937889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2076937889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1719816285 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 407638714 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719816285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1719816285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3548995315 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 152128820 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548995315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3548995315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1330769942 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 589488772 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:26:51 PM UTC 24 |
| Finished | Oct 12 05:26:54 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1330769942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1330769942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.3208971823 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 504364955 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:28:07 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3208971823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.3208971823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.3438832969 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 527163790 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:28:07 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438832969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.3438832969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.2668575114 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 244141572 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:28:07 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668575114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.2668575114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3961508808 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 561700619 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:28:07 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3961508808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3961508808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.2052246983 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 54488919 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052246983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.2052246983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.1906388470 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 4619769969 ps |
| CPU time | 7.31 seconds |
| Started | Oct 12 04:54:03 PM UTC 24 |
| Finished | Oct 12 04:54:11 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906388470 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.1906388470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.4032681693 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 14159406207 ps |
| CPU time | 18.43 seconds |
| Started | Oct 12 04:54:03 PM UTC 24 |
| Finished | Oct 12 04:54:22 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032681693 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.4032681693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.3270449990 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 30602160726 ps |
| CPU time | 43.99 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:55 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270449990 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.3270449990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.436355108 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 156930454 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:12 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436355108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_av_buffer.436355108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3211381081 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 202865354 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:12 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211381081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.3211381081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.2409290466 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 487618725 ps |
| CPU time | 2.92 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:14 PM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409290466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.2409290466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.2219985804 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 1065229477 ps |
| CPU time | 4.43 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:15 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219985804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2219985804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.2720616862 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 15722255157 ps |
| CPU time | 31.7 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720616862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.2720616862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1140217793 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 619263444 ps |
| CPU time | 7 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:18 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140217793 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1140217793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.1766531245 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 818371784 ps |
| CPU time | 2.58 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:14 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766531245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.1766531245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.630310316 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 141217210 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:12 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630310316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_disconnected.630310316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_enable.2246600224 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 71780884 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246600224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.2246600224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.1175871668 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 967094727 ps |
| CPU time | 4.33 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:16 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175871668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.1175871668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.4231468809 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 345741734 ps |
| CPU time | 3.18 seconds |
| Started | Oct 12 04:54:16 PM UTC 24 |
| Finished | Oct 12 04:54:21 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231468809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.4231468809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.1172813249 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 221977160 ps |
| CPU time | 2.09 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:54:20 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172813249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1172813249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.1624510459 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 144052878 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:54:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624510459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.1624510459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.349068907 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 199567123 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:54:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349068907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_trans.349068907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.3256687399 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 2998001679 ps |
| CPU time | 20.93 seconds |
| Started | Oct 12 04:54:16 PM UTC 24 |
| Finished | Oct 12 04:54:39 PM UTC 24 |
| Peak memory | 236028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256687399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.3256687399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2455977347 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 11370992764 ps |
| CPU time | 68.27 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:55:27 PM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455977347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2455977347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.2294329392 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 220551551 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:54:19 PM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294329392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.2294329392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1655595974 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 31975531668 ps |
| CPU time | 51.08 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:55:09 PM UTC 24 |
| Peak memory | 218992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655595974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1655595974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.2284986966 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 5430101874 ps |
| CPU time | 10.44 seconds |
| Started | Oct 12 04:54:17 PM UTC 24 |
| Finished | Oct 12 04:54:28 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284986966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.2284986966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.919551762 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 3062383119 ps |
| CPU time | 22.15 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:47 PM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=919551762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.919551762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1878422187 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 2114919332 ps |
| CPU time | 19.57 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:45 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878422187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1878422187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.3734838047 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 247654642 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734838047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.3734838047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.4154692133 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 193055028 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154692133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.4154692133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.1439359204 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 3015782364 ps |
| CPU time | 21.66 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:47 PM UTC 24 |
| Peak memory | 236160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439359204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.1439359204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2090324574 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 3013494181 ps |
| CPU time | 21.17 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:47 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2090324574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2090324574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.1318904670 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 158860682 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:26 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318904670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.1318904670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1559612641 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 150276783 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559612641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1559612641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.3739110512 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 226359434 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739110512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.3739110512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.1448286828 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 154483247 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:54:24 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448286828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.1448286828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.2806919717 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 178697676 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:54:25 PM UTC 24 |
| Finished | Oct 12 04:54:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806919717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.2806919717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.2763918050 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 200211589 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:54:31 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763918050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.2763918050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.967042652 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 193746740 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=967042652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pending_in_trans.967042652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.2184948981 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 199316415 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184948981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.2184948981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.2419709930 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 142646675 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419709930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.2419709930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.3369482313 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 36611269 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369482313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3369482313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3584640122 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 20772801196 ps |
| CPU time | 53.1 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:55:27 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584640122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3584640122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.3753985410 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 172674262 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753985410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.3753985410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.177827490 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 280653147 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:35 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177827490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_pkt_sent.177827490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3847393356 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 209255598 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847393356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3847393356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2061607787 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 163508960 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:35 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061607787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2061607787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1107971096 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 20163683144 ps |
| CPU time | 25.18 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:59 PM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107971096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1107971096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.231334196 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 139915937 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:35 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231334196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_rx_crc_err.231334196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2823163278 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 270470485 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:35 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823163278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2823163278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2128957014 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 192075627 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:54:32 PM UTC 24 |
| Finished | Oct 12 04:54:35 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128957014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2128957014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.4093441419 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 168780422 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:54:40 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093441419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.4093441419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.2885237503 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 226924913 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:54:40 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885237503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.2885237503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.1625339011 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 2250251708 ps |
| CPU time | 20.6 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:55:02 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625339011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.1625339011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.2554670038 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 205064062 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554670038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.2554670038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.1442711993 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 154044437 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442711993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.1442711993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.126451223 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 311646431 ps |
| CPU time | 1.97 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:44 PM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126451223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_stream_len_max.126451223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.2630901150 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 3954167618 ps |
| CPU time | 33.49 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:55:16 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630901150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.2630901150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.1806832237 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 4890340802 ps |
| CPU time | 33.4 seconds |
| Started | Oct 12 04:54:10 PM UTC 24 |
| Finished | Oct 12 04:54:45 PM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806832237 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.1806832237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3260368744 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 578075887 ps |
| CPU time | 2.41 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:44 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3260368744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3260368744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.2611097428 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 157066526 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:28:07 PM UTC 24 |
| Finished | Oct 12 05:28:09 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611097428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.2611097428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.1979711615 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 288382935 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979711615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.1979711615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1297592943 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 503317402 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1297592943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1297592943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.898697923 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 757070806 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=898697923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.898697923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.778096630 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 560350923 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=778096630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_t x_rx_disruption.778096630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1663998688 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 320627474 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663998688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1663998688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.3652470300 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 216222812 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652470300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.3652470300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.2413016535 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 471148037 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2413016535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.2413016535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.962265895 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 343314513 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962265895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.962265895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.1239716757 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 323720383 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239716757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.1239716757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.2734389270 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 433179916 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2734389270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.2734389270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2347298642 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 196242563 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347298642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2347298642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.12732016 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 269254089 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12732016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 154.usbdev_fifo_levels.12732016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.1896916603 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 548438234 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1896916603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.1896916603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.4146340722 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 181726661 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146340722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.4146340722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.463844534 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 316937629 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463844534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 155.usbdev_fifo_levels.463844534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.1938558708 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 515817389 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1938558708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.1938558708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.222368855 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 461919974 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222368855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.222368855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.765607429 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 524767136 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=765607429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_t x_rx_disruption.765607429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.1696733872 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 264148925 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696733872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.1696733872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.2871952250 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 157663768 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871952250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.2871952250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3831757861 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 546944153 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3831757861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3831757861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.117361070 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 311064093 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:10 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117361070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.117361070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.171300941 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 593802479 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=171300941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_t x_rx_disruption.171300941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.341677721 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 76091207 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 04:55:14 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=341677721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.341677721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.1384081624 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 6092485443 ps |
| CPU time | 8.68 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384081624 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.1384081624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.2910824783 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 15060742728 ps |
| CPU time | 19.13 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910824783 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2910824783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.661404475 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 28555457815 ps |
| CPU time | 41.74 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:55:24 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=661404475 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.661404475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.2284666171 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 163976244 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284666171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.2284666171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.878349533 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 184159888 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:44 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878349533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_bitstuff_err.878349533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.1908072507 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 404428699 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:54:41 PM UTC 24 |
| Finished | Oct 12 04:54:44 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908072507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.1908072507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3811007630 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 22709285818 ps |
| CPU time | 40.23 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:55:30 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811007630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3811007630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.2196471061 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 627922859 ps |
| CPU time | 4.86 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:55 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196471061 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.2196471061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.2519699576 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 514223343 ps |
| CPU time | 2.03 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:52 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519699576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.2519699576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.412202882 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 134242994 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=412202882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_disconnected.412202882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1162832712 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 50165499 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162832712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1162832712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.2965802390 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 737939776 ps |
| CPU time | 2.86 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:53 PM UTC 24 |
| Peak memory | 219064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965802390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.2965802390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.699449067 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 290238791 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=699449067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.699449067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.3026389345 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 201871035 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026389345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.3026389345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.1697338934 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 272458873 ps |
| CPU time | 2.24 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:52 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697338934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.1697338934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.2966560462 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 228952177 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 227080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966560462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.2966560462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.1669426139 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 159189904 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:51 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669426139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.1669426139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.243329560 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 222195300 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243329560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_in_trans.243329560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3281115714 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 4228717872 ps |
| CPU time | 106.53 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:56:38 PM UTC 24 |
| Peak memory | 231124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281115714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3281115714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3440798513 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 8930445792 ps |
| CPU time | 94.47 seconds |
| Started | Oct 12 04:54:57 PM UTC 24 |
| Finished | Oct 12 04:56:35 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440798513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3440798513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1831995151 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 205547976 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 04:54:57 PM UTC 24 |
| Finished | Oct 12 04:55:00 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831995151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1831995151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.951870792 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 10163404336 ps |
| CPU time | 14.18 seconds |
| Started | Oct 12 04:54:57 PM UTC 24 |
| Finished | Oct 12 04:55:13 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951870792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.951870792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.2972635504 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 9156233189 ps |
| CPU time | 12.71 seconds |
| Started | Oct 12 04:54:57 PM UTC 24 |
| Finished | Oct 12 04:55:12 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972635504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.2972635504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.936391431 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 4327172646 ps |
| CPU time | 35.72 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:36 PM UTC 24 |
| Peak memory | 231400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936391431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.936391431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.982560273 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 2119742659 ps |
| CPU time | 52.04 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:52 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982560273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.982560273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.3511052487 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 244445102 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511052487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3511052487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.879638679 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 233022340 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879638679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.879638679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.667684329 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 1705170417 ps |
| CPU time | 12.13 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:12 PM UTC 24 |
| Peak memory | 235304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667684329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.667684329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.1365682395 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 2270348535 ps |
| CPU time | 54.76 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:55 PM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365682395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.1365682395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.75205489 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 158523846 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75205489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.75205489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3928686987 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 147910737 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928686987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3928686987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.3116237828 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 225257661 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116237828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.3116237828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.3429151262 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 230106545 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429151262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.3429151262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.1774484228 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 143862195 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774484228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.1774484228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.2768887941 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 177900029 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:54:58 PM UTC 24 |
| Finished | Oct 12 04:55:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768887941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.2768887941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.2830557422 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 286259767 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830557422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.2830557422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.545155982 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 142438320 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545155982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.545155982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.1271830308 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 76647763 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271830308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1271830308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.2224227405 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 19932824623 ps |
| CPU time | 48.37 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:56 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224227405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.2224227405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.969552060 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 182229546 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969552060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_pkt_received.969552060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3684283636 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 236726651 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:09 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684283636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3684283636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.1681941702 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 198291247 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681941702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.1681941702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.3457418642 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 168021427 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457418642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.3457418642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.4247822625 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 20242707303 ps |
| CPU time | 23.05 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:30 PM UTC 24 |
| Peak memory | 218992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247822625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.4247822625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.4271398927 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 147984132 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271398927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.4271398927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.2671227503 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 154744834 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671227503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.2671227503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.3007664160 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 153414865 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:08 PM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007664160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3007664160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.1337201233 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 242550545 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337201233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.1337201233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.3318270790 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 1997001694 ps |
| CPU time | 47.9 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:56 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318270790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.3318270790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.1977440243 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 177625735 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:55:06 PM UTC 24 |
| Finished | Oct 12 04:55:09 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977440243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.1977440243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.1146211264 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 172578843 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:55:14 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146211264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.1146211264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.2852368441 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 271422993 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:55:14 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852368441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.2852368441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3530803933 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 1785734390 ps |
| CPU time | 13.25 seconds |
| Started | Oct 12 04:55:14 PM UTC 24 |
| Finished | Oct 12 04:55:29 PM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530803933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3530803933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.3988154506 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 642276085 ps |
| CPU time | 5.33 seconds |
| Started | Oct 12 04:54:49 PM UTC 24 |
| Finished | Oct 12 04:54:55 PM UTC 24 |
| Peak memory | 219356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988154506 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.3988154506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.3093983800 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 493415524 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 04:55:14 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3093983800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.3093983800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.2826883160 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 512849605 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2826883160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.2826883160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.1880872630 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 569629570 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1880872630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.1880872630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2839967565 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 219357208 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839967565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.2839967565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.790684554 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 607370487 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 05:28:08 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=790684554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_t x_rx_disruption.790684554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.2791549476 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 628490384 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2791549476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.2791549476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3206026542 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 558444601 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206026542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.3206026542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.4096128001 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 580583570 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4096128001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.4096128001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3741873458 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 383803356 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741873458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3741873458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.2336206044 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 511494527 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2336206044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.2336206044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2326608236 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 464949447 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2326608236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2326608236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.4040831921 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 187874345 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 215372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040831921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.4040831921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.2231939571 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 538123976 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2231939571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.2231939571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.552250860 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 515147487 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552250860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.552250860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1044727431 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 572067672 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1044727431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1044727431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.2608760263 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 349739741 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608760263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.2608760263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.3188123617 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 495649118 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3188123617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.3188123617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.326720776 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 36815888 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 04:55:50 PM UTC 24 |
| Finished | Oct 12 04:55:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326720776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.326720776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.361307942 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 11100053786 ps |
| CPU time | 18.34 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361307942 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.361307942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.472006298 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 15474666182 ps |
| CPU time | 18.1 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=472006298 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.472006298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.1683332122 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 28855813743 ps |
| CPU time | 44.98 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:56:01 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683332122 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.1683332122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.2467004805 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 171204833 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467004805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.2467004805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.3131810078 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 146186862 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:17 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131810078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.3131810078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.2628746621 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 425906561 ps |
| CPU time | 1.99 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628746621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.2628746621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.1478137872 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 756537345 ps |
| CPU time | 2.11 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:18 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478137872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.1478137872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3440329891 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 37592778943 ps |
| CPU time | 60.55 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:56:17 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440329891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.3440329891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.1670893625 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 4970363167 ps |
| CPU time | 28.99 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:45 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670893625 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.1670893625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.2593489993 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 380990653 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:18 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593489993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.2593489993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.2147208232 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 137220545 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147208232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.2147208232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_enable.1306023400 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 36945126 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306023400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.1306023400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.795450752 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 949478131 ps |
| CPU time | 4.63 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:29 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=795450752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.795450752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3947582965 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 599054213 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:26 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947582965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3947582965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.1738919833 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 155951882 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738919833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.1738919833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.1033707344 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 183052429 ps |
| CPU time | 2.72 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:27 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033707344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.1033707344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.1682046189 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 224144892 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:26 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682046189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.1682046189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.2288578110 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 222963459 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288578110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.2288578110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.2519530166 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 183574422 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519530166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.2519530166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.3627603404 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 3787139721 ps |
| CPU time | 33.46 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:58 PM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627603404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.3627603404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.833086941 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 7677554685 ps |
| CPU time | 78.41 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:56:44 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=833086941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.833086941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.993293265 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 173405791 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:25 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=993293265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_in_err.993293265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.651756286 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 26645655905 ps |
| CPU time | 43.53 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:56:08 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651756286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_resume.651756286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.1558374475 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 10269181288 ps |
| CPU time | 13.47 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:38 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558374475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.1558374475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.2826760537 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 3309387177 ps |
| CPU time | 30.09 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:55 PM UTC 24 |
| Peak memory | 235896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826760537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.2826760537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.3461555342 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 3080016537 ps |
| CPU time | 27.82 seconds |
| Started | Oct 12 04:55:23 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 231524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461555342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.3461555342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.1827092497 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 244435818 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827092497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.1827092497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.1442813310 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 184618065 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442813310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.1442813310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.3532605835 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 3424317884 ps |
| CPU time | 86.82 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:57:00 PM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532605835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.3532605835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.2018322048 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 2059531726 ps |
| CPU time | 14.32 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:55:47 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018322048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2018322048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.4278724120 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 160788564 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278724120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.4278724120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.4210775154 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 163640574 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:55:31 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210775154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.4210775154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1196154942 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 236197836 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196154942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.1196154942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.529504580 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 180012216 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529504580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.529504580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.720486693 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 172294586 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720486693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.720486693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.3270854254 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 218366828 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270854254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.3270854254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.1435811957 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 163782465 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435811957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.1435811957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.1461831596 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 188289736 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461831596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.1461831596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.341299146 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 142453176 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:55:32 PM UTC 24 |
| Finished | Oct 12 04:55:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341299146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.341299146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.535633742 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 79060231 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:42 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535633742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_phy_pins_sense.535633742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.3746318280 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 6189307133 ps |
| CPU time | 14.78 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:56 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746318280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.3746318280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2168060383 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 176797009 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:42 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168060383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2168060383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.113420826 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 251323856 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113420826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.113420826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.2071748384 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 216007591 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071748384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.2071748384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.3979174827 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 176563592 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979174827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.3979174827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.112552818 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 20162147427 ps |
| CPU time | 27.2 seconds |
| Started | Oct 12 04:55:40 PM UTC 24 |
| Finished | Oct 12 04:56:09 PM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112552818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_resume_link_active.112552818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.1135774408 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 150263712 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135774408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.1135774408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.295775614 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 408210018 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:44 PM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=295775614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_rx_full.295775614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.698273563 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 216734484 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698273563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_setup_stage.698273563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2327434600 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 156117188 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327434600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2327434600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.2597667246 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 256621712 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:44 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597667246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.2597667246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2042670206 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 3208197838 ps |
| CPU time | 29.97 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 236188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042670206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2042670206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.3671900040 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 150551988 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671900040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.3671900040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.141413400 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 172069493 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:43 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141413400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_stall_trans.141413400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.2331123028 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 519486277 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:55:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331123028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.2331123028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.1554362081 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 2530615818 ps |
| CPU time | 59.16 seconds |
| Started | Oct 12 04:55:41 PM UTC 24 |
| Finished | Oct 12 04:56:42 PM UTC 24 |
| Peak memory | 236044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554362081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.1554362081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.1978671207 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 663565617 ps |
| CPU time | 4.95 seconds |
| Started | Oct 12 04:55:15 PM UTC 24 |
| Finished | Oct 12 04:55:21 PM UTC 24 |
| Peak memory | 219208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978671207 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.1978671207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.2701770666 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 490171911 ps |
| CPU time | 2.04 seconds |
| Started | Oct 12 04:55:50 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2701770666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.2701770666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.2111309607 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 518015440 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111309607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.2111309607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.1149593836 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 587988234 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1149593836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.1149593836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.2036469903 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 199526529 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036469903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.2036469903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.445255577 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 608020071 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=445255577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_t x_rx_disruption.445255577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.2403968636 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 370320830 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403968636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.2403968636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3922936160 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 494757103 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3922936160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3922936160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.1025961079 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 471536245 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1025961079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.1025961079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.1398083643 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 576733245 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398083643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1398083643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.133811412 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 514436133 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:28:09 PM UTC 24 |
| Finished | Oct 12 05:28:12 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=133811412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_t x_rx_disruption.133811412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.197324354 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 383247242 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:25 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197324354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.197324354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.1537777792 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 699000786 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1537777792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.1537777792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.1050606826 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 351148372 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:25 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050606826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.1050606826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.1870723579 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 516545057 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1870723579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.1870723579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.2687133146 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 658570242 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687133146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.2687133146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.3720367973 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 603862573 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3720367973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.3720367973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.869089234 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 546445063 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=869089234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.869089234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.397737359 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 536278436 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=397737359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_t x_rx_disruption.397737359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.1781611198 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 224477858 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:25 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781611198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1781611198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.942159249 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 471600168 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=942159249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_t x_rx_disruption.942159249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1227149540 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 81804416 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227149540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1227149540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.1823949722 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 7100904250 ps |
| CPU time | 10.48 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823949722 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.1823949722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.3302530526 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 16212116016 ps |
| CPU time | 18.95 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:11 PM UTC 24 |
| Peak memory | 229296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302530526 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3302530526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.240835889 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 30833214983 ps |
| CPU time | 39.93 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240835889 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.240835889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.1928162551 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 156688238 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928162551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.1928162551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2804664536 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 159862232 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804664536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2804664536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.3572713428 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 527074150 ps |
| CPU time | 2.47 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:54 PM UTC 24 |
| Peak memory | 218592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572713428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.3572713428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.2973760624 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 358100849 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973760624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.2973760624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.2859049915 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 33178296066 ps |
| CPU time | 49.7 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:42 PM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859049915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.2859049915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.1348649420 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 1553830072 ps |
| CPU time | 12.34 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:04 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348649420 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.1348649420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.770983581 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 574143941 ps |
| CPU time | 1.99 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=770983581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disable_endpoint.770983581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2260796838 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 135698331 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:55:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260796838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2260796838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3762029534 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 29432230 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762029534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3762029534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.3598523313 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 894048782 ps |
| CPU time | 2.73 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:03 PM UTC 24 |
| Peak memory | 219044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598523313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3598523313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1907311606 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 664700716 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907311606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1907311606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.2048613652 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 282233172 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048613652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.2048613652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.397233152 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 351875354 ps |
| CPU time | 2.59 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:03 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397233152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_fifo_rst.397233152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.499572236 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 189299807 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:03 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499572236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.499572236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.2212818593 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 151463259 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212818593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.2212818593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.2550339006 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 242599933 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550339006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.2550339006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.1027100071 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 3529099067 ps |
| CPU time | 31.1 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 236080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027100071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1027100071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.4223656312 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 13014542174 ps |
| CPU time | 141.22 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:58:24 PM UTC 24 |
| Peak memory | 220508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223656312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.4223656312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.2720690592 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 209155229 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720690592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.2720690592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2632047879 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 29908372986 ps |
| CPU time | 41.99 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:44 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632047879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2632047879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.2183427160 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 8896248264 ps |
| CPU time | 13.32 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:15 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183427160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.2183427160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2172301745 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 5018692812 ps |
| CPU time | 45.21 seconds |
| Started | Oct 12 04:56:00 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 235748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172301745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2172301745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.1600557915 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 3697233412 ps |
| CPU time | 89.42 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:57:41 PM UTC 24 |
| Peak memory | 229492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600557915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.1600557915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.1612257234 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 278730294 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612257234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.1612257234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.4086848409 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 214172754 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086848409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.4086848409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.738678639 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 2700387266 ps |
| CPU time | 63.06 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:57:15 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738678639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.738678639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.4033318170 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 3627291344 ps |
| CPU time | 86.52 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:57:38 PM UTC 24 |
| Peak memory | 229496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033318170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.4033318170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.2031049566 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 162586747 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031049566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.2031049566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.3909345553 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 167849868 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909345553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.3909345553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.143121079 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 219341621 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143121079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_nak_trans.143121079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3893615479 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 183311401 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893615479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3893615479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.2692771810 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 191636061 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692771810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.2692771810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.189594171 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 197854044 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=189594171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.189594171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.3523854449 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 209404279 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523854449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.3523854449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.3886808092 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 265566604 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:12 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886808092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.3886808092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.877544396 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 146211374 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877544396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.877544396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.1099430199 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 35516670 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 04:56:10 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099430199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.1099430199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.2550455935 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 12403652240 ps |
| CPU time | 35.13 seconds |
| Started | Oct 12 04:56:11 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 227908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550455935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.2550455935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.3776720162 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 190377078 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:56:11 PM UTC 24 |
| Finished | Oct 12 04:56:13 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776720162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.3776720162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.1759595051 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 201490278 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759595051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.1759595051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.2826846119 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 235487346 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826846119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.2826846119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2334734557 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 144186411 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334734557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2334734557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.4101725794 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 20164159648 ps |
| CPU time | 26.6 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101725794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.4101725794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.3062597456 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 143197757 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:22 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062597456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.3062597456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.3325741996 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 365985491 ps |
| CPU time | 1.9 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325741996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.3325741996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.3416570032 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 164789928 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416570032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.3416570032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.2650862092 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 149896130 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650862092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.2650862092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1873620045 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 208345226 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:56:20 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873620045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1873620045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.377979860 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 1785073475 ps |
| CPU time | 13.04 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:35 PM UTC 24 |
| Peak memory | 235912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=377979860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.377979860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.2016884344 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 192325840 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016884344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.2016884344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.1760516837 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 170704370 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760516837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.1760516837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.3110009800 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 913450970 ps |
| CPU time | 2.54 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:24 PM UTC 24 |
| Peak memory | 219236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110009800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.3110009800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1477091559 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 1589725972 ps |
| CPU time | 37.36 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477091559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1477091559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.120894918 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 6097868755 ps |
| CPU time | 37.74 seconds |
| Started | Oct 12 04:55:51 PM UTC 24 |
| Finished | Oct 12 04:56:30 PM UTC 24 |
| Peak memory | 219380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120894918 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.120894918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.3947444761 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 537846105 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:24 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3947444761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.3947444761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.686260360 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 537599105 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=686260360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_t x_rx_disruption.686260360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.3549588393 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 365151971 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549588393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.3549588393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.125869238 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 540403631 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=125869238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_t x_rx_disruption.125869238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.1126611235 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 304534533 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:29:23 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126611235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.1126611235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.3816110062 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 537456199 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3816110062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.3816110062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.1787959165 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 359213459 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787959165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.1787959165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.1199626668 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 592885124 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1199626668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.1199626668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2968151411 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 283339466 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968151411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2968151411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.3376445418 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 537357526 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3376445418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.3376445418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.2492330775 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 387655564 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492330775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.2492330775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.3451084558 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 623388663 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3451084558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.3451084558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.3818246807 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 149118832 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818246807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.3818246807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.1117813443 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 511284367 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1117813443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.1117813443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.2775640907 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 366701771 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775640907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.2775640907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.373253332 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 476880528 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=373253332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_t x_rx_disruption.373253332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.2411301510 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 226292543 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411301510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.2411301510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.4146441905 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 574371491 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4146441905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.4146441905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.286768566 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 695893316 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286768566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.286768566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.2825938190 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 550734131 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2825938190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.2825938190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2123143453 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 95159434 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123143453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2123143453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.3825193325 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 9550899116 ps |
| CPU time | 15.77 seconds |
| Started | Oct 12 04:56:21 PM UTC 24 |
| Finished | Oct 12 04:56:38 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825193325 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.3825193325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.3689466934 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 19775890698 ps |
| CPU time | 29.36 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:57:00 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689466934 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.3689466934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2156845520 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 23845829821 ps |
| CPU time | 31.89 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:57:02 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156845520 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2156845520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.1341285308 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 176574493 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341285308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.1341285308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1232129747 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 149367048 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:31 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232129747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1232129747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.1895737204 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 395003989 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895737204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.1895737204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.3723440479 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 933255043 ps |
| CPU time | 2.87 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:33 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723440479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.3723440479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2297511375 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 20475037657 ps |
| CPU time | 39.14 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:57:10 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297511375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2297511375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.1579420177 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 5688965801 ps |
| CPU time | 32.29 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:57:03 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579420177 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.1579420177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.2436016620 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 759439230 ps |
| CPU time | 3.68 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:34 PM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436016620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.2436016620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3153382533 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 171376987 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153382533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3153382533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_enable.1816003190 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 38630192 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816003190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.1816003190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3927731980 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 807428347 ps |
| CPU time | 4.03 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:35 PM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927731980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3927731980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.2329233682 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 151891076 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:56:30 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329233682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.2329233682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.1746565341 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 173488137 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:56:30 PM UTC 24 |
| Finished | Oct 12 04:56:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746565341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.1746565341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.2344190403 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 313703714 ps |
| CPU time | 2.54 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:56:40 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344190403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.2344190403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.4013107114 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 251971051 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:56:39 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013107114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.4013107114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1008481140 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 158317449 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:56:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008481140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1008481140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.2952014310 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 165010167 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:56:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952014310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.2952014310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.3201039421 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 4673829561 ps |
| CPU time | 40.37 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:57:18 PM UTC 24 |
| Peak memory | 236028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201039421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.3201039421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.3355879299 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 12689032714 ps |
| CPU time | 83.22 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:58:02 PM UTC 24 |
| Peak memory | 219244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355879299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.3355879299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.609792386 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 240424894 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:56:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609792386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.609792386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.25437044 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 30444789567 ps |
| CPU time | 47.86 seconds |
| Started | Oct 12 04:56:36 PM UTC 24 |
| Finished | Oct 12 04:57:26 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25437044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_link_resume.25437044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.1823237705 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 9394151302 ps |
| CPU time | 18.66 seconds |
| Started | Oct 12 04:56:37 PM UTC 24 |
| Finished | Oct 12 04:56:56 PM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823237705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.1823237705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.1451702791 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 4388785053 ps |
| CPU time | 33.29 seconds |
| Started | Oct 12 04:56:37 PM UTC 24 |
| Finished | Oct 12 04:57:11 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451702791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.1451702791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.4076524647 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 3625268505 ps |
| CPU time | 89.74 seconds |
| Started | Oct 12 04:56:37 PM UTC 24 |
| Finished | Oct 12 04:58:08 PM UTC 24 |
| Peak memory | 229752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076524647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.4076524647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.2456801441 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 286421724 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456801441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.2456801441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.3360699945 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 206934325 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360699945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3360699945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.717349081 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 3533530063 ps |
| CPU time | 24.61 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:57:11 PM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717349081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.717349081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.1217416720 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 2960935863 ps |
| CPU time | 26.99 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:57:13 PM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217416720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.1217416720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.3566561338 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 158419161 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566561338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3566561338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.2819426781 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 191478913 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819426781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.2819426781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.4223278143 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 156953202 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223278143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.4223278143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.2865252551 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 208659377 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865252551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.2865252551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.810601988 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 230911140 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=810601988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_out_trans_nak.810601988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.1380186726 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 160410432 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380186726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.1380186726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.2931703177 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 248389900 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 04:56:45 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931703177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.2931703177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.2613731129 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 200842281 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 04:56:46 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613731129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.2613731129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2358211211 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 89427456 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 04:56:46 PM UTC 24 |
| Finished | Oct 12 04:56:48 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358211211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2358211211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3690379575 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 10124902660 ps |
| CPU time | 24.74 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:22 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690379575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.3690379575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.342214569 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 233187196 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342214569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_pkt_received.342214569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.755023358 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 301976470 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755023358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_pkt_sent.755023358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3589621698 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 236735602 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589621698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3589621698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.1039121688 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 191693998 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039121688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.1039121688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.968256401 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 20179175213 ps |
| CPU time | 29.33 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:27 PM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968256401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.968256401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.1672012728 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 166542066 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672012728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.1672012728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.4993122 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 293661446 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4993122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_full.4993122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.1698623713 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 158769320 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698623713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.1698623713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.1969920226 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 171877584 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969920226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.1969920226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.2051876792 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 207636530 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051876792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.2051876792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.3370393449 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 1529878128 ps |
| CPU time | 10.95 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:09 PM UTC 24 |
| Peak memory | 236024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370393449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.3370393449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.1551098059 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 142471814 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551098059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.1551098059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.2497757794 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 179687337 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:56:59 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497757794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.2497757794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.1402673950 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 734353005 ps |
| CPU time | 2.46 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:00 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1402673950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.1402673950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.804665041 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 4174392840 ps |
| CPU time | 28.14 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:26 PM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804665041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_streaming_out.804665041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.3236299206 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 976991354 ps |
| CPU time | 21.7 seconds |
| Started | Oct 12 04:56:29 PM UTC 24 |
| Finished | Oct 12 04:56:52 PM UTC 24 |
| Peak memory | 219320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236299206 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.3236299206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.331925207 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 507343290 ps |
| CPU time | 2.51 seconds |
| Started | Oct 12 04:56:56 PM UTC 24 |
| Finished | Oct 12 04:57:00 PM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=331925207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_tx _rx_disruption.331925207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.1677678909 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 152661706 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677678909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.1677678909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.3967158586 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 575818305 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3967158586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.3967158586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.3018037080 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 307346256 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018037080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.3018037080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.167569151 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 499482352 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=167569151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_t x_rx_disruption.167569151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.3253095921 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 201284369 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253095921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.3253095921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2816027935 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 544723964 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2816027935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2816027935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1040853826 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 527351828 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040853826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1040853826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.1386685123 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 632990102 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1386685123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.1386685123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.1217533567 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 298208908 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217533567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.1217533567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.870671179 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 629944551 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=870671179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_t x_rx_disruption.870671179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.2483537856 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 514245718 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483537856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2483537856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.3870164058 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 442798010 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3870164058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.3870164058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.1040114072 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 553161447 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040114072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.1040114072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.1113376489 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 520972140 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1113376489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.1113376489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.3987535042 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 521208806 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987535042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.3987535042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.4096783052 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 511621646 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4096783052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.4096783052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.1561372996 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 177331657 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:26 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561372996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.1561372996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3578183767 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 573407350 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3578183767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3578183767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.3440336542 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 171050856 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:29:24 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440336542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.3440336542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.3467610839 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 514919477 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3467610839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.3467610839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.3517819466 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 43213854 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 04:42:38 PM UTC 24 |
| Finished | Oct 12 04:42:40 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517819466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.3517819466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3021642242 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 10245197914 ps |
| CPU time | 26.45 seconds |
| Started | Oct 12 04:40:30 PM UTC 24 |
| Finished | Oct 12 04:40:58 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021642242 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.3021642242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.1573528936 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 15262869751 ps |
| CPU time | 43.88 seconds |
| Started | Oct 12 04:40:30 PM UTC 24 |
| Finished | Oct 12 04:41:16 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573528936 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.1573528936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.1283358320 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 30630028595 ps |
| CPU time | 64.02 seconds |
| Started | Oct 12 04:40:32 PM UTC 24 |
| Finished | Oct 12 04:41:38 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283358320 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.1283358320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.3185370061 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 208124093 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:40:32 PM UTC 24 |
| Finished | Oct 12 04:40:35 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185370061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.3185370061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.3733386204 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 137359857 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:40:39 PM UTC 24 |
| Finished | Oct 12 04:40:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733386204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.3733386204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.2416864732 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 397891384 ps |
| CPU time | 2.68 seconds |
| Started | Oct 12 04:40:41 PM UTC 24 |
| Finished | Oct 12 04:40:44 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416864732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.2416864732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.1916535559 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 1077105524 ps |
| CPU time | 5.25 seconds |
| Started | Oct 12 04:40:43 PM UTC 24 |
| Finished | Oct 12 04:40:49 PM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916535559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.1916535559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.2766277336 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 39538740687 ps |
| CPU time | 93.73 seconds |
| Started | Oct 12 04:40:43 PM UTC 24 |
| Finished | Oct 12 04:42:19 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766277336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.2766277336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.765314614 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 873637487 ps |
| CPU time | 21.18 seconds |
| Started | Oct 12 04:40:45 PM UTC 24 |
| Finished | Oct 12 04:41:08 PM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765314614 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.765314614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.3919401627 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 548952184 ps |
| CPU time | 2.84 seconds |
| Started | Oct 12 04:40:50 PM UTC 24 |
| Finished | Oct 12 04:40:54 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919401627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.3919401627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1678609439 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 159402289 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:40:50 PM UTC 24 |
| Finished | Oct 12 04:40:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678609439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.1678609439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_enable.2148020016 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 53087991 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:40:52 PM UTC 24 |
| Finished | Oct 12 04:40:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148020016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.2148020016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.902966272 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 943252852 ps |
| CPU time | 4.84 seconds |
| Started | Oct 12 04:40:54 PM UTC 24 |
| Finished | Oct 12 04:41:00 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902966272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.902966272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1555185803 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 417863238 ps |
| CPU time | 2.59 seconds |
| Started | Oct 12 04:40:56 PM UTC 24 |
| Finished | Oct 12 04:41:00 PM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555185803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.1555185803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.575037982 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 341166337 ps |
| CPU time | 3.06 seconds |
| Started | Oct 12 04:41:00 PM UTC 24 |
| Finished | Oct 12 04:41:05 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575037982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_fifo_rst.575037982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1199798535 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 87203560761 ps |
| CPU time | 184.61 seconds |
| Started | Oct 12 04:41:00 PM UTC 24 |
| Finished | Oct 12 04:44:08 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199798535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1199798535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.1781394531 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 99137824383 ps |
| CPU time | 178.29 seconds |
| Started | Oct 12 04:41:00 PM UTC 24 |
| Finished | Oct 12 04:44:02 PM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1781394531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.1781394531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.4143098700 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 110173605678 ps |
| CPU time | 244.91 seconds |
| Started | Oct 12 04:41:00 PM UTC 24 |
| Finished | Oct 12 04:45:09 PM UTC 24 |
| Peak memory | 220592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143098700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.4143098700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.1482078018 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 97015002094 ps |
| CPU time | 247.04 seconds |
| Started | Oct 12 04:41:03 PM UTC 24 |
| Finished | Oct 12 04:45:14 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1482078018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.1482078018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.3633781892 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 85162657279 ps |
| CPU time | 178.57 seconds |
| Started | Oct 12 04:41:05 PM UTC 24 |
| Finished | Oct 12 04:44:06 PM UTC 24 |
| Peak memory | 219444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633781892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.3633781892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.73712081 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 220982106 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:41:07 PM UTC 24 |
| Finished | Oct 12 04:41:10 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73712081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.73712081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3915268865 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 140539576 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:41:09 PM UTC 24 |
| Finished | Oct 12 04:41:11 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915268865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.3915268865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.2935856568 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 249015949 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 04:41:11 PM UTC 24 |
| Finished | Oct 12 04:41:14 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935856568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.2935856568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1923303549 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 3620316582 ps |
| CPU time | 38.42 seconds |
| Started | Oct 12 04:41:05 PM UTC 24 |
| Finished | Oct 12 04:41:45 PM UTC 24 |
| Peak memory | 231360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923303549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1923303549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.3387102035 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 9451858003 ps |
| CPU time | 105.5 seconds |
| Started | Oct 12 04:41:13 PM UTC 24 |
| Finished | Oct 12 04:43:01 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387102035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.3387102035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.2318235851 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 205863510 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:41:13 PM UTC 24 |
| Finished | Oct 12 04:41:16 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318235851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.2318235851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.1448334030 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 4066559606 ps |
| CPU time | 11.68 seconds |
| Started | Oct 12 04:41:17 PM UTC 24 |
| Finished | Oct 12 04:41:31 PM UTC 24 |
| Peak memory | 229256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448334030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.1448334030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.2178581194 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 3832143726 ps |
| CPU time | 130.48 seconds |
| Started | Oct 12 04:41:17 PM UTC 24 |
| Finished | Oct 12 04:43:31 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178581194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.2178581194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.3659271315 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 2926966867 ps |
| CPU time | 84.69 seconds |
| Started | Oct 12 04:41:26 PM UTC 24 |
| Finished | Oct 12 04:42:52 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659271315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.3659271315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.1646801627 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 236546026 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 04:41:32 PM UTC 24 |
| Finished | Oct 12 04:41:35 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646801627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.1646801627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.628440985 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 231646044 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 04:41:32 PM UTC 24 |
| Finished | Oct 12 04:41:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=628440985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.628440985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.1878987380 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 2438171720 ps |
| CPU time | 76.57 seconds |
| Started | Oct 12 04:41:36 PM UTC 24 |
| Finished | Oct 12 04:42:55 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878987380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.1878987380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.351251844 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 2122787605 ps |
| CPU time | 30.43 seconds |
| Started | Oct 12 04:41:36 PM UTC 24 |
| Finished | Oct 12 04:42:08 PM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351251844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.351251844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.1444938252 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 2319033627 ps |
| CPU time | 20.97 seconds |
| Started | Oct 12 04:41:38 PM UTC 24 |
| Finished | Oct 12 04:42:01 PM UTC 24 |
| Peak memory | 235932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444938252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1444938252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.3455554312 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 246690551 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:41:38 PM UTC 24 |
| Finished | Oct 12 04:41:41 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455554312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3455554312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.1088805244 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 172085360 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:41:41 PM UTC 24 |
| Finished | Oct 12 04:41:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088805244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.1088805244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.3684324086 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 204037095 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:41:43 PM UTC 24 |
| Finished | Oct 12 04:41:45 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684324086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.3684324086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.4152949367 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 160357109 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:41:45 PM UTC 24 |
| Finished | Oct 12 04:41:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152949367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.4152949367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.2752937152 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 184146784 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:41:47 PM UTC 24 |
| Finished | Oct 12 04:41:50 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752937152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.2752937152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.1167882338 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 181718731 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:41:47 PM UTC 24 |
| Finished | Oct 12 04:41:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167882338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.1167882338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.2145137758 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 153687832 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:41:49 PM UTC 24 |
| Finished | Oct 12 04:41:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145137758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.2145137758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1515873420 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 218847270 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:41:51 PM UTC 24 |
| Finished | Oct 12 04:41:54 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515873420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.1515873420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.3563077126 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 250241079 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 04:41:51 PM UTC 24 |
| Finished | Oct 12 04:41:54 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563077126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.3563077126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.2243434512 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 146016305 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:41:53 PM UTC 24 |
| Finished | Oct 12 04:41:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243434512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.2243434512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2646368598 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 36402378 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:41:56 PM UTC 24 |
| Finished | Oct 12 04:41:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646368598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.2646368598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.3707580332 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 11609866193 ps |
| CPU time | 32.91 seconds |
| Started | Oct 12 04:41:56 PM UTC 24 |
| Finished | Oct 12 04:42:30 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707580332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.3707580332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.2125618152 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 179917134 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 04:41:58 PM UTC 24 |
| Finished | Oct 12 04:42:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125618152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.2125618152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.2319876933 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 188246574 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:42:00 PM UTC 24 |
| Finished | Oct 12 04:42:02 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319876933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.2319876933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.2499629482 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 2488693242 ps |
| CPU time | 78.74 seconds |
| Started | Oct 12 04:42:03 PM UTC 24 |
| Finished | Oct 12 04:43:23 PM UTC 24 |
| Peak memory | 231464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499629482 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.2499629482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.2533985076 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 10216903804 ps |
| CPU time | 72.51 seconds |
| Started | Oct 12 04:42:05 PM UTC 24 |
| Finished | Oct 12 04:43:20 PM UTC 24 |
| Peak memory | 231352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533985076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.2533985076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.376099317 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 8960491757 ps |
| CPU time | 66.33 seconds |
| Started | Oct 12 04:42:05 PM UTC 24 |
| Finished | Oct 12 04:43:13 PM UTC 24 |
| Peak memory | 236048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=376099317 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.376099317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.905829793 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 197374814 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:42:03 PM UTC 24 |
| Finished | Oct 12 04:42:05 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905829793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_random_length_in_transaction.905829793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2291547135 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 181924988 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:42:03 PM UTC 24 |
| Finished | Oct 12 04:42:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291547135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.2291547135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.1706277690 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 20208017289 ps |
| CPU time | 24.11 seconds |
| Started | Oct 12 04:42:07 PM UTC 24 |
| Finished | Oct 12 04:42:33 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706277690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.1706277690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.352607422 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 152788759 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:42:07 PM UTC 24 |
| Finished | Oct 12 04:42:10 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=352607422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_crc_err.352607422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.2693471252 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 343793958 ps |
| CPU time | 2.17 seconds |
| Started | Oct 12 04:42:10 PM UTC 24 |
| Finished | Oct 12 04:42:13 PM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693471252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.2693471252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.2354108972 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 186794682 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:42:12 PM UTC 24 |
| Finished | Oct 12 04:42:14 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354108972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.2354108972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.4002710966 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 413737736 ps |
| CPU time | 2.24 seconds |
| Started | Oct 12 04:42:36 PM UTC 24 |
| Finished | Oct 12 04:42:40 PM UTC 24 |
| Peak memory | 253316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002710966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.4002710966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2654831504 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 409713653 ps |
| CPU time | 2.21 seconds |
| Started | Oct 12 04:42:14 PM UTC 24 |
| Finished | Oct 12 04:42:17 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654831504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2654831504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.2004003435 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 228615806 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 04:42:16 PM UTC 24 |
| Finished | Oct 12 04:42:19 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004003435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.2004003435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1410646110 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 182708623 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:42:18 PM UTC 24 |
| Finished | Oct 12 04:42:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410646110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1410646110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1266319536 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 195597721 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:42:21 PM UTC 24 |
| Finished | Oct 12 04:42:23 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266319536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1266319536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.56205535 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 223636613 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:42:21 PM UTC 24 |
| Finished | Oct 12 04:42:23 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56205535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 2.usbdev_smoke.56205535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.3426232884 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 2457776409 ps |
| CPU time | 32.52 seconds |
| Started | Oct 12 04:42:23 PM UTC 24 |
| Finished | Oct 12 04:42:57 PM UTC 24 |
| Peak memory | 231464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426232884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.3426232884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.385895315 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 169950727 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:42:25 PM UTC 24 |
| Finished | Oct 12 04:42:28 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385895315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.385895315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.2872047037 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 168581943 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:42:25 PM UTC 24 |
| Finished | Oct 12 04:42:28 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2872047037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.2872047037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.2739494250 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 219928003 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:42:29 PM UTC 24 |
| Finished | Oct 12 04:42:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739494250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.2739494250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.2920499527 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 2616448203 ps |
| CPU time | 17.85 seconds |
| Started | Oct 12 04:42:29 PM UTC 24 |
| Finished | Oct 12 04:42:49 PM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920499527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.2920499527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.390635774 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 7451661536 ps |
| CPU time | 92.41 seconds |
| Started | Oct 12 04:42:32 PM UTC 24 |
| Finished | Oct 12 04:44:06 PM UTC 24 |
| Peak memory | 231576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=390635774 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.390635774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.2312796198 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 1957183812 ps |
| CPU time | 21.17 seconds |
| Started | Oct 12 04:40:50 PM UTC 24 |
| Finished | Oct 12 04:41:12 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312796198 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.2312796198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.457246088 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 622787660 ps |
| CPU time | 3.1 seconds |
| Started | Oct 12 04:42:34 PM UTC 24 |
| Finished | Oct 12 04:42:38 PM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=457246088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx_ rx_disruption.457246088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3326480234 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 58856745 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326480234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3326480234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.1307622053 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 10388885463 ps |
| CPU time | 15.01 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:22 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307622053 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.1307622053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.903320094 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 15425051703 ps |
| CPU time | 18.62 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:26 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903320094 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.903320094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.3740149697 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 31345656422 ps |
| CPU time | 39.73 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:47 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740149697 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.3740149697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.2576008807 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 180994739 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576008807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.2576008807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.2364084871 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 174002040 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364084871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.2364084871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.2503061955 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 144734624 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503061955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.2503061955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.2805241847 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 1219881800 ps |
| CPU time | 2.99 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:10 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805241847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.2805241847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.3209003791 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 27179114845 ps |
| CPU time | 47.45 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:55 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209003791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3209003791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1501746977 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 284731456 ps |
| CPU time | 4.24 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:12 PM UTC 24 |
| Peak memory | 219244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501746977 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1501746977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.1381641294 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 867525474 ps |
| CPU time | 3.38 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:11 PM UTC 24 |
| Peak memory | 218900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381641294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.1381641294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.2185621818 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 151982087 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185621818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.2185621818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_enable.3240426191 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 60749679 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:08 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240426191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.3240426191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.3856135793 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 962492501 ps |
| CPU time | 3.06 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:11 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856135793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.3856135793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.39065445 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 417140657 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:19 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=39065445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.39065445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.282387931 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 211158998 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:19 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282387931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_fifo_levels.282387931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.1367891701 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 292025704 ps |
| CPU time | 2.33 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:20 PM UTC 24 |
| Peak memory | 218964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367891701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.1367891701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.1000518622 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 240126614 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:20 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000518622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.1000518622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2356040300 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 153227061 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:19 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356040300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2356040300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.3893654574 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 154584487 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893654574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.3893654574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.143856688 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 3894606595 ps |
| CPU time | 97.3 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:58:56 PM UTC 24 |
| Peak memory | 232804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=143856688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.143856688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.3577940889 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 5136310987 ps |
| CPU time | 29.17 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:48 PM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577940889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.3577940889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1282403446 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 304421402 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282403446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.1282403446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.4023277919 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 26493054567 ps |
| CPU time | 39.97 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:59 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4023277919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.4023277919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.4051998443 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 8726762095 ps |
| CPU time | 11.55 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:30 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051998443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.4051998443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.3039719218 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 3937372784 ps |
| CPU time | 92.91 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:58:52 PM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039719218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.3039719218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.3738139244 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 3333640112 ps |
| CPU time | 22.42 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:41 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738139244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.3738139244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.518135386 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 267229594 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:20 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518135386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.518135386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4104297141 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 221211210 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:57:20 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104297141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4104297141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.3383148020 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 2888352097 ps |
| CPU time | 68.58 seconds |
| Started | Oct 12 04:57:17 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383148020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.3383148020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.3940000549 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 1983762341 ps |
| CPU time | 13.07 seconds |
| Started | Oct 12 04:57:18 PM UTC 24 |
| Finished | Oct 12 04:57:32 PM UTC 24 |
| Peak memory | 235768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940000549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.3940000549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.4145503370 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 151291052 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 04:57:18 PM UTC 24 |
| Finished | Oct 12 04:57:19 PM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145503370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.4145503370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1143926479 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 159004937 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143926479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1143926479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.1242955766 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 238331320 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242955766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.1242955766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2666987316 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 179671966 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666987316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.2666987316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.3771496787 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 172078109 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771496787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.3771496787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.1200724018 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 188793095 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200724018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.1200724018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1111698163 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 245373900 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111698163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1111698163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2277779841 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 140442741 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277779841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2277779841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.3648091701 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 36322463 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648091701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.3648091701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.3465024335 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 24101487508 ps |
| CPU time | 60.52 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:58:29 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465024335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.3465024335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.4007401769 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 152207812 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007401769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.4007401769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.513549141 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 215888259 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513549141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_pkt_sent.513549141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.2669278107 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 215934600 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669278107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.2669278107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.3467831040 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 154686582 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467831040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.3467831040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.1234974213 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 152339692 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:57:27 PM UTC 24 |
| Finished | Oct 12 04:57:29 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234974213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.1234974213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.2319549915 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 371921653 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319549915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.2319549915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.4223031486 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 162665682 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223031486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.4223031486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.1843490448 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 161920879 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843490448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.1843490448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3656081104 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 222389459 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656081104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3656081104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.2879903791 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 2917925915 ps |
| CPU time | 67.92 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:58:50 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879903791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2879903791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.3333977113 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 175598476 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333977113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.3333977113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.3073969801 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 205580363 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073969801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.3073969801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.1989970947 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 382625217 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989970947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.1989970947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.3858877968 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 2453295541 ps |
| CPU time | 60.93 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:58:43 PM UTC 24 |
| Peak memory | 229348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858877968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.3858877968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3947984892 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 1082921673 ps |
| CPU time | 8.19 seconds |
| Started | Oct 12 04:57:06 PM UTC 24 |
| Finished | Oct 12 04:57:16 PM UTC 24 |
| Peak memory | 219176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947984892 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3947984892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.1012319566 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 453365481 ps |
| CPU time | 2.06 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:43 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1012319566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.1012319566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.1602996897 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 463931189 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1602996897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.1602996897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.3095624062 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 497813957 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3095624062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.3095624062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.2508284267 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 531127195 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2508284267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.2508284267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.236817424 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 701176128 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=236817424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_t x_rx_disruption.236817424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2559461481 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 496558522 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2559461481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2559461481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1625594942 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 576091841 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1625594942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1625594942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3810017417 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 521881402 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3810017417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3810017417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.3243503114 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 442246155 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3243503114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.3243503114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.3453818128 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 484413813 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:27 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3453818128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.3453818128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.1435844224 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 499076501 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1435844224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.1435844224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.3778914437 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 71626797 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778914437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.3778914437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.378588690 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 4233556307 ps |
| CPU time | 6.96 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:48 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=378588690 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.378588690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1943335265 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 21387562821 ps |
| CPU time | 29.4 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:58:11 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943335265 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1943335265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3090099495 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 30795117500 ps |
| CPU time | 38.47 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:58:20 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090099495 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3090099495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1704397434 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 160845828 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704397434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.1704397434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.4038043723 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 190597659 ps |
| CPU time | 1 seconds |
| Started | Oct 12 04:57:40 PM UTC 24 |
| Finished | Oct 12 04:57:43 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038043723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.4038043723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.2603500483 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 290869988 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:57:43 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603500483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.2603500483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.3707091947 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 1087329590 ps |
| CPU time | 3.06 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:57:45 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707091947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.3707091947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3099583202 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 47997186673 ps |
| CPU time | 85.09 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:59:08 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099583202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3099583202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.106744320 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 2550339481 ps |
| CPU time | 18.78 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:58:01 PM UTC 24 |
| Peak memory | 219296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=106744320 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.106744320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.1119886524 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 830756786 ps |
| CPU time | 2.15 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:57:44 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119886524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.1119886524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.2607544008 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 137921262 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607544008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.2607544008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_enable.4046678137 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 31608269 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046678137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.4046678137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.3277553245 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 848862662 ps |
| CPU time | 3.52 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:56 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277553245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.3277553245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.1765096008 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 338833897 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:53 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765096008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.1765096008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.1910020622 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 265891348 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910020622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.1910020622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.3377469280 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 445594561 ps |
| CPU time | 3.99 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:56 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377469280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.3377469280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.4119478887 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 265782161 ps |
| CPU time | 2.2 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:54 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119478887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.4119478887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.19152813 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 192566835 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:53 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19152813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_in_stall.19152813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.1952045088 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 290374449 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:54 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952045088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.1952045088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3579802792 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 2989805605 ps |
| CPU time | 73.82 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:59:07 PM UTC 24 |
| Peak memory | 231380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579802792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3579802792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.3354046924 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 6808651102 ps |
| CPU time | 40.97 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:58:34 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354046924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.3354046924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.3051078522 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 221290940 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:57:53 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051078522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.3051078522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.1564678378 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 5304095190 ps |
| CPU time | 9.76 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:58:02 PM UTC 24 |
| Peak memory | 229020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564678378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.1564678378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.1688354983 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 10344159877 ps |
| CPU time | 14.14 seconds |
| Started | Oct 12 04:57:51 PM UTC 24 |
| Finished | Oct 12 04:58:07 PM UTC 24 |
| Peak memory | 218856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688354983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.1688354983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.3327049987 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 3605730727 ps |
| CPU time | 87.4 seconds |
| Started | Oct 12 04:57:52 PM UTC 24 |
| Finished | Oct 12 04:59:21 PM UTC 24 |
| Peak memory | 231652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327049987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3327049987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1094044070 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 2116376245 ps |
| CPU time | 48.96 seconds |
| Started | Oct 12 04:57:52 PM UTC 24 |
| Finished | Oct 12 04:58:42 PM UTC 24 |
| Peak memory | 229360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094044070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1094044070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.1062159153 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 241983774 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 04:57:52 PM UTC 24 |
| Finished | Oct 12 04:57:54 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062159153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1062159153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.4011144382 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 210432128 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:04 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011144382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.4011144382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.2044959022 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 1888309526 ps |
| CPU time | 12.52 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044959022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.2044959022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.1333064907 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 2377449916 ps |
| CPU time | 57.8 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:59:02 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333064907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.1333064907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.4142205033 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 162262130 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142205033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.4142205033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1233954351 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 181813691 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233954351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.1233954351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.1372769917 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 181063124 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372769917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.1372769917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.2481531557 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 225571256 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481531557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.2481531557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.482931991 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 203156064 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:58:02 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482931991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.482931991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2199118274 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 200169996 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199118274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.2199118274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.1759418546 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 150174605 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759418546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.1759418546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.71299263 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 215419701 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=71299263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.71299263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.1803020708 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 145202360 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:04 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803020708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.1803020708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.3875205259 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 49291203 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875205259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.3875205259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.228668468 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 20098139145 ps |
| CPU time | 49.1 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:53 PM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228668468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_pkt_buffer.228668468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.4051133945 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 208132051 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051133945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.4051133945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.546986311 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 232718123 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 04:58:03 PM UTC 24 |
| Finished | Oct 12 04:58:05 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=546986311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_pkt_sent.546986311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.1480578682 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 213690646 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480578682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.1480578682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.4250436416 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 170154832 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250436416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.4250436416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1047203318 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 173613415 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:15 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047203318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.1047203318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.3979650705 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 356753241 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979650705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.3979650705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1312001357 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 145456653 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312001357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1312001357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3729163923 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 158686181 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729163923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3729163923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.1768093128 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 269221504 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768093128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1768093128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.3814398051 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 2737851307 ps |
| CPU time | 67.57 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 229500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814398051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.3814398051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2852991155 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 153128045 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:58:13 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852991155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2852991155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.3981172283 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 180566468 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:16 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981172283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.3981172283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2088671419 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 449376599 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:17 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088671419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2088671419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.3136082215 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 2941952172 ps |
| CPU time | 75.55 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:59:31 PM UTC 24 |
| Peak memory | 236008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136082215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.3136082215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.458066799 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 616084294 ps |
| CPU time | 10.18 seconds |
| Started | Oct 12 04:57:41 PM UTC 24 |
| Finished | Oct 12 04:57:52 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458066799 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.458066799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.526599400 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 564888613 ps |
| CPU time | 2.05 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:17 PM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=526599400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.526599400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.341238879 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 502995920 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341238879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_t x_rx_disruption.341238879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.3986569514 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 603461206 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3986569514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.3986569514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.3663731406 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 473715840 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:29:25 PM UTC 24 |
| Finished | Oct 12 05:29:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3663731406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.3663731406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.749752788 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 487053324 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=749752788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_t x_rx_disruption.749752788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.838507318 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 548970701 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=838507318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_t x_rx_disruption.838507318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.3140616425 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 482826338 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3140616425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.3140616425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.1991930656 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 430925181 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1991930656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.1991930656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3206691279 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 534465850 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3206691279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3206691279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.1244181779 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 469285122 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1244181779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.1244181779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.3126605901 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 476062286 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3126605901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.3126605901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.2848100590 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 57866202 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848100590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.2848100590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.542856496 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 4274272986 ps |
| CPU time | 6.62 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:22 PM UTC 24 |
| Peak memory | 229208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=542856496 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.542856496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.2271183331 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 20152915081 ps |
| CPU time | 24.54 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:40 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271183331 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.2271183331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.1318395988 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 29378150767 ps |
| CPU time | 38.08 seconds |
| Started | Oct 12 04:58:14 PM UTC 24 |
| Finished | Oct 12 04:58:53 PM UTC 24 |
| Peak memory | 219056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318395988 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.1318395988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.133337194 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 192795323 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:26 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=133337194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_av_buffer.133337194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.716614352 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 202422151 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:26 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716614352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_bitstuff_err.716614352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.1049281225 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 274961654 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049281225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.1049281225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.2006757629 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 1370587333 ps |
| CPU time | 4.99 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:31 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006757629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.2006757629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.2823861504 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 1078887252 ps |
| CPU time | 8.41 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:34 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823861504 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.2823861504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.792446192 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 685331458 ps |
| CPU time | 2.78 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 218852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792446192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.792446192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.3516472959 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 139896627 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516472959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.3516472959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_enable.1812474666 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 54540683 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812474666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.1812474666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.1798694119 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 877838334 ps |
| CPU time | 2.72 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798694119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.1798694119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.673701456 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 413275774 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=673701456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.673701456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.3732995711 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 256322591 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732995711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.3732995711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.1485793356 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 283985464 ps |
| CPU time | 1.99 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485793356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.1485793356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.1959099918 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 238130325 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:28 PM UTC 24 |
| Peak memory | 227088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959099918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.1959099918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1693951245 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 145636355 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 04:58:25 PM UTC 24 |
| Finished | Oct 12 04:58:27 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693951245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1693951245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.1513131174 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 198339376 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513131174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.1513131174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.51123664 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 3754750855 ps |
| CPU time | 90.13 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:59:57 PM UTC 24 |
| Peak memory | 231596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51123664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.51123664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.4236040211 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 5606296998 ps |
| CPU time | 38.94 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:59:15 PM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236040211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.4236040211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.930564681 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 207935575 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:37 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930564681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_in_err.930564681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.117534915 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 12366161898 ps |
| CPU time | 19.13 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:55 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117534915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_resume.117534915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.333241218 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 6249326400 ps |
| CPU time | 8.89 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:45 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=333241218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_suspend.333241218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.2449010243 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 3320105480 ps |
| CPU time | 24.07 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:59:00 PM UTC 24 |
| Peak memory | 231300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449010243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2449010243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.297082412 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 2147514172 ps |
| CPU time | 18.37 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:54 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297082412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.297082412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.2651347246 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 234479008 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:37 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651347246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.2651347246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2108353716 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 219658596 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108353716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2108353716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.2187143842 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 2093094330 ps |
| CPU time | 13.83 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:50 PM UTC 24 |
| Peak memory | 235884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187143842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.2187143842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2528982327 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 3666708662 ps |
| CPU time | 35.21 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:59:12 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528982327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2528982327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1251080969 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 152676236 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:38 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251080969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1251080969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.4002460127 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 139109156 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002460127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.4002460127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.4236024636 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 256834207 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236024636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.4236024636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1899802721 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 281694574 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 04:58:35 PM UTC 24 |
| Finished | Oct 12 04:58:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899802721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.1899802721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.3606781967 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 200143757 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606781967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.3606781967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.2279076781 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 197075925 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279076781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.2279076781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.1385646405 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 145178518 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385646405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.1385646405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.2880834174 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 210037126 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880834174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.2880834174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.2051043303 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 186720286 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051043303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.2051043303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.3264297117 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 42721955 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264297117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3264297117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.1244281024 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 15622513393 ps |
| CPU time | 41.03 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:59:27 PM UTC 24 |
| Peak memory | 229356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244281024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.1244281024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.3243301066 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 187510179 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:47 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243301066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.3243301066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.1767142504 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 251146037 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:46 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767142504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.1767142504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3739637928 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 183310950 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739637928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3739637928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2798550916 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 169241383 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798550916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2798550916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.2143134712 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 157715503 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:58:44 PM UTC 24 |
| Finished | Oct 12 04:58:47 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143134712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.2143134712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.235176355 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 349827937 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235176355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_rx_full.235176355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.2375249417 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 151225345 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375249417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.2375249417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.2511841271 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 162546157 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511841271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.2511841271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.1677881454 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 273866757 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677881454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.1677881454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3726596123 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 3792675497 ps |
| CPU time | 95.52 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 05:00:33 PM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726596123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3726596123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.1579118858 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 166649639 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:58 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579118858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.1579118858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.3852816646 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 209231357 ps |
| CPU time | 1 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852816646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.3852816646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.352951835 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 1057529508 ps |
| CPU time | 3.01 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:59 PM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=352951835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_stream_len_max.352951835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.3683207032 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 3461565677 ps |
| CPU time | 87.18 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 05:00:24 PM UTC 24 |
| Peak memory | 229124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683207032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.3683207032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.479840988 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 1145701324 ps |
| CPU time | 25.92 seconds |
| Started | Oct 12 04:58:24 PM UTC 24 |
| Finished | Oct 12 04:58:52 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479840988 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.479840988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.573989773 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 644083510 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 04:58:55 PM UTC 24 |
| Finished | Oct 12 04:58:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=573989773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_tx _rx_disruption.573989773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.2744466368 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 572933424 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2744466368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.2744466368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.1086681107 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 599324085 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1086681107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.1086681107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.40657991 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 546005697 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=40657991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_tx _rx_disruption.40657991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.609775471 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 545213900 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=609775471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_t x_rx_disruption.609775471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1331494075 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 456115065 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1331494075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1331494075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.1267010771 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 457733533 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1267010771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.1267010771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.1428247111 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 554770431 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1428247111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.1428247111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.599635491 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 589082060 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599635491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_t x_rx_disruption.599635491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.2972373786 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 522776174 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2972373786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.2972373786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.3900255573 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 499059354 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3900255573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.3900255573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.3673403634 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 38138629 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 04:59:34 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673403634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.3673403634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.525548333 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 5220521258 ps |
| CPU time | 8.19 seconds |
| Started | Oct 12 04:58:56 PM UTC 24 |
| Finished | Oct 12 04:59:05 PM UTC 24 |
| Peak memory | 229076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525548333 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.525548333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.3543897446 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 19112274717 ps |
| CPU time | 24.32 seconds |
| Started | Oct 12 04:58:56 PM UTC 24 |
| Finished | Oct 12 04:59:21 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543897446 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3543897446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.398910162 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 29680177608 ps |
| CPU time | 38.06 seconds |
| Started | Oct 12 04:58:56 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398910162 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.398910162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.3484188869 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 146233724 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:58:56 PM UTC 24 |
| Finished | Oct 12 04:58:58 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484188869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.3484188869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.2622554737 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 152156334 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 04:58:56 PM UTC 24 |
| Finished | Oct 12 04:58:58 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622554737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.2622554737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2135838848 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 480993085 ps |
| CPU time | 2.1 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135838848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.2135838848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.1152654960 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 987012314 ps |
| CPU time | 2.61 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 04:59:12 PM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152654960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.1152654960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.50405971 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 45646387686 ps |
| CPU time | 72.81 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=50405971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_device_address.50405971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.2034757131 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 4957247446 ps |
| CPU time | 28.31 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 04:59:38 PM UTC 24 |
| Peak memory | 219180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034757131 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.2034757131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.2435149399 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 549132193 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435149399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.2435149399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.3361666870 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 161187825 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361666870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.3361666870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_enable.102097667 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 62136783 ps |
| CPU time | 1 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102097667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.102097667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1519585618 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 905167237 ps |
| CPU time | 2.85 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:12 PM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519585618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.1519585618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.1168332473 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 165274030 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168332473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.1168332473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.3451004875 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 286759923 ps |
| CPU time | 3.18 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:13 PM UTC 24 |
| Peak memory | 218988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451004875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.3451004875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.717203519 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 179671785 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717203519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.717203519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.2536554685 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 138304405 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536554685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.2536554685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.2322722288 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 201890493 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322722288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.2322722288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.778601413 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 3583848478 ps |
| CPU time | 25.19 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778601413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.778601413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.4213717786 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 14125542317 ps |
| CPU time | 87.62 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213717786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.4213717786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.408212108 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 221380903 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:11 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408212108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_in_err.408212108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.1774702206 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 12335947497 ps |
| CPU time | 19.65 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:30 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774702206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.1774702206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.782722722 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 9270680786 ps |
| CPU time | 12.62 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782722722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_suspend.782722722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.240124557 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 4704414379 ps |
| CPU time | 38.47 seconds |
| Started | Oct 12 04:59:09 PM UTC 24 |
| Finished | Oct 12 04:59:49 PM UTC 24 |
| Peak memory | 235908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240124557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.240124557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.947079536 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 2289648185 ps |
| CPU time | 54.62 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 05:00:16 PM UTC 24 |
| Peak memory | 229360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=947079536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.947079536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.3305444253 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 255132013 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:22 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305444253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.3305444253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3631609518 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 208631408 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:22 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631609518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3631609518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1379292842 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 2049193941 ps |
| CPU time | 13.68 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 235932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379292842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1379292842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3208707925 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 2350693457 ps |
| CPU time | 55.1 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 05:00:17 PM UTC 24 |
| Peak memory | 235996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208707925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3208707925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.1441672418 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 154417737 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:22 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441672418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.1441672418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2295321477 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 168557921 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295321477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.2295321477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.2359731020 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 170723052 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359731020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.2359731020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.1089301731 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 187197989 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 04:59:20 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089301731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.1089301731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.3776869924 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 150681230 ps |
| CPU time | 1 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776869924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.3776869924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.252066773 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 167336932 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252066773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_out_trans_nak.252066773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.1051484856 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 159334816 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051484856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.1051484856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.599922329 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 228290401 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=599922329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.599922329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.630348821 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 144317217 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630348821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.630348821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.370850204 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 60753235 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370850204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_phy_pins_sense.370850204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.512854238 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 6759319488 ps |
| CPU time | 16.5 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:39 PM UTC 24 |
| Peak memory | 229224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=512854238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_pkt_buffer.512854238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.306183938 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 181505331 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:59:21 PM UTC 24 |
| Finished | Oct 12 04:59:23 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306183938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_pkt_received.306183938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2709634524 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 217324740 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709634524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.2709634524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.936033504 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 210038866 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936033504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_random_length_in_transaction.936033504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.4100329574 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 182866436 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100329574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.4100329574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.1476343077 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 172749939 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476343077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.1476343077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.638187674 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 370469140 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638187674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_rx_full.638187674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2346707617 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 190451211 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346707617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.2346707617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.3906834419 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 224078245 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906834419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.3906834419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.1551917113 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 223619146 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:36 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551917113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.1551917113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.4148085021 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 3208002832 ps |
| CPU time | 27.72 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 05:00:02 PM UTC 24 |
| Peak memory | 236112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148085021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.4148085021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.1284453536 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 156962781 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:36 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284453536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.1284453536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.3718889731 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 192902126 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718889731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.3718889731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2096041181 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 1019619457 ps |
| CPU time | 3.05 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:38 PM UTC 24 |
| Peak memory | 219236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096041181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.2096041181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2136667562 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 1393065566 ps |
| CPU time | 9.45 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:44 PM UTC 24 |
| Peak memory | 235752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136667562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.2136667562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.3055966646 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 1326494559 ps |
| CPU time | 25.24 seconds |
| Started | Oct 12 04:59:08 PM UTC 24 |
| Finished | Oct 12 04:59:35 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055966646 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.3055966646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.449226606 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 563942757 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:59:33 PM UTC 24 |
| Finished | Oct 12 04:59:36 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=449226606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_tx _rx_disruption.449226606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.3819552467 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 459390287 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3819552467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.3819552467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.3942546697 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 568691973 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 05:30:40 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3942546697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.3942546697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.2411754670 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 592112919 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2411754670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.2411754670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.3916601136 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 600517933 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3916601136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.3916601136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.3218342178 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 584542294 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3218342178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.3218342178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.1193131347 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 538700139 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1193131347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.1193131347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.2228832994 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 642234052 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2228832994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.2228832994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.1879971973 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 671613843 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1879971973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.1879971973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.3609639823 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 534175385 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3609639823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.3609639823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2420917125 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 558294755 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2420917125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2420917125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.859318756 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 51902247 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859318756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.859318756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.3305872257 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 5382099189 ps |
| CPU time | 8.2 seconds |
| Started | Oct 12 04:59:34 PM UTC 24 |
| Finished | Oct 12 04:59:43 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305872257 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.3305872257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.1265936293 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 19371274839 ps |
| CPU time | 23.5 seconds |
| Started | Oct 12 04:59:34 PM UTC 24 |
| Finished | Oct 12 04:59:58 PM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265936293 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.1265936293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1449695313 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 31285450339 ps |
| CPU time | 38.62 seconds |
| Started | Oct 12 04:59:34 PM UTC 24 |
| Finished | Oct 12 05:00:14 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449695313 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1449695313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.1779017299 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 182209141 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779017299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.1779017299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.846872782 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 156475333 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846872782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_bitstuff_err.846872782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.342090263 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 211999077 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342090263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_data_toggle_clear.342090263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.2081382480 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 22763573381 ps |
| CPU time | 36.8 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 05:00:27 PM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081382480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2081382480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.3509368139 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 2966960779 ps |
| CPU time | 22.8 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 05:00:13 PM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509368139 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.3509368139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.460762340 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 758886933 ps |
| CPU time | 2.27 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460762340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.460762340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1246766392 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 143118217 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246766392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1246766392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1941665802 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 87736344 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941665802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1941665802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.2380294673 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 1115531603 ps |
| CPU time | 3.22 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:53 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380294673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.2380294673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.961541762 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 289486803 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=961541762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.961541762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.2537214042 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 311803443 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537214042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.2537214042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.589788840 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 393338996 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589788840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_fifo_rst.589788840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.831178808 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 234020138 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=831178808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.831178808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.1774681315 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 158121615 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774681315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.1774681315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.4252291160 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 192911043 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252291160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.4252291160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.1664502914 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 3523819654 ps |
| CPU time | 87.9 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 05:01:19 PM UTC 24 |
| Peak memory | 231532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664502914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.1664502914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.3993936998 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 5985161279 ps |
| CPU time | 34.42 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 05:00:25 PM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993936998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.3993936998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.3516885432 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 204079270 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 04:59:52 PM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516885432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.3516885432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.158758829 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 27021061981 ps |
| CPU time | 40.57 seconds |
| Started | Oct 12 04:59:50 PM UTC 24 |
| Finished | Oct 12 05:00:32 PM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158758829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_resume.158758829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.4060733653 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 3941801797 ps |
| CPU time | 6.29 seconds |
| Started | Oct 12 04:59:50 PM UTC 24 |
| Finished | Oct 12 04:59:57 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060733653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.4060733653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.3425084989 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 4523190913 ps |
| CPU time | 112.79 seconds |
| Started | Oct 12 04:59:50 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 236008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425084989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3425084989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.4268713881 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 2235290892 ps |
| CPU time | 14.41 seconds |
| Started | Oct 12 04:59:50 PM UTC 24 |
| Finished | Oct 12 05:00:05 PM UTC 24 |
| Peak memory | 219236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268713881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.4268713881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.417706621 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 279456026 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=417706621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.417706621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.1088823746 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 241368361 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088823746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.1088823746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.739460070 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 2434667680 ps |
| CPU time | 16.53 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 235964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739460070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.739460070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.2523578451 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 1722405492 ps |
| CPU time | 38.16 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:45 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523578451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.2523578451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.2053404146 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 143823421 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:07 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053404146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.2053404146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.1367812785 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 155551507 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367812785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.1367812785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.3138945792 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 210703001 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138945792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.3138945792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.3910360732 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 165075987 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910360732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.3910360732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.704845181 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 186073527 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704845181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_out_stall.704845181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.2221372949 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 185415517 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:00:03 PM UTC 24 |
| Finished | Oct 12 05:00:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221372949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.2221372949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.124263227 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 184583589 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:07 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124263227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.124263227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3905769739 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 249989229 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905769739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3905769739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.598781417 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 175005366 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598781417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.598781417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.3294005281 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 54242683 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3294005281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.3294005281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.737794722 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 17321328621 ps |
| CPU time | 37.95 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:45 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737794722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_pkt_buffer.737794722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.482566876 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 155609715 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482566876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.482566876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.2902169428 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 235043086 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902169428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.2902169428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.118849194 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 241136308 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118849194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_random_length_in_transaction.118849194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.3549735440 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 166060517 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:00:04 PM UTC 24 |
| Finished | Oct 12 05:00:08 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549735440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.3549735440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.1799158992 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 177240604 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:00:07 PM UTC 24 |
| Finished | Oct 12 05:00:09 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799158992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.1799158992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.946153372 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 388339192 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:00:07 PM UTC 24 |
| Finished | Oct 12 05:00:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946153372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_rx_full.946153372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.3019742216 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 151871326 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019742216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.3019742216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.904083203 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 143415676 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904083203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 24.usbdev_setup_trans_ignored.904083203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.585274329 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 245317669 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=585274329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.585274329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1763249215 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 2660304187 ps |
| CPU time | 62.51 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:01:24 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763249215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1763249215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3374682129 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 248314237 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374682129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3374682129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.300815141 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 162610208 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300815141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_stall_trans.300815141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.2191163578 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 422191015 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191163578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.2191163578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.2656781157 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 2123549094 ps |
| CPU time | 14.87 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:36 PM UTC 24 |
| Peak memory | 218984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656781157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.2656781157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.705633591 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 3404598763 ps |
| CPU time | 26.52 seconds |
| Started | Oct 12 04:59:49 PM UTC 24 |
| Finished | Oct 12 05:00:17 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705633591 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.705633591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1705833898 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 615371117 ps |
| CPU time | 2.1 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1705833898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1705833898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.3803353517 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 536577987 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3803353517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.3803353517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.4249824289 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 539649967 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4249824289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.4249824289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.29736954 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 519301946 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:43 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=29736954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_tx _rx_disruption.29736954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.693511795 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 618885289 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=693511795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_t x_rx_disruption.693511795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.3458181955 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 523762698 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3458181955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.3458181955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.3339641957 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 489977502 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3339641957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.3339641957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.477686950 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 649936035 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=477686950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_t x_rx_disruption.477686950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.2686867120 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 495999809 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2686867120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.2686867120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.177140648 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 463845047 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=177140648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_t x_rx_disruption.177140648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.1156844511 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 587247457 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1156844511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.1156844511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.1135994837 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 40174799 ps |
| CPU time | 0.64 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:11 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135994837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1135994837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.4116070698 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 5776864183 ps |
| CPU time | 8.33 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:30 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116070698 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.4116070698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.854101803 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 25875256831 ps |
| CPU time | 38.71 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:01:00 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854101803 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.854101803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.3673922380 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 200772608 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673922380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.3673922380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.2157304934 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 151798573 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157304934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.2157304934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.424424795 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 156440715 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424424795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.424424795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.677550942 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 558655185 ps |
| CPU time | 2.08 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:24 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=677550942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.677550942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.1608182863 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 20388601811 ps |
| CPU time | 38.38 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:01:00 PM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608182863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.1608182863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.2679225212 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 430835838 ps |
| CPU time | 7.23 seconds |
| Started | Oct 12 05:00:20 PM UTC 24 |
| Finished | Oct 12 05:00:29 PM UTC 24 |
| Peak memory | 218932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679225212 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.2679225212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.3296510877 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 714409491 ps |
| CPU time | 2.16 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296510877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.3296510877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.1788229305 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 138628805 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788229305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.1788229305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_enable.112320789 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 52268975 ps |
| CPU time | 0.69 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112320789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.112320789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.3541780162 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 848077059 ps |
| CPU time | 2.34 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:40 PM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541780162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.3541780162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.2058142631 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 171145432 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:38 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058142631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.2058142631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.4102286967 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 311435955 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102286967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.4102286967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.3433570548 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 432863391 ps |
| CPU time | 2 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433570548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.3433570548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.2612151569 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 185459586 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 227148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612151569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.2612151569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.2318720180 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 142553731 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318720180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.2318720180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3206555949 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 232411431 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206555949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3206555949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.1887994541 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 3822736911 ps |
| CPU time | 26.74 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:01:04 PM UTC 24 |
| Peak memory | 235704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887994541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.1887994541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.3464935901 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 12796382803 ps |
| CPU time | 72.21 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:01:50 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464935901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3464935901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.2548677822 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 175450018 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548677822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.2548677822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.642480998 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 25979744455 ps |
| CPU time | 37.83 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:01:16 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=642480998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_link_resume.642480998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.2635015963 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 9690981162 ps |
| CPU time | 14.89 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:53 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635015963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.2635015963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.3600332157 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 4411136952 ps |
| CPU time | 39.45 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:01:18 PM UTC 24 |
| Peak memory | 231484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600332157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.3600332157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.2310344985 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 1823349339 ps |
| CPU time | 15.84 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310344985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.2310344985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2346230179 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 239417501 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346230179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2346230179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.1814929711 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 200644694 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814929711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.1814929711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.2178406056 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 2292926589 ps |
| CPU time | 15.47 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:53 PM UTC 24 |
| Peak memory | 235920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178406056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.2178406056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.493355846 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 162979577 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=493355846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.493355846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.464830121 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 149753539 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464830121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.464830121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2081088352 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 211378145 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:00:37 PM UTC 24 |
| Finished | Oct 12 05:00:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081088352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2081088352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.3277344507 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 175458974 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277344507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.3277344507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.517916516 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 192125549 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517916516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_out_stall.517916516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.233655041 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 187182299 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233655041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_out_trans_nak.233655041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.3888492170 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 198435923 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888492170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.3888492170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.621944382 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 261345035 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=621944382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.621944382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.4147707893 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 166634121 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147707893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.4147707893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.2882605983 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 79544281 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882605983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2882605983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.2100708128 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 19416872994 ps |
| CPU time | 48 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:01:41 PM UTC 24 |
| Peak memory | 229620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100708128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.2100708128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.1673685152 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 208327805 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673685152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.1673685152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3293500434 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 224510595 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293500434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.3293500434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3087649205 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 211711644 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087649205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3087649205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.124242331 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 169342911 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124242331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.124242331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.2426479889 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 144823571 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426479889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.2426479889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2246429281 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 320752779 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246429281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.2246429281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.273186094 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 152746693 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273186094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_setup_stage.273186094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.175214330 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 151449810 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175214330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 25.usbdev_setup_trans_ignored.175214330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.930491474 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 252334340 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:55 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930491474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.930491474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.981658547 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 1796121420 ps |
| CPU time | 41.15 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:01:35 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=981658547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.981658547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.1232019084 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 203560373 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232019084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.1232019084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.1674197056 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 169519336 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674197056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.1674197056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.111174214 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 1359800626 ps |
| CPU time | 3.08 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:57 PM UTC 24 |
| Peak memory | 219180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=111174214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.111174214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.2588656349 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 2108730525 ps |
| CPU time | 51.64 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:01:46 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588656349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.2588656349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.101730480 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 360309279 ps |
| CPU time | 4.17 seconds |
| Started | Oct 12 05:00:36 PM UTC 24 |
| Finished | Oct 12 05:00:41 PM UTC 24 |
| Peak memory | 219188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101730480 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.101730480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.490522750 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 520899944 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 05:00:52 PM UTC 24 |
| Finished | Oct 12 05:00:55 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=490522750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_tx _rx_disruption.490522750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.3631371238 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 554955038 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3631371238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.3631371238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.2141592776 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 568345138 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2141592776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.2141592776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.711447359 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 445771354 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=711447359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_t x_rx_disruption.711447359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.2728242602 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 555580163 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2728242602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.2728242602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.106813058 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 462651122 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=106813058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_t x_rx_disruption.106813058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.18554644 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 579842984 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=18554644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_tx _rx_disruption.18554644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.722685084 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 458188223 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=722685084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.722685084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.4162773833 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 591601130 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4162773833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.4162773833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.4159519219 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 472008799 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4159519219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.4159519219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.2350926948 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 603382047 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350926948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.2350926948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2367117345 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 37231571 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367117345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2367117345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3830219308 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 3979526041 ps |
| CPU time | 6.91 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:17 PM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830219308 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3830219308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.3248978010 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 16034236525 ps |
| CPU time | 19.2 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:30 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248978010 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.3248978010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.139075397 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 29608744197 ps |
| CPU time | 37.63 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:48 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=139075397 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.139075397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3706798251 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 189480410 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706798251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3706798251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.3385531540 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 176735744 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385531540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.3385531540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.1532419642 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 276875199 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532419642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.1532419642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.4063244136 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 756297061 ps |
| CPU time | 2.14 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:13 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063244136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.4063244136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.3629325364 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 14424985365 ps |
| CPU time | 27.85 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:39 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629325364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.3629325364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.2418184399 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 3729265837 ps |
| CPU time | 22.88 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:34 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418184399 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.2418184399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.4033721102 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 584444682 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033721102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.4033721102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.2366669624 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 162933159 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366669624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.2366669624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_enable.4068943964 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 39935312 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068943964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.4068943964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.3859444647 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 924170372 ps |
| CPU time | 2.64 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:13 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859444647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.3859444647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.2262717391 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 342354656 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262717391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.2262717391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.113606896 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 309379438 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113606896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_fifo_levels.113606896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3254075768 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 456887728 ps |
| CPU time | 2.84 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:14 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254075768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3254075768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.1750555187 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 191414783 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750555187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1750555187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.2287241905 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 134602590 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287241905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.2287241905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.1410452871 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 197672833 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410452871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.1410452871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.4251535015 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 2776399505 ps |
| CPU time | 68.92 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:02:20 PM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4251535015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.4251535015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.2528392274 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 13964026371 ps |
| CPU time | 86.83 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:02:38 PM UTC 24 |
| Peak memory | 219244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528392274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2528392274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.3170766658 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 240521020 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:01:10 PM UTC 24 |
| Finished | Oct 12 05:01:12 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170766658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.3170766658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.396770315 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 12463647860 ps |
| CPU time | 15.78 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 219352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=396770315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_link_resume.396770315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.2393823399 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 11168380899 ps |
| CPU time | 14.82 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:42 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393823399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.2393823399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.1973386384 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 3913100561 ps |
| CPU time | 35.25 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:02:03 PM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973386384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.1973386384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.3391607323 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 3737649218 ps |
| CPU time | 26.94 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:54 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391607323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.3391607323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.60682257 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 250430914 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60682257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.60682257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.951983897 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 237005774 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951983897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.951983897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.2440310927 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 1970930215 ps |
| CPU time | 45.62 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:02:13 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440310927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.2440310927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.163602115 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 175776046 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:28 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163602115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.163602115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.1790927667 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 145755661 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790927667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.1790927667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1110493242 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 221873503 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110493242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.1110493242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.457024803 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 195799201 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457024803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_out_iso.457024803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.1486917219 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 220601156 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486917219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.1486917219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3569616343 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 197715103 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569616343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3569616343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.1444650738 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 151044211 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444650738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.1444650738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3241490839 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 207202858 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241490839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3241490839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.3157578728 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 186292284 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:01:26 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157578728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.3157578728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.3707232856 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 40095446 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707232856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.3707232856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1901401715 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 18303129070 ps |
| CPU time | 40.89 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:02:09 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901401715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1901401715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.2953155340 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 197086496 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953155340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.2953155340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.2192683598 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 215251238 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192683598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.2192683598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.2122793856 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 179312309 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122793856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.2122793856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.3908665657 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 164818583 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908665657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.3908665657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.1595675140 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 153676721 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:01:27 PM UTC 24 |
| Finished | Oct 12 05:01:29 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595675140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.1595675140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.2671908729 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 257261092 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671908729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.2671908729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.2547883726 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 150479630 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547883726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.2547883726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3781033612 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 149362759 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781033612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3781033612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.4097656911 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 233313472 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097656911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.4097656911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.2774826811 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 3073145191 ps |
| CPU time | 76.8 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:03:00 PM UTC 24 |
| Peak memory | 231600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774826811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2774826811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.2626637783 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 149580955 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626637783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.2626637783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.3393451291 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 188686037 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393451291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.3393451291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.3410031351 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 350647324 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410031351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.3410031351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.2100743648 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 1646878122 ps |
| CPU time | 10.61 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:53 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100743648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.2100743648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3445594510 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 290038524 ps |
| CPU time | 3.89 seconds |
| Started | Oct 12 05:01:09 PM UTC 24 |
| Finished | Oct 12 05:01:14 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445594510 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.3445594510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2396386769 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 471987057 ps |
| CPU time | 1.93 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2396386769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2396386769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.564099789 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 585755434 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=564099789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_t x_rx_disruption.564099789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.2259511204 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 525061127 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2259511204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.2259511204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.1123225718 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 523858347 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1123225718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.1123225718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.4112507955 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 540229721 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4112507955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.4112507955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.399186163 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 592405715 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=399186163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_t x_rx_disruption.399186163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3274675847 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 590809159 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:44 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3274675847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3274675847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.2786572826 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 509559078 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2786572826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.2786572826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.3390846390 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 506570413 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3390846390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.3390846390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.2760200053 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 532079958 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2760200053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.2760200053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.2366604465 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 518317078 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2366604465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.2366604465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.3642730946 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 53148209 ps |
| CPU time | 0.71 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642730946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.3642730946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.1417142606 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 5177040372 ps |
| CPU time | 7.56 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:01:50 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417142606 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.1417142606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.137566304 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 15071320643 ps |
| CPU time | 21.77 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:02:04 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137566304 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.137566304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.2267259047 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 25657633855 ps |
| CPU time | 33.95 seconds |
| Started | Oct 12 05:01:41 PM UTC 24 |
| Finished | Oct 12 05:02:17 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2267259047 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.2267259047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.1723427875 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 171889942 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723427875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.1723427875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.1651772637 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 145002906 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651772637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.1651772637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.3157706092 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 429382261 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157706092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.3157706092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.1441829624 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 381143924 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:44 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441829624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1441829624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.12498789 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 13745809099 ps |
| CPU time | 19.88 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:02:03 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12498789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_device_address.12498789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.458900513 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 2252637480 ps |
| CPU time | 12.49 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:55 PM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458900513 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.458900513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.3113315193 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 1057793638 ps |
| CPU time | 2.45 seconds |
| Started | Oct 12 05:01:58 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113315193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.3113315193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.1834239948 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 142958666 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:01:58 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834239948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.1834239948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_enable.1887561530 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 45540460 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:01:58 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887561530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.1887561530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.3441899834 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 950537753 ps |
| CPU time | 2.68 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:03 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441899834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.3441899834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.648727547 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 668951387 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648727547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.648727547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.2057242523 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 165402327 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057242523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.2057242523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.3449378333 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 299758540 ps |
| CPU time | 2.52 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:03 PM UTC 24 |
| Peak memory | 218612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449378333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.3449378333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.2815859591 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 188720008 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815859591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.2815859591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.1215500615 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 149885295 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215500615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.1215500615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1629389442 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 195288829 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629389442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.1629389442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.481264866 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 3247558560 ps |
| CPU time | 20.93 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 235764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=481264866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.481264866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.261905118 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 9717971870 ps |
| CPU time | 59.86 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 218596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=261905118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.261905118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.4258749660 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 160892127 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258749660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.4258749660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.1106734576 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 22039910393 ps |
| CPU time | 36.05 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:37 PM UTC 24 |
| Peak memory | 229284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106734576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.1106734576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.2551578325 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 4242331749 ps |
| CPU time | 5.69 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:06 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551578325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.2551578325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.1175372429 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 3284035578 ps |
| CPU time | 24.01 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:25 PM UTC 24 |
| Peak memory | 231496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175372429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.1175372429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.3426245490 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 1823898570 ps |
| CPU time | 11.7 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:12 PM UTC 24 |
| Peak memory | 229408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426245490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3426245490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.1147833961 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 235543618 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147833961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1147833961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.488527085 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 185136709 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=488527085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.488527085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.2883958424 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 3928072412 ps |
| CPU time | 33.8 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:35 PM UTC 24 |
| Peak memory | 229496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883958424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.2883958424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.2527117018 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 155158021 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527117018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.2527117018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.4193028758 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 148879530 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193028758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.4193028758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3004378833 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 256756195 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004378833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.3004378833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.1583388713 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 168486418 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583388713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.1583388713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.901155480 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 220564434 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:01:59 PM UTC 24 |
| Finished | Oct 12 05:02:02 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901155480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_out_stall.901155480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.973213223 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 181140414 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973213223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.973213223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.2493204539 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 153840245 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493204539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.2493204539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.3987992286 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 219230059 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987992286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3987992286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.2564384472 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 139259607 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564384472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.2564384472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.501876025 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 48915441 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501876025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_phy_pins_sense.501876025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.2275722453 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 22380730485 ps |
| CPU time | 53.48 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:03:14 PM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275722453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.2275722453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.2557702205 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 186905389 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557702205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.2557702205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.3184946972 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 163075970 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184946972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.3184946972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.3876555862 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 236104040 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876555862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.3876555862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.2125374111 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 169305489 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125374111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.2125374111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.1858971027 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 201553811 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858971027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.1858971027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.1047683412 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 294646603 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047683412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.1047683412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.227535980 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 153811237 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227535980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_setup_stage.227535980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.2445141376 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 210447414 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445141376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.2445141376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.3679493082 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 215839844 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679493082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.3679493082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.1999430091 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 2329997781 ps |
| CPU time | 19.65 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:40 PM UTC 24 |
| Peak memory | 235896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999430091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.1999430091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.2112878737 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 186113954 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112878737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2112878737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.1592035882 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 187160419 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592035882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.1592035882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.754041189 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 460855333 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:22 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754041189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_stream_len_max.754041189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.3149968552 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 1654236672 ps |
| CPU time | 40.11 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 229484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149968552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.3149968552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.3945758457 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 900321648 ps |
| CPU time | 16.42 seconds |
| Started | Oct 12 05:01:42 PM UTC 24 |
| Finished | Oct 12 05:01:59 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945758457 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.3945758457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.521012574 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 598343933 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:22 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=521012574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_tx _rx_disruption.521012574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.2480334258 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 475873811 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:30:41 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2480334258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.2480334258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.49616160 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 591929763 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=49616160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_tx _rx_disruption.49616160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.4216569497 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 568847983 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4216569497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.4216569497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.1630557687 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 597971081 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1630557687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.1630557687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.3208129111 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 435086440 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3208129111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.3208129111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2792400991 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 544307453 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2792400991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2792400991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.237296118 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 606317290 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:30:42 PM UTC 24 |
| Finished | Oct 12 05:30:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=237296118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_t x_rx_disruption.237296118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.1591518939 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 636877791 ps |
| CPU time | 1.91 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1591518939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.1591518939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.738047142 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 472581936 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:05 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=738047142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_t x_rx_disruption.738047142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.1929319895 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 398975518 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:05 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1929319895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.1929319895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.2977519111 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 46432642 ps |
| CPU time | 0.67 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:23 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977519111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.2977519111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.2389732256 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 9946348687 ps |
| CPU time | 12.11 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:33 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389732256 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.2389732256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.3006175186 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 13489308869 ps |
| CPU time | 16.04 seconds |
| Started | Oct 12 05:02:19 PM UTC 24 |
| Finished | Oct 12 05:02:37 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006175186 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.3006175186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.966115791 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 24837922366 ps |
| CPU time | 34.22 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:03:16 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=966115791 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.966115791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.2561890458 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 209131923 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561890458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.2561890458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3192354321 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 149457061 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192354321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3192354321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.471959054 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 483361826 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471959054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_data_toggle_clear.471959054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.3563922823 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 565400941 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563922823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3563922823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1174532466 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 52168166440 ps |
| CPU time | 84 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:04:07 PM UTC 24 |
| Peak memory | 220520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174532466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1174532466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.23360723 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 2470394272 ps |
| CPU time | 19.25 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=23360723 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.23360723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.3425211485 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 797210665 ps |
| CPU time | 2.11 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425211485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.3425211485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.2804492460 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 149076346 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804492460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.2804492460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_enable.1914131610 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 41468233 ps |
| CPU time | 0.69 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914131610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.1914131610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.675784007 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 999752538 ps |
| CPU time | 3.25 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:46 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675784007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.675784007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.685924816 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 343852392 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=685924816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.685924816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.2287688696 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 480548144 ps |
| CPU time | 2.55 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:45 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287688696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.2287688696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.4275267842 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 242442819 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275267842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.4275267842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3317371238 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 140336965 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317371238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3317371238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.2104208977 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 244559581 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104208977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.2104208977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.3142665727 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 2603513840 ps |
| CPU time | 17.96 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142665727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.3142665727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.74514845 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 9072273211 ps |
| CPU time | 59.04 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:03:42 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=74514845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.74514845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.3811794720 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 202972580 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811794720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.3811794720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.2229714011 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 13677287439 ps |
| CPU time | 16.53 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:59 PM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229714011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.2229714011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.1021229794 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 3835116340 ps |
| CPU time | 5.43 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:48 PM UTC 24 |
| Peak memory | 229244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021229794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.1021229794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.1752822200 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 4545208520 ps |
| CPU time | 107.55 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:04:31 PM UTC 24 |
| Peak memory | 231588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752822200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.1752822200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.2256809330 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 2787556711 ps |
| CPU time | 24.07 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:03:07 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256809330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.2256809330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.2298201897 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 239243520 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298201897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.2298201897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.2977058374 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 204179215 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977058374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.2977058374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.3982291649 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 2883064785 ps |
| CPU time | 18.35 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982291649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.3982291649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.4197745871 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 168295131 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197745871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.4197745871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.529937321 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 146646010 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529937321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.529937321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.895523951 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 195683244 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:02:42 PM UTC 24 |
| Finished | Oct 12 05:02:44 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895523951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_nak_trans.895523951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.3300531418 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 171988597 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300531418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.3300531418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1851225797 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 172808875 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851225797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1851225797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.400627833 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 161945413 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400627833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_out_trans_nak.400627833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.4072127537 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 162562196 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072127537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.4072127537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.1969099158 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 235560404 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969099158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.1969099158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.665634960 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 135957902 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=665634960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.665634960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.3022425985 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 43381928 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022425985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.3022425985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.2771296359 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 11010442442 ps |
| CPU time | 27.89 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:28 PM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771296359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.2771296359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.1785196769 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 180011045 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785196769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.1785196769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.4088336686 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 239423436 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088336686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.4088336686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.4269085952 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 272013407 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269085952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.4269085952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.1997245387 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 227527566 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997245387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1997245387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.4095672716 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 199899995 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095672716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.4095672716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.2426763203 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 248358049 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426763203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.2426763203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.3913473378 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 148384977 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913473378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.3913473378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.1761056720 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 203379953 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761056720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.1761056720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.2343193687 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 252698697 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343193687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.2343193687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.4055226405 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 2796705249 ps |
| CPU time | 24.94 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:26 PM UTC 24 |
| Peak memory | 231548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055226405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.4055226405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.518830652 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 197981034 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518830652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.518830652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2218444130 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 186271668 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:02:59 PM UTC 24 |
| Finished | Oct 12 05:03:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218444130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2218444130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3715926341 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 1023285862 ps |
| CPU time | 2.51 seconds |
| Started | Oct 12 05:03:00 PM UTC 24 |
| Finished | Oct 12 05:03:03 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715926341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3715926341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2611717689 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 2585268925 ps |
| CPU time | 21.05 seconds |
| Started | Oct 12 05:03:00 PM UTC 24 |
| Finished | Oct 12 05:03:22 PM UTC 24 |
| Peak memory | 236012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611717689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2611717689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.2715266221 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 1148783368 ps |
| CPU time | 8.52 seconds |
| Started | Oct 12 05:02:41 PM UTC 24 |
| Finished | Oct 12 05:02:51 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715266221 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.2715266221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.2915825919 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 637640123 ps |
| CPU time | 1.9 seconds |
| Started | Oct 12 05:03:00 PM UTC 24 |
| Finished | Oct 12 05:03:03 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2915825919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.2915825919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.1749507567 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 552282707 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1749507567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.1749507567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.3384424365 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 640209123 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384424365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.3384424365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.604487841 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 627416535 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=604487841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_t x_rx_disruption.604487841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.2876702621 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 478737841 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2876702621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.2876702621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.1149562175 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 625148432 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1149562175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.1149562175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.747118992 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 656070761 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=747118992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_t x_rx_disruption.747118992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.4256554130 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 604179181 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4256554130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.4256554130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.2436016655 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 601498682 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2436016655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.2436016655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.182324214 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 628587448 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=182324214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_t x_rx_disruption.182324214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.3616446092 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 623365789 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3616446092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.3616446092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.2677256532 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 103402802 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677256532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2677256532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.2641871333 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 5003252630 ps |
| CPU time | 7.15 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:29 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641871333 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.2641871333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.1367848562 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 19108285239 ps |
| CPU time | 21.58 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:44 PM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367848562 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.1367848562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.2425588651 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 25348524372 ps |
| CPU time | 32.22 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:55 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425588651 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.2425588651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.335473345 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 187370114 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:23 PM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=335473345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_av_buffer.335473345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.2651864020 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 153042636 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:23 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651864020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.2651864020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.3295054980 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 497006139 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:25 PM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295054980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.3295054980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.3102129738 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 707549176 ps |
| CPU time | 1.91 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102129738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.3102129738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.2066112714 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 23749423980 ps |
| CPU time | 37.23 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066112714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.2066112714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.3860119632 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 1194179491 ps |
| CPU time | 21.55 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:44 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860119632 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.3860119632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.2882559412 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 632194599 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882559412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.2882559412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.3911015414 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 155826215 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911015414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.3911015414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_enable.903322852 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 43651484 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903322852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.903322852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.181972567 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 863280871 ps |
| CPU time | 2.27 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:25 PM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=181972567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.181972567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.1019006987 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 423629479 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:25 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019006987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.1019006987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.1018337274 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 165192648 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018337274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.1018337274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2573590580 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 263994209 ps |
| CPU time | 2.1 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:25 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573590580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2573590580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.969645399 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 211413310 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969645399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.969645399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.2991768991 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 142610892 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991768991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.2991768991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.3187299434 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 219763618 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187299434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.3187299434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.3339129595 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 4105061953 ps |
| CPU time | 33.67 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:57 PM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339129595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.3339129595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.1991348420 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 12267068819 ps |
| CPU time | 125.96 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:05:30 PM UTC 24 |
| Peak memory | 220592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991348420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.1991348420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.946578545 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 244188988 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946578545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_link_in_err.946578545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.2083922024 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 11435382522 ps |
| CPU time | 13.79 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:37 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083922024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.2083922024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1341607506 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 5099792578 ps |
| CPU time | 7.16 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:30 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341607506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1341607506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.4285193317 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 4754555338 ps |
| CPU time | 32.83 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:56 PM UTC 24 |
| Peak memory | 235856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285193317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.4285193317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.394350865 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 3577937453 ps |
| CPU time | 30.11 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:53 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394350865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.394350865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.932978488 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 254307197 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932978488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.932978488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.1590689288 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 219834814 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:03:22 PM UTC 24 |
| Finished | Oct 12 05:03:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590689288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1590689288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.1144045565 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 3976513848 ps |
| CPU time | 97.08 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144045565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.1144045565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.1285559567 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 151217647 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:40 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285559567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1285559567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.2628839742 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 157583982 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:40 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628839742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2628839742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.2330343216 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 183986582 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:40 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330343216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.2330343216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.473987786 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 166280128 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=473987786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_out_stall.473987786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.3819652934 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 188082402 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819652934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.3819652934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.3936758653 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 155853947 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936758653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.3936758653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.3518752766 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 203532651 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518752766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.3518752766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.142464164 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 139214491 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142464164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.142464164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.697015735 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 32025868 ps |
| CPU time | 0.71 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=697015735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_phy_pins_sense.697015735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.453848157 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 14381639467 ps |
| CPU time | 34.8 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:04:15 PM UTC 24 |
| Peak memory | 235996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453848157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_pkt_buffer.453848157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.740215187 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 177514866 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:03:38 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=740215187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_pkt_received.740215187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.2965644714 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 202679986 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965644714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.2965644714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.1690595288 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 202703008 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690595288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.1690595288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3072827459 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 179834142 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072827459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3072827459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.3759268107 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 178928573 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759268107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.3759268107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.3462327812 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 272410471 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462327812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.3462327812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.232762955 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 216543178 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232762955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.232762955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.1579742292 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 151123959 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579742292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.1579742292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.443878124 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 231197756 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:41 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443878124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.443878124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1770431094 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 2351521622 ps |
| CPU time | 14.8 seconds |
| Started | Oct 12 05:03:39 PM UTC 24 |
| Finished | Oct 12 05:03:55 PM UTC 24 |
| Peak memory | 235968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770431094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1770431094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.4270490979 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 192054545 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270490979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.4270490979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.1801590847 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 162676876 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:03:59 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801590847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.1801590847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.1175056604 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 1395113492 ps |
| CPU time | 3.39 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:04:02 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175056604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.1175056604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.4119448300 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 2517197183 ps |
| CPU time | 59.65 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:04:59 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119448300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.4119448300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.2426320759 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 1191387414 ps |
| CPU time | 23.25 seconds |
| Started | Oct 12 05:03:21 PM UTC 24 |
| Finished | Oct 12 05:03:46 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426320759 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.2426320759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.2813665709 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 447411913 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:03:57 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2813665709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.2813665709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.162040187 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 451777682 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=162040187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_t x_rx_disruption.162040187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.2750828836 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 490203629 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2750828836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.2750828836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.2212400300 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 599794240 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2212400300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.2212400300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.521544945 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 463852778 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=521544945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_t x_rx_disruption.521544945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.3837531927 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 475731244 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3837531927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.3837531927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.3160646751 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 645120561 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3160646751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.3160646751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2637566221 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 571764018 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2637566221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2637566221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.2631464682 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 463854557 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2631464682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.2631464682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.133743505 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 605794774 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=133743505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_t x_rx_disruption.133743505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.1843937520 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 68767544 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:44:24 PM UTC 24 |
| Finished | Oct 12 04:44:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843937520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.1843937520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.4060151859 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 6864908197 ps |
| CPU time | 20.89 seconds |
| Started | Oct 12 04:42:41 PM UTC 24 |
| Finished | Oct 12 04:43:03 PM UTC 24 |
| Peak memory | 229256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060151859 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.4060151859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.2841005041 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 19525176833 ps |
| CPU time | 30.07 seconds |
| Started | Oct 12 04:42:41 PM UTC 24 |
| Finished | Oct 12 04:43:12 PM UTC 24 |
| Peak memory | 219132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841005041 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.2841005041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.313471108 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 30038965359 ps |
| CPU time | 58.56 seconds |
| Started | Oct 12 04:42:43 PM UTC 24 |
| Finished | Oct 12 04:43:43 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=313471108 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.313471108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.3446517754 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 157416162 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:42:48 PM UTC 24 |
| Finished | Oct 12 04:42:50 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446517754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.3446517754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.4222996778 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 163522879 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:42:50 PM UTC 24 |
| Finished | Oct 12 04:42:52 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222996778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.4222996778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3314879491 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 149893482 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:42:52 PM UTC 24 |
| Finished | Oct 12 04:42:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314879491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.3314879491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.406367819 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 174650549 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:42:54 PM UTC 24 |
| Finished | Oct 12 04:42:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406367819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.406367819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.904916674 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 291824662 ps |
| CPU time | 2.09 seconds |
| Started | Oct 12 04:42:54 PM UTC 24 |
| Finished | Oct 12 04:42:57 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904916674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_data_toggle_clear.904916674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.100369391 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 823715744 ps |
| CPU time | 3.79 seconds |
| Started | Oct 12 04:42:56 PM UTC 24 |
| Finished | Oct 12 04:43:01 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100369391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.100369391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.3602566211 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 1683200269 ps |
| CPU time | 51.79 seconds |
| Started | Oct 12 04:42:57 PM UTC 24 |
| Finished | Oct 12 04:43:50 PM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602566211 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.3602566211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.385622141 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 450263270 ps |
| CPU time | 2.58 seconds |
| Started | Oct 12 04:42:59 PM UTC 24 |
| Finished | Oct 12 04:43:03 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385622141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.385622141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.219334807 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 152923391 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:42:59 PM UTC 24 |
| Finished | Oct 12 04:43:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219334807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_disconnected.219334807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_enable.954862257 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 59176472 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:43:03 PM UTC 24 |
| Finished | Oct 12 04:43:06 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954862257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.954862257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3729417 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 704762387 ps |
| CPU time | 3.9 seconds |
| Started | Oct 12 04:43:03 PM UTC 24 |
| Finished | Oct 12 04:43:09 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_endpoint_access.3729417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3864220562 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 289493543 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:43:04 PM UTC 24 |
| Finished | Oct 12 04:43:07 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864220562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.3864220562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.1309941393 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 244591155 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 04:43:04 PM UTC 24 |
| Finished | Oct 12 04:43:06 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309941393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.1309941393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.2555937976 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 301410225 ps |
| CPU time | 3 seconds |
| Started | Oct 12 04:43:04 PM UTC 24 |
| Finished | Oct 12 04:43:08 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555937976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.2555937976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.1511587096 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 111189961606 ps |
| CPU time | 250.09 seconds |
| Started | Oct 12 04:43:06 PM UTC 24 |
| Finished | Oct 12 04:47:19 PM UTC 24 |
| Peak memory | 220668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511587096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.1511587096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2238877459 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 105104852636 ps |
| CPU time | 208.14 seconds |
| Started | Oct 12 04:43:09 PM UTC 24 |
| Finished | Oct 12 04:46:40 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238877459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2238877459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.2098847831 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 83008417658 ps |
| CPU time | 226.18 seconds |
| Started | Oct 12 04:43:09 PM UTC 24 |
| Finished | Oct 12 04:46:58 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2098847831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.2098847831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.2980475281 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 94182526831 ps |
| CPU time | 235.25 seconds |
| Started | Oct 12 04:43:09 PM UTC 24 |
| Finished | Oct 12 04:47:07 PM UTC 24 |
| Peak memory | 219488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980475281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.2980475281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.878526895 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 194985087 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:43:11 PM UTC 24 |
| Finished | Oct 12 04:43:14 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878526895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.878526895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.3755180912 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 176016532 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:43:13 PM UTC 24 |
| Finished | Oct 12 04:43:16 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755180912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.3755180912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.2768407044 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 230720269 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:43:15 PM UTC 24 |
| Finished | Oct 12 04:43:18 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768407044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.2768407044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.39912244 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 3191660979 ps |
| CPU time | 94.42 seconds |
| Started | Oct 12 04:43:09 PM UTC 24 |
| Finished | Oct 12 04:44:45 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=39912244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.39912244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.3081939730 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 11002477721 ps |
| CPU time | 131.9 seconds |
| Started | Oct 12 04:43:15 PM UTC 24 |
| Finished | Oct 12 04:45:30 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081939730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.3081939730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.2300188073 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 158468655 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:43:17 PM UTC 24 |
| Finished | Oct 12 04:43:20 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300188073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.2300188073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.3360780836 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 28623831506 ps |
| CPU time | 63.72 seconds |
| Started | Oct 12 04:43:20 PM UTC 24 |
| Finished | Oct 12 04:44:25 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360780836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.3360780836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2879491361 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 9466551667 ps |
| CPU time | 24.32 seconds |
| Started | Oct 12 04:43:22 PM UTC 24 |
| Finished | Oct 12 04:43:47 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879491361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2879491361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.2245210223 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 3826660911 ps |
| CPU time | 135.25 seconds |
| Started | Oct 12 04:43:22 PM UTC 24 |
| Finished | Oct 12 04:45:40 PM UTC 24 |
| Peak memory | 235912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245210223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.2245210223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.2711181385 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 4235378138 ps |
| CPU time | 39.74 seconds |
| Started | Oct 12 04:43:22 PM UTC 24 |
| Finished | Oct 12 04:44:03 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711181385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.2711181385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1489096487 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 243598011 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:43:24 PM UTC 24 |
| Finished | Oct 12 04:43:27 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489096487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1489096487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.315298307 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 183938241 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:43:29 PM UTC 24 |
| Finished | Oct 12 04:43:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=315298307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.315298307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3347758897 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 3241455932 ps |
| CPU time | 88.97 seconds |
| Started | Oct 12 04:43:29 PM UTC 24 |
| Finished | Oct 12 04:45:00 PM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347758897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3347758897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.2853110255 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 3509645493 ps |
| CPU time | 39.63 seconds |
| Started | Oct 12 04:43:33 PM UTC 24 |
| Finished | Oct 12 04:44:14 PM UTC 24 |
| Peak memory | 235956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853110255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.2853110255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.4288187015 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 1536338350 ps |
| CPU time | 49.04 seconds |
| Started | Oct 12 04:43:33 PM UTC 24 |
| Finished | Oct 12 04:44:24 PM UTC 24 |
| Peak memory | 229288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288187015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.4288187015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2238482044 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 166338500 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:43:40 PM UTC 24 |
| Finished | Oct 12 04:43:43 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238482044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2238482044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3236255471 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 160857182 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:43:42 PM UTC 24 |
| Finished | Oct 12 04:43:45 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236255471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3236255471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.24749970 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 147022535 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:43:45 PM UTC 24 |
| Finished | Oct 12 04:43:47 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24749970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_iso.24749970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2704064203 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 190215910 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:43:47 PM UTC 24 |
| Finished | Oct 12 04:43:49 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704064203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2704064203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.1537521797 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 171677565 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:43:49 PM UTC 24 |
| Finished | Oct 12 04:43:51 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537521797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.1537521797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.962866212 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 160204568 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:43:49 PM UTC 24 |
| Finished | Oct 12 04:43:51 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962866212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.962866212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.1906716579 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 257284755 ps |
| CPU time | 1.88 seconds |
| Started | Oct 12 04:43:49 PM UTC 24 |
| Finished | Oct 12 04:43:52 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906716579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.1906716579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.2361320382 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 191827416 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:43:51 PM UTC 24 |
| Finished | Oct 12 04:43:54 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361320382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.2361320382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.3348828970 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 159343777 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:43:51 PM UTC 24 |
| Finished | Oct 12 04:43:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348828970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.3348828970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3571683986 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 37116214 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:43:53 PM UTC 24 |
| Finished | Oct 12 04:43:56 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571683986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3571683986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3166031386 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 14343120365 ps |
| CPU time | 41.48 seconds |
| Started | Oct 12 04:43:53 PM UTC 24 |
| Finished | Oct 12 04:44:36 PM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166031386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3166031386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.1010271688 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 186427792 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:43:54 PM UTC 24 |
| Finished | Oct 12 04:43:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010271688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.1010271688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.811174262 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 193992621 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:43:56 PM UTC 24 |
| Finished | Oct 12 04:43:58 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811174262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_pkt_sent.811174262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.2942204413 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 5832076074 ps |
| CPU time | 60.09 seconds |
| Started | Oct 12 04:43:58 PM UTC 24 |
| Finished | Oct 12 04:45:00 PM UTC 24 |
| Peak memory | 231448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942204413 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2942204413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.151888802 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 2897390918 ps |
| CPU time | 66.3 seconds |
| Started | Oct 12 04:44:00 PM UTC 24 |
| Finished | Oct 12 04:45:08 PM UTC 24 |
| Peak memory | 231412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151888802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.151888802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.983346593 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 9144115001 ps |
| CPU time | 159.66 seconds |
| Started | Oct 12 04:44:00 PM UTC 24 |
| Finished | Oct 12 04:46:42 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=983346593 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.983346593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.3088855431 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 188922010 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 04:43:56 PM UTC 24 |
| Finished | Oct 12 04:43:58 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088855431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.3088855431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.1158128160 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 172204593 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:43:58 PM UTC 24 |
| Finished | Oct 12 04:44:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158128160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.1158128160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.1490708844 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 20205079777 ps |
| CPU time | 48.42 seconds |
| Started | Oct 12 04:44:03 PM UTC 24 |
| Finished | Oct 12 04:44:53 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490708844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.1490708844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.625081104 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 145239242 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 04:44:03 PM UTC 24 |
| Finished | Oct 12 04:44:05 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=625081104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_crc_err.625081104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.2309732201 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 387330220 ps |
| CPU time | 2.1 seconds |
| Started | Oct 12 04:44:05 PM UTC 24 |
| Finished | Oct 12 04:44:08 PM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309732201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.2309732201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1586040219 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 148383941 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:44:08 PM UTC 24 |
| Finished | Oct 12 04:44:10 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586040219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.1586040219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2167056101 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 248763334 ps |
| CPU time | 1.92 seconds |
| Started | Oct 12 04:44:22 PM UTC 24 |
| Finished | Oct 12 04:44:25 PM UTC 24 |
| Peak memory | 251924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167056101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2167056101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.3203637690 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 355807330 ps |
| CPU time | 2.11 seconds |
| Started | Oct 12 04:44:08 PM UTC 24 |
| Finished | Oct 12 04:44:11 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203637690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.3203637690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.954527607 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 199961242 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:44:08 PM UTC 24 |
| Finished | Oct 12 04:44:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954527607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.954527607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.3590710881 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 182497163 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:44:11 PM UTC 24 |
| Finished | Oct 12 04:44:13 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590710881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.3590710881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.4207042946 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 159574753 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:44:11 PM UTC 24 |
| Finished | Oct 12 04:44:13 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207042946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.4207042946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.3172048202 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 234061261 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:44:13 PM UTC 24 |
| Finished | Oct 12 04:44:15 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172048202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.3172048202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.1109302303 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 2340440787 ps |
| CPU time | 64.41 seconds |
| Started | Oct 12 04:44:13 PM UTC 24 |
| Finished | Oct 12 04:45:19 PM UTC 24 |
| Peak memory | 236104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109302303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1109302303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3822940883 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 156617029 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 04:44:13 PM UTC 24 |
| Finished | Oct 12 04:44:15 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822940883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.3822940883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2489774108 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 174647425 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:44:15 PM UTC 24 |
| Finished | Oct 12 04:44:18 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489774108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2489774108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.974058467 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 886929691 ps |
| CPU time | 4.2 seconds |
| Started | Oct 12 04:44:16 PM UTC 24 |
| Finished | Oct 12 04:44:21 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974058467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_stream_len_max.974058467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.1696533616 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 1679982174 ps |
| CPU time | 20.89 seconds |
| Started | Oct 12 04:44:16 PM UTC 24 |
| Finished | Oct 12 04:44:38 PM UTC 24 |
| Peak memory | 229344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696533616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.1696533616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2900809604 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 1985974837 ps |
| CPU time | 19.13 seconds |
| Started | Oct 12 04:42:59 PM UTC 24 |
| Finished | Oct 12 04:43:19 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900809604 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.2900809604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.541278537 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 448247370 ps |
| CPU time | 2.58 seconds |
| Started | Oct 12 04:44:20 PM UTC 24 |
| Finished | Oct 12 04:44:24 PM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=541278537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx_ rx_disruption.541278537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.1146522050 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 90524962 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146522050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.1146522050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.3715406905 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 4665197241 ps |
| CPU time | 6.63 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:06 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715406905 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.3715406905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3572188044 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 19276584550 ps |
| CPU time | 22.42 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:22 PM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572188044 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3572188044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.691369676 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 28830270217 ps |
| CPU time | 37.35 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:37 PM UTC 24 |
| Peak memory | 219132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691369676 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.691369676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.3715014882 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 160521976 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715014882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.3715014882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.3183608950 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 160946976 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183608950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.3183608950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.4012760954 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 296812462 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012760954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.4012760954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3165349052 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 444194102 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165349052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3165349052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.2402375670 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 30948555655 ps |
| CPU time | 45.77 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:45 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402375670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.2402375670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.3627812156 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 4991084534 ps |
| CPU time | 27.36 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:27 PM UTC 24 |
| Peak memory | 219064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627812156 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.3627812156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3994979343 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 719497021 ps |
| CPU time | 1.92 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994979343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3994979343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.172010767 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 196737985 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172010767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_disconnected.172010767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_enable.1798751912 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 36388076 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798751912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.1798751912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.212487097 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 890607880 ps |
| CPU time | 2.45 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:02 PM UTC 24 |
| Peak memory | 219060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212487097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.212487097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.3499931190 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 655689861 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:01 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499931190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.3499931190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.1928273879 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 266053314 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928273879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.1928273879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3488268432 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 286723059 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488268432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3488268432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.12378123 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 230256479 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:04:18 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 227220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=12378123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.12378123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.3250661193 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 147376681 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:04:18 PM UTC 24 |
| Finished | Oct 12 05:04:20 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250661193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.3250661193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.709185461 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 219323652 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:04:18 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709185461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_trans.709185461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.132914453 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 3273242279 ps |
| CPU time | 78.73 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:05:19 PM UTC 24 |
| Peak memory | 235816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132914453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.132914453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.1543447093 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 5144251961 ps |
| CPU time | 29.22 seconds |
| Started | Oct 12 05:04:18 PM UTC 24 |
| Finished | Oct 12 05:04:49 PM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543447093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1543447093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2962420324 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 230286566 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962420324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2962420324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.1610280895 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 28108798950 ps |
| CPU time | 48.28 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:05:08 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610280895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.1610280895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.2846300946 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 4822494018 ps |
| CPU time | 7.44 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:27 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846300946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.2846300946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.1946840098 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 3238173316 ps |
| CPU time | 26.4 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:46 PM UTC 24 |
| Peak memory | 231636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946840098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1946840098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.381547288 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 3770894065 ps |
| CPU time | 33.03 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:53 PM UTC 24 |
| Peak memory | 229432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=381547288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.381547288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.3578321331 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 271571444 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3578321331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.3578321331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.2642786248 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 187855949 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642786248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2642786248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.593371632 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 3245148430 ps |
| CPU time | 22.01 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:42 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593371632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.593371632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.590443591 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 163299242 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590443591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.590443591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.1801792066 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 171068424 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801792066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.1801792066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.841067440 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 187990701 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=841067440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_nak_trans.841067440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.297616750 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 186013674 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297616750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_out_iso.297616750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.57197407 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 182717122 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57197407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_stall.57197407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.2135147966 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 154338087 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135147966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.2135147966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.4199180500 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 167854147 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199180500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.4199180500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.1343556688 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 211495836 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:22 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343556688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.1343556688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.1213375707 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 152184422 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213375707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.1213375707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.388052073 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 33473854 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=388052073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_phy_pins_sense.388052073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.270021678 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 14981496850 ps |
| CPU time | 34.21 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:55 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270021678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_pkt_buffer.270021678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.222956062 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 177013056 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222956062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_pkt_received.222956062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.336741188 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 274924959 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336741188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.336741188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.2541309496 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 230133201 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541309496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.2541309496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.498078467 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 164294557 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:04:19 PM UTC 24 |
| Finished | Oct 12 05:04:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498078467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.498078467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.2463555336 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 163385599 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463555336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.2463555336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.3794352825 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 410210961 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794352825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.3794352825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.231846425 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 152506241 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231846425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_setup_stage.231846425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.1486053718 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 156548264 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486053718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.1486053718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.1989664634 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 223125015 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989664634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.1989664634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.2407033276 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 1656634862 ps |
| CPU time | 13.92 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:52 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407033276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.2407033276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.1891579336 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 173150534 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1891579336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.1891579336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.925490819 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 182183873 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925490819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_stall_trans.925490819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.996483340 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 373324892 ps |
| CPU time | 2 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:41 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996483340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_stream_len_max.996483340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.1393940497 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 2135135600 ps |
| CPU time | 18.04 seconds |
| Started | Oct 12 05:04:37 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 235740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393940497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.1393940497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.747749978 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 1012121098 ps |
| CPU time | 18.21 seconds |
| Started | Oct 12 05:03:58 PM UTC 24 |
| Finished | Oct 12 05:04:18 PM UTC 24 |
| Peak memory | 219316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=747749978 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.747749978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.2141074057 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 496521927 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2141074057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.2141074057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.4217955629 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 453430245 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4217955629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.4217955629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.852034819 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 530979951 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=852034819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.852034819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2007035043 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 468831126 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2007035043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2007035043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.2364681094 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 440121064 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2364681094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.2364681094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.1948105958 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 498743733 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1948105958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.1948105958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.290410220 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 602103306 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=290410220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_t x_rx_disruption.290410220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.615507833 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 580122638 ps |
| CPU time | 1.88 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=615507833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_t x_rx_disruption.615507833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.3554697251 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 522694931 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3554697251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.3554697251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.1774108431 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 500007767 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1774108431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.1774108431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.1726117619 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 43180981 ps |
| CPU time | 0.66 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726117619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.1726117619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.653307313 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 4499054157 ps |
| CPU time | 6.75 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:45 PM UTC 24 |
| Peak memory | 229244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=653307313 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.653307313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.683590510 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 21139670748 ps |
| CPU time | 24.87 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:05:04 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683590510 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.683590510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.702123827 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 26380087564 ps |
| CPU time | 31.35 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:05:10 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702123827 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.702123827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.4114520963 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 158675727 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114520963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.4114520963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.3883788206 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 192932575 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883788206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.3883788206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.2521361945 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 184720902 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:40 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521361945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.2521361945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.4010995261 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 32965655926 ps |
| CPU time | 50.31 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:05:30 PM UTC 24 |
| Peak memory | 218908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010995261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.4010995261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.1755991650 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 1098677838 ps |
| CPU time | 7.98 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:47 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755991650 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.1755991650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.2055700957 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 773887585 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:04:41 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055700957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.2055700957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.1563041261 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 142025660 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:56 PM UTC 24 |
| Peak memory | 218556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563041261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.1563041261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_enable.3398221039 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 43975333 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:56 PM UTC 24 |
| Peak memory | 218828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398221039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.3398221039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.42263546 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 989958579 ps |
| CPU time | 2.99 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:58 PM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42263546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_endpoint_access.42263546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2811157125 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 577976051 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811157125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2811157125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.3600563701 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 275613657 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600563701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.3600563701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.1356047765 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 299596938 ps |
| CPU time | 2.02 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:04:58 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356047765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.1356047765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2106598796 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 202282751 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106598796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2106598796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.2985952295 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 173346508 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985952295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.2985952295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.3689749989 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 221535960 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689749989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.3689749989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3382460036 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 4237192042 ps |
| CPU time | 102.16 seconds |
| Started | Oct 12 05:04:54 PM UTC 24 |
| Finished | Oct 12 05:06:39 PM UTC 24 |
| Peak memory | 232908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382460036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3382460036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3793601040 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 6364124619 ps |
| CPU time | 59.22 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:56 PM UTC 24 |
| Peak memory | 219296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793601040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3793601040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.2285509266 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 158091805 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285509266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.2285509266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.544214279 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 27511627111 ps |
| CPU time | 44.35 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544214279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_resume.544214279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.4159806145 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 4304859683 ps |
| CPU time | 6.4 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:02 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159806145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.4159806145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.3719770241 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 4532161237 ps |
| CPU time | 41.83 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 231296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719770241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.3719770241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.3819234589 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 3635147480 ps |
| CPU time | 31.49 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:28 PM UTC 24 |
| Peak memory | 231368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819234589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.3819234589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.1487605306 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 243216440 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487605306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.1487605306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.4070423160 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 187988825 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070423160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.4070423160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.124299134 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 1916410283 ps |
| CPU time | 43.74 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 229360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=124299134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.124299134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.1112345199 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 225486605 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112345199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.1112345199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.3114486034 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 156319045 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:04:55 PM UTC 24 |
| Finished | Oct 12 05:04:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114486034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.3114486034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.1926728404 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 195074162 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926728404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.1926728404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1685737465 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 167440626 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685737465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1685737465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.3704671699 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 164315348 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704671699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.3704671699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.111817472 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 173983001 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=111817472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_out_trans_nak.111817472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.1405645510 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 158172994 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405645510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.1405645510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.3048061575 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 229075240 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048061575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3048061575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.4047171592 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 142308890 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047171592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.4047171592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.2490691723 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 45247865 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:16 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490691723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.2490691723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.967249267 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 12577732745 ps |
| CPU time | 29.02 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:45 PM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=967249267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_pkt_buffer.967249267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.684728190 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 240306967 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684728190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_pkt_received.684728190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.864653175 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 212440367 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864653175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_pkt_sent.864653175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.816757845 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 262715099 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816757845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_random_length_in_transaction.816757845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.215216276 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 185845816 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:05:14 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215216276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.215216276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.4206102156 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 179805010 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206102156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.4206102156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.3037980417 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 365010176 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037980417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.3037980417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3477300630 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 153732274 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477300630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3477300630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.166305038 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 145749409 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166305038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 31.usbdev_setup_trans_ignored.166305038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.4271474571 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 259463917 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271474571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.4271474571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.3569200067 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 2508276513 ps |
| CPU time | 61.49 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:06:18 PM UTC 24 |
| Peak memory | 229472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569200067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.3569200067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.675510973 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 180099591 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675510973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.675510973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.3183682137 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 176736147 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:17 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183682137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.3183682137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.2087528735 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 731587514 ps |
| CPU time | 2.25 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:18 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087528735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2087528735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.1441328250 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 2251753581 ps |
| CPU time | 14.26 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:30 PM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441328250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.1441328250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3252004418 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 7042625751 ps |
| CPU time | 40.16 seconds |
| Started | Oct 12 05:04:38 PM UTC 24 |
| Finished | Oct 12 05:05:20 PM UTC 24 |
| Peak memory | 219256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252004418 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3252004418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.1460100078 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 482606944 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:05:15 PM UTC 24 |
| Finished | Oct 12 05:05:18 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1460100078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.1460100078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.113885299 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 587484942 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:32:03 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=113885299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.113885299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.2745886549 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 667188410 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2745886549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.2745886549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1661247463 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 488768568 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1661247463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1661247463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.3012034480 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 569433173 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3012034480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.3012034480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.850059426 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 573858441 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=850059426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_t x_rx_disruption.850059426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.3268735584 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 456225350 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3268735584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.3268735584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.379368573 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 572254822 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=379368573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_t x_rx_disruption.379368573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.1598932338 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 464414989 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:06 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1598932338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.1598932338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.1718508135 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 504502845 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1718508135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.1718508135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.630135643 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 584683006 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=630135643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_t x_rx_disruption.630135643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.2789477423 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 32434892 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:06:21 PM UTC 24 |
| Finished | Oct 12 05:06:23 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789477423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2789477423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.1113973459 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 5031954960 ps |
| CPU time | 7.55 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:45 PM UTC 24 |
| Peak memory | 229316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113973459 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.1113973459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3151881772 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 14384778298 ps |
| CPU time | 18.42 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:56 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151881772 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3151881772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.4290646354 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 30849353708 ps |
| CPU time | 38.14 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:06:16 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290646354 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.4290646354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.1210849258 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 146198075 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210849258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.1210849258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.2551501822 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 164300881 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551501822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.2551501822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.816449902 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 296133093 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816449902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_data_toggle_clear.816449902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.2347101779 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 971816661 ps |
| CPU time | 2.41 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347101779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.2347101779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.2345086563 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 18349802778 ps |
| CPU time | 27.4 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:06:05 PM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345086563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2345086563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.3005937803 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 3630262880 ps |
| CPU time | 20.26 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:58 PM UTC 24 |
| Peak memory | 218968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005937803 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.3005937803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.2240510119 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 806813964 ps |
| CPU time | 2.09 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240510119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.2240510119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.4290657525 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 161651452 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290657525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.4290657525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_enable.3130470862 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 29685091 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130470862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.3130470862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.310026509 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 870569448 ps |
| CPU time | 2.37 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 218968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=310026509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.310026509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3431587305 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 407609875 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431587305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3431587305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.1974954378 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 177838001 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974954378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.1974954378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.1081439499 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 275499943 ps |
| CPU time | 2.54 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:40 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081439499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.1081439499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.2704537477 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 178543032 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704537477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.2704537477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.2800150131 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 153616332 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800150131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.2800150131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.1370481728 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 187843473 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370481728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.1370481728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.3037015383 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 3258511350 ps |
| CPU time | 82.65 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:07:01 PM UTC 24 |
| Peak memory | 235980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037015383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.3037015383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.1460589508 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 12677087538 ps |
| CPU time | 134.75 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:07:54 PM UTC 24 |
| Peak memory | 220524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460589508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.1460589508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.921063200 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 229437045 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:39 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921063200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_in_err.921063200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.4144374996 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 6195337159 ps |
| CPU time | 9.05 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:47 PM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144374996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.4144374996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.2353279502 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 4388787484 ps |
| CPU time | 6.9 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:05:45 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353279502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.2353279502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.483322298 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 3211197630 ps |
| CPU time | 76.65 seconds |
| Started | Oct 12 05:05:37 PM UTC 24 |
| Finished | Oct 12 05:06:56 PM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483322298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.483322298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2242636402 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 3464134749 ps |
| CPU time | 23.58 seconds |
| Started | Oct 12 05:05:58 PM UTC 24 |
| Finished | Oct 12 05:06:23 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242636402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2242636402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.252772381 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 241674729 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:05:58 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252772381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.252772381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.1492020441 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 195907890 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:05:58 PM UTC 24 |
| Finished | Oct 12 05:06:00 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492020441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.1492020441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.89445693 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 1572902740 ps |
| CPU time | 36.38 seconds |
| Started | Oct 12 05:05:58 PM UTC 24 |
| Finished | Oct 12 05:06:36 PM UTC 24 |
| Peak memory | 229488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=89445693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.89445693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.1867551038 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 160165559 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867551038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1867551038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.822846331 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 147715100 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822846331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.822846331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.1940580028 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 190347592 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940580028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.1940580028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.86196298 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 180280815 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86196298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.86196298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.73370467 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 148699623 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73370467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_stall.73370467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.2462523666 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 189725719 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462523666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.2462523666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.1668791124 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 166442446 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668791124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.1668791124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.3154131669 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 234492183 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154131669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.3154131669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.115409239 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 154074835 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115409239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.115409239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.3186222279 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 38589067 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186222279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.3186222279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.1414379936 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 15230627818 ps |
| CPU time | 37.31 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:38 PM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414379936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.1414379936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.2533041094 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 172739509 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533041094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.2533041094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.2238026763 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 180620691 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238026763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.2238026763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.2260403698 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 246479966 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260403698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.2260403698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.995598985 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 155842674 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=995598985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.995598985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.1941477001 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 136176843 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941477001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.1941477001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.84144631 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 257905607 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84144631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_full.84144631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.1409783619 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 158655295 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409783619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.1409783619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.2475135593 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 235994294 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475135593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.2475135593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2481867563 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 233224450 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481867563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2481867563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.2673109283 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 3533514350 ps |
| CPU time | 87.84 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:07:29 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673109283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.2673109283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.2297095330 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 195862328 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297095330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.2297095330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.1685124920 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 158100588 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:05:59 PM UTC 24 |
| Finished | Oct 12 05:06:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685124920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.1685124920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.3858826829 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 734502048 ps |
| CPU time | 2.06 seconds |
| Started | Oct 12 05:06:21 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858826829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.3858826829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.1758217567 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 4028525704 ps |
| CPU time | 28.41 seconds |
| Started | Oct 12 05:06:21 PM UTC 24 |
| Finished | Oct 12 05:06:51 PM UTC 24 |
| Peak memory | 231452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758217567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.1758217567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.29395786 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 606472632 ps |
| CPU time | 4.42 seconds |
| Started | Oct 12 05:05:36 PM UTC 24 |
| Finished | Oct 12 05:05:42 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=29395786 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.29395786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.3145929668 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 621973133 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:06:21 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3145929668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.3145929668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.3039273890 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 461501359 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3039273890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.3039273890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1163431143 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 599873823 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1163431143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1163431143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.2830032613 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 590207280 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2830032613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.2830032613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.2651303744 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 595757564 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2651303744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.2651303744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.808998736 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 612653551 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=808998736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_t x_rx_disruption.808998736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.4027877931 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 510451966 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4027877931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.4027877931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.1040903515 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 517472468 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1040903515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.1040903515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.479423951 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 450043322 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=479423951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_t x_rx_disruption.479423951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.4088273499 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 596464753 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4088273499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.4088273499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.1716471297 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 670294611 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1716471297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.1716471297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.1215893711 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 59599400 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215893711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.1215893711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.1491468387 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 4615900896 ps |
| CPU time | 8.07 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:31 PM UTC 24 |
| Peak memory | 229388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491468387 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.1491468387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.2037751990 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 18582851488 ps |
| CPU time | 21.11 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:44 PM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037751990 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.2037751990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.1867583278 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 25834136451 ps |
| CPU time | 38.53 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:07:02 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867583278 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.1867583278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2386994459 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 189871998 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386994459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2386994459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.872719232 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 140044357 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=872719232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_bitstuff_err.872719232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.3863312838 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 401983791 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863312838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.3863312838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.3895610212 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 583635450 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895610212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.3895610212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.11101313 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 26700555993 ps |
| CPU time | 37.58 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:07:01 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=11101313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_device_address.11101313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.478761090 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 4334020643 ps |
| CPU time | 26.08 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:49 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=478761090 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.478761090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.3277408667 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 768944539 ps |
| CPU time | 2.34 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277408667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.3277408667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1195648430 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 152855629 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195648430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1195648430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_enable.1896362603 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 80175208 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896362603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.1896362603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.3368388221 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 939733781 ps |
| CPU time | 2.57 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:26 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368388221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.3368388221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.300147506 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 249967492 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=300147506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.300147506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.641422410 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 277810910 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=641422410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_fifo_levels.641422410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.2810389935 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 356393601 ps |
| CPU time | 2.22 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2810389935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.2810389935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.1427518037 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 189130027 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427518037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.1427518037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.1545967426 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 146010737 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545967426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.1545967426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.37421875 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 230462562 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:25 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=37421875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_in_trans.37421875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.138009148 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 4219726533 ps |
| CPU time | 29.55 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:53 PM UTC 24 |
| Peak memory | 231316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=138009148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.138009148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2827558446 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 11693992352 ps |
| CPU time | 72.99 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:07:37 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827558446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2827558446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.3406277369 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 183034043 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406277369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.3406277369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.3358218012 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 11297849791 ps |
| CPU time | 14.85 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:59 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358218012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.3358218012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.2614268465 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 4590981792 ps |
| CPU time | 7.03 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:51 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614268465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.2614268465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.858710151 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 2878575429 ps |
| CPU time | 19.53 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 235760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858710151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.858710151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.2309662259 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 3243358460 ps |
| CPU time | 22.48 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:07:06 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309662259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.2309662259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.3914514082 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 307325430 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914514082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.3914514082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.4065706897 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 206515016 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065706897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.4065706897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.3947713656 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 2591660181 ps |
| CPU time | 16.53 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:07:00 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947713656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.3947713656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.667062401 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 153168361 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667062401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.667062401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.4102229748 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 159219995 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102229748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.4102229748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.2049754791 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 185061493 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049754791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.2049754791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.3824389961 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 168295966 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824389961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.3824389961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.1665458198 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 155854588 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665458198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.1665458198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.3733498564 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 187770202 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733498564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.3733498564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.1927741647 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 159624459 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927741647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.1927741647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.822772425 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 245617446 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=822772425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.822772425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.3643143739 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 154401552 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643143739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.3643143739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1152518958 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 35808825 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:06:45 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152518958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1152518958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.519817265 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 19346324103 ps |
| CPU time | 50.75 seconds |
| Started | Oct 12 05:06:42 PM UTC 24 |
| Finished | Oct 12 05:07:36 PM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=519817265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_pkt_buffer.519817265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.2628066858 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 198371577 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628066858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.2628066858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.1051308500 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 203566527 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051308500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.1051308500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.1074189409 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 215109738 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074189409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.1074189409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.2324767337 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 192565092 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324767337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.2324767337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.2267395742 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 140579174 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2267395742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.2267395742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.1043553040 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 371995318 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:06:43 PM UTC 24 |
| Finished | Oct 12 05:06:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043553040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.1043553040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.735223691 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 170689261 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=735223691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_setup_stage.735223691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.2316087652 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 151017842 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316087652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.2316087652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.405889469 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 250660137 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=405889469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.405889469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.512772845 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 2393072999 ps |
| CPU time | 20.35 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:23 PM UTC 24 |
| Peak memory | 231528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512772845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.512772845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.2214195997 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 185394394 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214195997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2214195997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.2614728438 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 175476769 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614728438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.2614728438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.3008107759 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 792149956 ps |
| CPU time | 1.93 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008107759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3008107759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.2217564469 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 3975423290 ps |
| CPU time | 93.62 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:08:37 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217564469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.2217564469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.1271679440 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 1082823721 ps |
| CPU time | 8.31 seconds |
| Started | Oct 12 05:06:22 PM UTC 24 |
| Finished | Oct 12 05:06:31 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271679440 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.1271679440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.1781119274 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 556880189 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1781119274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.1781119274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.4228580041 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 589150822 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4228580041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.4228580041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.2299764068 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 528196286 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2299764068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.2299764068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.620700832 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 529254433 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=620700832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_t x_rx_disruption.620700832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.2962671673 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 474932031 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2962671673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.2962671673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3063785327 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 509915829 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3063785327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3063785327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.2650322673 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 468201666 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2650322673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.2650322673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.718704385 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 590529702 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=718704385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_t x_rx_disruption.718704385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.1859377531 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 563553969 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1859377531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.1859377531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.3808716501 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 572004489 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3808716501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.3808716501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.2641291960 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 499015585 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2641291960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.2641291960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.2725639058 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 107569036 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725639058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.2725639058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.973249047 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 4997099096 ps |
| CPU time | 7.85 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:10 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=973249047 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.973249047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.4055368379 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 18824669680 ps |
| CPU time | 22.11 seconds |
| Started | Oct 12 05:07:01 PM UTC 24 |
| Finished | Oct 12 05:07:25 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055368379 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.4055368379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.3260051012 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 25252507109 ps |
| CPU time | 31.95 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:35 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260051012 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.3260051012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.1723239388 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 200389885 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723239388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.1723239388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.2716469655 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 165533785 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:03 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716469655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.2716469655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.2123293227 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 318967055 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123293227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.2123293227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.586601726 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 417203595 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=586601726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.586601726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1703069855 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 15523820178 ps |
| CPU time | 23.86 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703069855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1703069855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.3039057664 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 195801225 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:04 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039057664 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.3039057664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.2253379850 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 667530789 ps |
| CPU time | 1.84 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:05 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253379850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.2253379850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.1248828965 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 132589053 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:07:24 PM UTC 24 |
| Finished | Oct 12 05:07:26 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248828965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.1248828965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_enable.55778875 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 74805685 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:07:24 PM UTC 24 |
| Finished | Oct 12 05:07:26 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55778875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.55778875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.3466471392 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 817212376 ps |
| CPU time | 2.4 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466471392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.3466471392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.594281338 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 266397006 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594281338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_fifo_levels.594281338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.3248777975 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 296401200 ps |
| CPU time | 2.24 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248777975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.3248777975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.1624917092 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 232716586 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624917092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.1624917092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.3625872665 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 144463813 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625872665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.3625872665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.1934787504 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 182910393 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934787504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.1934787504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.1258340165 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 3283495849 ps |
| CPU time | 79.45 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:08:46 PM UTC 24 |
| Peak memory | 231532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258340165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.1258340165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.3713577500 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 11862100046 ps |
| CPU time | 125.26 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:09:33 PM UTC 24 |
| Peak memory | 220456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713577500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.3713577500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.3209075271 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 240664798 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209075271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.3209075271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.526620237 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 13133425170 ps |
| CPU time | 18.53 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:45 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=526620237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_link_resume.526620237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.2352561825 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 8356592751 ps |
| CPU time | 10.09 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:36 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352561825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.2352561825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2981310736 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 3144145646 ps |
| CPU time | 72.61 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:08:39 PM UTC 24 |
| Peak memory | 231384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981310736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2981310736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1070400036 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 2751833199 ps |
| CPU time | 66.39 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:08:33 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070400036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1070400036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.3299593891 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 240448954 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299593891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.3299593891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2157298615 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 193053083 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157298615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2157298615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.3345685673 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 1921996737 ps |
| CPU time | 16.64 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:43 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345685673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.3345685673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.1271598491 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 158562186 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271598491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.1271598491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.3165573958 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 151345622 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165573958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.3165573958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.4007021988 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 184714263 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:27 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007021988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.4007021988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.2005355678 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 192379535 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005355678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.2005355678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.2161954814 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 217634870 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2161954814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.2161954814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.2404795045 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 184501137 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404795045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.2404795045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.1021775989 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 152326129 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021775989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.1021775989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2377583835 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 269369805 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:07:25 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377583835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2377583835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.1033679567 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 169396824 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:07:26 PM UTC 24 |
| Finished | Oct 12 05:07:28 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033679567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.1033679567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.941564908 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 45153346 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:49 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941564908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_phy_pins_sense.941564908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3061546330 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 15795704852 ps |
| CPU time | 36.72 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:26 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061546330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.3061546330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.421322376 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 161384650 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421322376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_pkt_received.421322376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.4010226606 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 278175215 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010226606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.4010226606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.721217833 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 190273379 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721217833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_random_length_in_transaction.721217833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.2978851205 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 155980476 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978851205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.2978851205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1395848813 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 166999360 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395848813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1395848813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2122500662 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 335330971 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122500662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2122500662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.1699718534 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 218652672 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699718534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.1699718534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.1603455295 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 180354891 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603455295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.1603455295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.4250758874 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 235436338 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250758874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.4250758874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.1418074177 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 2278433515 ps |
| CPU time | 19.46 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:09 PM UTC 24 |
| Peak memory | 236032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418074177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1418074177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.1888842031 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 167018320 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888842031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.1888842031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.3953580121 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 170177360 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953580121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.3953580121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.231936708 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 847582746 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:51 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231936708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_stream_len_max.231936708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.1648107964 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 2021159042 ps |
| CPU time | 47.84 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:37 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648107964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.1648107964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.2411799502 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 4992999439 ps |
| CPU time | 29.58 seconds |
| Started | Oct 12 05:07:02 PM UTC 24 |
| Finished | Oct 12 05:07:33 PM UTC 24 |
| Peak memory | 219184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411799502 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.2411799502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.718693339 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 495471598 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:51 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=718693339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_tx _rx_disruption.718693339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3018731464 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 500537539 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:32:04 PM UTC 24 |
| Finished | Oct 12 05:32:07 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3018731464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3018731464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.3147552844 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 497426321 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3147552844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.3147552844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.2910703723 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 571936400 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2910703723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.2910703723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.1972730292 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 545607781 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1972730292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.1972730292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.832598436 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 553558738 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=832598436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.832598436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.2435346640 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 513367540 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2435346640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.2435346640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2311465129 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 507893388 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:28 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2311465129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2311465129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.2722786751 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 611603193 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2722786751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.2722786751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.1767878613 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 599624606 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1767878613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.1767878613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.1128374476 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 514061209 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1128374476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.1128374476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.3335509990 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 36802469 ps |
| CPU time | 0.65 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:08:54 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335509990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.3335509990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.441781327 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 8897187132 ps |
| CPU time | 10.99 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:00 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=441781327 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.441781327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.3357165202 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 16003091481 ps |
| CPU time | 19.34 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:09 PM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357165202 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.3357165202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1477855583 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 23848822941 ps |
| CPU time | 32.57 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:08:22 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477855583 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1477855583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.452566872 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 155668650 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:50 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=452566872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.452566872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.2755362233 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 211282697 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:51 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755362233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.2755362233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.2834498652 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 485315984 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:51 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834498652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.2834498652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.619707063 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 1054002164 ps |
| CPU time | 2.82 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:07:52 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=619707063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.619707063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.3187930149 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 50295103106 ps |
| CPU time | 79.38 seconds |
| Started | Oct 12 05:07:48 PM UTC 24 |
| Finished | Oct 12 05:09:10 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187930149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.3187930149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.3782829856 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 857506239 ps |
| CPU time | 15.71 seconds |
| Started | Oct 12 05:08:10 PM UTC 24 |
| Finished | Oct 12 05:08:27 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782829856 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.3782829856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.4165503065 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 950956241 ps |
| CPU time | 2.03 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165503065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.4165503065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.3493619801 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 151222562 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493619801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.3493619801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_enable.4147137655 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 39603844 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147137655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.4147137655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.4109350916 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 990566645 ps |
| CPU time | 2.66 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109350916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.4109350916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.4283770013 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 286993872 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283770013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.4283770013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.4195434918 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 266576939 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195434918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.4195434918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.4129850898 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 364481987 ps |
| CPU time | 2.38 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129850898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.4129850898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3828006158 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 225936163 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828006158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3828006158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.932222919 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 144628872 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932222919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_stall.932222919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.3598400867 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 220753842 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598400867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.3598400867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1974420822 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 4971101705 ps |
| CPU time | 44.11 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:56 PM UTC 24 |
| Peak memory | 235972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974420822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1974420822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.1773595723 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 4066128119 ps |
| CPU time | 26.07 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:38 PM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773595723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.1773595723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.7308534 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 241380608 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=7308534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_link_in_err.7308534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.1802055242 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 13464651171 ps |
| CPU time | 17.98 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:30 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802055242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.1802055242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.1419079076 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 3840634894 ps |
| CPU time | 7.03 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:19 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419079076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.1419079076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.1719814359 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 3747252100 ps |
| CPU time | 86.4 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:09:39 PM UTC 24 |
| Peak memory | 231440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719814359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.1719814359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.4220870471 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 2549631688 ps |
| CPU time | 62.52 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:09:15 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220870471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.4220870471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.2401314929 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 252108685 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401314929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.2401314929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.3875043185 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 191599556 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875043185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3875043185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.2227066535 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 2354233589 ps |
| CPU time | 15.16 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:28 PM UTC 24 |
| Peak memory | 229480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227066535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.2227066535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3089866115 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 156441165 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089866115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3089866115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.3131594593 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 151871150 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131594593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3131594593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.2608678050 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 200225935 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608678050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.2608678050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.2834742448 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 166601890 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834742448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.2834742448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.4050246140 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 158685939 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050246140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.4050246140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.681887744 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 189322177 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681887744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_out_trans_nak.681887744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.1088199257 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 163976566 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088199257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.1088199257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.3321764402 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 202299024 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321764402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3321764402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.919019595 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 148004896 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=919019595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.919019595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.4179967445 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 29805094 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179967445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.4179967445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.334214711 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 8573191947 ps |
| CPU time | 21.42 seconds |
| Started | Oct 12 05:08:29 PM UTC 24 |
| Finished | Oct 12 05:08:52 PM UTC 24 |
| Peak memory | 229312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334214711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_pkt_buffer.334214711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.2242016424 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 168187343 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242016424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.2242016424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.801456572 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 211455782 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801456572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_pkt_sent.801456572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.4246724336 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 202701536 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246724336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.4246724336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.1188423101 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 178503722 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188423101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.1188423101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.958766140 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 189906919 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958766140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_rx_crc_err.958766140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.826780595 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 243217310 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=826780595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_setup_stage.826780595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.2340165956 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 151960948 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340165956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.2340165956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.1651084567 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 281565041 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:33 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651084567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.1651084567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.4094750235 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 2736966957 ps |
| CPU time | 23.55 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 235968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094750235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.4094750235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.3356195460 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 199662655 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356195460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.3356195460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.2729021475 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 166827580 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729021475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.2729021475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.168002450 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 492365178 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:33 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168002450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_stream_len_max.168002450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.4034251923 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 3472766533 ps |
| CPU time | 22.38 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:54 PM UTC 24 |
| Peak memory | 235888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034251923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.4034251923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.2667074909 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 2019300015 ps |
| CPU time | 11.84 seconds |
| Started | Oct 12 05:08:11 PM UTC 24 |
| Finished | Oct 12 05:08:24 PM UTC 24 |
| Peak memory | 219132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667074909 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.2667074909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.1979923094 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 569566503 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:08:30 PM UTC 24 |
| Finished | Oct 12 05:08:33 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1979923094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.1979923094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.1956853749 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 485024867 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1956853749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.1956853749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.2882002442 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 661736476 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2882002442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.2882002442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.1279030071 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 587399205 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1279030071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.1279030071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.3806117147 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 463879652 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3806117147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.3806117147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1229138548 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 489445836 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1229138548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1229138548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2513571039 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 536234732 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 217720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2513571039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2513571039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.1241957384 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 630436037 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1241957384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.1241957384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.3484212000 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 510739041 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3484212000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.3484212000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.4030567614 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 508089195 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4030567614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.4030567614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.745021229 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 520235488 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=745021229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_t x_rx_disruption.745021229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.1363058665 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 33603611 ps |
| CPU time | 0.63 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:47 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363058665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.1363058665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.993491165 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 4329373845 ps |
| CPU time | 6.18 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:09:00 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=993491165 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.993491165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.3724960166 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 15214016475 ps |
| CPU time | 17.95 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:09:11 PM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724960166 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.3724960166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.1103048893 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 25957720235 ps |
| CPU time | 33.94 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:09:28 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103048893 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.1103048893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.3205298808 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 145244548 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:08:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205298808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.3205298808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.326791388 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 159259092 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:08:54 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326791388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_bitstuff_err.326791388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.1258352496 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 431379695 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258352496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.1258352496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.156634760 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 965992534 ps |
| CPU time | 2.6 seconds |
| Started | Oct 12 05:08:52 PM UTC 24 |
| Finished | Oct 12 05:08:56 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=156634760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.156634760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.2790074542 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 32188964769 ps |
| CPU time | 47.96 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:42 PM UTC 24 |
| Peak memory | 219328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790074542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.2790074542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.3438875614 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 441873559 ps |
| CPU time | 6.98 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:01 PM UTC 24 |
| Peak memory | 219308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438875614 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3438875614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.186806267 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 695229860 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:56 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186806267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.186806267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.2824774202 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 172066429 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824774202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.2824774202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_enable.3247094754 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 38690217 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247094754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.3247094754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.977928755 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 980749925 ps |
| CPU time | 2.65 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:57 PM UTC 24 |
| Peak memory | 218968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977928755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.977928755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1281274767 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 354868958 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281274767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.1281274767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.581225090 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 173648980 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581225090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_fifo_levels.581225090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.1947770906 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 193772706 ps |
| CPU time | 2.38 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:56 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947770906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.1947770906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.2850153910 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 233609744 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850153910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2850153910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.1758417942 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 181798135 ps |
| CPU time | 1.32 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758417942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.1758417942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.2001871108 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 156718911 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001871108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.2001871108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.4211857040 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 4040289676 ps |
| CPU time | 26.7 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211857040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.4211857040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3810286436 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 7004348398 ps |
| CPU time | 40.53 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:35 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810286436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.3810286436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.2320233167 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 174055150 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:08:55 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320233167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.2320233167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.3673611657 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 11689882553 ps |
| CPU time | 16.64 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:11 PM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673611657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.3673611657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2350217918 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 4368953037 ps |
| CPU time | 6.4 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:26 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350217918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2350217918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2003441460 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 3309525056 ps |
| CPU time | 78.36 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:10:39 PM UTC 24 |
| Peak memory | 232804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003441460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2003441460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.1238987337 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 2562155170 ps |
| CPU time | 16.15 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:36 PM UTC 24 |
| Peak memory | 229632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238987337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.1238987337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.4092408823 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 292947196 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092408823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.4092408823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.2197393574 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 187769823 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197393574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.2197393574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.3048429158 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 3198913274 ps |
| CPU time | 75.21 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048429158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.3048429158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.3978535747 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 155966597 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978535747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3978535747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.1530433873 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 176428819 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530433873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.1530433873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.1962498758 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 207262419 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962498758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.1962498758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.2534469124 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 169646646 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534469124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.2534469124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.3122630046 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 169817683 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122630046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.3122630046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.753424398 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 173556576 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753424398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_out_trans_nak.753424398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.360986247 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 185102830 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360986247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.360986247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.2337524084 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 236313318 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337524084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.2337524084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.3486037956 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 166646269 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:09:19 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486037956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.3486037956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2907484610 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 38169132 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:21 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907484610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.2907484610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.2068488395 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 13820870316 ps |
| CPU time | 32.42 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:53 PM UTC 24 |
| Peak memory | 235984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068488395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.2068488395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.3175472531 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 196785872 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175472531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.3175472531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.3407570453 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 171284494 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407570453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.3407570453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3185099030 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 188116249 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185099030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3185099030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3947569480 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 186486186 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947569480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3947569480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.843780677 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 152062610 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=843780677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_rx_crc_err.843780677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.3150492307 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 292570805 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150492307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.3150492307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.3404580668 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 157894762 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404580668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.3404580668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.3165589199 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 165252929 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165589199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.3165589199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1180313754 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 230308388 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1180313754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1180313754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.4294115981 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 2921471597 ps |
| CPU time | 24.62 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:46 PM UTC 24 |
| Peak memory | 231520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294115981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.4294115981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2850279905 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 159930504 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850279905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2850279905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.3541570893 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 180620876 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:09:22 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541570893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.3541570893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.2553279073 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 851493329 ps |
| CPU time | 2.4 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553279073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.2553279073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.3666365378 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 3259827244 ps |
| CPU time | 78.23 seconds |
| Started | Oct 12 05:09:20 PM UTC 24 |
| Finished | Oct 12 05:10:40 PM UTC 24 |
| Peak memory | 229548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666365378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.3666365378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.3610689101 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 761834884 ps |
| CPU time | 13.34 seconds |
| Started | Oct 12 05:08:53 PM UTC 24 |
| Finished | Oct 12 05:09:07 PM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610689101 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.3610689101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.1960193341 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 532025306 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1960193341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.1960193341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.595403563 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 592370685 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=595403563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_t x_rx_disruption.595403563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.3326719565 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 672356059 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3326719565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.3326719565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.2254014222 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 575492830 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2254014222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.2254014222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.248715905 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 519128483 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=248715905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_t x_rx_disruption.248715905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.4155438872 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 524608988 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4155438872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.4155438872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.2222593165 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 508174607 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2222593165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.2222593165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.43687922 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 575315361 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=43687922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_tx _rx_disruption.43687922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.2628734640 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 585427509 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2628734640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.2628734640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.3105328962 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 624976221 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:33:26 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3105328962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.3105328962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.3427612368 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 475152478 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3427612368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.3427612368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3400990256 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 104827368 ps |
| CPU time | 0.66 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:35 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400990256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.3400990256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.919101242 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 11627793666 ps |
| CPU time | 14.48 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:10:01 PM UTC 24 |
| Peak memory | 219276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=919101242 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.919101242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1181966817 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 18359472609 ps |
| CPU time | 23.1 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:10:09 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181966817 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.1181966817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.663018151 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 25969295985 ps |
| CPU time | 32.67 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:10:19 PM UTC 24 |
| Peak memory | 229356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663018151 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.663018151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.905273406 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 213339290 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:47 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905273406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_av_buffer.905273406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.4186567438 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 162327862 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:47 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186567438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.4186567438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.2085592428 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 445416826 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085592428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.2085592428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2894337174 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 352693465 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894337174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2894337174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1728424924 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 27948084090 ps |
| CPU time | 40.07 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:10:27 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728424924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1728424924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.641184331 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 1970931989 ps |
| CPU time | 12.3 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:59 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641184331 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.641184331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.1946536216 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 823674081 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946536216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.1946536216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.1475108948 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 154788222 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:47 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475108948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.1475108948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_enable.385058128 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 31369454 ps |
| CPU time | 0.67 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385058128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.385058128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.3360799828 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 794422482 ps |
| CPU time | 2.69 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:09:49 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360799828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.3360799828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.2484246030 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 402900595 ps |
| CPU time | 2.32 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:49 PM UTC 24 |
| Peak memory | 219064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484246030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.2484246030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.885775403 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 171685122 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=885775403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.885775403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.3785427469 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 222009092 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785427469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.3785427469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1831875965 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 174359699 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831875965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1831875965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2145876349 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 3859259142 ps |
| CPU time | 33.57 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:10:21 PM UTC 24 |
| Peak memory | 236068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145876349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2145876349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.550800775 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 13722139536 ps |
| CPU time | 77.85 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:11:06 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=550800775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.550800775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3515891230 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 185644961 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515891230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3515891230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.422527153 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 9121729959 ps |
| CPU time | 11.94 seconds |
| Started | Oct 12 05:09:46 PM UTC 24 |
| Finished | Oct 12 05:09:59 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=422527153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_link_resume.422527153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.970082208 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 8362692457 ps |
| CPU time | 10.68 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:23 PM UTC 24 |
| Peak memory | 218428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970082208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_suspend.970082208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.225039647 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 3196275990 ps |
| CPU time | 27.76 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:40 PM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=225039647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.225039647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3935725480 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 2547408237 ps |
| CPU time | 60.45 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:11:13 PM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935725480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.3935725480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.962720126 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 278240237 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962720126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.962720126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.886200833 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 195342788 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=886200833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.886200833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.3308356496 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 2511592570 ps |
| CPU time | 20.46 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:33 PM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308356496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.3308356496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2802013078 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 185376514 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802013078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2802013078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.2173760832 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 155879040 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173760832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.2173760832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1579284440 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 227980864 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579284440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1579284440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.174954601 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 183405380 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174954601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_out_iso.174954601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.2252063471 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 151646208 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252063471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.2252063471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.253349546 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 149047743 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:10:10 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253349546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_out_trans_nak.253349546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.710435690 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 149311534 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=710435690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.710435690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.2039882333 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 197420661 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039882333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.2039882333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.3596683259 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 144561466 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596683259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.3596683259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.32614247 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 81544031 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32614247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_phy_pins_sense.32614247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.492336837 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 16487799799 ps |
| CPU time | 41.94 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:55 PM UTC 24 |
| Peak memory | 229312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=492336837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_pkt_buffer.492336837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.3148192408 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 182764255 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148192408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.3148192408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2985700991 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 192814632 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985700991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2985700991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.1073173732 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 162321596 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073173732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.1073173732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3403846779 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 203913308 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:13 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403846779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3403846779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.946580583 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 167904038 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946580583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_rx_crc_err.946580583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.3297518147 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 359320404 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3297518147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.3297518147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.3462748612 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 169719210 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462748612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.3462748612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.3234766489 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 161852196 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234766489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.3234766489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.594765700 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 238989418 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:14 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594765700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.594765700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.431559974 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 3132524081 ps |
| CPU time | 20.4 seconds |
| Started | Oct 12 05:10:11 PM UTC 24 |
| Finished | Oct 12 05:10:33 PM UTC 24 |
| Peak memory | 235976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=431559974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.431559974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.40796643 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 171639828 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:35 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40796643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.40796643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.2012529318 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 168200594 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:35 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012529318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.2012529318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.4245517625 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 757687302 ps |
| CPU time | 2.05 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245517625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.4245517625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.969858107 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 3474998367 ps |
| CPU time | 29.83 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:11:04 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969858107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_streaming_out.969858107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2032156512 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 4352392966 ps |
| CPU time | 30.75 seconds |
| Started | Oct 12 05:09:45 PM UTC 24 |
| Finished | Oct 12 05:10:17 PM UTC 24 |
| Peak memory | 218520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032156512 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2032156512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.291942755 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 418131601 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=291942755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_tx _rx_disruption.291942755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.4021262496 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 533328143 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4021262496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.4021262496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.758588170 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 481699059 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=758588170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_t x_rx_disruption.758588170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.4146747936 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 551343134 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4146747936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.4146747936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.2628063097 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 530961997 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2628063097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.2628063097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2488004673 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 475660300 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2488004673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2488004673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2967889707 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 499676318 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2967889707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2967889707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3119960789 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 495359668 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3119960789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.3119960789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.1643161598 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 462632335 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1643161598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.1643161598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.1587555004 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 472771318 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1587555004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.1587555004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.4120524716 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 466660835 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:29 PM UTC 24 |
| Peak memory | 218592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4120524716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.4120524716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1756259918 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 75597313 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756259918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1756259918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2800081618 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 9516453294 ps |
| CPU time | 12.53 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:47 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800081618 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.2800081618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.881671341 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 21229417638 ps |
| CPU time | 26.29 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=881671341 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.881671341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.4206758036 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 25252345342 ps |
| CPU time | 31.36 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:11:06 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206758036 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.4206758036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.706374413 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 162240331 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:35 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706374413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_av_buffer.706374413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.2875004665 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 144117898 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:35 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875004665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.2875004665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3042699026 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 303080722 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042699026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.3042699026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.28636988 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 321880944 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=28636988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.28636988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.3045544505 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 38154533618 ps |
| CPU time | 66.93 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:11:42 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045544505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.3045544505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1048613075 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 644404733 ps |
| CPU time | 10.03 seconds |
| Started | Oct 12 05:10:33 PM UTC 24 |
| Finished | Oct 12 05:10:45 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048613075 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1048613075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.3676552242 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 789865639 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676552242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.3676552242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.3452596594 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 147311408 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452596594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.3452596594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1477070879 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 31221669 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477070879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.1477070879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.2315528310 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 1032023465 ps |
| CPU time | 3.02 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:38 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315528310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.2315528310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.643185654 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 191362248 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643185654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.643185654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1056260537 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 200582316 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:36 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056260537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.1056260537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.3166775544 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 304916293 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:10:37 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166775544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.3166775544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1254301148 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 182012007 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254301148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.1254301148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.3135088768 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 137232386 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135088768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.3135088768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2424551938 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 169441247 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424551938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.2424551938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.3038145017 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 4737838012 ps |
| CPU time | 115.92 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:12:57 PM UTC 24 |
| Peak memory | 230760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038145017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.3038145017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.819717458 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 10220453207 ps |
| CPU time | 67.62 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:12:08 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819717458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.819717458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.131938091 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 170054312 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131938091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_in_err.131938091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1335147905 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 14095363474 ps |
| CPU time | 20.07 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:20 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335147905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.1335147905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4190103474 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 3862419037 ps |
| CPU time | 6.54 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:07 PM UTC 24 |
| Peak memory | 218888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190103474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.4190103474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2034725802 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 3427859782 ps |
| CPU time | 21.94 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:22 PM UTC 24 |
| Peak memory | 231316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034725802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.2034725802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.3710921294 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 1656301092 ps |
| CPU time | 39.01 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:40 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710921294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.3710921294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3794246960 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 240791498 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794246960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3794246960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3193979112 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 195326372 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193979112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.3193979112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.4047922753 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 1801145658 ps |
| CPU time | 11.3 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:12 PM UTC 24 |
| Peak memory | 218460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047922753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.4047922753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.145715666 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 148272587 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145715666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.145715666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.4076436221 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 151191148 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:10:59 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076436221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.4076436221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.2779591513 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 216222342 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779591513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.2779591513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.2155251692 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 186252882 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155251692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.2155251692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.2206688349 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 212681624 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206688349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.2206688349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2307486029 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 176952312 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307486029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.2307486029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.721086789 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 163074599 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721086789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pending_in_trans.721086789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.4010796064 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 249139019 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010796064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.4010796064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1543645608 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 201480702 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543645608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1543645608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3066341220 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 33054757 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066341220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3066341220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.631024961 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 11459246966 ps |
| CPU time | 29.27 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:30 PM UTC 24 |
| Peak memory | 229300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=631024961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_pkt_buffer.631024961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.687195354 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 153664957 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687195354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_pkt_received.687195354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.2951402011 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 169250978 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951402011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.2951402011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3406924226 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 203626610 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406924226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.3406924226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.341261124 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 190794450 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:11:00 PM UTC 24 |
| Finished | Oct 12 05:11:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341261124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.341261124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.378254584 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 167256956 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378254584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_rx_crc_err.378254584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.1813096078 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 376882497 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813096078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.1813096078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.2980211530 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 155446876 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980211530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.2980211530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.3184994575 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 180354583 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184994575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.3184994575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1186277566 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 200769079 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186277566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1186277566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.4209207624 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 3820367404 ps |
| CPU time | 90.77 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:12:57 PM UTC 24 |
| Peak memory | 236048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209207624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.4209207624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.3847534084 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 198331042 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847534084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.3847534084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3042910082 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 185508282 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042910082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.3042910082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.1270757425 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 1376241232 ps |
| CPU time | 3.28 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:29 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270757425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.1270757425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.3104077486 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2431661606 ps |
| CPU time | 59.05 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:12:26 PM UTC 24 |
| Peak memory | 229348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104077486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.3104077486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2961275200 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 1389894684 ps |
| CPU time | 27.67 seconds |
| Started | Oct 12 05:10:34 PM UTC 24 |
| Finished | Oct 12 05:11:03 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961275200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.2961275200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.4215481563 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 666774720 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:28 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4215481563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.4215481563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.671818883 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 642847639 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 218492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=671818883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_t x_rx_disruption.671818883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.822394864 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 595206157 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=822394864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_t x_rx_disruption.822394864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.1383996136 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 518186133 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1383996136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.1383996136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2815815161 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 507512669 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2815815161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2815815161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1256334022 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 542236523 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1256334022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1256334022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.1352498621 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 600255486 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1352498621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.1352498621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.437825898 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 494282966 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=437825898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_t x_rx_disruption.437825898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2882830696 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 512479681 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2882830696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.2882830696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.1566691146 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 559250260 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1566691146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.1566691146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.1686391680 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 655738783 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1686391680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.1686391680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.30573550 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 62069515 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30573550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.30573550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1842918652 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 9252661531 ps |
| CPU time | 11.63 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:38 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842918652 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.1842918652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3230744638 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 19819720242 ps |
| CPU time | 24.1 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:51 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230744638 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3230744638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.650341697 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 31174653087 ps |
| CPU time | 39.92 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:12:07 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650341697 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.650341697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.4086830662 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 174583442 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086830662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.4086830662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3399893581 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 178627070 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399893581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.3399893581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1377554486 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 486807171 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:28 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377554486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1377554486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2084095647 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 739364303 ps |
| CPU time | 2.3 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:29 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084095647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.2084095647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2496714603 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 43215776798 ps |
| CPU time | 71 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:12:38 PM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496714603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.2496714603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.1374273591 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 1677167850 ps |
| CPU time | 34.01 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:12:01 PM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374273591 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.1374273591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3188009756 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 689307407 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188009756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3188009756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.2111856413 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 183941843 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:11:26 PM UTC 24 |
| Finished | Oct 12 05:11:28 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111856413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.2111856413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1682183558 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 40739605 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:11:26 PM UTC 24 |
| Finished | Oct 12 05:11:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682183558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1682183558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.3846520603 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 951334753 ps |
| CPU time | 2.42 seconds |
| Started | Oct 12 05:11:26 PM UTC 24 |
| Finished | Oct 12 05:11:29 PM UTC 24 |
| Peak memory | 218960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846520603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.3846520603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.3197072558 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 186245399 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197072558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.3197072558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.580130627 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 330939204 ps |
| CPU time | 2.16 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580130627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_fifo_rst.580130627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.2731312448 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 200186882 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731312448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.2731312448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.2392852685 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 147295385 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392852685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.2392852685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3651146896 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 243767209 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651146896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3651146896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.1357500534 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 5080599979 ps |
| CPU time | 117.12 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:13:52 PM UTC 24 |
| Peak memory | 237324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357500534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.1357500534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.3470238703 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 4887390512 ps |
| CPU time | 30.35 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:25 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470238703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.3470238703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.248949453 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 289327976 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=248949453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_link_in_err.248949453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1488669265 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 27349252756 ps |
| CPU time | 39.16 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:34 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488669265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.1488669265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2805679868 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 10097976363 ps |
| CPU time | 14.27 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:09 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805679868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2805679868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.2234955952 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 4827846127 ps |
| CPU time | 41.58 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:36 PM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234955952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.2234955952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1859227865 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 2170731683 ps |
| CPU time | 14.46 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:09 PM UTC 24 |
| Peak memory | 229376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859227865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1859227865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.1695177178 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 241185355 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:55 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695177178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.1695177178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.86377186 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 188407297 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86377186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.86377186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.315054860 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 1545164038 ps |
| CPU time | 14.31 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:12:09 PM UTC 24 |
| Peak memory | 235948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315054860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.315054860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2350932477 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 161171531 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:11:53 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350932477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.2350932477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.2426092576 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 145273749 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426092576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.2426092576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.397203327 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 196372458 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397203327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_nak_trans.397203327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.3782014605 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 159128109 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782014605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.3782014605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.26780266 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 183613780 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26780266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_stall.26780266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3203311089 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 178978312 ps |
| CPU time | 1.29 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203311089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.3203311089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1454666143 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 155606202 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454666143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1454666143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3729623983 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 204162071 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729623983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3729623983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4029414372 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 153888589 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029414372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.4029414372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2465152795 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 40102568 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465152795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.2465152795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2058931742 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 20127173663 ps |
| CPU time | 48.5 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:12:44 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058931742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2058931742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.2152092084 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 149341195 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152092084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.2152092084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1874500337 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 223144384 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:11:54 PM UTC 24 |
| Finished | Oct 12 05:11:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874500337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1874500337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.2967913102 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 214498854 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967913102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.2967913102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.321705763 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 201402321 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321705763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.321705763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.3671952557 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 235089999 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671952557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.3671952557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.1259810014 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 405576946 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259810014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.1259810014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.1259565398 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 146834886 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259565398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.1259565398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.4211145735 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 158555675 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211145735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.4211145735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.850285521 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 241435383 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850285521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.850285521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2251752211 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 2954466632 ps |
| CPU time | 18.59 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:36 PM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251752211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.2251752211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1410606478 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 199857336 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410606478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.1410606478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.4060260408 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 164939709 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:18 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060260408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.4060260408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.931103856 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 337883165 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931103856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_stream_len_max.931103856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.675172410 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 2427352666 ps |
| CPU time | 21.59 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:39 PM UTC 24 |
| Peak memory | 235868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675172410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_streaming_out.675172410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.1252256700 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 920315204 ps |
| CPU time | 15.72 seconds |
| Started | Oct 12 05:11:25 PM UTC 24 |
| Finished | Oct 12 05:11:42 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252256700 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.1252256700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.4203212865 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 529553606 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4203212865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.4203212865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3299468608 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 448228741 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3299468608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3299468608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.3560143361 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 586617458 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3560143361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.3560143361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.2303145176 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 591579530 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2303145176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.2303145176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.3273250492 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 675711393 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3273250492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.3273250492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.974198712 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 549225848 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=974198712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_t x_rx_disruption.974198712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.655994900 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 568381790 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=655994900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_t x_rx_disruption.655994900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1089955641 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 634252908 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1089955641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1089955641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2350718140 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 543628190 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350718140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2350718140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3182376494 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 501087210 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3182376494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3182376494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.2693428756 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 525563593 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2693428756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.2693428756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.1636996851 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 35341743 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 04:45:44 PM UTC 24 |
| Finished | Oct 12 04:45:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636996851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.1636996851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3189827875 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 10389478035 ps |
| CPU time | 36.44 seconds |
| Started | Oct 12 04:44:24 PM UTC 24 |
| Finished | Oct 12 04:45:02 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189827875 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.3189827875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.2700142671 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 19105262832 ps |
| CPU time | 36.09 seconds |
| Started | Oct 12 04:44:25 PM UTC 24 |
| Finished | Oct 12 04:45:02 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700142671 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.2700142671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.4197212991 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 31007920138 ps |
| CPU time | 47.55 seconds |
| Started | Oct 12 04:44:28 PM UTC 24 |
| Finished | Oct 12 04:45:17 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197212991 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.4197212991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.135019158 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 165910144 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:44:28 PM UTC 24 |
| Finished | Oct 12 04:44:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135019158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_buffer.135019158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.3081318519 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 155248700 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:44:28 PM UTC 24 |
| Finished | Oct 12 04:44:30 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081318519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.3081318519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.931930737 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 140661205 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:44:28 PM UTC 24 |
| Finished | Oct 12 04:44:30 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931930737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_av_overflow.931930737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1956892923 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 146289460 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:44:30 PM UTC 24 |
| Finished | Oct 12 04:44:33 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956892923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1956892923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.609707342 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 445880633 ps |
| CPU time | 2.65 seconds |
| Started | Oct 12 04:44:32 PM UTC 24 |
| Finished | Oct 12 04:44:36 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609707342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_data_toggle_clear.609707342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.627568302 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 397847353 ps |
| CPU time | 2.3 seconds |
| Started | Oct 12 04:44:32 PM UTC 24 |
| Finished | Oct 12 04:44:36 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627568302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.627568302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.2166896783 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 634251307 ps |
| CPU time | 7.16 seconds |
| Started | Oct 12 04:44:35 PM UTC 24 |
| Finished | Oct 12 04:44:43 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166896783 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.2166896783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.1889075699 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 795293597 ps |
| CPU time | 3.68 seconds |
| Started | Oct 12 04:44:39 PM UTC 24 |
| Finished | Oct 12 04:44:44 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889075699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.1889075699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.1828983761 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 165407301 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:44:39 PM UTC 24 |
| Finished | Oct 12 04:44:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828983761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.1828983761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_enable.528675433 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 94419635 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:44:39 PM UTC 24 |
| Finished | Oct 12 04:44:42 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528675433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_enable.528675433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.3045202927 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 840441042 ps |
| CPU time | 3.04 seconds |
| Started | Oct 12 04:44:42 PM UTC 24 |
| Finished | Oct 12 04:44:47 PM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045202927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.3045202927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.2143894302 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 293031919 ps |
| CPU time | 1.92 seconds |
| Started | Oct 12 04:44:45 PM UTC 24 |
| Finished | Oct 12 04:44:48 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143894302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.2143894302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3110193243 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 268466866 ps |
| CPU time | 2.63 seconds |
| Started | Oct 12 04:44:45 PM UTC 24 |
| Finished | Oct 12 04:44:49 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110193243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3110193243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.2577646935 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 101203433629 ps |
| CPU time | 223.64 seconds |
| Started | Oct 12 04:44:45 PM UTC 24 |
| Finished | Oct 12 04:48:33 PM UTC 24 |
| Peak memory | 220592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577646935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2577646935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.372590468 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 86331404719 ps |
| CPU time | 181.19 seconds |
| Started | Oct 12 04:44:45 PM UTC 24 |
| Finished | Oct 12 04:47:50 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=372590468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_hiclk_max.372590468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3683938775 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 112100603010 ps |
| CPU time | 217.26 seconds |
| Started | Oct 12 04:44:48 PM UTC 24 |
| Finished | Oct 12 04:48:29 PM UTC 24 |
| Peak memory | 219516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683938775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3683938775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.273899040 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 110260738624 ps |
| CPU time | 212.72 seconds |
| Started | Oct 12 04:44:48 PM UTC 24 |
| Finished | Oct 12 04:48:24 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=273899040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_loclk_max.273899040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.902894808 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 116189869634 ps |
| CPU time | 232.09 seconds |
| Started | Oct 12 04:44:48 PM UTC 24 |
| Finished | Oct 12 04:48:44 PM UTC 24 |
| Peak memory | 219584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902894808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_phase.902894808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.2822420961 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 212574697 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:44:50 PM UTC 24 |
| Finished | Oct 12 04:44:53 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822420961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.2822420961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.3113630940 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 143140347 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:44:50 PM UTC 24 |
| Finished | Oct 12 04:44:53 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113630940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.3113630940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.1075169513 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 281854697 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 04:44:55 PM UTC 24 |
| Finished | Oct 12 04:44:58 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075169513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.1075169513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1050739143 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 2544092132 ps |
| CPU time | 21.74 seconds |
| Started | Oct 12 04:44:48 PM UTC 24 |
| Finished | Oct 12 04:45:11 PM UTC 24 |
| Peak memory | 236104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050739143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1050739143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.2526794515 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 6047562368 ps |
| CPU time | 49.6 seconds |
| Started | Oct 12 04:44:55 PM UTC 24 |
| Finished | Oct 12 04:45:46 PM UTC 24 |
| Peak memory | 218972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526794515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.2526794515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.2973359317 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 265279424 ps |
| CPU time | 1.73 seconds |
| Started | Oct 12 04:44:55 PM UTC 24 |
| Finished | Oct 12 04:44:58 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973359317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.2973359317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1187285253 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 10033548820 ps |
| CPU time | 30.3 seconds |
| Started | Oct 12 04:44:59 PM UTC 24 |
| Finished | Oct 12 04:45:31 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187285253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.1187285253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.4152369085 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 4401504584 ps |
| CPU time | 7.05 seconds |
| Started | Oct 12 04:44:59 PM UTC 24 |
| Finished | Oct 12 04:45:08 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152369085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.4152369085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.3988487127 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 3255780653 ps |
| CPU time | 26.31 seconds |
| Started | Oct 12 04:45:02 PM UTC 24 |
| Finished | Oct 12 04:45:30 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988487127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.3988487127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.1255179015 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 3380732699 ps |
| CPU time | 29.75 seconds |
| Started | Oct 12 04:45:02 PM UTC 24 |
| Finished | Oct 12 04:45:33 PM UTC 24 |
| Peak memory | 231596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255179015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.1255179015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.3783781434 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 275281644 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:45:04 PM UTC 24 |
| Finished | Oct 12 04:45:07 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783781434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3783781434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.2533695949 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 205798087 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:45:04 PM UTC 24 |
| Finished | Oct 12 04:45:07 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533695949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.2533695949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.3909936132 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 3052500471 ps |
| CPU time | 42.49 seconds |
| Started | Oct 12 04:45:09 PM UTC 24 |
| Finished | Oct 12 04:45:53 PM UTC 24 |
| Peak memory | 235908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909936132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.3909936132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.2880210037 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 2576552428 ps |
| CPU time | 30.02 seconds |
| Started | Oct 12 04:45:09 PM UTC 24 |
| Finished | Oct 12 04:45:40 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880210037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2880210037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.445183570 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 2881972037 ps |
| CPU time | 84.66 seconds |
| Started | Oct 12 04:45:09 PM UTC 24 |
| Finished | Oct 12 04:46:36 PM UTC 24 |
| Peak memory | 229360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445183570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.445183570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.3156997721 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 169302166 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:45:09 PM UTC 24 |
| Finished | Oct 12 04:45:11 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156997721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.3156997721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.3446592619 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 163991193 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:45:12 PM UTC 24 |
| Finished | Oct 12 04:45:15 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446592619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.3446592619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.2132781581 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 226865495 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:45:12 PM UTC 24 |
| Finished | Oct 12 04:45:15 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132781581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.2132781581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.1164256712 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 144919054 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:45:15 PM UTC 24 |
| Finished | Oct 12 04:45:18 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164256712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.1164256712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.1707993120 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 162251379 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:45:15 PM UTC 24 |
| Finished | Oct 12 04:45:17 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707993120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.1707993120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.615227900 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 168156871 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:45:18 PM UTC 24 |
| Finished | Oct 12 04:45:21 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615227900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_out_trans_nak.615227900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3733598040 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 177139394 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:45:18 PM UTC 24 |
| Finished | Oct 12 04:45:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733598040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.3733598040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.3861588848 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 243663099 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 04:45:18 PM UTC 24 |
| Finished | Oct 12 04:45:21 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861588848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.3861588848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.3694925965 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 240711227 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:45:18 PM UTC 24 |
| Finished | Oct 12 04:45:21 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694925965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3694925965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.4082691748 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 194123106 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:45:21 PM UTC 24 |
| Finished | Oct 12 04:45:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082691748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.4082691748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.395974023 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 69149712 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:45:21 PM UTC 24 |
| Finished | Oct 12 04:45:23 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395974023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_phy_pins_sense.395974023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.2536962401 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 7806305023 ps |
| CPU time | 26.3 seconds |
| Started | Oct 12 04:45:24 PM UTC 24 |
| Finished | Oct 12 04:45:51 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536962401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.2536962401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.1708724935 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 177684607 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:45:24 PM UTC 24 |
| Finished | Oct 12 04:45:26 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708724935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.1708724935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.3577084489 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 208896725 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:45:24 PM UTC 24 |
| Finished | Oct 12 04:45:26 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577084489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.3577084489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.3760769556 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 7689124432 ps |
| CPU time | 189.7 seconds |
| Started | Oct 12 04:45:26 PM UTC 24 |
| Finished | Oct 12 04:48:39 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760769556 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.3760769556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.4240064519 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 3239610242 ps |
| CPU time | 30.99 seconds |
| Started | Oct 12 04:45:29 PM UTC 24 |
| Finished | Oct 12 04:46:01 PM UTC 24 |
| Peak memory | 231420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240064519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.4240064519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.3292912580 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 5785027249 ps |
| CPU time | 26.84 seconds |
| Started | Oct 12 04:45:29 PM UTC 24 |
| Finished | Oct 12 04:45:57 PM UTC 24 |
| Peak memory | 236024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292912580 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.3292912580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.2555713848 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 240855663 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 04:45:24 PM UTC 24 |
| Finished | Oct 12 04:45:27 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555713848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.2555713848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.1932661161 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 189247721 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:45:24 PM UTC 24 |
| Finished | Oct 12 04:45:26 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932661161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.1932661161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.797181047 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 20163344864 ps |
| CPU time | 52.32 seconds |
| Started | Oct 12 04:45:29 PM UTC 24 |
| Finished | Oct 12 04:46:23 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797181047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.797181047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.302157658 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 179891256 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 04:45:29 PM UTC 24 |
| Finished | Oct 12 04:45:32 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302157658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_rx_crc_err.302157658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2464538407 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 358058588 ps |
| CPU time | 2.28 seconds |
| Started | Oct 12 04:45:32 PM UTC 24 |
| Finished | Oct 12 04:45:35 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464538407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2464538407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.4257694695 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 173550662 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:45:32 PM UTC 24 |
| Finished | Oct 12 04:45:35 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257694695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.4257694695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.2863770081 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 252901380 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 04:45:44 PM UTC 24 |
| Finished | Oct 12 04:45:47 PM UTC 24 |
| Peak memory | 251924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863770081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.2863770081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.2587559019 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 404199641 ps |
| CPU time | 2.64 seconds |
| Started | Oct 12 04:45:32 PM UTC 24 |
| Finished | Oct 12 04:45:36 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587559019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2587559019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.529740977 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 183584555 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:45:34 PM UTC 24 |
| Finished | Oct 12 04:45:37 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529740977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.529740977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.4075183731 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 148372084 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:45:35 PM UTC 24 |
| Finished | Oct 12 04:45:37 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075183731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.4075183731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.1955631100 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 150189009 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:45:38 PM UTC 24 |
| Finished | Oct 12 04:45:41 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955631100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.1955631100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.569450583 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 197914686 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:45:38 PM UTC 24 |
| Finished | Oct 12 04:45:41 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569450583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.569450583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.1004260960 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 2318537577 ps |
| CPU time | 23.56 seconds |
| Started | Oct 12 04:45:38 PM UTC 24 |
| Finished | Oct 12 04:46:03 PM UTC 24 |
| Peak memory | 231456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004260960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.1004260960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.2240932893 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 172642355 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:45:38 PM UTC 24 |
| Finished | Oct 12 04:45:41 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240932893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.2240932893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.74808455 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 216441422 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:45:38 PM UTC 24 |
| Finished | Oct 12 04:45:41 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74808455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_stall_trans.74808455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.711967558 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 323138739 ps |
| CPU time | 2.11 seconds |
| Started | Oct 12 04:45:41 PM UTC 24 |
| Finished | Oct 12 04:45:44 PM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711967558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_stream_len_max.711967558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.875062175 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 2883048743 ps |
| CPU time | 28.85 seconds |
| Started | Oct 12 04:45:41 PM UTC 24 |
| Finished | Oct 12 04:46:11 PM UTC 24 |
| Peak memory | 229348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875062175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_streaming_out.875062175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.590435189 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 8110930381 ps |
| CPU time | 128.51 seconds |
| Started | Oct 12 04:45:44 PM UTC 24 |
| Finished | Oct 12 04:47:55 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590435189 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.590435189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.2493322105 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 616599835 ps |
| CPU time | 6.48 seconds |
| Started | Oct 12 04:44:37 PM UTC 24 |
| Finished | Oct 12 04:44:44 PM UTC 24 |
| Peak memory | 219320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493322105 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.2493322105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.4041556915 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 411864127 ps |
| CPU time | 2.52 seconds |
| Started | Oct 12 04:45:44 PM UTC 24 |
| Finished | Oct 12 04:45:48 PM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4041556915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.4041556915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.1326499949 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 79759353 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326499949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.1326499949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.2094458366 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 4219410599 ps |
| CPU time | 6.51 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:24 PM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094458366 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.2094458366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.4186955458 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 14767715219 ps |
| CPU time | 18.38 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:36 PM UTC 24 |
| Peak memory | 229048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186955458 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.4186955458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.971457020 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 25152507852 ps |
| CPU time | 31.14 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:49 PM UTC 24 |
| Peak memory | 229288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=971457020 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.971457020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2735455945 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 189168185 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735455945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.2735455945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.289137572 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 162234658 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:12:16 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=289137572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_bitstuff_err.289137572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1871771873 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 421265659 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:12:17 PM UTC 24 |
| Finished | Oct 12 05:12:19 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871771873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.1871771873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.3627542324 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 1007592526 ps |
| CPU time | 2.73 seconds |
| Started | Oct 12 05:12:17 PM UTC 24 |
| Finished | Oct 12 05:12:20 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627542324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.3627542324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.2066097597 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 26832155562 ps |
| CPU time | 40.23 seconds |
| Started | Oct 12 05:12:17 PM UTC 24 |
| Finished | Oct 12 05:12:58 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066097597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.2066097597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1725629443 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 441069812 ps |
| CPU time | 7.1 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:47 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725629443 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1725629443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1949207329 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 837836727 ps |
| CPU time | 2.21 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:43 PM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949207329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.1949207329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1924740966 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 141234929 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:41 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924740966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.1924740966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_enable.2318145296 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 62344367 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318145296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.2318145296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.2311901402 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 875189248 ps |
| CPU time | 2.4 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:43 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311901402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.2311901402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1055846739 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 189618469 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055846739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1055846739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1167984964 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 296001450 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167984964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1167984964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3183918990 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 262733703 ps |
| CPU time | 2.06 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:43 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183918990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3183918990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.4188321555 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 230975027 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188321555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.4188321555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.567540608 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 174102308 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567540608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_stall.567540608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2390236036 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 181020003 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390236036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.2390236036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.1974065355 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 4642220954 ps |
| CPU time | 112.21 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:14:34 PM UTC 24 |
| Peak memory | 236296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974065355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.1974065355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1637813780 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 14017777163 ps |
| CPU time | 91.97 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:14:14 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637813780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1637813780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.2130969132 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 164241504 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130969132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.2130969132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.665501486 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 26721924102 ps |
| CPU time | 48.12 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:13:29 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=665501486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_resume.665501486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.3846956787 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 3833073632 ps |
| CPU time | 6.78 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:48 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846956787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.3846956787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.161774196 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 3929714289 ps |
| CPU time | 25.08 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:13:06 PM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=161774196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.161774196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.3047510037 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 2400877803 ps |
| CPU time | 58.02 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:13:40 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047510037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.3047510037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.558747016 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 237349329 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:43 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=558747016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.558747016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.300162104 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 198281172 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300162104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.300162104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.3920018968 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 2804975199 ps |
| CPU time | 23.63 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:13:05 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920018968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.3920018968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1824839140 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 154257523 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824839140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.1824839140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.384196136 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 163429959 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:12:40 PM UTC 24 |
| Finished | Oct 12 05:12:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=384196136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.384196136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2887468309 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 167156135 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887468309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.2887468309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1670135318 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 162560131 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670135318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.1670135318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1116021638 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 173520620 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116021638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.1116021638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.421885476 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 158036915 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421885476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_out_trans_nak.421885476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1550343657 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 151742713 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550343657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.1550343657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.309751667 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 279185871 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309751667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.309751667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.311635402 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 188853519 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:13:07 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=311635402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.311635402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1777082253 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 69198809 ps |
| CPU time | 0.68 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:09 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777082253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.1777082253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.1666322022 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 18368968947 ps |
| CPU time | 43.6 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:53 PM UTC 24 |
| Peak memory | 233416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666322022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.1666322022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3005737903 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 162634505 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005737903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.3005737903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3031049393 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 239160001 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031049393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3031049393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.594701516 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 204321802 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594701516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_random_length_in_transaction.594701516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2283399769 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 162877333 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283399769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2283399769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.75096524 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 210175149 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=75096524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_rx_crc_err.75096524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.3086822081 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 298164888 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086822081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.3086822081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.3538469504 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 153148570 ps |
| CPU time | 1.18 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538469504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.3538469504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.212515298 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 204307338 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212515298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.212515298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.726291243 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 225914364 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=726291243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.726291243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.250251419 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 1842642276 ps |
| CPU time | 12.37 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:22 PM UTC 24 |
| Peak memory | 231392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=250251419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.250251419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.3593991697 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 242581709 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593991697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.3593991697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.189069884 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 171404441 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:10 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=189069884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_stall_trans.189069884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1436551941 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 894335022 ps |
| CPU time | 2.41 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:12 PM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436551941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1436551941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.3125892001 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 3465363122 ps |
| CPU time | 22.27 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:32 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125892001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.3125892001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.2221870250 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 4790644892 ps |
| CPU time | 37.07 seconds |
| Started | Oct 12 05:12:39 PM UTC 24 |
| Finished | Oct 12 05:13:18 PM UTC 24 |
| Peak memory | 219184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221870250 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.2221870250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.2179746922 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 616537467 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:11 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2179746922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.2179746922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.939298268 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 623650611 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=939298268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_t x_rx_disruption.939298268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.625776707 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 563512573 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:33:27 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=625776707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_t x_rx_disruption.625776707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.2200747859 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 423423343 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:33:28 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2200747859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.2200747859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.520249963 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 435583344 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:33:28 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=520249963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.520249963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.3475802782 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 512763271 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:33:28 PM UTC 24 |
| Finished | Oct 12 05:33:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3475802782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.3475802782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1334361356 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 450043834 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1334361356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1334361356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1660684321 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 452853699 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 214716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1660684321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1660684321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1750821084 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 446830395 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1750821084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1750821084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.1564587959 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 635030182 ps |
| CPU time | 1.86 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1564587959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.1564587959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.178463986 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 437091838 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 214664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=178463986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_t x_rx_disruption.178463986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.4267886652 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 67345496 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:14:01 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267886652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.4267886652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1586631397 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 12357600976 ps |
| CPU time | 15.72 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:25 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586631397 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.1586631397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.675959963 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 18528629589 ps |
| CPU time | 22.25 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:32 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675959963 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.675959963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.4049207122 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 29434443183 ps |
| CPU time | 36.72 seconds |
| Started | Oct 12 05:13:08 PM UTC 24 |
| Finished | Oct 12 05:13:46 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049207122 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.4049207122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.29382673 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 161876999 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:37 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29382673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_av_buffer.29382673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.402716738 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 153859495 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=402716738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_bitstuff_err.402716738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.4080460944 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 327915730 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080460944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.4080460944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.1334610674 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 695264346 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334610674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.1334610674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3146331725 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 35977493372 ps |
| CPU time | 60.51 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:14:37 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146331725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3146331725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.2031721971 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 1133582893 ps |
| CPU time | 21.09 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:58 PM UTC 24 |
| Peak memory | 219272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031721971 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.2031721971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.3531101021 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 508220581 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531101021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.3531101021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1794148482 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 137997932 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:37 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794148482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1794148482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_enable.169570981 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 30647274 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169570981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.169570981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.323510959 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 953851050 ps |
| CPU time | 2.61 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:39 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323510959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.323510959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.710622719 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 320937677 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=710622719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.710622719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.2164559730 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 176475200 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164559730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.2164559730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.1023226918 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 279708320 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023226918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.1023226918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.1044937378 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 314017392 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 227076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1044937378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.1044937378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.2868051088 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 155382197 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868051088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.2868051088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.193980774 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 197805453 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193980774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_trans.193980774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.3758736660 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 2851285804 ps |
| CPU time | 72.6 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:14:50 PM UTC 24 |
| Peak memory | 231468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758736660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3758736660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.2630602283 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 8428110276 ps |
| CPU time | 87.44 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:15:05 PM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630602283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.2630602283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.1962093352 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 168339747 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962093352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.1962093352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.2428862681 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 30350114319 ps |
| CPU time | 43.15 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:14:21 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428862681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.2428862681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.1586767291 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 6231047275 ps |
| CPU time | 8.2 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:45 PM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586767291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.1586767291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.2221402324 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 3199896449 ps |
| CPU time | 26.85 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:14:04 PM UTC 24 |
| Peak memory | 235752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221402324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.2221402324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.778615501 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 3962287809 ps |
| CPU time | 27.18 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:14:05 PM UTC 24 |
| Peak memory | 229560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778615501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.778615501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3873306807 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 239623067 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:39 PM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873306807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3873306807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.1130204906 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 184909726 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130204906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.1130204906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.3464232951 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 2538104004 ps |
| CPU time | 16.38 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:54 PM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464232951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3464232951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.778008776 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 153573379 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778008776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.778008776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3031556583 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 169834654 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:38 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031556583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3031556583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.2384925840 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 212188165 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:13:36 PM UTC 24 |
| Finished | Oct 12 05:13:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384925840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.2384925840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.1824817517 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 188579956 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824817517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.1824817517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.571919443 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 182616534 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571919443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_out_stall.571919443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.3608714908 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 182706006 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608714908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.3608714908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.2223812367 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 168064428 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223812367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.2223812367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.3392428 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 222233413 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pi nflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.3392428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.979785610 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 142832605 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=979785610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.979785610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.1536792722 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 44046506 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536792722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.1536792722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.1147442878 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 18058425986 ps |
| CPU time | 39.68 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:41 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147442878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.1147442878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.1355884177 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 181094075 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355884177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.1355884177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.4121481662 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 296523089 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121481662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.4121481662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.1882305608 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 295374838 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882305608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.1882305608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.742211258 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 199961999 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742211258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.742211258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.563985151 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 184200691 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563985151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_rx_crc_err.563985151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.2845407758 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 378556835 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845407758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.2845407758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.157500312 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 182900058 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157500312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_setup_stage.157500312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.4018122266 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 154012617 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018122266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.4018122266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.521396 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 221847894 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 41.usbdev_smoke.521396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.2492757934 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 2928296393 ps |
| CPU time | 71.04 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:15:13 PM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492757934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.2492757934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.898879162 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 188934356 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898879162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.898879162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.127566164 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 154343390 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=127566164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.127566164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.33981760 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 276049700 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:03 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33981760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_stream_len_max.33981760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.94350433 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 4329069974 ps |
| CPU time | 36.68 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:39 PM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94350433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_streaming_out.94350433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.535039537 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 1551934545 ps |
| CPU time | 9.34 seconds |
| Started | Oct 12 05:13:35 PM UTC 24 |
| Finished | Oct 12 05:13:46 PM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535039537 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.535039537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.1313237098 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 658495989 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 05:14:00 PM UTC 24 |
| Finished | Oct 12 05:14:03 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1313237098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.1313237098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.1400135528 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 467544776 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1400135528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.1400135528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.3219742582 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 600536343 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 215156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3219742582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.3219742582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.3358440598 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 559275427 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3358440598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.3358440598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.518243699 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 571117103 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=518243699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_t x_rx_disruption.518243699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.2515613248 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 496191793 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2515613248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.2515613248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.2506825972 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 664709975 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2506825972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.2506825972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.2401804920 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 414960831 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2401804920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.2401804920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.3715786654 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 523442575 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3715786654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.3715786654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.68031695 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 476440109 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=68031695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_tx _rx_disruption.68031695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.1891062478 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 562757317 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:48 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1891062478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.1891062478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1826684572 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 31345089 ps |
| CPU time | 0.59 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:23 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826684572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1826684572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.3235194906 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 12344263489 ps |
| CPU time | 16 seconds |
| Started | Oct 12 05:14:01 PM UTC 24 |
| Finished | Oct 12 05:14:18 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235194906 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.3235194906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3416310624 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 15104413843 ps |
| CPU time | 18.12 seconds |
| Started | Oct 12 05:14:28 PM UTC 24 |
| Finished | Oct 12 05:14:48 PM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416310624 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3416310624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.2951365929 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 25725593564 ps |
| CPU time | 34.64 seconds |
| Started | Oct 12 05:14:28 PM UTC 24 |
| Finished | Oct 12 05:15:04 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951365929 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.2951365929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.3916844838 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 152886892 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:14:28 PM UTC 24 |
| Finished | Oct 12 05:14:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916844838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.3916844838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.3592155986 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 222142174 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:14:28 PM UTC 24 |
| Finished | Oct 12 05:14:30 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592155986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.3592155986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.3291824076 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 251823627 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291824076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.3291824076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.2238257584 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 1267739035 ps |
| CPU time | 3.19 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:33 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238257584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.2238257584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.2780065710 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 28719648494 ps |
| CPU time | 41.35 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:15:11 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780065710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.2780065710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2864432573 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 1066383518 ps |
| CPU time | 19.1 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:49 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864432573 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2864432573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3977015922 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 765376920 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:32 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977015922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3977015922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.721136842 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 150286317 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721136842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_disconnected.721136842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_enable.1020811172 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 37588999 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020811172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.1020811172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.4229687215 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 671375282 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:32 PM UTC 24 |
| Peak memory | 219048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229687215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.4229687215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.2434939975 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 173664112 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434939975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.2434939975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.258710451 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 261023850 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258710451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_fifo_levels.258710451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.1743803639 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 431849820 ps |
| CPU time | 2.89 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:33 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743803639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.1743803639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.3487508763 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 202993980 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:32 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487508763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.3487508763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1191272644 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 151086324 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191272644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1191272644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.3583051449 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 181895271 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583051449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.3583051449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.19134640 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 4232197646 ps |
| CPU time | 103.6 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:16:15 PM UTC 24 |
| Peak memory | 237420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=19134640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.19134640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.3404116252 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 12796516312 ps |
| CPU time | 129.6 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:16:41 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404116252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.3404116252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3738518720 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 201125207 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738518720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3738518720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.3783052453 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 14689914807 ps |
| CPU time | 18.47 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:49 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783052453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.3783052453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.2683208212 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 3592562701 ps |
| CPU time | 5.34 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:36 PM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683208212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.2683208212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.236937335 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 3148599905 ps |
| CPU time | 21.44 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 231436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=236937335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.236937335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2023837122 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 2021187779 ps |
| CPU time | 47.2 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:15:18 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023837122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2023837122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.204547181 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 304317744 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:32 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204547181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.204547181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.424433213 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 185254848 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:31 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424433213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.424433213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.4089489826 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 2987946089 ps |
| CPU time | 75.66 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:15:47 PM UTC 24 |
| Peak memory | 229496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089489826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.4089489826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2167772732 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 155921730 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:14:32 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167772732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2167772732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.395661483 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 160533799 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395661483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.395661483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.2771224247 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 234610526 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771224247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.2771224247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.2926843703 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 185727406 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926843703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.2926843703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.1222402660 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 194719646 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222402660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.1222402660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.2274161777 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 230314199 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274161777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.2274161777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.2766644271 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 157494942 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766644271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.2766644271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.825933489 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 211034812 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:14:49 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=825933489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.825933489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.3976840395 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 141662244 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976840395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.3976840395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.3329957107 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 37675428 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329957107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.3329957107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.185958563 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 5797754878 ps |
| CPU time | 14.14 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:15:05 PM UTC 24 |
| Peak memory | 229368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=185958563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_pkt_buffer.185958563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.1348058214 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 159745236 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:51 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348058214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.1348058214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.1235285038 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 207435475 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235285038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.1235285038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.1209872650 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 271773868 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209872650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.1209872650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.1989898249 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 156754831 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989898249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.1989898249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.3560441266 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 182901452 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560441266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.3560441266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.1798261086 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 378003793 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798261086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.1798261086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.3407214590 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 144197024 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407214590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.3407214590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.3907015371 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 156247983 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907015371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.3907015371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2337304044 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 215628196 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337304044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2337304044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.2476837508 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 2747208349 ps |
| CPU time | 19.43 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:15:11 PM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476837508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.2476837508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.2531237060 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 219437722 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531237060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.2531237060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.3680126456 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 147750564 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:14:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680126456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.3680126456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.116468552 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 383483352 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116468552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_stream_len_max.116468552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.375422582 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 3223859280 ps |
| CPU time | 76.5 seconds |
| Started | Oct 12 05:14:50 PM UTC 24 |
| Finished | Oct 12 05:16:08 PM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375422582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_streaming_out.375422582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.210437455 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 5219374464 ps |
| CPU time | 38.78 seconds |
| Started | Oct 12 05:14:29 PM UTC 24 |
| Finished | Oct 12 05:15:09 PM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210437455 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.210437455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.3995526025 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 615935073 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3995526025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.3995526025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.85015716 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 495407870 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=85015716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_tx _rx_disruption.85015716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.148056210 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 538848082 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=148056210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_t x_rx_disruption.148056210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.3828387283 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 533739128 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3828387283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.3828387283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3647259569 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 596148005 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3647259569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3647259569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.1215265507 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 607172729 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1215265507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.1215265507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.958737506 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 567709229 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=958737506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_t x_rx_disruption.958737506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.1544939021 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 473701828 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1544939021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.1544939021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.2671002911 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 578945866 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2671002911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.2671002911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.3049082193 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 520983366 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3049082193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.3049082193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.2819733352 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 618270547 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2819733352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.2819733352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.4226003229 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 49451742 ps |
| CPU time | 0.62 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226003229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.4226003229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.3568286057 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 10460937833 ps |
| CPU time | 13.42 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:36 PM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568286057 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.3568286057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.681046542 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 13437110012 ps |
| CPU time | 14.03 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:37 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=681046542 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.681046542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.352460920 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 31294551959 ps |
| CPU time | 34.26 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:57 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352460920 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.352460920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.4254611695 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 180258872 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254611695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.4254611695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.1188538532 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 141067748 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:15:21 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188538532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.1188538532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.2219935827 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 191195332 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219935827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.2219935827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3083486939 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 781090017 ps |
| CPU time | 1.98 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083486939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3083486939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.813278926 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 44519593672 ps |
| CPU time | 75.56 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:16:39 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813278926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_device_address.813278926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.3295541588 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 598735346 ps |
| CPU time | 9.71 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:33 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295541588 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.3295541588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.2704268440 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 793456781 ps |
| CPU time | 1.91 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704268440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.2704268440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2840764966 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 141746052 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840764966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2840764966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_enable.3738332010 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 43443879 ps |
| CPU time | 0.67 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738332010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.3738332010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.1683085243 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 1041120978 ps |
| CPU time | 2.61 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:26 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683085243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.1683085243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2351885321 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 161581686 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351885321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2351885321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.3357361852 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 263245933 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357361852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.3357361852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.4148407129 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 395846235 ps |
| CPU time | 2.67 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:26 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148407129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.4148407129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.708577828 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 183736942 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=708577828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.708577828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.481253257 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 191872532 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481253257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_stall.481253257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.4206585030 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 201153473 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206585030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.4206585030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.320088954 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 2588283400 ps |
| CPU time | 60.91 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:16:25 PM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320088954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.320088954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.4118432214 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 12707554262 ps |
| CPU time | 71.57 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:16:35 PM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118432214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.4118432214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1280389634 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 178373613 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280389634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1280389634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.227578206 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 33390575479 ps |
| CPU time | 43.42 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:16:07 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227578206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_resume.227578206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.842459399 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 5520589002 ps |
| CPU time | 7.93 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:31 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=842459399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_suspend.842459399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1620475351 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 5198877916 ps |
| CPU time | 32.11 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:56 PM UTC 24 |
| Peak memory | 236084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620475351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1620475351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.1647901308 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 4053143394 ps |
| CPU time | 26.25 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:50 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647901308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.1647901308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1225661397 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 241436189 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225661397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1225661397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.2793996462 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 193962287 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793996462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2793996462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.4204908276 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 3084181964 ps |
| CPU time | 19.72 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:43 PM UTC 24 |
| Peak memory | 229496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204908276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.4204908276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.22919450 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 156278813 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22919450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.22919450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.1217338846 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 160076817 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217338846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.1217338846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.2448469888 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 206607916 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448469888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.2448469888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.4006675394 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 193676368 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006675394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.4006675394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.3265946744 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 191675207 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265946744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.3265946744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.3099979835 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 181148958 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:25 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099979835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.3099979835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.1530978928 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 155032287 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530978928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.1530978928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.684547550 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 228698841 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=684547550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.684547550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3731817384 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 144978647 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731817384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3731817384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.1255246262 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 100933230 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255246262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1255246262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.2543059004 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 9527637519 ps |
| CPU time | 22.47 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:23 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543059004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.2543059004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.1241446344 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 173623340 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:15:59 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241446344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.1241446344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.1466680357 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 203761853 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466680357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.1466680357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.459996619 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 235000626 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459996619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_random_length_in_transaction.459996619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.2068114409 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 190334345 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068114409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.2068114409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.4000543269 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 199132452 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000543269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.4000543269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.298068441 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 251556535 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=298068441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.298068441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.2668512266 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 208564242 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668512266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.2668512266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.3203337001 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 160896841 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203337001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3203337001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.2709151567 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 227219689 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709151567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2709151567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.321564417 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 2262258551 ps |
| CPU time | 19.04 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:20 PM UTC 24 |
| Peak memory | 231556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=321564417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.321564417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.3963646121 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 190062676 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963646121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.3963646121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.2795120604 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 183290651 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795120604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.2795120604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.2964106201 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 1060605127 ps |
| CPU time | 2.52 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:04 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964106201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2964106201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.1771927639 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 3378601800 ps |
| CPU time | 22.51 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:24 PM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771927639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.1771927639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.1607959524 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 440647095 ps |
| CPU time | 6.97 seconds |
| Started | Oct 12 05:15:22 PM UTC 24 |
| Finished | Oct 12 05:15:30 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607959524 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.1607959524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.315062309 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 578252305 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=315062309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx _rx_disruption.315062309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.2902883386 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 595160275 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2902883386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.2902883386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.262685035 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 484846866 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=262685035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_t x_rx_disruption.262685035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.2805211041 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 636430749 ps |
| CPU time | 2 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2805211041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.2805211041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2470784540 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 592126137 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2470784540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2470784540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.414688369 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 572655781 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=414688369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_t x_rx_disruption.414688369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.3905857730 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 618110387 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3905857730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.3905857730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.3541564935 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 553697720 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3541564935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.3541564935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.2626510517 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 625625819 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2626510517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.2626510517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.3813613647 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 637555561 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3813613647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.3813613647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.3764443914 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 486654025 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3764443914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.3764443914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1671761648 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 36837690 ps |
| CPU time | 0.61 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671761648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1671761648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.3679457064 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 11558208978 ps |
| CPU time | 14.39 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:16 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679457064 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.3679457064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.636498121 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 19638565819 ps |
| CPU time | 23.5 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:25 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636498121 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.636498121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.1081175675 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 25433601538 ps |
| CPU time | 37.37 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:39 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081175675 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.1081175675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1915812118 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 189185575 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915812118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1915812118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.4055096976 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 166276332 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055096976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.4055096976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.2952536806 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 562018387 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952536806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.2952536806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.3260872857 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 675592463 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260872857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.3260872857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.972813117 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 28159964575 ps |
| CPU time | 41 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:43 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972813117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_device_address.972813117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.927849100 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 591137867 ps |
| CPU time | 4.32 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:06 PM UTC 24 |
| Peak memory | 219252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=927849100 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.927849100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2571779859 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 665842928 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571779859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2571779859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.1733695427 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 144507574 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733695427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.1733695427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_enable.1848084330 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 102152285 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848084330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.1848084330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.1655922478 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 840496069 ps |
| CPU time | 2.25 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:04 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655922478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.1655922478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.1507848151 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 338349910 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507848151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.1507848151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3833054918 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 206927940 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833054918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3833054918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.3728192369 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 299511865 ps |
| CPU time | 2.33 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:04 PM UTC 24 |
| Peak memory | 218780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728192369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.3728192369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.1461690204 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 186277793 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461690204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.1461690204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.198624762 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 147146681 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198624762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_stall.198624762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.2396311245 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 157996461 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396311245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.2396311245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.2133268339 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 4731367725 ps |
| CPU time | 39.57 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:42 PM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133268339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.2133268339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.627106862 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 4724766624 ps |
| CPU time | 25.94 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:28 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627106862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.627106862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.4189481868 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 231008934 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:16:01 PM UTC 24 |
| Finished | Oct 12 05:16:03 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189481868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.4189481868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.1254183710 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 11678768519 ps |
| CPU time | 16.67 seconds |
| Started | Oct 12 05:16:52 PM UTC 24 |
| Finished | Oct 12 05:17:10 PM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254183710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.1254183710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.2728374247 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 4003084875 ps |
| CPU time | 5.72 seconds |
| Started | Oct 12 05:16:52 PM UTC 24 |
| Finished | Oct 12 05:16:59 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728374247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.2728374247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.2391605384 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 3304702416 ps |
| CPU time | 22.13 seconds |
| Started | Oct 12 05:16:52 PM UTC 24 |
| Finished | Oct 12 05:17:16 PM UTC 24 |
| Peak memory | 235808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391605384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.2391605384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.3258491025 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 1795814141 ps |
| CPU time | 39.76 seconds |
| Started | Oct 12 05:16:52 PM UTC 24 |
| Finished | Oct 12 05:17:34 PM UTC 24 |
| Peak memory | 229356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258491025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.3258491025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.2521523145 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 236686463 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:16:52 PM UTC 24 |
| Finished | Oct 12 05:16:54 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521523145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.2521523145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.1965836988 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 270285187 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1965836988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.1965836988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.4032772505 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 2987937769 ps |
| CPU time | 70.93 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:18:06 PM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032772505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.4032772505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.813910904 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 156044479 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=813910904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.813910904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.857039694 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 163528906 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857039694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.857039694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.3596258560 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 236757049 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596258560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.3596258560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.1162001133 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 187162616 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162001133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.1162001133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.1617842425 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 171537723 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617842425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.1617842425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.1037591579 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 164557797 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037591579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.1037591579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.300295075 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 166682905 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300295075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pending_in_trans.300295075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.81951149 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 249658401 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81951149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.81951149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.416194198 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 151247128 ps |
| CPU time | 0.74 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416194198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.416194198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.743695456 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 38600374 ps |
| CPU time | 0.63 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743695456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.743695456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.246525838 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 17591435588 ps |
| CPU time | 42.82 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:17:38 PM UTC 24 |
| Peak memory | 236148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246525838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_pkt_buffer.246525838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.3104285322 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 183192655 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104285322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.3104285322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.1084292604 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 257078458 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084292604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.1084292604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.3540553299 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 208219089 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540553299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.3540553299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1953999707 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 167306289 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953999707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1953999707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.4031702428 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 156542395 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031702428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.4031702428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.3029420358 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 311487226 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029420358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.3029420358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2741675248 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 207794025 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741675248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2741675248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.172765068 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 150104308 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:56 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172765068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 44.usbdev_setup_trans_ignored.172765068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.3818068065 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 209428590 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818068065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.3818068065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.2995379910 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 3828158724 ps |
| CPU time | 32.05 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:17:28 PM UTC 24 |
| Peak memory | 231468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995379910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.2995379910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.1334001536 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 163556269 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334001536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.1334001536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.1544987838 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 173134538 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544987838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.1544987838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.3130449278 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 195813989 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130449278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.3130449278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3879538186 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 3459573469 ps |
| CPU time | 23.34 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:17:20 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879538186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3879538186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.2895169593 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 194303666 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:16:00 PM UTC 24 |
| Finished | Oct 12 05:16:02 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895169593 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.2895169593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.2589151933 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 471940983 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2589151933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.2589151933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.3853805225 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 578243961 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3853805225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.3853805225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.1441392747 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 543752608 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1441392747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.1441392747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.595332948 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 502129074 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=595332948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_t x_rx_disruption.595332948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.1343814086 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 636508195 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1343814086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.1343814086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.655844539 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 476879744 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=655844539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_t x_rx_disruption.655844539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.1039168142 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 495046303 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:34:46 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1039168142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.1039168142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.1560671611 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 500026932 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1560671611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.1560671611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.174339462 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 472012463 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=174339462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_t x_rx_disruption.174339462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.3488649377 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 459018322 ps |
| CPU time | 1.24 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3488649377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.3488649377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.3618872074 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 500848187 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3618872074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.3618872074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3778655513 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 36813553 ps |
| CPU time | 0.61 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778655513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3778655513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.912485694 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 5889425722 ps |
| CPU time | 8.09 seconds |
| Started | Oct 12 05:16:54 PM UTC 24 |
| Finished | Oct 12 05:17:04 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=912485694 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.912485694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.765181032 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 18876904094 ps |
| CPU time | 23.95 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:17:20 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765181032 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.765181032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.2960504479 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 25096156055 ps |
| CPU time | 28.26 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:17:25 PM UTC 24 |
| Peak memory | 229092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960504479 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.2960504479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.1460931618 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 180839118 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460931618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.1460931618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.2645824840 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 154230922 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645824840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.2645824840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.1331227829 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 297260990 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331227829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.1331227829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.3308741070 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 998794439 ps |
| CPU time | 2.56 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:59 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308741070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.3308741070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.98481003 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 15783583308 ps |
| CPU time | 23.02 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:17:20 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=98481003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_device_address.98481003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.1579074764 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 473104537 ps |
| CPU time | 6.85 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:17:03 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579074764 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.1579074764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.1731905378 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 1066925825 ps |
| CPU time | 2.25 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:59 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731905378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.1731905378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.479394496 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 141236105 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=479394496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_disconnected.479394496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_enable.3069122737 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 36990535 ps |
| CPU time | 0.63 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:57 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069122737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.3069122737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.349508297 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 895003845 ps |
| CPU time | 2.31 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:59 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349508297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.349508297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.3527477678 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 253954668 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:58 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527477678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.3527477678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.4223505654 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 270554766 ps |
| CPU time | 1.91 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:16:59 PM UTC 24 |
| Peak memory | 216524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223505654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.4223505654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.3605528978 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 212081761 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605528978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3605528978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.1450126191 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 157183073 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450126191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.1450126191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.4234179735 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 182501794 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234179735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.4234179735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.142370136 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 4481760996 ps |
| CPU time | 107.16 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:18:45 PM UTC 24 |
| Peak memory | 231480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142370136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.142370136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3632748419 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 12391325600 ps |
| CPU time | 131.78 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:20:04 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632748419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.3632748419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.2784098307 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 212363561 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784098307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.2784098307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.1263605691 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 25977714519 ps |
| CPU time | 42.62 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:18:34 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263605691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.1263605691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.849433935 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 3761745741 ps |
| CPU time | 5.53 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:57 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849433935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_suspend.849433935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.4247923052 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 3563625649 ps |
| CPU time | 23.04 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:18:15 PM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247923052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.4247923052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2092937460 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 2855631845 ps |
| CPU time | 18.75 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:18:10 PM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092937460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2092937460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.1744434838 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 243907722 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744434838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.1744434838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.2420648229 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 186704407 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420648229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.2420648229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.138850211 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 4044252221 ps |
| CPU time | 25.9 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:18:18 PM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=138850211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.138850211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.3239082538 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 230621116 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 217804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239082538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.3239082538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.2996953678 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 148059698 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996953678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.2996953678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.2380526801 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 238063903 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380526801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.2380526801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.389137784 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 147265273 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=389137784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_out_iso.389137784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.3246591782 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 209804786 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246591782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.3246591782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.4133658316 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 156293346 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133658316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.4133658316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.2870369816 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 145667082 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:17:50 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870369816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.2870369816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.2470792413 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 186642316 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470792413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.2470792413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.1518189242 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 138823201 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518189242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.1518189242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.2895788279 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 53072608 ps |
| CPU time | 0.65 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:52 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895788279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.2895788279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.3842162632 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 8198769619 ps |
| CPU time | 20.1 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:12 PM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842162632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.3842162632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.1206341259 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 144587868 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206341259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.1206341259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1356268167 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 199730146 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356268167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.1356268167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.132385559 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 259994780 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132385559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_random_length_in_transaction.132385559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.965992187 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 145897160 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965992187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.965992187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.3682103115 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 165735846 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682103115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.3682103115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.2598145395 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 251611146 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598145395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.2598145395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.177995832 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 146311851 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177995832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_setup_stage.177995832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2414978973 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 215112588 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414978973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2414978973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.2113602399 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 220697517 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113602399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.2113602399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3213754667 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 2916241249 ps |
| CPU time | 25.08 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:17 PM UTC 24 |
| Peak memory | 235824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213754667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3213754667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.1051239928 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 185324846 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051239928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.1051239928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.377031066 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 176036678 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377031066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_stall_trans.377031066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.2041428286 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 508742732 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041428286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.2041428286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.3713037273 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 2651837015 ps |
| CPU time | 22.61 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:15 PM UTC 24 |
| Peak memory | 229200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713037273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.3713037273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.4243885431 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 4346445446 ps |
| CPU time | 25.03 seconds |
| Started | Oct 12 05:16:55 PM UTC 24 |
| Finished | Oct 12 05:17:21 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243885431 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.4243885431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.2049402916 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 445752321 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049402916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.2049402916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.21770916 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 483433435 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=21770916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_tx _rx_disruption.21770916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.1220510439 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 459756901 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1220510439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.1220510439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.869418269 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 570436353 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=869418269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_t x_rx_disruption.869418269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.2628933442 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 626041961 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2628933442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.2628933442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3689761850 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 599036860 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3689761850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3689761850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.2942466527 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 562235094 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2942466527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.2942466527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.3178054436 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 583592562 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3178054436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.3178054436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.2995048513 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 521269151 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2995048513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.2995048513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.599202154 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 545106901 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599202154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_t x_rx_disruption.599202154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.3445492894 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 487934819 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3445492894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.3445492894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.4209694465 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 44568873 ps |
| CPU time | 0.63 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209694465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.4209694465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.2061298786 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 4159853764 ps |
| CPU time | 5.71 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:58 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061298786 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.2061298786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.3194566320 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 19913799205 ps |
| CPU time | 26.01 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:18 PM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194566320 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.3194566320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.4159145784 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 30436830654 ps |
| CPU time | 43.02 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:36 PM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159145784 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.4159145784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1439742128 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 161082745 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439742128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1439742128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.909077530 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 151635358 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909077530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_bitstuff_err.909077530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.4178539419 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 498391977 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178539419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.4178539419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.4281611465 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 303447852 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281611465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.4281611465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.3704420953 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 45383063501 ps |
| CPU time | 82.63 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:19:16 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704420953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.3704420953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.4085225785 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 7699903410 ps |
| CPU time | 42.44 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:35 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085225785 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.4085225785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3912586927 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 573827770 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912586927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3912586927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.2890006812 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 149838650 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890006812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.2890006812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_enable.3689271443 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 35605939 ps |
| CPU time | 0.64 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:53 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689271443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.3689271443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.812260537 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 797175929 ps |
| CPU time | 2.07 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:17:55 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=812260537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.812260537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.1454218031 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 254363310 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:17:52 PM UTC 24 |
| Finished | Oct 12 05:17:54 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454218031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.1454218031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.1022206900 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 207426000 ps |
| CPU time | 2.45 seconds |
| Started | Oct 12 05:17:52 PM UTC 24 |
| Finished | Oct 12 05:17:55 PM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022206900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.1022206900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.643953670 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 274752395 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:18:44 PM UTC 24 |
| Finished | Oct 12 05:18:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643953670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.643953670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.898780287 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 148468817 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:18:44 PM UTC 24 |
| Finished | Oct 12 05:18:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898780287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.898780287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.4218757376 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 218869801 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:18:44 PM UTC 24 |
| Finished | Oct 12 05:18:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218757376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.4218757376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.4122467786 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 3228713523 ps |
| CPU time | 76.96 seconds |
| Started | Oct 12 05:18:44 PM UTC 24 |
| Finished | Oct 12 05:20:03 PM UTC 24 |
| Peak memory | 231388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122467786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.4122467786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.234997998 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 3910558615 ps |
| CPU time | 26.17 seconds |
| Started | Oct 12 05:18:44 PM UTC 24 |
| Finished | Oct 12 05:19:12 PM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234997998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.234997998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.1350546809 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 174872118 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:18:45 PM UTC 24 |
| Finished | Oct 12 05:18:47 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350546809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.1350546809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.1262789732 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 25967314801 ps |
| CPU time | 39.39 seconds |
| Started | Oct 12 05:18:45 PM UTC 24 |
| Finished | Oct 12 05:19:26 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262789732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.1262789732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2575602471 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 10678754557 ps |
| CPU time | 13.23 seconds |
| Started | Oct 12 05:18:45 PM UTC 24 |
| Finished | Oct 12 05:19:00 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575602471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2575602471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.354570434 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 4697087320 ps |
| CPU time | 114.11 seconds |
| Started | Oct 12 05:18:45 PM UTC 24 |
| Finished | Oct 12 05:20:42 PM UTC 24 |
| Peak memory | 231288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=354570434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.354570434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1403246787 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 3512247257 ps |
| CPU time | 82.86 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:20:10 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403246787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1403246787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.59037312 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 292136903 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=59037312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.59037312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.3773610490 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 205931287 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773610490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.3773610490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.3679832338 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 2099971808 ps |
| CPU time | 18.08 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:19:05 PM UTC 24 |
| Peak memory | 236008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679832338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.3679832338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3790070219 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 194515852 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790070219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3790070219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2117916269 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 144285580 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117916269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.2117916269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.2307810525 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 216387820 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307810525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.2307810525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.2081105882 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 182481590 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081105882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.2081105882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.2190218906 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 209206274 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190218906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.2190218906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.366169360 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 193722339 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366169360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_out_trans_nak.366169360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.831976311 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 160586135 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831976311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.831976311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2808765366 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 246898660 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808765366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2808765366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2974474246 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 141968947 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974474246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.2974474246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.1921661360 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 46263789 ps |
| CPU time | 0.62 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921661360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.1921661360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.388581089 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 16812218648 ps |
| CPU time | 40.02 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:19:27 PM UTC 24 |
| Peak memory | 229412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=388581089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_pkt_buffer.388581089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2351985903 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 181785158 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351985903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2351985903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.1701128639 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 170042385 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701128639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.1701128639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1882195844 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 198719278 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882195844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.1882195844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.656137568 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 166246222 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656137568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.656137568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.625068109 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 184096062 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=625068109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_rx_crc_err.625068109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.883974550 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 256287079 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883974550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_rx_full.883974550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1839940247 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 170159405 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839940247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1839940247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.4263914682 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 152768177 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263914682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.4263914682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.938930547 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 252059346 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=938930547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.938930547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.3213257004 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 1816117838 ps |
| CPU time | 15.52 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:19:03 PM UTC 24 |
| Peak memory | 235824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213257004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.3213257004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.1284324147 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 208103869 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284324147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.1284324147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3228470310 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 156832093 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:48 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228470310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.3228470310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.306910307 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 1052880593 ps |
| CPU time | 2.55 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:50 PM UTC 24 |
| Peak memory | 219260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306910307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_stream_len_max.306910307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.120356036 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 2846912478 ps |
| CPU time | 68.5 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:19:57 PM UTC 24 |
| Peak memory | 229356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=120356036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_streaming_out.120356036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.2417791675 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 709237508 ps |
| CPU time | 12.99 seconds |
| Started | Oct 12 05:17:51 PM UTC 24 |
| Finished | Oct 12 05:18:06 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417791675 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.2417791675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.2242063289 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 537572241 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:18:46 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2242063289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.2242063289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3742385889 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 628426680 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3742385889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3742385889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.2108029818 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 496643564 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2108029818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.2108029818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.1215595792 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 641241542 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1215595792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.1215595792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.2128583116 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 584474126 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2128583116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.2128583116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.4017488964 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 464010851 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:34:47 PM UTC 24 |
| Finished | Oct 12 05:34:50 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4017488964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.4017488964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.190205722 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 445966859 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 05:34:53 PM UTC 24 |
| Finished | Oct 12 05:34:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=190205722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_t x_rx_disruption.190205722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.1746238662 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 622948369 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:34:53 PM UTC 24 |
| Finished | Oct 12 05:34:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1746238662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.1746238662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.3238304422 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 602403011 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:34:53 PM UTC 24 |
| Finished | Oct 12 05:34:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3238304422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.3238304422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3884280580 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 494240842 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 05:34:53 PM UTC 24 |
| Finished | Oct 12 05:34:56 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3884280580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3884280580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.1896384087 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 634535924 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1896384087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.1896384087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.3636483814 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 36589633 ps |
| CPU time | 0.65 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636483814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.3636483814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.719617656 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 8762406496 ps |
| CPU time | 10.22 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:58 PM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719617656 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.719617656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.3387615934 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 14844257933 ps |
| CPU time | 17.89 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:19:06 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387615934 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.3387615934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.562158808 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 31128836972 ps |
| CPU time | 47.17 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:19:35 PM UTC 24 |
| Peak memory | 218712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=562158808 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.562158808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.1342862300 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 162811197 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342862300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.1342862300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.2840274569 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 149753000 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840274569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.2840274569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.2714629038 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 354963405 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714629038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.2714629038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.246953984 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 818548379 ps |
| CPU time | 2.18 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:50 PM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246953984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.246953984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2696050924 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 17366051825 ps |
| CPU time | 28.29 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:19:17 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696050924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2696050924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.2636161295 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 2877137210 ps |
| CPU time | 15.66 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:19:04 PM UTC 24 |
| Peak memory | 219344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636161295 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2636161295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.3251769079 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 701147962 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:50 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251769079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.3251769079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.4156952338 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 165636972 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156952338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.4156952338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_enable.7071567 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 40170061 ps |
| CPU time | 0.66 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:18:49 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=7071567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 47.usbdev_enable.7071567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.1140152335 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 962051613 ps |
| CPU time | 2.76 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140152335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.1140152335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.337729712 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 262724721 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:40 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337729712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_fifo_levels.337729712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.69580507 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 239032813 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=69580507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_fifo_rst.69580507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.993974702 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 188372279 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:40 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=993974702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.993974702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.3037513024 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 139848111 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:40 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037513024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.3037513024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.2643470772 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 182626802 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:40 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643470772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.2643470772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3486544538 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 3753054604 ps |
| CPU time | 24.34 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:20:04 PM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486544538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3486544538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.2489517900 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 8100893228 ps |
| CPU time | 47.35 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:20:27 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489517900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.2489517900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.4135007545 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 185002442 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:40 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135007545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.4135007545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.943674603 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 5873961255 ps |
| CPU time | 9.25 seconds |
| Started | Oct 12 05:19:38 PM UTC 24 |
| Finished | Oct 12 05:19:49 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=943674603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_resume.943674603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.6345854 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 4956155566 ps |
| CPU time | 7.26 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:47 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6345854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_link_suspend.6345854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1193426131 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 2952085739 ps |
| CPU time | 70.99 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:20:51 PM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193426131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1193426131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.2322701750 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 2299524083 ps |
| CPU time | 54.68 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:20:35 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322701750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.2322701750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.28472772 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 238871809 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=28472772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.28472772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.395551555 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 237024446 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395551555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.395551555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.818484443 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 1766323666 ps |
| CPU time | 14.87 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:55 PM UTC 24 |
| Peak memory | 235796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=818484443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.818484443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.2980670301 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 165041733 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980670301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.2980670301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.274939490 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 161767425 ps |
| CPU time | 0.75 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=274939490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.274939490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.2269466869 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 209625395 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269466869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.2269466869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.3567611984 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 159589901 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567611984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.3567611984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.1315432822 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 187834354 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315432822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.1315432822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.1761762576 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 205316536 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761762576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.1761762576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.825868417 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 166736690 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825868417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.825868417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.1101259174 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 215813586 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101259174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.1101259174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2845944940 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 144262928 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845944940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2845944940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.3591441614 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 42710174 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591441614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.3591441614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2201202009 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 11088595348 ps |
| CPU time | 25.01 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:20:05 PM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201202009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.2201202009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.1570039333 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 201681904 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570039333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.1570039333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1488891746 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 231284485 ps |
| CPU time | 1.22 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488891746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1488891746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.446123101 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 201774649 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446123101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_random_length_in_transaction.446123101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.310746547 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 223800319 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=310746547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.310746547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.213818071 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 153032860 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=213818071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_rx_crc_err.213818071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.1523334163 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 255068221 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523334163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.1523334163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1382642175 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 159316260 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382642175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1382642175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.378520199 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 187169137 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378520199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 47.usbdev_setup_trans_ignored.378520199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.4184876766 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 198516500 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184876766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.4184876766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.2566185403 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 1930148331 ps |
| CPU time | 16.23 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:57 PM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566185403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.2566185403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.370939891 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 224530324 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370939891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.370939891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.2553471887 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 221396899 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:41 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553471887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.2553471887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.2059506979 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 1197525576 ps |
| CPU time | 2.78 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:43 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059506979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.2059506979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2258790697 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 2798078462 ps |
| CPU time | 64.63 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:20:46 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258790697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.2258790697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.85735296 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 2942195194 ps |
| CPU time | 20.74 seconds |
| Started | Oct 12 05:18:47 PM UTC 24 |
| Finished | Oct 12 05:19:09 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=85735296 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.85735296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.48273335 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 476810339 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:19:39 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=48273335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_tx_ rx_disruption.48273335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.3153923718 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 449427977 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3153923718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.3153923718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.789901689 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 530561044 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=789901689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_t x_rx_disruption.789901689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.4163667488 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 533067076 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4163667488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.4163667488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.3687894290 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 568881449 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3687894290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.3687894290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2377744866 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 607862899 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2377744866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.2377744866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3468987463 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 617925548 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3468987463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.3468987463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.980023015 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 642127645 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=980023015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.980023015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.2697075385 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 539151776 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:36:16 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2697075385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.2697075385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.3539304227 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 507208804 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539304227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.3539304227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.3731192375 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 491454761 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3731192375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.3731192375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.3421396509 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 38810823 ps |
| CPU time | 0.59 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421396509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.3421396509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.1063177955 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 10058773982 ps |
| CPU time | 13.76 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:54 PM UTC 24 |
| Peak memory | 219356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063177955 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.1063177955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.3017047931 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 14320087872 ps |
| CPU time | 16.02 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:57 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017047931 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.3017047931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.1166568711 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 25623479103 ps |
| CPU time | 31.85 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:20:13 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166568711 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.1166568711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3265192929 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 160767496 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265192929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.3265192929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.1878983919 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 172120037 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878983919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.1878983919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.3442437874 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 194722563 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:42 PM UTC 24 |
| Peak memory | 216444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442437874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.3442437874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.3152333344 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 915128522 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 05:19:40 PM UTC 24 |
| Finished | Oct 12 05:19:43 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152333344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.3152333344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.1448364937 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 15304630503 ps |
| CPU time | 25.65 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:02 PM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448364937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.1448364937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3022551480 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 1072799819 ps |
| CPU time | 7.68 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:44 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022551480 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3022551480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.3096758744 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 905344161 ps |
| CPU time | 1.9 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096758744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.3096758744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.571591269 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 197443623 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571591269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.571591269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_enable.2678057577 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 34651397 ps |
| CPU time | 0.64 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678057577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.2678057577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.2150174669 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 1029228914 ps |
| CPU time | 2.53 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:39 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150174669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.2150174669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.598246659 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 191604399 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=598246659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.598246659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.3377170111 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 323228036 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377170111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.3377170111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.4195768325 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 422338272 ps |
| CPU time | 2.08 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195768325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.4195768325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.1905725748 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 192390525 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905725748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.1905725748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.2215617109 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 143878228 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215617109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.2215617109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.1819143076 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 264104861 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819143076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.1819143076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2315837394 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 4605681773 ps |
| CPU time | 111.23 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:22:28 PM UTC 24 |
| Peak memory | 235808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315837394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.2315837394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.730353094 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 5484583536 ps |
| CPU time | 58.06 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:35 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730353094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.730353094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.3432319597 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 246494158 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432319597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.3432319597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.1192213389 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 29563035224 ps |
| CPU time | 43.33 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:20 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192213389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.1192213389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1210395917 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 9892686013 ps |
| CPU time | 11.54 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:48 PM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210395917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.1210395917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.297055301 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 3978839373 ps |
| CPU time | 32.09 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:09 PM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297055301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.297055301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2765603343 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 2570566669 ps |
| CPU time | 59.35 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:36 PM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765603343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.2765603343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.321253472 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 237818049 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=321253472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.321253472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.4212652366 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 193309659 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212652366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.4212652366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1146699978 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 3616868554 ps |
| CPU time | 87.58 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:22:05 PM UTC 24 |
| Peak memory | 229416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146699978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1146699978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.1603293788 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 191322362 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603293788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.1603293788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.2617507784 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 157480250 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617507784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.2617507784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.3659610400 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 192614237 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659610400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.3659610400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.2530520058 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 167044759 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530520058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.2530520058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.1474982906 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 182593037 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474982906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.1474982906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.1547066720 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 153299713 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547066720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.1547066720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3807942998 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 148336422 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807942998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.3807942998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.4238532511 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 247165491 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238532511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.4238532511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2172199349 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 180173374 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172199349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2172199349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.530532072 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 55707047 ps |
| CPU time | 0.63 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:37 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=530532072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_phy_pins_sense.530532072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3846729480 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 22525543207 ps |
| CPU time | 53.22 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846729480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.3846729480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.2432307396 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 190724965 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432307396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.2432307396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.815949217 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 214881404 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=815949217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_pkt_sent.815949217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.4267618083 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 215771078 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267618083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.4267618083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.984011681 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 176585504 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=984011681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.984011681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.395847956 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 137807729 ps |
| CPU time | 0.73 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395847956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_rx_crc_err.395847956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.1664131498 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 283050680 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664131498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.1664131498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3780601940 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 169567591 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780601940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.3780601940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.2314415140 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 159607950 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314415140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.2314415140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.3920581653 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 236831382 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920581653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.3920581653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2355120574 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 2891590956 ps |
| CPU time | 68.48 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:21:46 PM UTC 24 |
| Peak memory | 231548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355120574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2355120574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1966309537 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 186550642 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966309537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1966309537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.1391657109 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 156391726 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391657109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.1391657109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.4252443083 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 693033545 ps |
| CPU time | 1.9 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:39 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252443083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.4252443083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.2108610597 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 2684524973 ps |
| CPU time | 17.83 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:55 PM UTC 24 |
| Peak memory | 235732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108610597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.2108610597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.834420044 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 1808872043 ps |
| CPU time | 39.46 seconds |
| Started | Oct 12 05:20:35 PM UTC 24 |
| Finished | Oct 12 05:21:16 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=834420044 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.834420044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3176598720 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 570181274 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:39 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3176598720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3176598720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3810398492 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 504668585 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3810398492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.3810398492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.1869385012 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 490439521 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1869385012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.1869385012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1965441086 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 582755923 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 217396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1965441086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1965441086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.2517981927 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 498226910 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2517981927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.2517981927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.1843052852 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 645604016 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1843052852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.1843052852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.3965103621 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 668626188 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3965103621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.3965103621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.3450861812 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 601969210 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3450861812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.3450861812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.1653067351 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 590033951 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1653067351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.1653067351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.1299352601 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 590129076 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1299352601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.1299352601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.1569169335 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 492195873 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1569169335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.1569169335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.339173653 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 28933614 ps |
| CPU time | 0.57 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:19 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=339173653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.339173653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3808056647 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 11966658400 ps |
| CPU time | 14.33 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:52 PM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808056647 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.3808056647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.2763160435 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 14614463009 ps |
| CPU time | 16.69 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:54 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763160435 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.2763160435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.2473523064 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 24702265846 ps |
| CPU time | 28.84 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:21:07 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473523064 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.2473523064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.71135612 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 149101646 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71135612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_av_buffer.71135612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.3612313372 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 146726253 ps |
| CPU time | 0.72 seconds |
| Started | Oct 12 05:20:36 PM UTC 24 |
| Finished | Oct 12 05:20:38 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612313372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.3612313372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.693195883 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 466352021 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693195883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_data_toggle_clear.693195883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.3807843059 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 548030902 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807843059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3807843059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.409122527 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 24111905177 ps |
| CPU time | 37.25 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:22:06 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=409122527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_device_address.409122527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.585253252 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 979834357 ps |
| CPU time | 19.15 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:48 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=585253252 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.585253252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1904716737 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 902158242 ps |
| CPU time | 2.1 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904716737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.1904716737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1024593893 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 139590676 ps |
| CPU time | 0.77 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:29 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024593893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1024593893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_enable.1270313667 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 37639944 ps |
| CPU time | 0.64 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270313667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.1270313667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2951146921 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 890178605 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951146921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.2951146921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.2126077272 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 438295374 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126077272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.2126077272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.160062881 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 153664106 ps |
| CPU time | 0.8 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:29 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160062881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_fifo_levels.160062881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.416561668 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 197889738 ps |
| CPU time | 2.31 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 219064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416561668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_fifo_rst.416561668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.1811290207 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 229552279 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811290207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.1811290207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.3380618869 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 154201117 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:29 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380618869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.3380618869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.4164003265 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 193323651 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164003265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.4164003265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.4047148822 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 3720608961 ps |
| CPU time | 23.87 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:53 PM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047148822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.4047148822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3530711413 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 11538340820 ps |
| CPU time | 121.5 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:23:31 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530711413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.3530711413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.4214956668 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 161718643 ps |
| CPU time | 0.79 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214956668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.4214956668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.3360612278 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 10546887169 ps |
| CPU time | 16.08 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:45 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360612278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.3360612278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.951865559 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 10380077511 ps |
| CPU time | 13.72 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:43 PM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951865559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_suspend.951865559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.315937567 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 3098852365 ps |
| CPU time | 24.78 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:54 PM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315937567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.315937567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3464958714 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 3160400991 ps |
| CPU time | 76.76 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:22:46 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464958714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.3464958714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.3184791490 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 289558038 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184791490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.3184791490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.3820526908 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 207328436 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3820526908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.3820526908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.1250862374 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 3300714808 ps |
| CPU time | 74.82 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:22:45 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250862374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.1250862374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.385877275 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 148574105 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385877275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.385877275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.151632260 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 152474731 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=151632260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.151632260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.817911329 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 234859696 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817911329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_nak_trans.817911329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2114881026 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 171213146 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114881026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2114881026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.492563709 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 155992071 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=492563709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_out_stall.492563709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.1327318838 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 183793050 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327318838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.1327318838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.1304465579 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 147352289 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304465579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.1304465579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.199007960 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 267061457 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=199007960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.199007960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1436794762 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 162876440 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436794762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1436794762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1162320362 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 36515062 ps |
| CPU time | 0.65 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162320362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1162320362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.2954550637 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 11019798160 ps |
| CPU time | 27.73 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:57 PM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954550637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.2954550637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.131856769 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 182073199 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131856769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_pkt_received.131856769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.2120196615 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 176279617 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120196615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.2120196615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.2988464954 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 235405816 ps |
| CPU time | 0.94 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988464954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.2988464954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.2686920494 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 152656471 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686920494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.2686920494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2010513525 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 142540259 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010513525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2010513525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3998181703 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 258745665 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998181703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.3998181703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2291079364 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 149313871 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291079364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.2291079364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.4212380171 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 155767013 ps |
| CPU time | 0.89 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212380171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.4212380171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.454032575 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 274442705 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454032575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.454032575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.981833202 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 2010977343 ps |
| CPU time | 46.17 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:22:16 PM UTC 24 |
| Peak memory | 235940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=981833202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.981833202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.2404893966 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 187074230 ps |
| CPU time | 0.86 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404893966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.2404893966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.2496132619 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 161849712 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:21:30 PM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496132619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.2496132619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.1769800315 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 550219249 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:21:29 PM UTC 24 |
| Finished | Oct 12 05:21:31 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769800315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.1769800315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2511060164 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 2504344045 ps |
| CPU time | 58.36 seconds |
| Started | Oct 12 05:21:28 PM UTC 24 |
| Finished | Oct 12 05:22:29 PM UTC 24 |
| Peak memory | 229256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511060164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.2511060164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3063544695 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 1583733324 ps |
| CPU time | 11.87 seconds |
| Started | Oct 12 05:21:27 PM UTC 24 |
| Finished | Oct 12 05:21:40 PM UTC 24 |
| Peak memory | 218468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063544695 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3063544695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3002158345 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 464342367 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3002158345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.3002158345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.841660582 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 524149466 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=841660582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_t x_rx_disruption.841660582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.349774097 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 540409264 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=349774097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_t x_rx_disruption.349774097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.4069229272 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 423922363 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4069229272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.4069229272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.646918732 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 541785055 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=646918732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_t x_rx_disruption.646918732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.2601580071 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 568354217 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2601580071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.2601580071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.2993331909 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 632743005 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2993331909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.2993331909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3981182492 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 640772592 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3981182492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.3981182492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2602862933 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 497138885 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2602862933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2602862933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2629763987 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 455914317 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2629763987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2629763987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1937742941 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 512198037 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:36:17 PM UTC 24 |
| Finished | Oct 12 05:36:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1937742941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1937742941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.1511784200 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 59553767 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:47:02 PM UTC 24 |
| Finished | Oct 12 04:47:04 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511784200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.1511784200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.1245533133 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 9392703267 ps |
| CPU time | 31.67 seconds |
| Started | Oct 12 04:45:47 PM UTC 24 |
| Finished | Oct 12 04:46:20 PM UTC 24 |
| Peak memory | 219040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245533133 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.1245533133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.722274309 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 16170762128 ps |
| CPU time | 27.08 seconds |
| Started | Oct 12 04:45:47 PM UTC 24 |
| Finished | Oct 12 04:46:16 PM UTC 24 |
| Peak memory | 229160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=722274309 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.722274309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.400964519 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 30806535574 ps |
| CPU time | 49.43 seconds |
| Started | Oct 12 04:45:47 PM UTC 24 |
| Finished | Oct 12 04:46:38 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400964519 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.400964519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.2179056962 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 154369060 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:45:47 PM UTC 24 |
| Finished | Oct 12 04:45:50 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179056962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.2179056962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.685235173 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 219941205 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:45:50 PM UTC 24 |
| Finished | Oct 12 04:45:52 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=685235173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_bitstuff_err.685235173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.490582189 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 488401071 ps |
| CPU time | 2.58 seconds |
| Started | Oct 12 04:45:50 PM UTC 24 |
| Finished | Oct 12 04:45:53 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490582189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_data_toggle_clear.490582189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.1019069709 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 916936891 ps |
| CPU time | 4.26 seconds |
| Started | Oct 12 04:45:52 PM UTC 24 |
| Finished | Oct 12 04:45:58 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019069709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.1019069709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2977646516 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 43842405542 ps |
| CPU time | 91.66 seconds |
| Started | Oct 12 04:45:53 PM UTC 24 |
| Finished | Oct 12 04:47:26 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977646516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2977646516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.2086684035 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 2906093374 ps |
| CPU time | 30.13 seconds |
| Started | Oct 12 04:45:55 PM UTC 24 |
| Finished | Oct 12 04:46:27 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086684035 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.2086684035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.1231523479 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 522086339 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:45:55 PM UTC 24 |
| Finished | Oct 12 04:45:58 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1231523479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.1231523479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.3666295996 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 192237812 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:46:00 PM UTC 24 |
| Finished | Oct 12 04:46:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666295996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.3666295996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1320591466 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 35378724 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:46:00 PM UTC 24 |
| Finished | Oct 12 04:46:02 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320591466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1320591466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.1244292594 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 828881711 ps |
| CPU time | 2.63 seconds |
| Started | Oct 12 04:46:00 PM UTC 24 |
| Finished | Oct 12 04:46:04 PM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244292594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.1244292594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.1161595693 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 317344423 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 04:46:02 PM UTC 24 |
| Finished | Oct 12 04:46:05 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161595693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.1161595693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.2305240638 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 286668131 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 04:46:05 PM UTC 24 |
| Finished | Oct 12 04:46:08 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305240638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.2305240638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.4000907694 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 538880107 ps |
| CPU time | 4.52 seconds |
| Started | Oct 12 04:46:05 PM UTC 24 |
| Finished | Oct 12 04:46:11 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000907694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.4000907694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.1248698561 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 181207472 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:46:06 PM UTC 24 |
| Finished | Oct 12 04:46:08 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248698561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.1248698561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.4126269259 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 141060124 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:46:06 PM UTC 24 |
| Finished | Oct 12 04:46:08 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126269259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.4126269259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.1017288690 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 250859157 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 04:46:10 PM UTC 24 |
| Finished | Oct 12 04:46:13 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017288690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.1017288690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.1003679145 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 4336769935 ps |
| CPU time | 34.32 seconds |
| Started | Oct 12 04:46:06 PM UTC 24 |
| Finished | Oct 12 04:46:41 PM UTC 24 |
| Peak memory | 229444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003679145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.1003679145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.985110185 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 9831866913 ps |
| CPU time | 77.24 seconds |
| Started | Oct 12 04:46:10 PM UTC 24 |
| Finished | Oct 12 04:47:29 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=985110185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.985110185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.4142605227 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 174471241 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:46:10 PM UTC 24 |
| Finished | Oct 12 04:46:13 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142605227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.4142605227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3083718618 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 13257468656 ps |
| CPU time | 34.37 seconds |
| Started | Oct 12 04:46:13 PM UTC 24 |
| Finished | Oct 12 04:46:49 PM UTC 24 |
| Peak memory | 219352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083718618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3083718618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.639775409 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 11045824266 ps |
| CPU time | 27.53 seconds |
| Started | Oct 12 04:46:13 PM UTC 24 |
| Finished | Oct 12 04:46:42 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639775409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_suspend.639775409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.3299074334 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 3608266803 ps |
| CPU time | 105.3 seconds |
| Started | Oct 12 04:46:15 PM UTC 24 |
| Finished | Oct 12 04:48:03 PM UTC 24 |
| Peak memory | 235732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299074334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.3299074334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.1949474212 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 3629503761 ps |
| CPU time | 100.12 seconds |
| Started | Oct 12 04:46:15 PM UTC 24 |
| Finished | Oct 12 04:47:58 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949474212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.1949474212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.1597867327 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 289084868 ps |
| CPU time | 2.04 seconds |
| Started | Oct 12 04:46:18 PM UTC 24 |
| Finished | Oct 12 04:46:21 PM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597867327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.1597867327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.3422706386 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 193532296 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:46:22 PM UTC 24 |
| Finished | Oct 12 04:46:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422706386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.3422706386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.4081237477 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 3023984415 ps |
| CPU time | 33.3 seconds |
| Started | Oct 12 04:46:22 PM UTC 24 |
| Finished | Oct 12 04:46:57 PM UTC 24 |
| Peak memory | 231448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081237477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.4081237477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.3569620959 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 3446662706 ps |
| CPU time | 106.71 seconds |
| Started | Oct 12 04:46:24 PM UTC 24 |
| Finished | Oct 12 04:48:14 PM UTC 24 |
| Peak memory | 231300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569620959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.3569620959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.352301925 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 1992325425 ps |
| CPU time | 74.57 seconds |
| Started | Oct 12 04:46:27 PM UTC 24 |
| Finished | Oct 12 04:47:43 PM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352301925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.352301925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.484452 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 207909280 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:46:29 PM UTC 24 |
| Finished | Oct 12 04:46:32 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=484452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_tr ans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.484452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.3589663564 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 225077039 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:46:31 PM UTC 24 |
| Finished | Oct 12 04:46:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589663564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.3589663564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.2002581431 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 199443155 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:46:33 PM UTC 24 |
| Finished | Oct 12 04:46:36 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002581431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.2002581431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2111493676 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 168780421 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:46:36 PM UTC 24 |
| Finished | Oct 12 04:46:38 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111493676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2111493676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.1855770360 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 206795175 ps |
| CPU time | 1.31 seconds |
| Started | Oct 12 04:46:38 PM UTC 24 |
| Finished | Oct 12 04:46:40 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855770360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.1855770360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.2573865264 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 183877901 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 04:46:38 PM UTC 24 |
| Finished | Oct 12 04:46:40 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573865264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.2573865264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.1233134974 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 145157644 ps |
| CPU time | 1.16 seconds |
| Started | Oct 12 04:46:41 PM UTC 24 |
| Finished | Oct 12 04:46:43 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233134974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.1233134974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.3597497398 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 232594936 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:46:41 PM UTC 24 |
| Finished | Oct 12 04:46:43 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597497398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3597497398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.1665174982 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 142821945 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665174982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.1665174982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.1763908060 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 34085579 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:47 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763908060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.1763908060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.550892023 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 10246781639 ps |
| CPU time | 44.11 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:47:31 PM UTC 24 |
| Peak memory | 229292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550892023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_pkt_buffer.550892023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.3392073454 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 201371873 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:47 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392073454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.3392073454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.2514434500 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 242187761 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:48 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514434500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.2514434500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.4161019509 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 14653127985 ps |
| CPU time | 80.01 seconds |
| Started | Oct 12 04:46:48 PM UTC 24 |
| Finished | Oct 12 04:48:10 PM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161019509 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.4161019509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.79881195 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 4132364530 ps |
| CPU time | 36.53 seconds |
| Started | Oct 12 04:46:49 PM UTC 24 |
| Finished | Oct 12 04:47:26 PM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79881195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bu s_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.79881195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.3439462608 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 7585291692 ps |
| CPU time | 43.44 seconds |
| Started | Oct 12 04:46:49 PM UTC 24 |
| Finished | Oct 12 04:47:33 PM UTC 24 |
| Peak memory | 235896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439462608 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.3439462608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.3856196692 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 179227220 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:48 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856196692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.3856196692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.1070164196 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 167137320 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:46:45 PM UTC 24 |
| Finished | Oct 12 04:46:48 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070164196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.1070164196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.4073835609 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 20202137946 ps |
| CPU time | 49.55 seconds |
| Started | Oct 12 04:46:49 PM UTC 24 |
| Finished | Oct 12 04:47:40 PM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4073835609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.4073835609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2755908872 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 142021286 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 04:46:49 PM UTC 24 |
| Finished | Oct 12 04:46:51 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755908872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2755908872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.1625421138 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 282350710 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:46:49 PM UTC 24 |
| Finished | Oct 12 04:46:51 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625421138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.1625421138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.3296778896 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 162291969 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:46:52 PM UTC 24 |
| Finished | Oct 12 04:46:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296778896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.3296778896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1445584578 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 149535508 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:46:52 PM UTC 24 |
| Finished | Oct 12 04:46:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445584578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.1445584578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.171578936 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 253170779 ps |
| CPU time | 1.97 seconds |
| Started | Oct 12 04:46:52 PM UTC 24 |
| Finished | Oct 12 04:46:55 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=171578936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.171578936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.1530688469 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 3156329893 ps |
| CPU time | 25.79 seconds |
| Started | Oct 12 04:46:52 PM UTC 24 |
| Finished | Oct 12 04:47:19 PM UTC 24 |
| Peak memory | 236044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530688469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.1530688469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.569258273 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 175994234 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:46:54 PM UTC 24 |
| Finished | Oct 12 04:46:56 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569258273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.569258273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.4183032007 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 203010480 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:46:57 PM UTC 24 |
| Finished | Oct 12 04:46:59 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183032007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.4183032007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.4222431167 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 962236111 ps |
| CPU time | 4.86 seconds |
| Started | Oct 12 04:46:57 PM UTC 24 |
| Finished | Oct 12 04:47:03 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222431167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.4222431167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.323738651 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 3246394531 ps |
| CPU time | 28.65 seconds |
| Started | Oct 12 04:46:57 PM UTC 24 |
| Finished | Oct 12 04:47:27 PM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323738651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_streaming_out.323738651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.2960165038 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 7136793902 ps |
| CPU time | 36.11 seconds |
| Started | Oct 12 04:47:00 PM UTC 24 |
| Finished | Oct 12 04:47:37 PM UTC 24 |
| Peak memory | 235944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960165038 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.2960165038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.1113658221 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 3575826809 ps |
| CPU time | 32.99 seconds |
| Started | Oct 12 04:45:55 PM UTC 24 |
| Finished | Oct 12 04:46:30 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113658221 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.1113658221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.2409719713 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 733194162 ps |
| CPU time | 1.82 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409719713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.2409719713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.4178489867 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 180754083 ps |
| CPU time | 0.93 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:19 PM UTC 24 |
| Peak memory | 216520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178489867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.4178489867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.857791162 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 578801139 ps |
| CPU time | 1.74 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=857791162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_tx _rx_disruption.857791162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1079934626 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 557432194 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079934626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1079934626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.2396321249 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 168221766 ps |
| CPU time | 0.81 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:19 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396321249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.2396321249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.556627875 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 652467762 ps |
| CPU time | 1.81 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=556627875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_tx _rx_disruption.556627875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.1828195515 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 265157166 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:22:17 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828195515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.1828195515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1291012728 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 605668300 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1291012728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.1291012728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.1220323579 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 373862041 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220323579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.1220323579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.1131426852 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 181171237 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:19 PM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131426852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.1131426852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.1994889275 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 612958889 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1994889275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.1994889275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.1849919187 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 666385162 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849919187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.1849919187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1788799328 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 155341729 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788799328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.1788799328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3501083818 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 503238427 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3501083818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.3501083818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3206621887 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 266943831 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206621887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3206621887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.2655559382 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 321234164 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655559382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.2655559382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1779148120 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 481070160 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1779148120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.1779148120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3881475192 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 289233170 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881475192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3881475192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.645920026 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 323938727 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645920026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 56.usbdev_fifo_levels.645920026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.3379026296 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 614887199 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3379026296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.3379026296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.295229575 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 154790345 ps |
| CPU time | 0.84 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=295229575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.295229575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.58266665 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 249236333 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58266665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 57.usbdev_fifo_levels.58266665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.3588277034 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 687690322 ps |
| CPU time | 1.78 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3588277034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.3588277034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.403000466 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 189942996 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403000466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.403000466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.3621874800 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 248644401 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621874800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.3621874800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.1887086138 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 582474856 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1887086138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.1887086138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2035026714 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 281946831 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035026714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.2035026714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1917987694 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 150272381 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917987694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.1917987694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1621660220 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 457191762 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1621660220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.1621660220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.3830322654 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 44213876 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 04:48:06 PM UTC 24 |
| Finished | Oct 12 04:48:08 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830322654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.3830322654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3987678463 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 4099144481 ps |
| CPU time | 13.76 seconds |
| Started | Oct 12 04:47:05 PM UTC 24 |
| Finished | Oct 12 04:47:20 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987678463 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3987678463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.2923518597 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 15068967129 ps |
| CPU time | 28.87 seconds |
| Started | Oct 12 04:47:05 PM UTC 24 |
| Finished | Oct 12 04:47:35 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923518597 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.2923518597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.2010168516 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 31484123595 ps |
| CPU time | 49.91 seconds |
| Started | Oct 12 04:47:05 PM UTC 24 |
| Finished | Oct 12 04:47:57 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010168516 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.2010168516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.2590447003 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 161729301 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:47:05 PM UTC 24 |
| Finished | Oct 12 04:47:08 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590447003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.2590447003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.2859483221 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 164364117 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:47:05 PM UTC 24 |
| Finished | Oct 12 04:47:08 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859483221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.2859483221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.1393663594 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 189420608 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:47:11 PM UTC 24 |
| Finished | Oct 12 04:47:13 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393663594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.1393663594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.2283964543 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 604325169 ps |
| CPU time | 3.12 seconds |
| Started | Oct 12 04:47:11 PM UTC 24 |
| Finished | Oct 12 04:47:15 PM UTC 24 |
| Peak memory | 218852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283964543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.2283964543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.2826103551 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 3427983565 ps |
| CPU time | 39.9 seconds |
| Started | Oct 12 04:47:15 PM UTC 24 |
| Finished | Oct 12 04:47:56 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826103551 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.2826103551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.3393907730 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 708431406 ps |
| CPU time | 3.26 seconds |
| Started | Oct 12 04:47:20 PM UTC 24 |
| Finished | Oct 12 04:47:24 PM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393907730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.3393907730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.2384825765 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 142589160 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:47:23 PM UTC 24 |
| Finished | Oct 12 04:47:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384825765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.2384825765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_enable.2390580526 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 53273391 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:47:23 PM UTC 24 |
| Finished | Oct 12 04:47:25 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390580526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.2390580526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.4101313709 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 952936971 ps |
| CPU time | 4.04 seconds |
| Started | Oct 12 04:47:25 PM UTC 24 |
| Finished | Oct 12 04:47:30 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101313709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.4101313709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.1162585818 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 480445915 ps |
| CPU time | 2.52 seconds |
| Started | Oct 12 04:47:29 PM UTC 24 |
| Finished | Oct 12 04:47:32 PM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162585818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.1162585818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.1556910923 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 423088087 ps |
| CPU time | 3.29 seconds |
| Started | Oct 12 04:47:29 PM UTC 24 |
| Finished | Oct 12 04:47:33 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556910923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.1556910923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.2300736761 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 219923739 ps |
| CPU time | 2.11 seconds |
| Started | Oct 12 04:47:29 PM UTC 24 |
| Finished | Oct 12 04:47:32 PM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300736761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.2300736761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.3540164389 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 214940896 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:47:33 PM UTC 24 |
| Finished | Oct 12 04:47:36 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540164389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.3540164389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1421033197 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 218614251 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:47:33 PM UTC 24 |
| Finished | Oct 12 04:47:36 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421033197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1421033197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.2744225108 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 3747572456 ps |
| CPU time | 46.6 seconds |
| Started | Oct 12 04:47:29 PM UTC 24 |
| Finished | Oct 12 04:48:17 PM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744225108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.2744225108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1984553130 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 7246600508 ps |
| CPU time | 46.91 seconds |
| Started | Oct 12 04:47:33 PM UTC 24 |
| Finished | Oct 12 04:48:22 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984553130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1984553130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.620024616 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 210042675 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:47:34 PM UTC 24 |
| Finished | Oct 12 04:47:36 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620024616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.620024616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.1222135198 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 32209783761 ps |
| CPU time | 61.49 seconds |
| Started | Oct 12 04:47:34 PM UTC 24 |
| Finished | Oct 12 04:48:37 PM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222135198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.1222135198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.1579430023 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 4105167365 ps |
| CPU time | 9.45 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:47:48 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579430023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.1579430023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.1328143457 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 4857431634 ps |
| CPU time | 130.26 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:49:50 PM UTC 24 |
| Peak memory | 232796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328143457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.1328143457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.3660844414 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 2283076595 ps |
| CPU time | 72.47 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:48:52 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660844414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.3660844414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.3272041716 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 241942898 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:47:41 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272041716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.3272041716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.2702483863 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 232207822 ps |
| CPU time | 1.83 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:47:41 PM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702483863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.2702483863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.1547264818 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 3199785321 ps |
| CPU time | 101.86 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:49:22 PM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547264818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.1547264818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.3726294875 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 3132960372 ps |
| CPU time | 88.91 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:49:09 PM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726294875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.3726294875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.3587948677 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 2596460376 ps |
| CPU time | 22.34 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:48:02 PM UTC 24 |
| Peak memory | 235820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587948677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3587948677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2129284517 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 232627942 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:47:38 PM UTC 24 |
| Finished | Oct 12 04:47:41 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129284517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2129284517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.415687467 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 153687665 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:47:41 PM UTC 24 |
| Finished | Oct 12 04:47:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415687467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.415687467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.2181314679 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 185556346 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:47:41 PM UTC 24 |
| Finished | Oct 12 04:47:43 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181314679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.2181314679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3933284368 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 189510123 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:47:43 PM UTC 24 |
| Finished | Oct 12 04:47:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933284368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3933284368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.3745813014 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 191942526 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:47:43 PM UTC 24 |
| Finished | Oct 12 04:47:46 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745813014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.3745813014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.1290955786 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 157184480 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:47:44 PM UTC 24 |
| Finished | Oct 12 04:47:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290955786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.1290955786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.2261581264 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 160447818 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:47:46 PM UTC 24 |
| Finished | Oct 12 04:47:49 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261581264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.2261581264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.4109229912 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 243558145 ps |
| CPU time | 1.87 seconds |
| Started | Oct 12 04:47:46 PM UTC 24 |
| Finished | Oct 12 04:47:49 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109229912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.4109229912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.3903624290 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 178527198 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:47:46 PM UTC 24 |
| Finished | Oct 12 04:47:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903624290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.3903624290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.458441955 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 44689263 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:47:52 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=458441955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_phy_pins_sense.458441955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.2819157509 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 10949395412 ps |
| CPU time | 31.14 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:48:22 PM UTC 24 |
| Peak memory | 236052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819157509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.2819157509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.1189813038 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 193349609 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:47:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189813038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.1189813038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.124246681 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 193994297 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:47:53 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124246681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_pkt_sent.124246681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.1671166079 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 2668423785 ps |
| CPU time | 28.09 seconds |
| Started | Oct 12 04:47:53 PM UTC 24 |
| Finished | Oct 12 04:48:23 PM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671166079 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.1671166079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.3660638321 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 6027812583 ps |
| CPU time | 30.93 seconds |
| Started | Oct 12 04:47:53 PM UTC 24 |
| Finished | Oct 12 04:48:26 PM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660638321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.3660638321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.3010323956 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 13329732886 ps |
| CPU time | 72.17 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:49:11 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010323956 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.3010323956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.1657200590 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 199758018 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:47:53 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657200590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.1657200590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.2968013956 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 206772915 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 04:47:50 PM UTC 24 |
| Finished | Oct 12 04:47:52 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968013956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.2968013956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.1009839278 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 20156353899 ps |
| CPU time | 24.28 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:23 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009839278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.1009839278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.892526059 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 202917833 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:00 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892526059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_rx_crc_err.892526059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.524978770 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 241225526 ps |
| CPU time | 1.85 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=524978770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_rx_full.524978770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.683718260 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 162002474 ps |
| CPU time | 1.44 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:00 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683718260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_setup_stage.683718260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.1263590797 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 156078376 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:00 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263590797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.1263590797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.4163434651 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 183112603 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:47:57 PM UTC 24 |
| Finished | Oct 12 04:48:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163434651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.4163434651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3958342025 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 2046193506 ps |
| CPU time | 24.53 seconds |
| Started | Oct 12 04:48:00 PM UTC 24 |
| Finished | Oct 12 04:48:26 PM UTC 24 |
| Peak memory | 235868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958342025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3958342025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.2359029624 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 193800533 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:48:00 PM UTC 24 |
| Finished | Oct 12 04:48:03 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359029624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.2359029624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1760719016 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 154958478 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:48:03 PM UTC 24 |
| Finished | Oct 12 04:48:06 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760719016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1760719016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.4237845745 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 385215702 ps |
| CPU time | 2.02 seconds |
| Started | Oct 12 04:48:03 PM UTC 24 |
| Finished | Oct 12 04:48:06 PM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237845745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.4237845745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2844925764 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 2114605077 ps |
| CPU time | 53.88 seconds |
| Started | Oct 12 04:48:03 PM UTC 24 |
| Finished | Oct 12 04:48:59 PM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844925764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2844925764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.3442217567 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 15490628340 ps |
| CPU time | 87.4 seconds |
| Started | Oct 12 04:48:03 PM UTC 24 |
| Finished | Oct 12 04:49:33 PM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442217567 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.3442217567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3940590933 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 597694060 ps |
| CPU time | 14.63 seconds |
| Started | Oct 12 04:47:17 PM UTC 24 |
| Finished | Oct 12 04:47:33 PM UTC 24 |
| Peak memory | 219384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940590933 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.3940590933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1993733253 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 595880161 ps |
| CPU time | 3 seconds |
| Started | Oct 12 04:48:03 PM UTC 24 |
| Finished | Oct 12 04:48:08 PM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1993733253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1993733253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.4168381325 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 267957940 ps |
| CPU time | 0.98 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168381325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.4168381325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2691061841 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 254165761 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691061841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2691061841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.651917097 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 503916054 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=651917097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_tx _rx_disruption.651917097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.3582373985 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 164485096 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582373985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.3582373985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.3958006756 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 548306806 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3958006756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.3958006756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3312748601 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 245240777 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:20 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312748601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.3312748601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.2378749619 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 295207869 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378749619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.2378749619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.112928003 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 509537437 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=112928003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_tx _rx_disruption.112928003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.700562778 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 306290630 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=700562778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.700562778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.403582644 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 306937719 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403582644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 63.usbdev_fifo_levels.403582644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1765254023 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 471209987 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:22:18 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1765254023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1765254023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.1532992156 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 364999394 ps |
| CPU time | 1.2 seconds |
| Started | Oct 12 05:22:19 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532992156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.1532992156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3068052804 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 303837114 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:22:19 PM UTC 24 |
| Finished | Oct 12 05:22:21 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068052804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.3068052804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.288868795 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 532271521 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=288868795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_tx _rx_disruption.288868795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1760076465 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 259217360 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760076465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1760076465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.4203774247 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 297877728 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203774247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.4203774247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.909720730 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 517389993 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=909720730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx _rx_disruption.909720730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1986094391 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 322206064 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986094391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.1986094391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2257911451 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 253534226 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257911451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2257911451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2061435906 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 478684520 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 05:23:20 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2061435906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.2061435906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.290677768 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 732896996 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290677768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.290677768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.4289701581 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 245812825 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289701581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.4289701581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.2618671782 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 529590149 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2618671782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.2618671782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1122369077 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 269849845 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122369077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.1122369077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.1072578522 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 153336249 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072578522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.1072578522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.1651374531 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 511231019 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1651374531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.1651374531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3169343944 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 151663577 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169343944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3169343944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.692706362 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 156090571 ps |
| CPU time | 0.85 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692706362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 69.usbdev_fifo_levels.692706362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1991947690 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 521614342 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1991947690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.1991947690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.491080588 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 35111638 ps |
| CPU time | 0.87 seconds |
| Started | Oct 12 04:48:59 PM UTC 24 |
| Finished | Oct 12 04:49:01 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=491080588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.491080588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.2860620226 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 9709110133 ps |
| CPU time | 16.74 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:27 PM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2860620226 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.2860620226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.1076397308 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 14022383350 ps |
| CPU time | 25.36 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:36 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076397308 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.1076397308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.2505097672 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 31242115241 ps |
| CPU time | 46.98 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:58 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505097672 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.2505097672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.3993970898 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 150880986 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:12 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993970898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.3993970898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1784373598 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 152874452 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:12 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784373598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1784373598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.2299774575 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 207671683 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:48:09 PM UTC 24 |
| Finished | Oct 12 04:48:12 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299774575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.2299774575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.1593051616 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 760438465 ps |
| CPU time | 3.74 seconds |
| Started | Oct 12 04:48:12 PM UTC 24 |
| Finished | Oct 12 04:48:17 PM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593051616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.1593051616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3184946432 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 48472985981 ps |
| CPU time | 98.16 seconds |
| Started | Oct 12 04:48:15 PM UTC 24 |
| Finished | Oct 12 04:49:55 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184946432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3184946432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.4054148076 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 4936377920 ps |
| CPU time | 45.57 seconds |
| Started | Oct 12 04:48:15 PM UTC 24 |
| Finished | Oct 12 04:49:02 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054148076 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.4054148076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.3653669076 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 649375141 ps |
| CPU time | 3.39 seconds |
| Started | Oct 12 04:48:15 PM UTC 24 |
| Finished | Oct 12 04:48:20 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653669076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.3653669076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.3119880179 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 145674298 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:48:20 PM UTC 24 |
| Finished | Oct 12 04:48:22 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119880179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.3119880179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_enable.310747664 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 38126255 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:48:20 PM UTC 24 |
| Finished | Oct 12 04:48:22 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=310747664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.310747664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.971497455 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 764581890 ps |
| CPU time | 3.93 seconds |
| Started | Oct 12 04:48:22 PM UTC 24 |
| Finished | Oct 12 04:48:27 PM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=971497455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.971497455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.3851790947 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 686144935 ps |
| CPU time | 2.98 seconds |
| Started | Oct 12 04:48:27 PM UTC 24 |
| Finished | Oct 12 04:48:31 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851790947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3851790947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.554625652 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 302059835 ps |
| CPU time | 2.06 seconds |
| Started | Oct 12 04:48:27 PM UTC 24 |
| Finished | Oct 12 04:48:30 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554625652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_fifo_levels.554625652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.341072096 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 277156343 ps |
| CPU time | 3.56 seconds |
| Started | Oct 12 04:48:27 PM UTC 24 |
| Finished | Oct 12 04:48:32 PM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341072096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_fifo_rst.341072096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.1994349295 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 178102860 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:48:27 PM UTC 24 |
| Finished | Oct 12 04:48:30 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994349295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.1994349295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.4121698606 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 153741290 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:48:28 PM UTC 24 |
| Finished | Oct 12 04:48:30 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121698606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.4121698606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2822642539 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 170228224 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:48:28 PM UTC 24 |
| Finished | Oct 12 04:48:30 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822642539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2822642539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.3588165964 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 3639979630 ps |
| CPU time | 34.86 seconds |
| Started | Oct 12 04:48:27 PM UTC 24 |
| Finished | Oct 12 04:49:04 PM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588165964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.3588165964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.2076230445 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 8993415709 ps |
| CPU time | 117.48 seconds |
| Started | Oct 12 04:48:28 PM UTC 24 |
| Finished | Oct 12 04:50:27 PM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076230445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.2076230445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1931133075 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 188892232 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:48:28 PM UTC 24 |
| Finished | Oct 12 04:48:30 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931133075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1931133075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.2485021711 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 7911578689 ps |
| CPU time | 17.37 seconds |
| Started | Oct 12 04:48:31 PM UTC 24 |
| Finished | Oct 12 04:48:50 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485021711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.2485021711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.3832801593 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 9310858151 ps |
| CPU time | 13.94 seconds |
| Started | Oct 12 04:48:31 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832801593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.3832801593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.179236106 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 4461615203 ps |
| CPU time | 116.45 seconds |
| Started | Oct 12 04:48:31 PM UTC 24 |
| Finished | Oct 12 04:50:30 PM UTC 24 |
| Peak memory | 231644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179236106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.179236106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.2479050812 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 2323205333 ps |
| CPU time | 60.42 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:49:38 PM UTC 24 |
| Peak memory | 229432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479050812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.2479050812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.2430029999 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 301561973 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:38 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430029999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.2430029999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.4017626302 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 236082247 ps |
| CPU time | 1.62 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017626302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.4017626302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.1855951784 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 2245622714 ps |
| CPU time | 67.11 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:49:45 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855951784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.1855951784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.4033999555 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 2560387514 ps |
| CPU time | 23.43 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:49:01 PM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033999555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.4033999555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.2071731684 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 2429391433 ps |
| CPU time | 21.33 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:59 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071731684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.2071731684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.2718215572 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 187805964 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:39 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718215572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.2718215572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.1191502202 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 154923559 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191502202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.1191502202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.419901524 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 220279273 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:48:36 PM UTC 24 |
| Finished | Oct 12 04:48:39 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419901524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_nak_trans.419901524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2408554211 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 220135731 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:48:39 PM UTC 24 |
| Finished | Oct 12 04:48:42 PM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408554211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2408554211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.1713204217 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 181010949 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 04:48:39 PM UTC 24 |
| Finished | Oct 12 04:48:41 PM UTC 24 |
| Peak memory | 216672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713204217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.1713204217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2657820360 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 244030271 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657820360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2657820360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.2369571314 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 158327871 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369571314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.2369571314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.2346334497 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 220542571 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346334497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.2346334497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.2398669969 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 143906953 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398669969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.2398669969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.1511032171 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 35591197 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:46 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511032171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1511032171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.1117399046 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 12486437040 ps |
| CPU time | 48.37 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:49:34 PM UTC 24 |
| Peak memory | 236000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117399046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.1117399046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.896689352 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 158589566 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:47 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896689352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_pkt_received.896689352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3059852612 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 225276167 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:47 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059852612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3059852612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.3098339898 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 6514415424 ps |
| CPU time | 90.58 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:50:24 PM UTC 24 |
| Peak memory | 231384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098339898 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.3098339898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.3907415261 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 3738862175 ps |
| CPU time | 35.3 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:49:28 PM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907415261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3907415261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.2293125363 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 9422665005 ps |
| CPU time | 50.17 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:49:43 PM UTC 24 |
| Peak memory | 231404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293125363 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.2293125363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.4116356331 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 219908910 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 04:48:44 PM UTC 24 |
| Finished | Oct 12 04:48:47 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116356331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.4116356331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.1356318703 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 176530958 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:48:47 PM UTC 24 |
| Finished | Oct 12 04:48:49 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356318703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.1356318703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.2685323487 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 20179301954 ps |
| CPU time | 45.58 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:49:38 PM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685323487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.2685323487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.1296824670 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 151557679 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:48:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296824670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.1296824670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.2142080349 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 385551527 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:48:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142080349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.2142080349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.1305520825 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 143906857 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:48:51 PM UTC 24 |
| Finished | Oct 12 04:48:54 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305520825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.1305520825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3413936796 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 152664989 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:48:52 PM UTC 24 |
| Finished | Oct 12 04:48:54 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413936796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3413936796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.930937107 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 253606386 ps |
| CPU time | 1.8 seconds |
| Started | Oct 12 04:48:52 PM UTC 24 |
| Finished | Oct 12 04:48:54 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930937107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.930937107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.246813898 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 3288072147 ps |
| CPU time | 38.83 seconds |
| Started | Oct 12 04:48:52 PM UTC 24 |
| Finished | Oct 12 04:49:32 PM UTC 24 |
| Peak memory | 235856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246813898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.246813898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.403191248 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 154834313 ps |
| CPU time | 1.26 seconds |
| Started | Oct 12 04:48:54 PM UTC 24 |
| Finished | Oct 12 04:48:57 PM UTC 24 |
| Peak memory | 216676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403191248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.403191248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.2235454745 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 181699842 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:48:54 PM UTC 24 |
| Finished | Oct 12 04:48:57 PM UTC 24 |
| Peak memory | 216628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235454745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.2235454745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3761027105 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 389270963 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 04:48:59 PM UTC 24 |
| Finished | Oct 12 04:49:02 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761027105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3761027105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.2416090944 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 3174923394 ps |
| CPU time | 21.15 seconds |
| Started | Oct 12 04:48:59 PM UTC 24 |
| Finished | Oct 12 04:49:21 PM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416090944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.2416090944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.2982376166 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 7781071683 ps |
| CPU time | 216.01 seconds |
| Started | Oct 12 04:48:59 PM UTC 24 |
| Finished | Oct 12 04:52:39 PM UTC 24 |
| Peak memory | 230860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982376166 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.2982376166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2407349032 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 1570678249 ps |
| CPU time | 14.58 seconds |
| Started | Oct 12 04:48:15 PM UTC 24 |
| Finished | Oct 12 04:48:31 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407349032 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2407349032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1623239643 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 474752542 ps |
| CPU time | 2.78 seconds |
| Started | Oct 12 04:48:59 PM UTC 24 |
| Finished | Oct 12 04:49:03 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1623239643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1623239643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.268126671 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 286300272 ps |
| CPU time | 0.96 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268126671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.268126671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.4222934297 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 263856852 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222934297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.4222934297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.4209285725 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 458772390 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4209285725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.4209285725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1821670239 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 255228445 ps |
| CPU time | 0.9 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821670239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.1821670239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.3493460443 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 275355298 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493460443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.3493460443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.702002277 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 545088878 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=702002277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_tx _rx_disruption.702002277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1678096343 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 482435404 ps |
| CPU time | 1.33 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678096343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.1678096343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1404266280 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 260111385 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404266280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.1404266280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2370702752 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 675259555 ps |
| CPU time | 1.68 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2370702752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.2370702752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2866609634 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 372898712 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866609634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.2866609634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.255470876 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 309301148 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:23 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255470876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 73.usbdev_fifo_levels.255470876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.4156701687 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 633314619 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4156701687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.4156701687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2594602065 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 416869237 ps |
| CPU time | 1.21 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594602065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2594602065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.118258494 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 272179334 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118258494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 74.usbdev_fifo_levels.118258494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.437947170 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 623989635 ps |
| CPU time | 1.77 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=437947170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_tx _rx_disruption.437947170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.1554004006 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 557700330 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554004006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.1554004006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1150155239 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 278791217 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150155239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.1150155239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.4066522858 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 596628662 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4066522858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.4066522858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1224742940 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 236722759 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224742940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.1224742940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.4211965306 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 271415824 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211965306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.4211965306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2968978076 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 586465962 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2968978076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.2968978076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.4096733939 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 545185609 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096733939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.4096733939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.472470733 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 262074268 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472470733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 77.usbdev_fifo_levels.472470733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2287308685 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 556965357 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2287308685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.2287308685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.3866009817 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 393234874 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866009817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.3866009817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.1422284746 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 277661037 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422284746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.1422284746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2896720679 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 542625604 ps |
| CPU time | 1.64 seconds |
| Started | Oct 12 05:23:21 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2896720679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.2896720679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.282206663 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 167793315 ps |
| CPU time | 0.78 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282206663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 79.usbdev_fifo_levels.282206663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2442636690 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 584684601 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2442636690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.2442636690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.3170467244 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 59036435 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:49:48 PM UTC 24 |
| Finished | Oct 12 04:49:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170467244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.3170467244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.446216270 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 11243692614 ps |
| CPU time | 20.34 seconds |
| Started | Oct 12 04:49:00 PM UTC 24 |
| Finished | Oct 12 04:49:21 PM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=446216270 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.446216270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1871640993 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 19313720602 ps |
| CPU time | 24.02 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:30 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871640993 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1871640993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.1118810823 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 28343367539 ps |
| CPU time | 47.38 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:53 PM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118810823 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.1118810823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3293902285 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 188540218 ps |
| CPU time | 1.38 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:07 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293902285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3293902285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.1549106655 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 148445210 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:07 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549106655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.1549106655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.2722934623 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 428968214 ps |
| CPU time | 2.88 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:09 PM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722934623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.2722934623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2262972932 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 933358798 ps |
| CPU time | 4.65 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:11 PM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262972932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2262972932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.2193613983 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 20277194347 ps |
| CPU time | 33.43 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:40 PM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193613983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.2193613983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.75365193 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 1144988128 ps |
| CPU time | 24.18 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:30 PM UTC 24 |
| Peak memory | 218988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75365193 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.75365193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.917429457 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 884529152 ps |
| CPU time | 2.45 seconds |
| Started | Oct 12 04:49:08 PM UTC 24 |
| Finished | Oct 12 04:49:12 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917429457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.917429457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.117499237 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 159997611 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:49:08 PM UTC 24 |
| Finished | Oct 12 04:49:11 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117499237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_disconnected.117499237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_enable.1976137436 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 43455009 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:49:08 PM UTC 24 |
| Finished | Oct 12 04:49:10 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976137436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.1976137436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1022281685 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 888594303 ps |
| CPU time | 4.45 seconds |
| Started | Oct 12 04:49:11 PM UTC 24 |
| Finished | Oct 12 04:49:17 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022281685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1022281685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.3725608113 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 677813466 ps |
| CPU time | 3.29 seconds |
| Started | Oct 12 04:49:11 PM UTC 24 |
| Finished | Oct 12 04:49:16 PM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725608113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.3725608113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1787261379 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 153545967 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:49:11 PM UTC 24 |
| Finished | Oct 12 04:49:14 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787261379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1787261379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.3217998157 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 235980709 ps |
| CPU time | 2.76 seconds |
| Started | Oct 12 04:49:15 PM UTC 24 |
| Finished | Oct 12 04:49:19 PM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217998157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.3217998157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.3855456201 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 215100053 ps |
| CPU time | 2.02 seconds |
| Started | Oct 12 04:49:15 PM UTC 24 |
| Finished | Oct 12 04:49:18 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855456201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.3855456201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.877131608 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 141221806 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:49:15 PM UTC 24 |
| Finished | Oct 12 04:49:18 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877131608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_in_stall.877131608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.698948083 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 197300328 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:49:15 PM UTC 24 |
| Finished | Oct 12 04:49:18 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698948083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_in_trans.698948083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.4077801995 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 5109516854 ps |
| CPU time | 142.33 seconds |
| Started | Oct 12 04:49:15 PM UTC 24 |
| Finished | Oct 12 04:51:40 PM UTC 24 |
| Peak memory | 231632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077801995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.4077801995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.2768407719 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 8697638649 ps |
| CPU time | 89.44 seconds |
| Started | Oct 12 04:49:18 PM UTC 24 |
| Finished | Oct 12 04:50:50 PM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768407719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.2768407719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.2340661716 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 232713472 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 04:49:18 PM UTC 24 |
| Finished | Oct 12 04:49:21 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340661716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.2340661716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.3808039840 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 15247156108 ps |
| CPU time | 28.55 seconds |
| Started | Oct 12 04:49:18 PM UTC 24 |
| Finished | Oct 12 04:49:48 PM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808039840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.3808039840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.2260882991 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 11155730149 ps |
| CPU time | 18.77 seconds |
| Started | Oct 12 04:49:22 PM UTC 24 |
| Finished | Oct 12 04:49:42 PM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260882991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.2260882991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.3042318854 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 5132766411 ps |
| CPU time | 56.74 seconds |
| Started | Oct 12 04:49:22 PM UTC 24 |
| Finished | Oct 12 04:50:21 PM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042318854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.3042318854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.4162068607 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 1960450623 ps |
| CPU time | 17.12 seconds |
| Started | Oct 12 04:49:22 PM UTC 24 |
| Finished | Oct 12 04:49:41 PM UTC 24 |
| Peak memory | 229184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162068607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.4162068607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.4014327986 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 270133765 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 04:49:22 PM UTC 24 |
| Finished | Oct 12 04:49:25 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014327986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.4014327986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.2070809521 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 193653027 ps |
| CPU time | 1.61 seconds |
| Started | Oct 12 04:49:25 PM UTC 24 |
| Finished | Oct 12 04:49:28 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070809521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.2070809521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.3442429330 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 1921426012 ps |
| CPU time | 13.17 seconds |
| Started | Oct 12 04:49:25 PM UTC 24 |
| Finished | Oct 12 04:49:40 PM UTC 24 |
| Peak memory | 219296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442429330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3442429330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.4225966767 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 2511708263 ps |
| CPU time | 32.4 seconds |
| Started | Oct 12 04:49:25 PM UTC 24 |
| Finished | Oct 12 04:49:59 PM UTC 24 |
| Peak memory | 235780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225966767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.4225966767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.2983333517 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 3045424814 ps |
| CPU time | 31.03 seconds |
| Started | Oct 12 04:49:25 PM UTC 24 |
| Finished | Oct 12 04:49:58 PM UTC 24 |
| Peak memory | 229352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2983333517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.2983333517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1045509285 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 172037786 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 04:49:28 PM UTC 24 |
| Finished | Oct 12 04:49:31 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045509285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1045509285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.921012417 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 201058591 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:49:31 PM UTC 24 |
| Finished | Oct 12 04:49:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921012417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.921012417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.883222223 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 188363656 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:49:31 PM UTC 24 |
| Finished | Oct 12 04:49:34 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883222223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_nak_trans.883222223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.3339232785 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 179657432 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:49:31 PM UTC 24 |
| Finished | Oct 12 04:49:34 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339232785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.3339232785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.3769083272 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 159840403 ps |
| CPU time | 1.34 seconds |
| Started | Oct 12 04:49:31 PM UTC 24 |
| Finished | Oct 12 04:49:34 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769083272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.3769083272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.2943060911 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 171159602 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:49:35 PM UTC 24 |
| Finished | Oct 12 04:49:37 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943060911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.2943060911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.1939881424 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 150385167 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:49:35 PM UTC 24 |
| Finished | Oct 12 04:49:37 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939881424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.1939881424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.1437619128 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 260078122 ps |
| CPU time | 1.65 seconds |
| Started | Oct 12 04:49:35 PM UTC 24 |
| Finished | Oct 12 04:49:38 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437619128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.1437619128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.1216564263 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 159709254 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 04:49:35 PM UTC 24 |
| Finished | Oct 12 04:49:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216564263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.1216564263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3306466630 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 41795772 ps |
| CPU time | 0.92 seconds |
| Started | Oct 12 04:49:35 PM UTC 24 |
| Finished | Oct 12 04:49:37 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306466630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3306466630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.576417660 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 13100194767 ps |
| CPU time | 38.17 seconds |
| Started | Oct 12 04:49:40 PM UTC 24 |
| Finished | Oct 12 04:50:20 PM UTC 24 |
| Peak memory | 233480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576417660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.576417660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.68417944 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 172491015 ps |
| CPU time | 1.55 seconds |
| Started | Oct 12 04:49:40 PM UTC 24 |
| Finished | Oct 12 04:49:43 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68417944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_received.68417944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.1470718562 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 181235759 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:49:40 PM UTC 24 |
| Finished | Oct 12 04:49:43 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470718562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.1470718562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.1341403549 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 13765423284 ps |
| CPU time | 78.56 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:51:02 PM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341403549 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.1341403549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.3825894043 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 10169409301 ps |
| CPU time | 175.07 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:52:39 PM UTC 24 |
| Peak memory | 233104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825894043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.3825894043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.3433021092 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 9798592324 ps |
| CPU time | 52.47 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:50:35 PM UTC 24 |
| Peak memory | 236088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433021092 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3433021092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.1980978938 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 231490774 ps |
| CPU time | 1.5 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:49:43 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980978938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.1980978938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.1867985798 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 159440316 ps |
| CPU time | 1.11 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:49:43 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867985798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.1867985798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.2926926242 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 20154699873 ps |
| CPU time | 29.1 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:50:12 PM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926926242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.2926926242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.3173040583 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 182520378 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:49:44 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173040583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.3173040583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.2965183241 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 250533260 ps |
| CPU time | 1.94 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:49:44 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965183241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.2965183241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.2912456417 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 162415685 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:49:41 PM UTC 24 |
| Finished | Oct 12 04:49:44 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912456417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.2912456417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.4054248824 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 148390615 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:49:48 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054248824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.4054248824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.519832306 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 225663561 ps |
| CPU time | 1.17 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:49:48 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=519832306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.519832306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.3339845816 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 2393174638 ps |
| CPU time | 21.84 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:50:09 PM UTC 24 |
| Peak memory | 231684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339845816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.3339845816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.2399052537 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 185594237 ps |
| CPU time | 1.6 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:49:48 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399052537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.2399052537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.3894660091 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 186951639 ps |
| CPU time | 1.63 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:49:48 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894660091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.3894660091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.2012724538 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 1389584933 ps |
| CPU time | 3.42 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:49:50 PM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012724538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.2012724538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.455505022 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 4121874882 ps |
| CPU time | 39.32 seconds |
| Started | Oct 12 04:49:45 PM UTC 24 |
| Finished | Oct 12 04:50:27 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455505022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_streaming_out.455505022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.3976525454 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 11758321689 ps |
| CPU time | 287.74 seconds |
| Started | Oct 12 04:49:46 PM UTC 24 |
| Finished | Oct 12 04:54:38 PM UTC 24 |
| Peak memory | 232896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976525454 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.3976525454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.4033595980 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 2426868332 ps |
| CPU time | 21.78 seconds |
| Started | Oct 12 04:49:05 PM UTC 24 |
| Finished | Oct 12 04:49:28 PM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033595980 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.4033595980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.3281370241 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 564244704 ps |
| CPU time | 2.75 seconds |
| Started | Oct 12 04:49:46 PM UTC 24 |
| Finished | Oct 12 04:49:50 PM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3281370241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.3281370241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.2065980613 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 274631967 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065980613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.2065980613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.2578217811 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 600117081 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2578217811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.2578217811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.2365570207 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 426858022 ps |
| CPU time | 1.13 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365570207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.2365570207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.893391851 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 304541868 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=893391851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 81.usbdev_fifo_levels.893391851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3977313831 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 512544068 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3977313831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.3977313831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.2027867792 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 167152704 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2027867792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.2027867792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.90218317 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 262694909 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90218317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 82.usbdev_fifo_levels.90218317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.528907813 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 536150782 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=528907813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_tx _rx_disruption.528907813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3661128503 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 184228326 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661128503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.3661128503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3055497277 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 310347545 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055497277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.3055497277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.1460754779 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 646619561 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1460754779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.1460754779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.1306192585 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 276658360 ps |
| CPU time | 0.95 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306192585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.1306192585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.4182495425 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 154199268 ps |
| CPU time | 0.76 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:24 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182495425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.4182495425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.697681405 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 536501085 ps |
| CPU time | 1.48 seconds |
| Started | Oct 12 05:23:22 PM UTC 24 |
| Finished | Oct 12 05:23:25 PM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=697681405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_tx _rx_disruption.697681405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3492280213 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 215281440 ps |
| CPU time | 0.88 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492280213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3492280213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.3002689801 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 281603751 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002689801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.3002689801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.2658982001 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 561918259 ps |
| CPU time | 1.53 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2658982001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.2658982001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1140207107 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 442324394 ps |
| CPU time | 1.23 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140207107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.1140207107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2947165018 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 244128719 ps |
| CPU time | 1.07 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947165018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.2947165018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3318406061 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 549520265 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3318406061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.3318406061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.2775513967 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 496317837 ps |
| CPU time | 1.59 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775513967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.2775513967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1954229635 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 254852017 ps |
| CPU time | 1.01 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954229635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.1954229635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1066747775 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 602533382 ps |
| CPU time | 1.54 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1066747775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.1066747775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.4287558212 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 162468894 ps |
| CPU time | 0.83 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287558212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.4287558212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.3094961318 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 262990328 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:28 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094961318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.3094961318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.774706639 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 660061976 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=774706639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_tx _rx_disruption.774706639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.3791108762 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 275377502 ps |
| CPU time | 0.99 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791108762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.3791108762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.2033505506 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 293212527 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033505506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.2033505506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2027925063 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 555366349 ps |
| CPU time | 1.52 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2027925063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.2027925063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.633792163 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 64499458 ps |
| CPU time | 0.82 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:42 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=633792163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.633792163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.3666171321 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 16336944542 ps |
| CPU time | 31.78 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:27 PM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666171321 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.3666171321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1376602665 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 25173209537 ps |
| CPU time | 39.23 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:34 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376602665 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1376602665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.490767723 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 161640257 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:49:56 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490767723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_av_buffer.490767723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.326628469 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 146443878 ps |
| CPU time | 1.4 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:49:56 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326628469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_bitstuff_err.326628469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.2638653756 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 210322790 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:49:57 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638653756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.2638653756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.872958938 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 753233288 ps |
| CPU time | 2.14 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:49:57 PM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872958938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.872958938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.1830846766 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 15757814572 ps |
| CPU time | 33.93 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:29 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830846766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1830846766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.4086805937 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 1404852751 ps |
| CPU time | 33.11 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:28 PM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086805937 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.4086805937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.2551314543 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 490676749 ps |
| CPU time | 2.66 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:49:58 PM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551314543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.2551314543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.2729687514 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 148568698 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:49:58 PM UTC 24 |
| Finished | Oct 12 04:50:01 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729687514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.2729687514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1070583563 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 49870071 ps |
| CPU time | 1.1 seconds |
| Started | Oct 12 04:49:58 PM UTC 24 |
| Finished | Oct 12 04:50:00 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070583563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1070583563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.2853222088 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 912948916 ps |
| CPU time | 4.33 seconds |
| Started | Oct 12 04:49:58 PM UTC 24 |
| Finished | Oct 12 04:50:04 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853222088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.2853222088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.957796661 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 212746734 ps |
| CPU time | 1.67 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:06 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=957796661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.957796661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.1514267431 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 210533431 ps |
| CPU time | 1.7 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:06 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514267431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.1514267431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.2567274687 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 229423392 ps |
| CPU time | 3.56 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:08 PM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567274687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.2567274687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.2893011090 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 213340146 ps |
| CPU time | 1.95 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:06 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893011090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.2893011090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2243759279 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 145012302 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:06 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243759279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.2243759279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.1293180392 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 235427830 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:06 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293180392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.1293180392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.4141646369 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 2948590751 ps |
| CPU time | 75.86 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:51:21 PM UTC 24 |
| Peak memory | 236120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141646369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.4141646369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.3574476999 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 7582033898 ps |
| CPU time | 53.2 seconds |
| Started | Oct 12 04:50:03 PM UTC 24 |
| Finished | Oct 12 04:50:58 PM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574476999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.3574476999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.854347964 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 194336557 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:50:06 PM UTC 24 |
| Finished | Oct 12 04:50:08 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854347964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_link_in_err.854347964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.3796273426 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 9194188459 ps |
| CPU time | 20.27 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:50:32 PM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796273426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.3796273426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.457238660 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 6338053144 ps |
| CPU time | 18.93 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:50:31 PM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457238660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_suspend.457238660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4192308420 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 3847301219 ps |
| CPU time | 31.32 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:50:44 PM UTC 24 |
| Peak memory | 231440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192308420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.4192308420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.1421412298 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 2254988926 ps |
| CPU time | 61.81 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:51:14 PM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421412298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1421412298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.2272019433 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 250172274 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:50:13 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272019433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.2272019433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.2403894706 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 191609361 ps |
| CPU time | 1.56 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:50:13 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403894706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2403894706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.4081598355 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 3182115486 ps |
| CPU time | 84.6 seconds |
| Started | Oct 12 04:50:11 PM UTC 24 |
| Finished | Oct 12 04:51:37 PM UTC 24 |
| Peak memory | 236024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081598355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.4081598355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1436625835 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 3142968324 ps |
| CPU time | 29.34 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:45 PM UTC 24 |
| Peak memory | 235936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436625835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1436625835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.2480086144 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 3220112021 ps |
| CPU time | 25.66 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:42 PM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480086144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.2480086144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.1694651511 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 169970691 ps |
| CPU time | 1.57 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:17 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694651511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.1694651511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.85117106 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 150184306 ps |
| CPU time | 1.41 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:17 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85117106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.85117106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.101699029 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 170544835 ps |
| CPU time | 1.45 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:17 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=101699029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_nak_trans.101699029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.1460295083 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 184943765 ps |
| CPU time | 1.49 seconds |
| Started | Oct 12 04:50:15 PM UTC 24 |
| Finished | Oct 12 04:50:18 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460295083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.1460295083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.168365310 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 156322557 ps |
| CPU time | 1.43 seconds |
| Started | Oct 12 04:50:21 PM UTC 24 |
| Finished | Oct 12 04:50:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168365310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_out_stall.168365310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.580221326 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 197546471 ps |
| CPU time | 1.58 seconds |
| Started | Oct 12 04:50:21 PM UTC 24 |
| Finished | Oct 12 04:50:23 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580221326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_out_trans_nak.580221326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.3213546158 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 170021389 ps |
| CPU time | 1.46 seconds |
| Started | Oct 12 04:50:21 PM UTC 24 |
| Finished | Oct 12 04:50:23 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213546158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.3213546158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.2250197010 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 237824525 ps |
| CPU time | 1.72 seconds |
| Started | Oct 12 04:50:21 PM UTC 24 |
| Finished | Oct 12 04:50:23 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250197010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.2250197010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3498273216 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 139711331 ps |
| CPU time | 1.39 seconds |
| Started | Oct 12 04:50:24 PM UTC 24 |
| Finished | Oct 12 04:50:26 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498273216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.3498273216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.2403066895 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 63891960 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 04:50:24 PM UTC 24 |
| Finished | Oct 12 04:50:26 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403066895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.2403066895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1262943839 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 22023439281 ps |
| CPU time | 68.53 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:51:39 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262943839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1262943839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1125314545 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 256015826 ps |
| CPU time | 1.71 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1125314545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1125314545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.683049995 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 217035349 ps |
| CPU time | 1.3 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:31 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683049995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_pkt_sent.683049995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3408595744 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 10569363784 ps |
| CPU time | 65.75 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:51:37 PM UTC 24 |
| Peak memory | 235872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408595744 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3408595744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.2701674402 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 7220361680 ps |
| CPU time | 31.58 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:51:02 PM UTC 24 |
| Peak memory | 235912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701674402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.2701674402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1160974476 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 5833245498 ps |
| CPU time | 27.52 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:58 PM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160974476 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.1160974476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.2437642272 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 200709464 ps |
| CPU time | 1.66 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:32 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437642272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.2437642272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.2487465640 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 183114755 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:32 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487465640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.2487465640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.3504775080 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 20163040042 ps |
| CPU time | 29.55 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:51:00 PM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504775080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.3504775080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3846683447 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 148369781 ps |
| CPU time | 1.12 seconds |
| Started | Oct 12 04:50:29 PM UTC 24 |
| Finished | Oct 12 04:50:32 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846683447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.3846683447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.1324113813 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 348918792 ps |
| CPU time | 2.47 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:37 PM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324113813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.1324113813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.3383648312 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 151177357 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:36 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383648312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.3383648312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.354363866 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 168131953 ps |
| CPU time | 1.28 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:36 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354363866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_setup_trans_ignored.354363866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2689305277 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 241419185 ps |
| CPU time | 1.79 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:37 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689305277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2689305277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.3971583384 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 1920869684 ps |
| CPU time | 18.5 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:54 PM UTC 24 |
| Peak memory | 235912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971583384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.3971583384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.3916528730 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 186536569 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:36 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916528730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.3916528730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.3066332549 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 193175434 ps |
| CPU time | 1.27 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:36 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066332549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.3066332549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3830603480 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 549782093 ps |
| CPU time | 1.75 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:37 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830603480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3830603480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.3113620226 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 2089275250 ps |
| CPU time | 15.07 seconds |
| Started | Oct 12 04:50:34 PM UTC 24 |
| Finished | Oct 12 04:50:50 PM UTC 24 |
| Peak memory | 235764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113620226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.3113620226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.789547737 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 7031303030 ps |
| CPU time | 32.68 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:51:14 PM UTC 24 |
| Peak memory | 231672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789547737 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.789547737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.2366067425 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 6471363663 ps |
| CPU time | 38.43 seconds |
| Started | Oct 12 04:49:54 PM UTC 24 |
| Finished | Oct 12 04:50:34 PM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366067425 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.2366067425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.1484947454 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 531064395 ps |
| CPU time | 2.23 seconds |
| Started | Oct 12 04:50:40 PM UTC 24 |
| Finished | Oct 12 04:50:43 PM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1484947454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.1484947454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.375315753 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 433473133 ps |
| CPU time | 1.19 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375315753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.375315753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.128134596 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 261820224 ps |
| CPU time | 1.02 seconds |
| Started | Oct 12 05:24:26 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=128134596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 90.usbdev_fifo_levels.128134596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.1396790918 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 657065130 ps |
| CPU time | 1.76 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396790918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.1396790918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3477494013 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 255733172 ps |
| CPU time | 1.05 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477494013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.3477494013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.2608456160 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 475827990 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2608456160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.2608456160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.340793788 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 273237048 ps |
| CPU time | 1.08 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340793788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 92.usbdev_fifo_levels.340793788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3285098429 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 392830374 ps |
| CPU time | 1.25 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285098429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.3285098429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.2166670991 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 278584259 ps |
| CPU time | 0.97 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166670991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.2166670991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.3611395021 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 455478812 ps |
| CPU time | 1.36 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3611395021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.3611395021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2218618720 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 608731042 ps |
| CPU time | 1.51 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218618720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2218618720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3872384814 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 261578389 ps |
| CPU time | 1.06 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872384814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.3872384814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.3800005784 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 557306278 ps |
| CPU time | 1.47 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3800005784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.3800005784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3821285524 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 366558685 ps |
| CPU time | 1.15 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821285524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.3821285524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.2243239337 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 264478453 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243239337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.2243239337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.969243052 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 708676384 ps |
| CPU time | 1.99 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=969243052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_tx _rx_disruption.969243052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.93851035 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 397685646 ps |
| CPU time | 1.14 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93851035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.93851035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2514775994 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 280524697 ps |
| CPU time | 1.03 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514775994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.2514775994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.4135071012 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 429486745 ps |
| CPU time | 1.37 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4135071012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.4135071012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3327063623 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 193929559 ps |
| CPU time | 0.91 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:29 PM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327063623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.3327063623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.2726286486 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 497038418 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2726286486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.2726286486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.575599055 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 255311773 ps |
| CPU time | 1 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=575599055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.575599055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.701629167 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 323892271 ps |
| CPU time | 1.09 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701629167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.701629167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2919341452 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 495449910 ps |
| CPU time | 1.42 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2919341452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.2919341452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.1830848517 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 453643137 ps |
| CPU time | 1.35 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830848517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.1830848517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.656010711 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 254919051 ps |
| CPU time | 1.04 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656010711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 99.usbdev_fifo_levels.656010711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1817919443 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 613482289 ps |
| CPU time | 1.69 seconds |
| Started | Oct 12 05:24:27 PM UTC 24 |
| Finished | Oct 12 05:24:30 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1817919443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.1817919443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |