| T309 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.577897232 |
|
|
Feb 18 03:51:52 PM PST 24 |
Feb 18 04:06:26 PM PST 24 |
4880548700 ps |
| T755 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2760180095 |
|
|
Feb 18 04:23:43 PM PST 24 |
Feb 18 04:31:09 PM PST 24 |
3237734862 ps |
| T947 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.186318602 |
|
|
Feb 18 04:14:22 PM PST 24 |
Feb 18 04:25:09 PM PST 24 |
4502811340 ps |
| T948 |
/workspace/coverage/default/1.chip_sw_example_flash.325459989 |
|
|
Feb 18 03:57:18 PM PST 24 |
Feb 18 04:00:40 PM PST 24 |
2909043704 ps |
| T147 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2802173683 |
|
|
Feb 18 04:02:03 PM PST 24 |
Feb 18 04:59:24 PM PST 24 |
18847906596 ps |
| T662 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3878002993 |
|
|
Feb 18 03:55:46 PM PST 24 |
Feb 18 04:55:57 PM PST 24 |
24548969797 ps |
| T194 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3529065397 |
|
|
Feb 18 03:53:49 PM PST 24 |
Feb 18 05:28:56 PM PST 24 |
46193686202 ps |
| T319 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4094389506 |
|
|
Feb 18 04:05:55 PM PST 24 |
Feb 18 04:23:58 PM PST 24 |
6764983173 ps |
| T949 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.1097795888 |
|
|
Feb 18 03:59:41 PM PST 24 |
Feb 18 05:10:01 PM PST 24 |
23110420562 ps |
| T771 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.3711012998 |
|
|
Feb 18 04:20:35 PM PST 24 |
Feb 18 04:30:44 PM PST 24 |
4907848730 ps |
| T326 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.1056659258 |
|
|
Feb 18 04:19:10 PM PST 24 |
Feb 18 04:29:00 PM PST 24 |
5537298492 ps |
| T138 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.2422968840 |
|
|
Feb 18 04:02:39 PM PST 24 |
Feb 18 04:14:40 PM PST 24 |
6943935156 ps |
| T310 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2500951310 |
|
|
Feb 18 04:18:16 PM PST 24 |
Feb 18 04:54:13 PM PST 24 |
13126576960 ps |
| T127 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2934306863 |
|
|
Feb 18 04:08:29 PM PST 24 |
Feb 18 04:15:20 PM PST 24 |
5320613075 ps |
| T155 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1713934560 |
|
|
Feb 18 03:55:40 PM PST 24 |
Feb 18 04:04:39 PM PST 24 |
2932729120 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3098219197 |
|
|
Feb 18 03:56:10 PM PST 24 |
Feb 18 03:59:50 PM PST 24 |
2942971364 ps |
| T951 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3968803721 |
|
|
Feb 18 04:01:05 PM PST 24 |
Feb 18 04:38:33 PM PST 24 |
8561117694 ps |
| T952 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.3501912261 |
|
|
Feb 18 03:59:52 PM PST 24 |
Feb 18 04:26:52 PM PST 24 |
7563646750 ps |
| T772 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.3656946642 |
|
|
Feb 18 04:20:28 PM PST 24 |
Feb 18 04:25:51 PM PST 24 |
3392700708 ps |
| T712 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.948163687 |
|
|
Feb 18 03:53:50 PM PST 24 |
Feb 18 04:38:58 PM PST 24 |
21690247927 ps |
| T144 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.4271494557 |
|
|
Feb 18 04:06:13 PM PST 24 |
Feb 18 05:16:35 PM PST 24 |
22830226826 ps |
| T953 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.1650039611 |
|
|
Feb 18 04:04:37 PM PST 24 |
Feb 18 04:37:15 PM PST 24 |
9177856346 ps |
| T208 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2462686410 |
|
|
Feb 18 03:54:46 PM PST 24 |
Feb 18 04:04:59 PM PST 24 |
5498612916 ps |
| T278 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3336226162 |
|
|
Feb 18 04:20:49 PM PST 24 |
Feb 18 04:26:57 PM PST 24 |
4114750412 ps |
| T954 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2843496343 |
|
|
Feb 18 04:02:35 PM PST 24 |
Feb 18 04:50:41 PM PST 24 |
24118629904 ps |
| T955 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.1923218145 |
|
|
Feb 18 04:02:52 PM PST 24 |
Feb 18 04:07:19 PM PST 24 |
2816317679 ps |
| T86 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.95200640 |
|
|
Feb 18 04:11:34 PM PST 24 |
Feb 18 04:17:18 PM PST 24 |
3384513103 ps |
| T342 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.1446922091 |
|
|
Feb 18 04:24:31 PM PST 24 |
Feb 18 04:29:34 PM PST 24 |
3505382270 ps |
| T142 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3185720584 |
|
|
Feb 18 03:57:12 PM PST 24 |
Feb 18 04:08:33 PM PST 24 |
10453437900 ps |
| T956 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.1976678581 |
|
|
Feb 18 04:08:37 PM PST 24 |
Feb 18 04:15:40 PM PST 24 |
5467344824 ps |
| T957 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2774322718 |
|
|
Feb 18 04:02:01 PM PST 24 |
Feb 18 04:37:46 PM PST 24 |
8844242306 ps |
| T958 |
/workspace/coverage/default/0.chip_sw_kmac_idle.3769336056 |
|
|
Feb 18 03:56:59 PM PST 24 |
Feb 18 04:01:08 PM PST 24 |
2989570576 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.823972556 |
|
|
Feb 18 04:13:52 PM PST 24 |
Feb 18 04:18:15 PM PST 24 |
3374194648 ps |
| T11 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3825388115 |
|
|
Feb 18 04:07:55 PM PST 24 |
Feb 18 04:12:23 PM PST 24 |
3333077772 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1609415612 |
|
|
Feb 18 03:53:56 PM PST 24 |
Feb 18 04:03:48 PM PST 24 |
8051966096 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3533358254 |
|
|
Feb 18 04:13:43 PM PST 24 |
Feb 18 04:23:21 PM PST 24 |
7123623878 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.3857646748 |
|
|
Feb 18 03:59:46 PM PST 24 |
Feb 18 04:22:38 PM PST 24 |
7817123830 ps |
| T343 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.947273581 |
|
|
Feb 18 04:20:58 PM PST 24 |
Feb 18 04:26:47 PM PST 24 |
3868117420 ps |
| T228 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1135973123 |
|
|
Feb 18 04:06:29 PM PST 24 |
Feb 18 04:15:28 PM PST 24 |
4403420002 ps |
| T143 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3482332059 |
|
|
Feb 18 04:00:55 PM PST 24 |
Feb 18 04:11:40 PM PST 24 |
18885725716 ps |
| T963 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2394545425 |
|
|
Feb 18 04:01:52 PM PST 24 |
Feb 18 04:05:36 PM PST 24 |
2994032024 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1271756448 |
|
|
Feb 18 03:56:06 PM PST 24 |
Feb 18 04:04:01 PM PST 24 |
4126006808 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2342968156 |
|
|
Feb 18 03:55:47 PM PST 24 |
Feb 18 04:04:13 PM PST 24 |
4287120263 ps |
| T965 |
/workspace/coverage/default/2.chip_tap_straps_rma.1987582649 |
|
|
Feb 18 04:14:35 PM PST 24 |
Feb 18 04:27:24 PM PST 24 |
7760983247 ps |
| T966 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.2579140855 |
|
|
Feb 18 04:18:16 PM PST 24 |
Feb 18 04:35:22 PM PST 24 |
5840651832 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1938655884 |
|
|
Feb 18 04:11:08 PM PST 24 |
Feb 18 04:19:02 PM PST 24 |
18080062368 ps |
| T967 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1174508338 |
|
|
Feb 18 04:00:30 PM PST 24 |
Feb 18 04:18:11 PM PST 24 |
5718905492 ps |
| T132 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.3483004196 |
|
|
Feb 18 03:58:45 PM PST 24 |
Feb 18 04:03:14 PM PST 24 |
3638484018 ps |
| T968 |
/workspace/coverage/default/1.rom_e2e_smoke.1901261740 |
|
|
Feb 18 04:07:00 PM PST 24 |
Feb 18 04:37:59 PM PST 24 |
8993826160 ps |
| T969 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1408738914 |
|
|
Feb 18 04:16:54 PM PST 24 |
Feb 18 04:29:09 PM PST 24 |
4958005827 ps |
| T722 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2947495444 |
|
|
Feb 18 04:21:16 PM PST 24 |
Feb 18 04:27:08 PM PST 24 |
3540078760 ps |
| T970 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.1675788607 |
|
|
Feb 18 04:01:18 PM PST 24 |
Feb 18 04:09:13 PM PST 24 |
5479097076 ps |
| T829 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2272967210 |
|
|
Feb 18 03:55:09 PM PST 24 |
Feb 18 04:00:41 PM PST 24 |
3235887128 ps |
| T971 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.2974627803 |
|
|
Feb 18 04:00:13 PM PST 24 |
Feb 18 04:14:59 PM PST 24 |
7417175432 ps |
| T256 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.3513064676 |
|
|
Feb 18 04:01:23 PM PST 24 |
Feb 18 04:34:27 PM PST 24 |
9094760682 ps |
| T749 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.410377431 |
|
|
Feb 18 04:22:57 PM PST 24 |
Feb 18 04:28:30 PM PST 24 |
4016443492 ps |
| T743 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.1818482141 |
|
|
Feb 18 04:20:57 PM PST 24 |
Feb 18 04:27:05 PM PST 24 |
3809690120 ps |
| T213 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2854140568 |
|
|
Feb 18 03:54:44 PM PST 24 |
Feb 18 04:55:26 PM PST 24 |
13817945240 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.1439267899 |
|
|
Feb 18 03:53:30 PM PST 24 |
Feb 18 04:18:07 PM PST 24 |
7854873240 ps |
| T705 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3744214345 |
|
|
Feb 18 04:10:30 PM PST 24 |
Feb 18 04:33:05 PM PST 24 |
8743749472 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.875030077 |
|
|
Feb 18 03:58:03 PM PST 24 |
Feb 18 04:10:04 PM PST 24 |
6525485485 ps |
| T741 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3359027511 |
|
|
Feb 18 04:19:05 PM PST 24 |
Feb 18 04:24:43 PM PST 24 |
3621567702 ps |
| T747 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.3114071660 |
|
|
Feb 18 04:05:03 PM PST 24 |
Feb 18 04:11:50 PM PST 24 |
3149056884 ps |
| T695 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.2650142733 |
|
|
Feb 18 04:09:47 PM PST 24 |
Feb 18 04:13:13 PM PST 24 |
2973194550 ps |
| T973 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2645241795 |
|
|
Feb 18 04:05:45 PM PST 24 |
Feb 18 04:09:52 PM PST 24 |
2852936850 ps |
| T759 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.3667309025 |
|
|
Feb 18 03:55:31 PM PST 24 |
Feb 18 04:00:37 PM PST 24 |
3011721024 ps |
| T257 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.720548457 |
|
|
Feb 18 03:54:10 PM PST 24 |
Feb 18 04:04:29 PM PST 24 |
8239165517 ps |
| T738 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.3935836103 |
|
|
Feb 18 04:27:05 PM PST 24 |
Feb 18 04:35:40 PM PST 24 |
5098948306 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3069974324 |
|
|
Feb 18 03:59:09 PM PST 24 |
Feb 18 04:05:48 PM PST 24 |
5707331308 ps |
| T28 |
/workspace/coverage/default/1.chip_sw_gpio.1076205672 |
|
|
Feb 18 03:59:31 PM PST 24 |
Feb 18 04:07:49 PM PST 24 |
4479215884 ps |
| T354 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1136850391 |
|
|
Feb 18 04:22:22 PM PST 24 |
Feb 18 04:29:38 PM PST 24 |
3788113500 ps |
| T974 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.545277163 |
|
|
Feb 18 04:17:10 PM PST 24 |
Feb 18 04:32:59 PM PST 24 |
9225126592 ps |
| T975 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.161572947 |
|
|
Feb 18 04:11:15 PM PST 24 |
Feb 18 04:15:47 PM PST 24 |
3338752576 ps |
| T752 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.4005326135 |
|
|
Feb 18 04:23:50 PM PST 24 |
Feb 18 04:29:24 PM PST 24 |
3786153816 ps |
| T976 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.1498932549 |
|
|
Feb 18 04:03:56 PM PST 24 |
Feb 18 04:36:22 PM PST 24 |
8335634040 ps |
| T977 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3826574088 |
|
|
Feb 18 04:05:46 PM PST 24 |
Feb 18 04:11:27 PM PST 24 |
3609680500 ps |
| T229 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.3175696768 |
|
|
Feb 18 04:10:57 PM PST 24 |
Feb 18 04:19:31 PM PST 24 |
3576968546 ps |
| T671 |
/workspace/coverage/default/1.chip_tap_straps_dev.1611790372 |
|
|
Feb 18 04:04:43 PM PST 24 |
Feb 18 04:27:27 PM PST 24 |
13233165192 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_kmac_idle.4003085164 |
|
|
Feb 18 04:14:14 PM PST 24 |
Feb 18 04:20:38 PM PST 24 |
2899066768 ps |
| T979 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.937476629 |
|
|
Feb 18 04:09:24 PM PST 24 |
Feb 18 04:17:24 PM PST 24 |
6505486080 ps |
| T47 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1594894949 |
|
|
Feb 18 03:57:10 PM PST 24 |
Feb 18 04:19:16 PM PST 24 |
12197751918 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.3645138951 |
|
|
Feb 18 04:01:36 PM PST 24 |
Feb 18 04:18:21 PM PST 24 |
5919603000 ps |
| T805 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.2262257903 |
|
|
Feb 18 04:21:26 PM PST 24 |
Feb 18 04:31:54 PM PST 24 |
4711089480 ps |
| T162 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3278525410 |
|
|
Feb 18 04:19:05 PM PST 24 |
Feb 18 04:31:06 PM PST 24 |
5455475248 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.3636615627 |
|
|
Feb 18 04:07:52 PM PST 24 |
Feb 18 04:25:03 PM PST 24 |
4691472296 ps |
| T675 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.458309413 |
|
|
Feb 18 03:59:14 PM PST 24 |
Feb 18 04:00:57 PM PST 24 |
1656815849 ps |
| T663 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.3102397179 |
|
|
Feb 18 04:14:28 PM PST 24 |
Feb 18 05:10:10 PM PST 24 |
24976433341 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2137390980 |
|
|
Feb 18 03:58:30 PM PST 24 |
Feb 18 04:07:32 PM PST 24 |
4779602728 ps |
| T788 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.2714640225 |
|
|
Feb 18 04:24:13 PM PST 24 |
Feb 18 04:34:33 PM PST 24 |
4641601910 ps |
| T328 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2540836373 |
|
|
Feb 18 03:57:54 PM PST 24 |
Feb 18 04:07:03 PM PST 24 |
18239919840 ps |
| T982 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.3289353099 |
|
|
Feb 18 03:58:26 PM PST 24 |
Feb 18 04:03:25 PM PST 24 |
3230401934 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3815224402 |
|
|
Feb 18 03:55:04 PM PST 24 |
Feb 18 04:01:20 PM PST 24 |
6540149590 ps |
| T983 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3493939333 |
|
|
Feb 18 04:17:51 PM PST 24 |
Feb 18 04:53:24 PM PST 24 |
13138424176 ps |
| T984 |
/workspace/coverage/default/0.rom_keymgr_functest.3377882540 |
|
|
Feb 18 03:57:23 PM PST 24 |
Feb 18 04:07:05 PM PST 24 |
4683816150 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1880373041 |
|
|
Feb 18 04:13:28 PM PST 24 |
Feb 18 04:20:45 PM PST 24 |
3591399693 ps |
| T746 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.2106544815 |
|
|
Feb 18 04:24:03 PM PST 24 |
Feb 18 04:32:53 PM PST 24 |
4422099832 ps |
| T756 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3417319897 |
|
|
Feb 18 04:23:57 PM PST 24 |
Feb 18 04:30:10 PM PST 24 |
3330443912 ps |
| T732 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1421340687 |
|
|
Feb 18 04:17:30 PM PST 24 |
Feb 18 04:24:07 PM PST 24 |
3485076810 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.819482604 |
|
|
Feb 18 04:06:25 PM PST 24 |
Feb 18 04:14:15 PM PST 24 |
4546916392 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.400795074 |
|
|
Feb 18 04:04:58 PM PST 24 |
Feb 18 04:07:11 PM PST 24 |
2194994660 ps |
| T988 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1716481784 |
|
|
Feb 18 04:03:18 PM PST 24 |
Feb 18 04:06:48 PM PST 24 |
2589212600 ps |
| T989 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1544505110 |
|
|
Feb 18 04:02:06 PM PST 24 |
Feb 18 04:48:40 PM PST 24 |
37540193990 ps |
| T730 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.513350731 |
|
|
Feb 18 04:24:06 PM PST 24 |
Feb 18 04:35:33 PM PST 24 |
6256742378 ps |
| T990 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3893487618 |
|
|
Feb 18 03:57:17 PM PST 24 |
Feb 18 04:01:27 PM PST 24 |
2680363618 ps |
| T8 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.3368542172 |
|
|
Feb 18 04:10:47 PM PST 24 |
Feb 18 04:15:17 PM PST 24 |
2774525887 ps |
| T400 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1810648214 |
|
|
Feb 18 04:02:40 PM PST 24 |
Feb 18 04:06:12 PM PST 24 |
2678430940 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1481070253 |
|
|
Feb 18 03:54:30 PM PST 24 |
Feb 18 04:18:17 PM PST 24 |
9442144830 ps |
| T991 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.2982039554 |
|
|
Feb 18 03:58:59 PM PST 24 |
Feb 18 04:34:51 PM PST 24 |
32463981138 ps |
| T728 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.3454417977 |
|
|
Feb 18 03:51:43 PM PST 24 |
Feb 18 03:59:58 PM PST 24 |
4758268728 ps |
| T329 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.1261392102 |
|
|
Feb 18 04:00:59 PM PST 24 |
Feb 18 04:09:23 PM PST 24 |
4351088124 ps |
| T744 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2070083335 |
|
|
Feb 18 04:21:13 PM PST 24 |
Feb 18 04:27:19 PM PST 24 |
2908642014 ps |
| T992 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1692410680 |
|
|
Feb 18 04:21:37 PM PST 24 |
Feb 18 04:47:36 PM PST 24 |
8379373712 ps |
| T810 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.808944971 |
|
|
Feb 18 04:22:38 PM PST 24 |
Feb 18 04:28:21 PM PST 24 |
3340246776 ps |
| T753 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1180822181 |
|
|
Feb 18 04:20:01 PM PST 24 |
Feb 18 04:28:56 PM PST 24 |
5767804388 ps |
| T993 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.2935668188 |
|
|
Feb 18 03:53:01 PM PST 24 |
Feb 18 04:00:00 PM PST 24 |
4668018180 ps |
| T994 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3085769089 |
|
|
Feb 18 03:58:11 PM PST 24 |
Feb 18 04:15:57 PM PST 24 |
5652929772 ps |
| T766 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.4016593949 |
|
|
Feb 18 04:24:13 PM PST 24 |
Feb 18 04:28:29 PM PST 24 |
3241607930 ps |
| T995 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.2261900937 |
|
|
Feb 18 03:54:27 PM PST 24 |
Feb 18 04:15:15 PM PST 24 |
6077395550 ps |
| T742 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1080803233 |
|
|
Feb 18 04:22:29 PM PST 24 |
Feb 18 04:30:54 PM PST 24 |
5336590394 ps |
| T735 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2838871116 |
|
|
Feb 18 04:21:16 PM PST 24 |
Feb 18 04:26:58 PM PST 24 |
3700562776 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2314768360 |
|
|
Feb 18 04:09:23 PM PST 24 |
Feb 18 04:28:47 PM PST 24 |
5584289680 ps |
| T760 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.253576600 |
|
|
Feb 18 04:23:24 PM PST 24 |
Feb 18 04:32:49 PM PST 24 |
5503487640 ps |
| T22 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3050907304 |
|
|
Feb 18 03:47:22 PM PST 24 |
Feb 18 04:26:39 PM PST 24 |
21458455540 ps |
| T811 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.551192373 |
|
|
Feb 18 04:24:19 PM PST 24 |
Feb 18 04:31:42 PM PST 24 |
4690778052 ps |
| T737 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.1470474866 |
|
|
Feb 18 04:20:08 PM PST 24 |
Feb 18 04:29:18 PM PST 24 |
4584907808 ps |
| T739 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.3662835781 |
|
|
Feb 18 04:24:38 PM PST 24 |
Feb 18 04:29:56 PM PST 24 |
3766968888 ps |
| T48 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3748910265 |
|
|
Feb 18 04:05:03 PM PST 24 |
Feb 18 04:12:24 PM PST 24 |
4841220936 ps |
| T997 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3459802427 |
|
|
Feb 18 04:06:51 PM PST 24 |
Feb 18 04:48:55 PM PST 24 |
11075539705 ps |
| T998 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3132257649 |
|
|
Feb 18 04:21:49 PM PST 24 |
Feb 18 04:29:07 PM PST 24 |
4397715480 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.472380468 |
|
|
Feb 18 04:09:54 PM PST 24 |
Feb 18 04:19:35 PM PST 24 |
7312129282 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.2060491079 |
|
|
Feb 18 03:56:58 PM PST 24 |
Feb 18 04:26:29 PM PST 24 |
8832272290 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_uart_smoketest_signed.3831738865 |
|
|
Feb 18 04:10:39 PM PST 24 |
Feb 18 04:43:39 PM PST 24 |
9452470800 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3350360027 |
|
|
Feb 18 04:10:02 PM PST 24 |
Feb 18 04:15:36 PM PST 24 |
7098821958 ps |
| T1002 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.3077792994 |
|
|
Feb 18 04:11:59 PM PST 24 |
Feb 18 04:16:45 PM PST 24 |
2606271003 ps |
| T409 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1696764782 |
|
|
Feb 18 03:54:26 PM PST 24 |
Feb 18 03:59:06 PM PST 24 |
2826635584 ps |
| T1003 |
/workspace/coverage/default/1.chip_sw_example_rom.509832620 |
|
|
Feb 18 03:58:36 PM PST 24 |
Feb 18 04:00:50 PM PST 24 |
2608467820 ps |
| T1004 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2611885959 |
|
|
Feb 18 04:02:16 PM PST 24 |
Feb 18 04:57:49 PM PST 24 |
16784714200 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.3749223453 |
|
|
Feb 18 04:00:07 PM PST 24 |
Feb 18 04:18:15 PM PST 24 |
5398782832 ps |
| T769 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.1087790731 |
|
|
Feb 18 04:19:09 PM PST 24 |
Feb 18 04:30:06 PM PST 24 |
5231642448 ps |
| T780 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.3052956447 |
|
|
Feb 18 04:22:03 PM PST 24 |
Feb 18 04:34:07 PM PST 24 |
6241693260 ps |
| T806 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3394236255 |
|
|
Feb 18 04:18:28 PM PST 24 |
Feb 18 04:27:21 PM PST 24 |
3385226348 ps |
| T299 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1624795496 |
|
|
Feb 18 04:19:38 PM PST 24 |
Feb 18 04:30:51 PM PST 24 |
4915513044 ps |
| T111 |
/workspace/coverage/default/1.rom_raw_unlock.1034917914 |
|
|
Feb 18 04:07:42 PM PST 24 |
Feb 18 04:42:33 PM PST 24 |
15249872040 ps |
| T1005 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.1192212736 |
|
|
Feb 18 04:07:30 PM PST 24 |
Feb 18 04:12:30 PM PST 24 |
2874214920 ps |
| T736 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.1913560728 |
|
|
Feb 18 04:20:59 PM PST 24 |
Feb 18 04:27:03 PM PST 24 |
3266211512 ps |
| T139 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.1017601648 |
|
|
Feb 18 04:04:57 PM PST 24 |
Feb 18 04:09:08 PM PST 24 |
2705624020 ps |
| T287 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1284625016 |
|
|
Feb 18 04:18:44 PM PST 24 |
Feb 18 04:28:06 PM PST 24 |
10948603761 ps |
| T288 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1395716310 |
|
|
Feb 18 04:04:53 PM PST 24 |
Feb 18 04:07:40 PM PST 24 |
2955824232 ps |
| T289 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3557063405 |
|
|
Feb 18 03:55:36 PM PST 24 |
Feb 18 04:15:33 PM PST 24 |
5971599384 ps |
| T290 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.2524290397 |
|
|
Feb 18 04:01:05 PM PST 24 |
Feb 18 04:10:46 PM PST 24 |
5295313594 ps |
| T291 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.507427535 |
|
|
Feb 18 04:15:51 PM PST 24 |
Feb 18 04:21:33 PM PST 24 |
2532602460 ps |
| T140 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2460920644 |
|
|
Feb 18 04:13:53 PM PST 24 |
Feb 18 04:19:52 PM PST 24 |
2602503144 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1368818106 |
|
|
Feb 18 04:19:32 PM PST 24 |
Feb 18 04:23:49 PM PST 24 |
2359389108 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.2428088502 |
|
|
Feb 18 03:57:53 PM PST 24 |
Feb 18 04:07:10 PM PST 24 |
3538909860 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3103946771 |
|
|
Feb 18 03:59:30 PM PST 24 |
Feb 18 04:16:49 PM PST 24 |
5173348976 ps |
| T298 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3008749072 |
|
|
Feb 18 04:13:14 PM PST 24 |
Feb 18 04:30:38 PM PST 24 |
6213471152 ps |
| T1006 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3546327445 |
|
|
Feb 18 03:58:42 PM PST 24 |
Feb 18 04:20:33 PM PST 24 |
5547017108 ps |
| T317 |
/workspace/coverage/default/1.chip_sival_flash_info_access.697755117 |
|
|
Feb 18 04:00:42 PM PST 24 |
Feb 18 04:08:40 PM PST 24 |
3576405304 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1215886303 |
|
|
Feb 18 04:10:50 PM PST 24 |
Feb 18 04:29:44 PM PST 24 |
5491488456 ps |
| T19 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.452047053 |
|
|
Feb 18 04:15:07 PM PST 24 |
Feb 18 04:37:41 PM PST 24 |
22545611278 ps |
| T1007 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2791907954 |
|
|
Feb 18 04:20:25 PM PST 24 |
Feb 18 04:35:12 PM PST 24 |
5729747432 ps |
| T371 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.2640367001 |
|
|
Feb 18 03:55:28 PM PST 24 |
Feb 18 03:59:14 PM PST 24 |
2373440854 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.523906373 |
|
|
Feb 18 04:07:09 PM PST 24 |
Feb 18 04:32:05 PM PST 24 |
13424882536 ps |
| T710 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.4290834161 |
|
|
Feb 18 04:11:20 PM PST 24 |
Feb 18 04:23:29 PM PST 24 |
4149400154 ps |
| T824 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.954655368 |
|
|
Feb 18 04:19:28 PM PST 24 |
Feb 18 04:29:49 PM PST 24 |
4220123610 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.246088116 |
|
|
Feb 18 04:13:18 PM PST 24 |
Feb 18 04:19:31 PM PST 24 |
3525478740 ps |
| T410 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3740771110 |
|
|
Feb 18 04:12:27 PM PST 24 |
Feb 18 04:31:13 PM PST 24 |
4759311733 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.4037835223 |
|
|
Feb 18 04:08:19 PM PST 24 |
Feb 18 04:11:28 PM PST 24 |
2497235748 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_aes_idle.1219495286 |
|
|
Feb 18 03:53:27 PM PST 24 |
Feb 18 03:57:10 PM PST 24 |
2842281288 ps |
| T267 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.2102569769 |
|
|
Feb 18 03:58:37 PM PST 24 |
Feb 18 04:13:18 PM PST 24 |
6120091916 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.455497209 |
|
|
Feb 18 03:58:08 PM PST 24 |
Feb 18 05:09:48 PM PST 24 |
23456743382 ps |
| T821 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3639774812 |
|
|
Feb 18 04:18:21 PM PST 24 |
Feb 18 04:24:10 PM PST 24 |
4035315936 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3727877135 |
|
|
Feb 18 04:09:46 PM PST 24 |
Feb 18 04:26:45 PM PST 24 |
6329001544 ps |
| T1014 |
/workspace/coverage/default/2.chip_sw_example_rom.3039904332 |
|
|
Feb 18 04:08:13 PM PST 24 |
Feb 18 04:10:16 PM PST 24 |
1938754280 ps |
| T1015 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.3228586768 |
|
|
Feb 18 04:21:51 PM PST 24 |
Feb 18 04:30:47 PM PST 24 |
4915632744 ps |
| T1016 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3193545219 |
|
|
Feb 18 04:17:56 PM PST 24 |
Feb 18 04:27:00 PM PST 24 |
6014959133 ps |
| T1017 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.1777653168 |
|
|
Feb 18 04:02:18 PM PST 24 |
Feb 18 04:05:50 PM PST 24 |
2618982448 ps |
| T1018 |
/workspace/coverage/default/0.chip_tap_straps_prod.4123862941 |
|
|
Feb 18 03:54:49 PM PST 24 |
Feb 18 03:57:28 PM PST 24 |
2453760975 ps |
| T1019 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.4209829791 |
|
|
Feb 18 04:01:56 PM PST 24 |
Feb 18 04:27:45 PM PST 24 |
6948930165 ps |
| T295 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.115742492 |
|
|
Feb 18 04:09:47 PM PST 24 |
Feb 18 04:40:12 PM PST 24 |
13169056506 ps |
| T807 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1811928524 |
|
|
Feb 18 04:19:25 PM PST 24 |
Feb 18 04:25:39 PM PST 24 |
4351512240 ps |
| T1020 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.77998291 |
|
|
Feb 18 03:55:53 PM PST 24 |
Feb 18 04:06:24 PM PST 24 |
7249695160 ps |
| T401 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.535630251 |
|
|
Feb 18 04:02:03 PM PST 24 |
Feb 18 04:10:09 PM PST 24 |
8645209270 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.4213028673 |
|
|
Feb 18 04:06:33 PM PST 24 |
Feb 18 04:10:45 PM PST 24 |
3041126914 ps |
| T733 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1528950875 |
|
|
Feb 18 04:23:19 PM PST 24 |
Feb 18 04:28:37 PM PST 24 |
3105880624 ps |
| T773 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3822441188 |
|
|
Feb 18 04:22:15 PM PST 24 |
Feb 18 04:27:00 PM PST 24 |
3677150996 ps |
| T414 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.130320475 |
|
|
Feb 18 04:08:42 PM PST 24 |
Feb 18 04:18:32 PM PST 24 |
4590618000 ps |
| T1022 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.3758346549 |
|
|
Feb 18 04:03:01 PM PST 24 |
Feb 18 04:31:50 PM PST 24 |
6600863408 ps |
| T830 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1224281384 |
|
|
Feb 18 04:22:15 PM PST 24 |
Feb 18 04:29:50 PM PST 24 |
4323688780 ps |
| T1023 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.932868979 |
|
|
Feb 18 04:02:34 PM PST 24 |
Feb 18 04:31:50 PM PST 24 |
7594659888 ps |
| T1024 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1658221633 |
|
|
Feb 18 04:02:26 PM PST 24 |
Feb 18 04:49:37 PM PST 24 |
10808294408 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1967973641 |
|
|
Feb 18 04:13:38 PM PST 24 |
Feb 18 04:18:22 PM PST 24 |
2799867644 ps |
| T304 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.3780044670 |
|
|
Feb 18 04:12:12 PM PST 24 |
Feb 18 04:40:41 PM PST 24 |
8425892908 ps |
| T815 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.553220887 |
|
|
Feb 18 04:23:09 PM PST 24 |
Feb 18 04:37:02 PM PST 24 |
6475572312 ps |
| T318 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.3433548312 |
|
|
Feb 18 04:11:18 PM PST 24 |
Feb 18 04:26:51 PM PST 24 |
5036056520 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_alert_test.3561436661 |
|
|
Feb 18 03:55:13 PM PST 24 |
Feb 18 04:00:58 PM PST 24 |
2582487176 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.563502232 |
|
|
Feb 18 04:02:48 PM PST 24 |
Feb 18 04:12:15 PM PST 24 |
4921835128 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1333100650 |
|
|
Feb 18 03:54:31 PM PST 24 |
Feb 18 04:02:32 PM PST 24 |
5376664860 ps |
| T56 |
/workspace/coverage/default/2.chip_sw_alert_test.1491118583 |
|
|
Feb 18 04:12:11 PM PST 24 |
Feb 18 04:18:56 PM PST 24 |
3451249080 ps |
| T268 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.2817644439 |
|
|
Feb 18 03:54:23 PM PST 24 |
Feb 18 04:06:39 PM PST 24 |
4902849552 ps |
| T1027 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.3904063828 |
|
|
Feb 18 04:18:05 PM PST 24 |
Feb 18 04:27:02 PM PST 24 |
6473752905 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.158981371 |
|
|
Feb 18 04:00:30 PM PST 24 |
Feb 18 04:06:24 PM PST 24 |
5193657468 ps |
| T1029 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.663413458 |
|
|
Feb 18 04:17:15 PM PST 24 |
Feb 18 04:51:06 PM PST 24 |
12961261880 ps |
| T198 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3031423536 |
|
|
Feb 18 04:09:01 PM PST 24 |
Feb 18 04:26:08 PM PST 24 |
8265137101 ps |
| T790 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3142554685 |
|
|
Feb 18 04:21:04 PM PST 24 |
Feb 18 04:26:46 PM PST 24 |
3700383946 ps |
| T187 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1398741165 |
|
|
Feb 18 03:52:05 PM PST 24 |
Feb 18 06:43:11 PM PST 24 |
57069321718 ps |
| T239 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.4095100350 |
|
|
Feb 18 04:07:49 PM PST 24 |
Feb 18 04:12:23 PM PST 24 |
3314238960 ps |
| T724 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.1845915374 |
|
|
Feb 18 04:21:03 PM PST 24 |
Feb 18 04:30:51 PM PST 24 |
5731063768 ps |
| T269 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2517756751 |
|
|
Feb 18 04:02:21 PM PST 24 |
Feb 18 04:12:03 PM PST 24 |
3877045134 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3747657486 |
|
|
Feb 18 04:03:56 PM PST 24 |
Feb 18 04:14:17 PM PST 24 |
4660350610 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.171050608 |
|
|
Feb 18 04:03:13 PM PST 24 |
Feb 18 04:12:35 PM PST 24 |
5995544120 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2955565517 |
|
|
Feb 18 04:02:27 PM PST 24 |
Feb 18 04:08:18 PM PST 24 |
4197483400 ps |
| T114 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2147279889 |
|
|
Feb 18 03:54:01 PM PST 24 |
Feb 18 04:02:57 PM PST 24 |
3595708264 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1508417852 |
|
|
Feb 18 04:08:26 PM PST 24 |
Feb 18 04:12:56 PM PST 24 |
3046943736 ps |
| T770 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2732797361 |
|
|
Feb 18 04:21:57 PM PST 24 |
Feb 18 04:30:54 PM PST 24 |
4900418136 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1395952478 |
|
|
Feb 18 04:10:41 PM PST 24 |
Feb 18 04:24:03 PM PST 24 |
7643856614 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2617320056 |
|
|
Feb 18 04:13:49 PM PST 24 |
Feb 18 04:24:54 PM PST 24 |
4976181162 ps |
| T1035 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.599491805 |
|
|
Feb 18 03:54:57 PM PST 24 |
Feb 18 04:02:53 PM PST 24 |
4886472480 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.4201727302 |
|
|
Feb 18 04:06:34 PM PST 24 |
Feb 18 04:25:55 PM PST 24 |
5765085212 ps |
| T1037 |
/workspace/coverage/default/2.rom_keymgr_functest.2214939348 |
|
|
Feb 18 04:16:38 PM PST 24 |
Feb 18 04:25:56 PM PST 24 |
5050995032 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.284261231 |
|
|
Feb 18 04:02:22 PM PST 24 |
Feb 18 04:06:23 PM PST 24 |
2863361576 ps |
| T1039 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.663160094 |
|
|
Feb 18 04:07:43 PM PST 24 |
Feb 18 04:12:07 PM PST 24 |
2543273160 ps |
| T358 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.2482138368 |
|
|
Feb 18 04:10:51 PM PST 24 |
Feb 18 04:20:14 PM PST 24 |
3238275036 ps |
| T1040 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.770963586 |
|
|
Feb 18 04:14:44 PM PST 24 |
Feb 18 04:19:06 PM PST 24 |
3630298325 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.3338171896 |
|
|
Feb 18 03:52:04 PM PST 24 |
Feb 18 04:06:56 PM PST 24 |
6277477584 ps |
| T99 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2155387904 |
|
|
Feb 18 04:13:59 PM PST 24 |
Feb 18 04:37:04 PM PST 24 |
19819441960 ps |
| T115 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1765980877 |
|
|
Feb 18 04:18:57 PM PST 24 |
Feb 18 04:27:39 PM PST 24 |
3978071828 ps |
| T261 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2913565002 |
|
|
Feb 18 04:00:33 PM PST 24 |
Feb 18 04:33:00 PM PST 24 |
8718748280 ps |
| T176 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.299798005 |
|
|
Feb 18 03:58:55 PM PST 24 |
Feb 18 04:09:20 PM PST 24 |
4928002546 ps |
| T262 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4231960449 |
|
|
Feb 18 04:23:31 PM PST 24 |
Feb 18 04:29:07 PM PST 24 |
3178448408 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.3248304773 |
|
|
Feb 18 04:10:46 PM PST 24 |
Feb 18 04:19:13 PM PST 24 |
4569500970 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.3547837991 |
|
|
Feb 18 04:01:11 PM PST 24 |
Feb 18 04:05:24 PM PST 24 |
3327606072 ps |
| T265 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.4040609800 |
|
|
Feb 18 04:10:40 PM PST 24 |
Feb 18 04:15:17 PM PST 24 |
3193696595 ps |
| T266 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.457442527 |
|
|
Feb 18 04:21:20 PM PST 24 |
Feb 18 04:28:08 PM PST 24 |
2891389632 ps |
| T223 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.1883755557 |
|
|
Feb 18 03:58:39 PM PST 24 |
Feb 18 04:07:59 PM PST 24 |
4059290340 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.1916707289 |
|
|
Feb 18 04:09:13 PM PST 24 |
Feb 18 04:13:18 PM PST 24 |
2929844040 ps |
| T344 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.1937104331 |
|
|
Feb 18 04:19:56 PM PST 24 |
Feb 18 04:31:37 PM PST 24 |
4723611836 ps |
| T1042 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.1378603305 |
|
|
Feb 18 03:58:12 PM PST 24 |
Feb 18 04:06:05 PM PST 24 |
3585945764 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1853876603 |
|
|
Feb 18 04:09:18 PM PST 24 |
Feb 18 04:14:05 PM PST 24 |
2795840400 ps |
| T816 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.262679311 |
|
|
Feb 18 04:22:13 PM PST 24 |
Feb 18 04:32:05 PM PST 24 |
5069713800 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3926166601 |
|
|
Feb 18 04:11:40 PM PST 24 |
Feb 18 04:16:39 PM PST 24 |
2553660552 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.2531937826 |
|
|
Feb 18 03:57:22 PM PST 24 |
Feb 18 04:15:24 PM PST 24 |
5931960267 ps |
| T1046 |
/workspace/coverage/default/1.rom_keymgr_functest.4179883460 |
|
|
Feb 18 04:06:36 PM PST 24 |
Feb 18 04:15:51 PM PST 24 |
4883499844 ps |
| T1047 |
/workspace/coverage/default/2.chip_sw_aes_enc.3404140781 |
|
|
Feb 18 04:12:09 PM PST 24 |
Feb 18 04:17:22 PM PST 24 |
2526706998 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.2111575561 |
|
|
Feb 18 03:52:32 PM PST 24 |
Feb 18 04:02:06 PM PST 24 |
4427093390 ps |
| T364 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.2000884932 |
|
|
Feb 18 04:02:06 PM PST 24 |
Feb 18 04:51:38 PM PST 24 |
12023558672 ps |
| T69 |
/workspace/coverage/default/0.chip_tap_straps_rma.1003481392 |
|
|
Feb 18 03:54:52 PM PST 24 |
Feb 18 04:03:56 PM PST 24 |
6075188980 ps |
| T1048 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2491572141 |
|
|
Feb 18 03:55:41 PM PST 24 |
Feb 18 04:05:42 PM PST 24 |
4840150168 ps |
| T1049 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.2312611459 |
|
|
Feb 18 04:07:35 PM PST 24 |
Feb 18 04:12:55 PM PST 24 |
3072833560 ps |
| T669 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1906489316 |
|
|
Feb 18 04:14:49 PM PST 24 |
Feb 18 04:22:47 PM PST 24 |
4335833337 ps |