T1023 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3053554 |
|
|
Feb 29 03:50:21 PM PST 24 |
Feb 29 04:40:59 PM PST 24 |
23486141046 ps |
T1024 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.912180520 |
|
|
Feb 29 03:51:11 PM PST 24 |
Feb 29 04:20:19 PM PST 24 |
11125274123 ps |
T1025 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.3730516230 |
|
|
Feb 29 03:37:40 PM PST 24 |
Feb 29 03:41:55 PM PST 24 |
2218928720 ps |
T1026 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1659310335 |
|
|
Feb 29 03:40:57 PM PST 24 |
Feb 29 03:46:07 PM PST 24 |
3236277494 ps |
T1027 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2546765855 |
|
|
Feb 29 03:39:43 PM PST 24 |
Feb 29 04:07:35 PM PST 24 |
6355754359 ps |
T1028 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.2075312361 |
|
|
Feb 29 03:43:18 PM PST 24 |
Feb 29 03:57:34 PM PST 24 |
7182692220 ps |
T1029 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.3110658479 |
|
|
Feb 29 03:28:14 PM PST 24 |
Feb 29 03:34:22 PM PST 24 |
4625728700 ps |
T1030 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.19853309 |
|
|
Feb 29 03:41:01 PM PST 24 |
Feb 29 04:30:41 PM PST 24 |
36901950198 ps |
T1031 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.185938199 |
|
|
Feb 29 03:27:34 PM PST 24 |
Feb 29 04:33:28 PM PST 24 |
18325287387 ps |
T1032 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1267913617 |
|
|
Feb 29 03:29:45 PM PST 24 |
Feb 29 03:39:55 PM PST 24 |
4697972068 ps |
T1033 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.1440471449 |
|
|
Feb 29 03:28:20 PM PST 24 |
Feb 29 03:32:34 PM PST 24 |
2517739448 ps |
T1034 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3832050027 |
|
|
Feb 29 03:31:51 PM PST 24 |
Feb 29 03:38:02 PM PST 24 |
5024412286 ps |
T1035 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.2876282774 |
|
|
Feb 29 03:47:56 PM PST 24 |
Feb 29 03:56:20 PM PST 24 |
3272206858 ps |
T692 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3679072434 |
|
|
Feb 29 03:29:20 PM PST 24 |
Feb 29 03:33:29 PM PST 24 |
2915434550 ps |
T120 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3626589113 |
|
|
Feb 29 03:43:26 PM PST 24 |
Feb 29 03:52:24 PM PST 24 |
4099376560 ps |
T1036 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.2970931731 |
|
|
Feb 29 03:50:24 PM PST 24 |
Feb 29 03:55:23 PM PST 24 |
3497093414 ps |
T1037 |
/workspace/coverage/default/1.chip_tap_straps_prod.3413211327 |
|
|
Feb 29 03:44:27 PM PST 24 |
Feb 29 04:06:33 PM PST 24 |
13194936501 ps |
T1038 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.321546561 |
|
|
Feb 29 03:42:18 PM PST 24 |
Feb 29 03:57:12 PM PST 24 |
5171937132 ps |
T303 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.2141450779 |
|
|
Feb 29 03:27:31 PM PST 24 |
Feb 29 03:30:41 PM PST 24 |
2553926288 ps |
T1039 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.2278085819 |
|
|
Feb 29 03:50:23 PM PST 24 |
Feb 29 04:01:17 PM PST 24 |
9078235090 ps |
T1040 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.1246384449 |
|
|
Feb 29 03:39:22 PM PST 24 |
Feb 29 04:03:01 PM PST 24 |
9676653320 ps |
T813 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2737550350 |
|
|
Feb 29 03:54:32 PM PST 24 |
Feb 29 04:00:11 PM PST 24 |
3225761202 ps |
T44 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.4040450689 |
|
|
Feb 29 03:50:54 PM PST 24 |
Feb 29 03:57:05 PM PST 24 |
4598945816 ps |
T241 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.4165523840 |
|
|
Feb 29 03:43:16 PM PST 24 |
Feb 29 04:03:23 PM PST 24 |
10342814630 ps |
T1041 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.770033221 |
|
|
Feb 29 03:37:26 PM PST 24 |
Feb 29 03:40:22 PM PST 24 |
2870519148 ps |
T1042 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.3301045455 |
|
|
Feb 29 03:42:03 PM PST 24 |
Feb 29 03:52:05 PM PST 24 |
4830145002 ps |
T227 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.742984087 |
|
|
Feb 29 03:40:05 PM PST 24 |
Feb 29 03:47:45 PM PST 24 |
6562438848 ps |
T790 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.2128882525 |
|
|
Feb 29 04:09:24 PM PST 24 |
Feb 29 04:15:57 PM PST 24 |
3988398858 ps |
T1043 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.3529492336 |
|
|
Feb 29 03:39:00 PM PST 24 |
Feb 29 04:32:54 PM PST 24 |
11755107438 ps |
T1044 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.3212753797 |
|
|
Feb 29 04:00:52 PM PST 24 |
Feb 29 04:09:32 PM PST 24 |
5341121292 ps |
T1045 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1000562971 |
|
|
Feb 29 03:29:24 PM PST 24 |
Feb 29 03:47:16 PM PST 24 |
5305486986 ps |
T736 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.703928122 |
|
|
Feb 29 04:09:28 PM PST 24 |
Feb 29 04:15:44 PM PST 24 |
3603437880 ps |
T140 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1832661188 |
|
|
Feb 29 03:26:37 PM PST 24 |
Feb 29 03:28:36 PM PST 24 |
2648866237 ps |
T724 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3812889078 |
|
|
Feb 29 03:29:28 PM PST 24 |
Feb 29 03:35:08 PM PST 24 |
4701683212 ps |
T67 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.2947773163 |
|
|
Feb 29 03:27:43 PM PST 24 |
Feb 29 03:35:15 PM PST 24 |
2953657800 ps |
T1046 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1319478743 |
|
|
Feb 29 03:45:00 PM PST 24 |
Feb 29 03:56:51 PM PST 24 |
6713250767 ps |
T1047 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2333321866 |
|
|
Feb 29 03:31:42 PM PST 24 |
Feb 29 03:36:51 PM PST 24 |
2772822424 ps |
T1048 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.36859140 |
|
|
Feb 29 04:03:21 PM PST 24 |
Feb 29 04:11:40 PM PST 24 |
3621834380 ps |
T1049 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.1829214467 |
|
|
Feb 29 04:11:07 PM PST 24 |
Feb 29 04:19:28 PM PST 24 |
4975200866 ps |
T756 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.967753680 |
|
|
Feb 29 04:02:22 PM PST 24 |
Feb 29 04:10:46 PM PST 24 |
3788403848 ps |
T1050 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.1195774012 |
|
|
Feb 29 03:51:55 PM PST 24 |
Feb 29 03:56:06 PM PST 24 |
2582313723 ps |
T811 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.765017069 |
|
|
Feb 29 04:02:20 PM PST 24 |
Feb 29 04:09:08 PM PST 24 |
3719784952 ps |
T1051 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.3372469574 |
|
|
Feb 29 03:29:37 PM PST 24 |
Feb 29 04:35:36 PM PST 24 |
10821361838 ps |
T1052 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.2168524226 |
|
|
Feb 29 03:52:30 PM PST 24 |
Feb 29 04:31:30 PM PST 24 |
8729593288 ps |
T481 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3881789030 |
|
|
Feb 29 03:29:59 PM PST 24 |
Feb 29 03:43:20 PM PST 24 |
4206042006 ps |
T35 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.1956947112 |
|
|
Feb 29 03:40:36 PM PST 24 |
Feb 29 03:49:02 PM PST 24 |
3597389951 ps |
T1053 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3221147951 |
|
|
Feb 29 03:29:49 PM PST 24 |
Feb 29 03:33:30 PM PST 24 |
2661535352 ps |
T1054 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2428533428 |
|
|
Feb 29 04:10:03 PM PST 24 |
Feb 29 04:17:39 PM PST 24 |
4140070480 ps |
T1055 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.807392889 |
|
|
Feb 29 03:40:37 PM PST 24 |
Feb 29 05:24:54 PM PST 24 |
51023773903 ps |
T1056 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.946381793 |
|
|
Feb 29 03:51:16 PM PST 24 |
Feb 29 03:55:35 PM PST 24 |
3386191837 ps |
T798 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2640501994 |
|
|
Feb 29 04:04:53 PM PST 24 |
Feb 29 04:11:16 PM PST 24 |
2902575258 ps |
T1057 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1224393262 |
|
|
Feb 29 04:08:10 PM PST 24 |
Feb 29 04:17:04 PM PST 24 |
4011371668 ps |
T318 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3925629620 |
|
|
Feb 29 03:32:03 PM PST 24 |
Feb 29 03:38:32 PM PST 24 |
2922773454 ps |
T1058 |
/workspace/coverage/default/0.rom_e2e_smoke.544478316 |
|
|
Feb 29 03:34:22 PM PST 24 |
Feb 29 04:07:39 PM PST 24 |
8630548792 ps |
T1059 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3017061343 |
|
|
Feb 29 03:58:30 PM PST 24 |
Feb 29 04:05:43 PM PST 24 |
2982246362 ps |
T1060 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1495100384 |
|
|
Feb 29 03:58:06 PM PST 24 |
Feb 29 04:01:53 PM PST 24 |
2245787558 ps |
T1061 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.416282730 |
|
|
Feb 29 03:28:43 PM PST 24 |
Feb 29 03:38:41 PM PST 24 |
5912471528 ps |
T1062 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.774994790 |
|
|
Feb 29 04:04:51 PM PST 24 |
Feb 29 04:11:30 PM PST 24 |
4031306034 ps |
T112 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.2077042496 |
|
|
Feb 29 03:50:05 PM PST 24 |
Feb 29 06:51:12 PM PST 24 |
59473228758 ps |
T737 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1211623277 |
|
|
Feb 29 04:02:38 PM PST 24 |
Feb 29 04:15:08 PM PST 24 |
5876260060 ps |
T1063 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3730338723 |
|
|
Feb 29 03:36:45 PM PST 24 |
Feb 29 03:41:35 PM PST 24 |
3265322110 ps |
T400 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.688495766 |
|
|
Feb 29 03:38:24 PM PST 24 |
Feb 29 03:46:40 PM PST 24 |
3969265422 ps |
T1064 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2931451751 |
|
|
Feb 29 04:02:01 PM PST 24 |
Feb 29 04:15:12 PM PST 24 |
5118657047 ps |
T801 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1953648850 |
|
|
Feb 29 04:02:57 PM PST 24 |
Feb 29 04:08:43 PM PST 24 |
3287278720 ps |
T21 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3785110276 |
|
|
Feb 29 03:28:04 PM PST 24 |
Feb 29 03:54:26 PM PST 24 |
23096453300 ps |
T1065 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2664485153 |
|
|
Feb 29 03:49:04 PM PST 24 |
Feb 29 04:05:47 PM PST 24 |
5291521300 ps |
T653 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.1602934331 |
|
|
Feb 29 03:31:14 PM PST 24 |
Feb 29 03:59:27 PM PST 24 |
5525553000 ps |
T754 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3062545515 |
|
|
Feb 29 04:02:08 PM PST 24 |
Feb 29 04:11:18 PM PST 24 |
3967492904 ps |
T27 |
/workspace/coverage/default/2.chip_sw_gpio.1040318633 |
|
|
Feb 29 03:49:39 PM PST 24 |
Feb 29 03:56:38 PM PST 24 |
3730758658 ps |
T1066 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1527446204 |
|
|
Feb 29 04:01:26 PM PST 24 |
Feb 29 05:11:32 PM PST 24 |
22939655004 ps |
T806 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.4259429659 |
|
|
Feb 29 04:01:28 PM PST 24 |
Feb 29 04:08:00 PM PST 24 |
3845101240 ps |
T316 |
/workspace/coverage/default/0.chip_sival_flash_info_access.1629293190 |
|
|
Feb 29 03:32:22 PM PST 24 |
Feb 29 03:41:59 PM PST 24 |
3483460344 ps |
T1067 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.1280678334 |
|
|
Feb 29 03:49:01 PM PST 24 |
Feb 29 03:54:06 PM PST 24 |
3247272380 ps |
T1068 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2663179093 |
|
|
Feb 29 03:54:52 PM PST 24 |
Feb 29 04:04:47 PM PST 24 |
4956017046 ps |
T1069 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.1056359624 |
|
|
Feb 29 03:40:08 PM PST 24 |
Feb 29 05:13:27 PM PST 24 |
46620819802 ps |
T654 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.840010873 |
|
|
Feb 29 03:54:56 PM PST 24 |
Feb 29 04:25:10 PM PST 24 |
7826533200 ps |
T765 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.724018574 |
|
|
Feb 29 04:00:40 PM PST 24 |
Feb 29 04:12:30 PM PST 24 |
4381051782 ps |
T723 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2428004700 |
|
|
Feb 29 03:51:55 PM PST 24 |
Feb 29 04:27:01 PM PST 24 |
23347089256 ps |
T1070 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.269380420 |
|
|
Feb 29 03:44:55 PM PST 24 |
Feb 29 03:58:15 PM PST 24 |
5018372032 ps |
T1071 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.133097947 |
|
|
Feb 29 04:00:39 PM PST 24 |
Feb 29 04:09:52 PM PST 24 |
6442638785 ps |
T1072 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.2410180910 |
|
|
Feb 29 03:39:18 PM PST 24 |
Feb 29 04:11:27 PM PST 24 |
6863196160 ps |
T729 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2878903633 |
|
|
Feb 29 03:28:09 PM PST 24 |
Feb 29 04:26:55 PM PST 24 |
20212384779 ps |
T1073 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.3553124099 |
|
|
Feb 29 03:42:49 PM PST 24 |
Feb 29 03:52:29 PM PST 24 |
5762140396 ps |
T323 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.2204683998 |
|
|
Feb 29 03:52:55 PM PST 24 |
Feb 29 04:04:35 PM PST 24 |
2901289368 ps |
T1074 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3189721653 |
|
|
Feb 29 03:57:10 PM PST 24 |
Feb 29 04:00:59 PM PST 24 |
2850994982 ps |
T207 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2284358537 |
|
|
Feb 29 03:38:26 PM PST 24 |
Feb 29 03:49:14 PM PST 24 |
6010135864 ps |
T1075 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.3757074101 |
|
|
Feb 29 03:52:16 PM PST 24 |
Feb 29 03:58:05 PM PST 24 |
3023030023 ps |
T1076 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2567113280 |
|
|
Feb 29 03:31:20 PM PST 24 |
Feb 29 03:54:00 PM PST 24 |
5948023672 ps |
T1077 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.3911351874 |
|
|
Feb 29 03:38:05 PM PST 24 |
Feb 29 04:12:01 PM PST 24 |
9030942642 ps |
T1078 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.806450079 |
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|
Feb 29 04:00:30 PM PST 24 |
Feb 29 04:19:42 PM PST 24 |
13279788647 ps |
T799 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2405359565 |
|
|
Feb 29 04:11:02 PM PST 24 |
Feb 29 04:22:58 PM PST 24 |
5185972080 ps |
T113 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.2412734108 |
|
|
Feb 29 03:39:35 PM PST 24 |
Feb 29 06:40:12 PM PST 24 |
59509259286 ps |
T1079 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.4264962011 |
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|
Feb 29 03:50:57 PM PST 24 |
Feb 29 04:29:31 PM PST 24 |
8814724330 ps |
T1080 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.375717599 |
|
|
Feb 29 03:31:23 PM PST 24 |
Feb 29 03:36:39 PM PST 24 |
3384137638 ps |
T265 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.2035986265 |
|
|
Feb 29 04:04:44 PM PST 24 |
Feb 29 04:15:27 PM PST 24 |
5008826408 ps |
T1081 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2886900407 |
|
|
Feb 29 03:40:25 PM PST 24 |
Feb 29 03:46:38 PM PST 24 |
2314833204 ps |
T1082 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.1233927775 |
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|
Feb 29 04:02:09 PM PST 24 |
Feb 29 04:33:48 PM PST 24 |
8950571867 ps |
T1083 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2376024938 |
|
|
Feb 29 03:39:31 PM PST 24 |
Feb 29 03:49:21 PM PST 24 |
4776353395 ps |
T652 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4263908899 |
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|
Feb 29 03:31:15 PM PST 24 |
Feb 29 04:47:05 PM PST 24 |
25361193081 ps |
T1084 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3921809044 |
|
|
Feb 29 03:52:56 PM PST 24 |
Feb 29 04:40:37 PM PST 24 |
28729338592 ps |
T206 |
/workspace/coverage/default/1.chip_jtag_csr_rw.522958669 |
|
|
Feb 29 03:37:52 PM PST 24 |
Feb 29 04:21:04 PM PST 24 |
21780530000 ps |
T708 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.2478466431 |
|
|
Feb 29 03:33:15 PM PST 24 |
Feb 29 03:40:06 PM PST 24 |
4689711480 ps |
T1085 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.3988009979 |
|
|
Feb 29 04:00:28 PM PST 24 |
Feb 29 04:17:02 PM PST 24 |
5541449496 ps |
T1086 |
/workspace/coverage/default/1.chip_sw_power_idle_load.3867483000 |
|
|
Feb 29 03:46:50 PM PST 24 |
Feb 29 03:58:15 PM PST 24 |
4160380618 ps |
T1087 |
/workspace/coverage/default/0.chip_sw_uart_smoketest_signed.2856527286 |
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Feb 29 03:41:10 PM PST 24 |
Feb 29 04:14:23 PM PST 24 |
8400530256 ps |
T1088 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.4259305035 |
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|
Feb 29 03:43:49 PM PST 24 |
Feb 29 03:49:20 PM PST 24 |
3082360797 ps |
T1089 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.33835846 |
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|
Feb 29 03:40:12 PM PST 24 |
Feb 29 03:49:30 PM PST 24 |
5821948170 ps |
T1090 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.905268547 |
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|
Feb 29 03:49:22 PM PST 24 |
Feb 29 04:07:28 PM PST 24 |
5794846180 ps |
T1091 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3158243464 |
|
|
Feb 29 03:50:49 PM PST 24 |
Feb 29 04:17:25 PM PST 24 |
6878694908 ps |
T1092 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1166298934 |
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Feb 29 03:28:19 PM PST 24 |
Feb 29 03:35:23 PM PST 24 |
4889377682 ps |
T1093 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.3231155915 |
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Feb 29 03:38:49 PM PST 24 |
Feb 29 04:16:43 PM PST 24 |
8568110032 ps |
T812 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.601408469 |
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Feb 29 04:08:31 PM PST 24 |
Feb 29 04:16:46 PM PST 24 |
3945105320 ps |
T133 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.2345409555 |
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Feb 29 04:02:59 PM PST 24 |
Feb 29 04:11:32 PM PST 24 |
5555512896 ps |
T1094 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2559780796 |
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Feb 29 03:54:39 PM PST 24 |
Feb 29 07:04:37 PM PST 24 |
256001276840 ps |
T1095 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.2329984982 |
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Feb 29 04:01:59 PM PST 24 |
Feb 29 04:43:42 PM PST 24 |
14055846028 ps |
T163 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1768795405 |
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Feb 29 03:54:31 PM PST 24 |
Feb 29 04:02:02 PM PST 24 |
5199657008 ps |
T781 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.800856252 |
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|
Feb 29 04:06:51 PM PST 24 |
Feb 29 04:14:35 PM PST 24 |
3202051154 ps |
T1096 |
/workspace/coverage/default/2.rom_e2e_static_critical.1835584447 |
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Feb 29 04:02:18 PM PST 24 |
Feb 29 04:37:46 PM PST 24 |
11101725864 ps |
T46 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.580531343 |
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Feb 29 03:39:20 PM PST 24 |
Feb 29 03:44:57 PM PST 24 |
3998914040 ps |
T1097 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.975757845 |
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Feb 29 04:07:35 PM PST 24 |
Feb 29 04:18:22 PM PST 24 |
5795042666 ps |
T785 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1062212294 |
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Feb 29 04:04:51 PM PST 24 |
Feb 29 04:12:47 PM PST 24 |
3460963368 ps |
T814 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.3041477431 |
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Feb 29 04:07:23 PM PST 24 |
Feb 29 04:14:06 PM PST 24 |
3433186108 ps |
T1098 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2646473229 |
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|
Feb 29 04:03:31 PM PST 24 |
Feb 29 04:34:48 PM PST 24 |
8183154899 ps |
T1099 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.3787879353 |
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Feb 29 03:52:28 PM PST 24 |
Feb 29 04:03:31 PM PST 24 |
4854118460 ps |
T1100 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3540791808 |
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Feb 29 03:38:42 PM PST 24 |
Feb 29 04:17:43 PM PST 24 |
8689530481 ps |
T1101 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.4141952130 |
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|
Feb 29 03:56:03 PM PST 24 |
Feb 29 04:08:06 PM PST 24 |
6671393370 ps |
T1102 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.1047564986 |
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|
Feb 29 03:31:26 PM PST 24 |
Feb 29 03:37:52 PM PST 24 |
4860747513 ps |
T1103 |
/workspace/coverage/default/0.rom_keymgr_functest.93319692 |
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|
Feb 29 03:37:16 PM PST 24 |
Feb 29 03:47:20 PM PST 24 |
5052259294 ps |
T1104 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.201579001 |
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Feb 29 03:59:14 PM PST 24 |
Feb 29 04:15:19 PM PST 24 |
6218671636 ps |
T1105 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.4284909330 |
|
|
Feb 29 03:39:14 PM PST 24 |
Feb 29 04:16:00 PM PST 24 |
9390884410 ps |
T1106 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.4250855091 |
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|
Feb 29 04:01:51 PM PST 24 |
Feb 29 04:12:52 PM PST 24 |
6141210351 ps |
T1107 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.3333451960 |
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|
Feb 29 03:28:21 PM PST 24 |
Feb 29 03:42:22 PM PST 24 |
7987362920 ps |
T1108 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.4280747217 |
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Feb 29 03:51:13 PM PST 24 |
Feb 29 05:20:25 PM PST 24 |
46601141528 ps |
T1109 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1166064010 |
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Feb 29 03:44:56 PM PST 24 |
Feb 29 04:00:21 PM PST 24 |
11855141375 ps |
T1110 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.594254409 |
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Feb 29 03:42:52 PM PST 24 |
Feb 29 04:21:11 PM PST 24 |
8517553772 ps |
T387 |
/workspace/coverage/default/0.chip_jtag_mem_access.340079771 |
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|
Feb 29 03:23:01 PM PST 24 |
Feb 29 03:48:19 PM PST 24 |
13951170375 ps |
T275 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.389874540 |
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Feb 29 03:31:41 PM PST 24 |
Feb 29 03:35:21 PM PST 24 |
2242135683 ps |
T1111 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2302992585 |
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Feb 29 03:42:12 PM PST 24 |
Feb 29 03:55:50 PM PST 24 |
4415312685 ps |
T795 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1251513679 |
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Feb 29 04:01:19 PM PST 24 |
Feb 29 04:07:41 PM PST 24 |
3945878052 ps |
T1112 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.3961920313 |
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Feb 29 03:30:24 PM PST 24 |
Feb 29 03:37:17 PM PST 24 |
4490514488 ps |
T786 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3826549317 |
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Feb 29 04:05:16 PM PST 24 |
Feb 29 04:11:26 PM PST 24 |
3372065000 ps |
T1113 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.76968566 |
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Feb 29 03:55:32 PM PST 24 |
Feb 29 04:05:10 PM PST 24 |
9868470665 ps |
T1114 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2821580618 |
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Feb 29 03:28:43 PM PST 24 |
Feb 29 03:38:37 PM PST 24 |
18909961570 ps |
T1115 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.1571016321 |
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Feb 29 03:27:39 PM PST 24 |
Feb 29 03:42:01 PM PST 24 |
5974462776 ps |
T348 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1991412710 |
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Feb 29 03:56:24 PM PST 24 |
Feb 29 04:29:38 PM PST 24 |
22500138590 ps |
T810 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.2994899334 |
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Feb 29 04:06:00 PM PST 24 |
Feb 29 04:14:09 PM PST 24 |
3783740420 ps |
T771 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.3153020041 |
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Feb 29 04:10:00 PM PST 24 |
Feb 29 04:23:41 PM PST 24 |
5002318660 ps |
T84 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1486582246 |
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Feb 29 04:06:57 PM PST 24 |
Feb 29 04:17:22 PM PST 24 |
4854047724 ps |
T1116 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.2246354209 |
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Feb 29 03:27:17 PM PST 24 |
Feb 29 07:07:52 PM PST 24 |
77757873600 ps |
T1117 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.2652432336 |
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Feb 29 03:41:26 PM PST 24 |
Feb 29 04:20:05 PM PST 24 |
30168918420 ps |
T734 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2514587710 |
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Feb 29 04:11:08 PM PST 24 |
Feb 29 04:21:48 PM PST 24 |
6133504432 ps |
T1118 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.790085253 |
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Feb 29 03:51:49 PM PST 24 |
Feb 29 04:11:52 PM PST 24 |
12765700173 ps |
T1119 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2874890896 |
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Feb 29 03:48:47 PM PST 24 |
Feb 29 03:52:50 PM PST 24 |
3412736904 ps |
T1120 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3228000643 |
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Feb 29 03:52:16 PM PST 24 |
Feb 29 04:05:04 PM PST 24 |
8336374164 ps |
T1121 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.768361267 |
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Feb 29 03:51:20 PM PST 24 |
Feb 29 03:55:30 PM PST 24 |
3015458598 ps |
T1122 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.1781576245 |
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Feb 29 04:04:02 PM PST 24 |
Feb 29 04:10:49 PM PST 24 |
3466001222 ps |
T1123 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.4118445121 |
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|
Feb 29 03:28:06 PM PST 24 |
Feb 29 03:35:43 PM PST 24 |
8027616750 ps |
T114 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3072690852 |
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|
Feb 29 03:34:00 PM PST 24 |
Feb 29 06:42:40 PM PST 24 |
57736851004 ps |
T1124 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1609712764 |
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Feb 29 03:39:00 PM PST 24 |
Feb 29 03:54:07 PM PST 24 |
6021735111 ps |
T1125 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3618029061 |
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Feb 29 03:33:03 PM PST 24 |
Feb 29 03:56:14 PM PST 24 |
5828490102 ps |
T1126 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.1495895460 |
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|
Feb 29 04:01:01 PM PST 24 |
Feb 29 04:14:00 PM PST 24 |
5374737752 ps |
T1127 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.4124362611 |
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Feb 29 03:30:04 PM PST 24 |
Feb 29 03:35:37 PM PST 24 |
3155140436 ps |
T666 |
/workspace/coverage/default/0.chip_tap_straps_dev.4131393342 |
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|
Feb 29 03:30:26 PM PST 24 |
Feb 29 03:50:48 PM PST 24 |
11654704250 ps |
T1128 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.2314175070 |
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|
Feb 29 04:04:21 PM PST 24 |
Feb 29 04:13:38 PM PST 24 |
4236632040 ps |
T1129 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.2056055214 |
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|
Feb 29 03:27:18 PM PST 24 |
Feb 29 03:35:58 PM PST 24 |
7529799236 ps |
T284 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.4179071253 |
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|
Feb 29 03:54:48 PM PST 24 |
Feb 29 04:07:00 PM PST 24 |
4211022600 ps |
T304 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.914681976 |
|
|
Feb 29 03:38:11 PM PST 24 |
Feb 29 03:41:39 PM PST 24 |
2522862984 ps |
T1130 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1168397619 |
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|
Feb 29 03:50:56 PM PST 24 |
Feb 29 03:59:39 PM PST 24 |
4270207136 ps |
T1131 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.913997612 |
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Feb 29 03:33:25 PM PST 24 |
Feb 29 03:43:34 PM PST 24 |
3939607708 ps |
T376 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3978945919 |
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|
Feb 29 04:04:37 PM PST 24 |
Feb 29 04:10:55 PM PST 24 |
3122771740 ps |
T377 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.4036913439 |
|
|
Feb 29 04:02:43 PM PST 24 |
Feb 29 04:10:03 PM PST 24 |
6728787340 ps |
T378 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1547892992 |
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|
Feb 29 04:10:00 PM PST 24 |
Feb 29 04:16:28 PM PST 24 |
3439480116 ps |
T379 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.3758117814 |
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|
Feb 29 03:47:48 PM PST 24 |
Feb 29 04:18:04 PM PST 24 |
7267117496 ps |
T380 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.2825671563 |
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|
Feb 29 03:41:24 PM PST 24 |
Feb 29 03:51:30 PM PST 24 |
4996861888 ps |
T381 |
/workspace/coverage/default/1.chip_sw_kmac_idle.408397195 |
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|
Feb 29 03:46:08 PM PST 24 |
Feb 29 03:50:55 PM PST 24 |
2696181540 ps |
T382 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.764383421 |
|
|
Feb 29 03:26:39 PM PST 24 |
Feb 29 03:41:56 PM PST 24 |
5217192028 ps |
T383 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.1655930149 |
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Feb 29 04:09:22 PM PST 24 |
Feb 29 04:21:13 PM PST 24 |
4577996500 ps |
T384 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.721322797 |
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|
Feb 29 03:27:45 PM PST 24 |
Feb 29 03:44:47 PM PST 24 |
5770305626 ps |
T385 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.3508493976 |
|
|
Feb 29 03:43:25 PM PST 24 |
Feb 29 04:04:50 PM PST 24 |
8403926076 ps |
T1132 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.742368554 |
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|
Feb 29 03:39:54 PM PST 24 |
Feb 29 04:24:03 PM PST 24 |
9137239696 ps |
T1133 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.2918338851 |
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|
Feb 29 03:39:27 PM PST 24 |
Feb 29 05:09:59 PM PST 24 |
49034242231 ps |
T49 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.1081380613 |
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|
Feb 29 03:27:10 PM PST 24 |
Feb 29 03:31:11 PM PST 24 |
3285540512 ps |
T1134 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2003862425 |
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Feb 29 03:30:41 PM PST 24 |
Feb 29 03:37:40 PM PST 24 |
6049409860 ps |
T803 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.2347353675 |
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|
Feb 29 04:03:09 PM PST 24 |
Feb 29 04:10:03 PM PST 24 |
3634242852 ps |
T1135 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2843716634 |
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|
Feb 29 03:56:11 PM PST 24 |
Feb 29 04:06:22 PM PST 24 |
5356916204 ps |
T1136 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.3097485879 |
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|
Feb 29 03:58:35 PM PST 24 |
Feb 29 04:03:27 PM PST 24 |
2747483334 ps |
T1137 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.714319834 |
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|
Feb 29 03:47:29 PM PST 24 |
Feb 29 03:51:32 PM PST 24 |
2364477716 ps |
T1138 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.3686531948 |
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Feb 29 03:42:10 PM PST 24 |
Feb 29 03:46:36 PM PST 24 |
2204038250 ps |
T1139 |
/workspace/coverage/default/3.chip_tap_straps_prod.1062330450 |
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Feb 29 03:59:48 PM PST 24 |
Feb 29 04:02:47 PM PST 24 |
2585736268 ps |
T1140 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.726081737 |
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|
Feb 29 03:53:23 PM PST 24 |
Feb 29 03:57:18 PM PST 24 |
2451406540 ps |
T763 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1911420491 |
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Feb 29 04:07:41 PM PST 24 |
Feb 29 04:19:54 PM PST 24 |
5377943502 ps |
T1141 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.834010082 |
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Feb 29 04:01:28 PM PST 24 |
Feb 29 04:10:42 PM PST 24 |
7394957144 ps |
T1142 |
/workspace/coverage/default/1.chip_sw_example_flash.4030060955 |
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Feb 29 03:37:44 PM PST 24 |
Feb 29 03:40:30 PM PST 24 |
3082125268 ps |
T1143 |
/workspace/coverage/default/0.chip_tap_straps_prod.867307921 |
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Feb 29 03:31:01 PM PST 24 |
Feb 29 03:33:10 PM PST 24 |
2295016700 ps |
T1144 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.1124193653 |
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Feb 29 03:28:06 PM PST 24 |
Feb 29 03:31:37 PM PST 24 |
2998712002 ps |
T1145 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2742623579 |
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Feb 29 03:32:29 PM PST 24 |
Feb 29 03:38:45 PM PST 24 |
5579114647 ps |
T1146 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.734461998 |
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Feb 29 03:55:49 PM PST 24 |
Feb 29 04:20:48 PM PST 24 |
9042599520 ps |
T1147 |
/workspace/coverage/default/2.chip_tap_straps_dev.1288798413 |
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Feb 29 03:56:45 PM PST 24 |
Feb 29 04:18:26 PM PST 24 |
9681675568 ps |
T1148 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.3929825030 |
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Feb 29 03:50:05 PM PST 24 |
Feb 29 05:13:54 PM PST 24 |
23126532864 ps |
T1149 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.794772162 |
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Feb 29 03:59:55 PM PST 24 |
Feb 29 04:41:01 PM PST 24 |
14525655716 ps |
T1150 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.2563431194 |
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Feb 29 03:40:43 PM PST 24 |
Feb 29 03:49:40 PM PST 24 |
5515329115 ps |
T1151 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.3230783404 |
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Feb 29 03:50:26 PM PST 24 |
Feb 29 04:40:02 PM PST 24 |
19605700824 ps |
T166 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3212191279 |
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Feb 29 03:54:45 PM PST 24 |
Feb 29 04:10:31 PM PST 24 |
6848085056 ps |
T1152 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2409631510 |
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Feb 29 03:49:27 PM PST 24 |
Feb 29 04:15:56 PM PST 24 |
9121183394 ps |
T755 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.428330065 |
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Feb 29 04:04:16 PM PST 24 |
Feb 29 04:14:49 PM PST 24 |
4804471204 ps |
T349 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.178086866 |
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Feb 29 03:55:44 PM PST 24 |
Feb 29 04:01:44 PM PST 24 |
6655884840 ps |
T731 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.1095177540 |
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Feb 29 04:10:41 PM PST 24 |
Feb 29 04:16:25 PM PST 24 |
3513608984 ps |
T1153 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.783138826 |
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Feb 29 03:53:15 PM PST 24 |
Feb 29 04:19:52 PM PST 24 |
7165214092 ps |
T332 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.3485620500 |
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|
Feb 29 04:03:52 PM PST 24 |
Feb 29 04:17:39 PM PST 24 |
7030403080 ps |
T1154 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3576547923 |
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|
Feb 29 04:05:11 PM PST 24 |
Feb 29 04:11:35 PM PST 24 |
3457507880 ps |
T1155 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.1944675262 |
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|
Feb 29 03:53:42 PM PST 24 |
Feb 29 03:59:05 PM PST 24 |
3528115000 ps |
T1156 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.3733234623 |
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|
Feb 29 04:02:47 PM PST 24 |
Feb 29 04:38:09 PM PST 24 |
8576337080 ps |
T1157 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.1859489001 |
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|
Feb 29 03:48:57 PM PST 24 |
Feb 29 03:53:53 PM PST 24 |
2456853872 ps |
T1158 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2935533208 |
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|
Feb 29 03:39:51 PM PST 24 |
Feb 29 04:04:18 PM PST 24 |
9038676884 ps |
T1159 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.2781686556 |
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|
Feb 29 03:41:43 PM PST 24 |
Feb 29 03:45:41 PM PST 24 |
3582531645 ps |
T1160 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3722550917 |
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|
Feb 29 03:38:51 PM PST 24 |
Feb 29 04:14:01 PM PST 24 |
8338324365 ps |
T1161 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3570757238 |
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|
Feb 29 03:29:13 PM PST 24 |
Feb 29 03:34:00 PM PST 24 |
3746230498 ps |
T1162 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3338745782 |
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|
Feb 29 04:00:13 PM PST 24 |
Feb 29 04:14:45 PM PST 24 |
5472903784 ps |
T1163 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.2267740132 |
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|
Feb 29 03:48:07 PM PST 24 |
Feb 29 03:56:48 PM PST 24 |
5912973234 ps |
T1164 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.3137705291 |
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|
Feb 29 03:52:52 PM PST 24 |
Feb 29 04:28:19 PM PST 24 |
9026964425 ps |
T1165 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.3971791228 |
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|
Feb 29 03:31:00 PM PST 24 |
Feb 29 03:34:38 PM PST 24 |
2785042458 ps |
T772 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.2436630447 |
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|
Feb 29 04:01:48 PM PST 24 |
Feb 29 04:08:21 PM PST 24 |
3459222568 ps |
T1166 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.1650579700 |
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|
Feb 29 03:59:30 PM PST 24 |
Feb 29 04:04:33 PM PST 24 |
3000853064 ps |
T1167 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2422677066 |
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|
Feb 29 03:40:35 PM PST 24 |
Feb 29 03:47:23 PM PST 24 |
3421258372 ps |
T1168 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.4179176014 |
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|
Feb 29 04:02:53 PM PST 24 |
Feb 29 04:12:32 PM PST 24 |
4756197448 ps |
T791 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3598649952 |
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|
Feb 29 04:02:29 PM PST 24 |
Feb 29 04:09:17 PM PST 24 |
3869281850 ps |
T1169 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.359105348 |
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|
Feb 29 03:44:23 PM PST 24 |
Feb 29 03:49:51 PM PST 24 |
4412862540 ps |
T1170 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2948360321 |
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|
Feb 29 03:27:33 PM PST 24 |
Feb 29 03:34:05 PM PST 24 |
5103746881 ps |
T1171 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3137227016 |
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Feb 29 03:55:58 PM PST 24 |
Feb 29 04:06:42 PM PST 24 |
3885383164 ps |
T1172 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2576286940 |
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Feb 29 03:49:53 PM PST 24 |
Feb 29 03:58:48 PM PST 24 |
5393520540 ps |
T1173 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.643807833 |
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|
Feb 29 03:42:19 PM PST 24 |
Feb 29 04:24:43 PM PST 24 |
10211477320 ps |
T1174 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.3424506498 |
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|
Feb 29 04:10:04 PM PST 24 |
Feb 29 04:18:56 PM PST 24 |
4618134772 ps |
T1175 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.616369244 |
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Feb 29 03:30:47 PM PST 24 |
Feb 29 03:48:58 PM PST 24 |
7966291851 ps |
T668 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2764565782 |
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Feb 29 03:51:47 PM PST 24 |
Feb 29 03:53:35 PM PST 24 |
2202177515 ps |
T1176 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2116254314 |
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|
Feb 29 03:34:09 PM PST 24 |
Feb 29 03:47:18 PM PST 24 |
5680227592 ps |
T1177 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.696813943 |
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|
Feb 29 03:40:41 PM PST 24 |
Feb 29 03:49:49 PM PST 24 |
4528807902 ps |
T242 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3118284197 |
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|
Feb 29 04:02:54 PM PST 24 |
Feb 29 04:11:18 PM PST 24 |
4348997090 ps |
T1178 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3984646569 |
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|
Feb 29 03:50:27 PM PST 24 |
Feb 29 03:55:09 PM PST 24 |
2793699444 ps |
T782 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.85236705 |
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|
Feb 29 04:02:56 PM PST 24 |
Feb 29 04:11:50 PM PST 24 |
4251371808 ps |
T1179 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.3953740290 |
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Feb 29 03:49:18 PM PST 24 |
Feb 29 03:52:49 PM PST 24 |
2781652450 ps |
T1180 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.443979885 |
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|
Feb 29 03:41:04 PM PST 24 |
Feb 29 03:55:55 PM PST 24 |
6346676440 ps |
T1181 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4077393849 |
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Feb 29 04:08:42 PM PST 24 |
Feb 29 04:15:43 PM PST 24 |
3446156384 ps |
T1182 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.114745697 |
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|
Feb 29 03:29:00 PM PST 24 |
Feb 29 03:33:39 PM PST 24 |
3181737375 ps |
T85 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.4103845557 |
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Feb 29 04:04:19 PM PST 24 |
Feb 29 04:14:21 PM PST 24 |
5493316956 ps |
T662 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.2795892497 |
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Feb 29 03:57:31 PM PST 24 |
Feb 29 04:07:28 PM PST 24 |
4404460171 ps |
T293 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.2593708713 |
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|
Feb 29 03:53:36 PM PST 24 |
Feb 29 04:18:27 PM PST 24 |
5997285016 ps |
T1183 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.2232160705 |
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Feb 29 03:30:17 PM PST 24 |
Feb 29 03:41:40 PM PST 24 |
7557446396 ps |
T184 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.2973433330 |
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Feb 29 03:50:43 PM PST 24 |
Feb 29 04:06:19 PM PST 24 |
7199349064 ps |
T719 |
/workspace/coverage/default/0.rom_raw_unlock.1176273334 |
|
|
Feb 29 03:37:37 PM PST 24 |
Feb 29 04:10:23 PM PST 24 |
15047245215 ps |
T281 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3127573647 |
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|
Feb 29 03:39:59 PM PST 24 |
Feb 29 04:01:00 PM PST 24 |
9417847924 ps |